firmware/target/arm/as3525/pcm-as3525.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright © 2008-2009 Rafaël Carré
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21 #include "system.h"
  22 #include "audio.h"
  23 #include "string.h"
  24 #include "as3525.h"
  25 #include "pl081.h"
  26 #include "dma-target.h"
  27 #include "clock-target.h"
  28 #include "panic.h"
  29 #include "as3514.h"
  30 #include "audiohw.h"
  31 #include "mmu-arm.h"
  32
  33 #define MAX_TRANSFER (4*((1<<11)-1)) /* maximum data we can transfer via DMA
  34                                       * i.e. 32 bits at once (size of I2SO_DATA)
  35                                       * and the number of 32bits words has to
  36                                       * fit in 11 bits of DMA register */
  37
  38 static void *dma_start_addr;
  39 static size_t      dma_size;   /* in 4*32 bits */
  40 static void dma_callback(void);
  41 static int locked = 0;
  42 static bool is_playing = false;
  43 static bool play_callback_pending = false;
  44
  45 /* Mask the DMA interrupt */
  46 void pcm_play_lock(void)
  47 {
  48     ++locked;
  49 }
  50
  51 /* Unmask the DMA interrupt if enabled */
  52 void pcm_play_unlock(void)
  53 {
  54     if(--locked == 0 && is_playing)
  55     {
  56         int old = disable_irq_save();
  57         if(play_callback_pending)
  58         {
  59             play_callback_pending = false;
  60             dma_callback();
  61         }
  62         restore_irq(old);
  63     }
  64 }
  65
  66 static void play_start_pcm(void)
  67 {
  68     const unsigned char* addr = dma_start_addr;
  69     size_t size = dma_size;
  70     if(size > MAX_TRANSFER)
  71         size = MAX_TRANSFER;
  72
  73     dma_size -= size;
  74     dma_start_addr += size;
  75
  76     clean_dcache_range((void*)addr, size);  /* force write back */
  77     dma_enable_channel(1, (void*)addr, (void*)I2SOUT_DATA, DMA_PERI_I2SOUT,
  78                 DMAC_FLOWCTRL_DMAC_MEM_TO_PERI, true, false, size >> 2, DMA_S1,
  79                 dma_callback);
  80 }
  81
  82 static void dma_callback(void)
  83 {
  84     if(locked)
  85     {
  86         play_callback_pending = is_playing;
  87         return;
  88     }
  89
  90     if(!dma_size)
  91     {
  92         pcm_play_get_more_callback(&dma_start_addr, &dma_size);
  93
  94         if (!dma_size)
  95             return;
  96     }
  97
  98     play_start_pcm();
  99 }
 100
 101 void pcm_play_dma_start(const void *addr, size_t size)
 102 {
 103     dma_size = size;
 104     dma_start_addr = (unsigned char*)addr;
 105
 106     bitset32(&CGU_PERI, CGU_I2SOUT_APB_CLOCK_ENABLE);
 107     CGU_AUDIO |= (1<<11);
 108
 109     dma_retain();
 110
 111     is_playing = true;
 112
 113     play_start_pcm();
 114 }
 115
 116 void pcm_play_dma_stop(void)
 117 {
 118     is_playing = false;
 119     dma_disable_channel(1);
 120     dma_size = 0;
 121
 122     dma_release();
 123
 124     bitclr32(&CGU_PERI, CGU_I2SOUT_APB_CLOCK_ENABLE);
 125     CGU_AUDIO &= ~(1<<11);
 126 }
 127
 128 void pcm_play_dma_pause(bool pause)
 129 {
 130     is_playing = !pause;
 131
 132     if(pause)
 133         dma_disable_channel(1);
 134     else
 135         play_start_pcm();
 136 }
 137
 138 void pcm_play_dma_init(void)
 139 {
 140     bitset32(&CGU_PERI, CGU_I2SOUT_APB_CLOCK_ENABLE);
 141
 142     I2SOUT_CONTROL = (1<<6)|(1<<3)  /* enable dma, stereo */;
 143
 144     audiohw_preinit();
 145 }
 146
 147 void pcm_postinit(void)
 148 {
 149     audiohw_postinit();
 150 }
 151
 152 /* divider is 9 bits but the highest one (for 8kHz) fit in 8 bits */
 153 static const unsigned char divider[SAMPR_NUM_FREQ] = {
 154     [HW_FREQ_96] = ((AS3525_MCLK_FREQ/128 + SAMPR_96/2) / SAMPR_96) - 1,
 155     [HW_FREQ_88] = ((AS3525_MCLK_FREQ/128 + SAMPR_88/2) / SAMPR_88) - 1,
 156     [HW_FREQ_64] = ((AS3525_MCLK_FREQ/128 + SAMPR_64/2) / SAMPR_64) - 1,
 157     [HW_FREQ_48] = ((AS3525_MCLK_FREQ/128 + SAMPR_48/2) / SAMPR_48) - 1,
 158     [HW_FREQ_44] = ((AS3525_MCLK_FREQ/128 + SAMPR_44/2) / SAMPR_44) - 1,
 159     [HW_FREQ_32] = ((AS3525_MCLK_FREQ/128 + SAMPR_32/2) / SAMPR_32) - 1,
 160     [HW_FREQ_24] = ((AS3525_MCLK_FREQ/128 + SAMPR_24/2) / SAMPR_24) - 1,
 161     [HW_FREQ_22] = ((AS3525_MCLK_FREQ/128 + SAMPR_22/2) / SAMPR_22) - 1,
 162     [HW_FREQ_16] = ((AS3525_MCLK_FREQ/128 + SAMPR_16/2) / SAMPR_16) - 1,
 163     [HW_FREQ_12] = ((AS3525_MCLK_FREQ/128 + SAMPR_12/2) / SAMPR_12) - 1,
 164     [HW_FREQ_11] = ((AS3525_MCLK_FREQ/128 + SAMPR_11/2) / SAMPR_11) - 1,
 165     [HW_FREQ_8 ] = ((AS3525_MCLK_FREQ/128 + SAMPR_8 /2) / SAMPR_8 ) - 1,
 166 };
 167
 168 static inline unsigned char mclk_divider(void)
 169 {
 170     return divider[pcm_fsel];
 171 }
 172
 173 void pcm_dma_apply_settings(void)
 174 {
 175     int cgu_audio = CGU_AUDIO;              /* read register */
 176     cgu_audio &= ~(3 << 0);                 /* clear i2sout MCLK_SEL */
 177     cgu_audio |=  (AS3525_MCLK_SEL << 0);   /* set i2sout MCLK_SEL */
 178     cgu_audio &= ~(0x1ff << 2);             /* clear i2sout divider */
 179     cgu_audio |= mclk_divider() << 2;       /* set new i2sout divider */
 180     CGU_AUDIO = cgu_audio;                  /* write back register */
 181 }
 182
 183 size_t pcm_get_bytes_waiting(void)
 184 {
 185     return dma_size;
 186 }
 187
 188 const void * pcm_play_dma_get_peak_buffer(int *count)
 189 {
 190     pcm_play_lock();
 191     void *addr = (void*)DMAC_CH_SRC_ADDR(1);
 192     *count = (dma_size - (addr - dma_start_addr)) >> 2;
 193     pcm_play_unlock();
 194     return AS3525_UNCACHED_ADDR(addr);
 195 }
 196
 197 #ifdef HAVE_PCM_DMA_ADDRESS
 198 void * pcm_dma_addr(void *addr)
 199 {
 200     if (addr != NULL)
 201         addr = AS3525_UNCACHED_ADDR(addr);
 202     return addr;
 203 }
 204 #endif
 205
 206
 207 /****************************************************************************
 208  ** Recording DMA transfer
 209  **/
 210 #ifdef HAVE_RECORDING
 211
 212 static int rec_locked = 0;
 213 static bool is_recording = false;
 214 static bool rec_callback_pending = false;
 215 static void *rec_dma_start_addr;
 216 static size_t rec_dma_size, rec_dma_transfer_size;
 217 static void rec_dma_callback(void);
 218 #if CONFIG_CPU == AS3525
 219 /* points to the samples which need to be duplicated into the right channel */
 220 static int16_t *mono_samples;
 221 #endif
 222
 223
 224 void pcm_rec_lock(void)
 225 {
 226     ++rec_locked;
 227 }
 228
 229
 230 void pcm_rec_unlock(void)
 231 {
 232     if(--rec_locked == 0 && is_recording)
 233     {
 234         int old = disable_irq_save();
 235         if(rec_callback_pending)
 236         {
 237             rec_callback_pending = false;
 238             rec_dma_callback();
 239         }
 240         restore_irq(old);
 241     }
 242 }
 243
 244
 245 static void rec_dma_start(void)
 246 {
 247     rec_dma_transfer_size = rec_dma_size;
 248
 249     /* We are limited to 8188 DMA transfers, and the recording core asks for
 250      * 8192 bytes. Avoid splitting 8192 bytes transfers in 8188 + 4 */
 251     if(rec_dma_transfer_size > 4096)
 252         rec_dma_transfer_size = 4096;
 253
 254     dma_enable_channel(1, (void*)I2SIN_DATA, rec_dma_start_addr, DMA_PERI_I2SIN,
 255                 DMAC_FLOWCTRL_DMAC_PERI_TO_MEM, false, true,
 256                 rec_dma_transfer_size >> 2, DMA_S4, rec_dma_callback);
 257 }
 258
 259
 260 #if CONFIG_CPU == AS3525
 261 /* if needed, duplicate samples of the working channel until the given bound */
 262 static inline void mono2stereo(int16_t *end)
 263 {
 264     if(audio_channels != 1) /* only for microphone */
 265         return;
 266 #if 0
 267     /* load pointer in a register and avoid updating it in each loop */
 268     register int16_t *samples = mono_samples;
 269
 270     do {
 271         int16_t left = *samples++;  // load 1 sample of the left-channel
 272         *samples++ = left;          // copy it in the right-channel
 273     } while(samples != end);
 274
 275     mono_samples = samples; /* update pointer */
 276 #else
 277     /* gcc doesn't use pre indexing : let's save 1 cycle */
 278     int16_t left;
 279     asm (
 280         "1: ldrh %0, [%1], #2   \n" // load 1 sample of the left-channel
 281         "   strh %0, [%1], #2   \n" // copy it in the right-channel
 282         "   cmp %1, %2          \n" // are we finished?
 283         "   bne  1b             \n"
 284         : "=&r"(left), "+r"(mono_samples)
 285         : "r"(end)
 286         : "memory"
 287     );
 288 #endif /* C / ASM */
 289 }
 290 #endif /* CONFIG_CPU == AS3525 */
 291
 292 static void rec_dma_callback(void)
 293 {
 294     if(rec_dma_transfer_size)
 295     {
 296         rec_dma_size -= rec_dma_transfer_size;
 297         rec_dma_start_addr += rec_dma_transfer_size;
 298
 299         /* don't act like we just transferred data when we are called from
 300          * pcm_rec_unlock() */
 301         rec_dma_transfer_size = 0;
 302
 303 #if CONFIG_CPU == AS3525
 304         /* the 2nd channel is silent when recording microphone on as3525v1 */
 305         mono2stereo(AS3525_UNCACHED_ADDR((int16_t*)rec_dma_start_addr));
 306 #endif
 307
 308         if(locked)
 309         {
 310             rec_callback_pending = is_recording;
 311             return;
 312         }
 313     }
 314
 315     if(!rec_dma_size)
 316     {
 317         pcm_rec_more_ready_callback(0, &rec_dma_start_addr,
 318                                     &rec_dma_size);
 319
 320         if(rec_dma_size == 0)
 321             return;
 322
 323         dump_dcache_range(rec_dma_start_addr, rec_dma_size);
 324 #if CONFIG_CPU == AS3525
 325         mono_samples = AS3525_UNCACHED_ADDR((int16_t*)rec_dma_start_addr);
 326 #endif
 327     }
 328
 329     rec_dma_start();
 330 }
 331
 332 void pcm_rec_dma_stop(void)
 333 {
 334     is_recording = false;
 335     dma_disable_channel(1);
 336     dma_release();
 337     rec_dma_size = 0;
 338
 339     I2SIN_CONTROL &= ~(1<<11); /* disable dma */
 340
 341     CGU_AUDIO &= ~((1<<23)|(1<<11));
 342     bitclr32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE |
 343                         CGU_I2SOUT_APB_CLOCK_ENABLE);
 344 }
 345
 346
 347 void pcm_rec_dma_start(void *addr, size_t size)
 348 {
 349     dump_dcache_range(addr, size);
 350     rec_dma_start_addr = addr;
 351 #if CONFIG_CPU == AS3525
 352     mono_samples = AS3525_UNCACHED_ADDR(addr);
 353 #endif
 354     rec_dma_size = size;
 355
 356     dma_retain();
 357
 358     bitset32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE |
 359                         CGU_I2SOUT_APB_CLOCK_ENABLE);
 360     CGU_AUDIO |= ((1<<23)|(1<<11));
 361
 362     I2SIN_CONTROL |= (1<<11)|(1<<5); /* enable dma, 14bits samples */
 363
 364     is_recording = true;
 365
 366     rec_dma_start();
 367 }
 368
 369
 370 void pcm_rec_dma_close(void)
 371 {
 372 }
 373
 374
 375 void pcm_rec_dma_init(void)
 376 {
 377     int cgu_audio = CGU_AUDIO;              /* read register */
 378     cgu_audio &= ~(3 << 12);                /* clear i2sin MCLK_SEL */
 379     cgu_audio |=  (AS3525_MCLK_SEL << 12);  /* set i2sin MCLK_SEL */
 380     cgu_audio &= ~(0x1ff << 14);            /* clear i2sin divider */
 381     cgu_audio |= mclk_divider() << 14;      /* set new i2sin divider */
 382     CGU_AUDIO = cgu_audio;                  /* write back register */
 383
 384     /* i2c clk src = I2SOUTIF, sdata src = AFE,
 385      * data valid at positive edge of SCLK */
 386     I2SIN_CONTROL = (1<<2);
 387     I2SIN_MASK = 0; /* disables all interrupts */
 388 }
 389
 390
 391 const void * pcm_rec_dma_get_peak_buffer(void)
 392 {
 393 #if CONFIG_CPU == AS3525
 394     /*
 395      * We need to prevent the DMA callback from kicking in while we are
 396      * faking the right channel with data from left channel.
 397      */
 398
 399     int old = disable_irq_save();
 400     int16_t *addr = AS3525_UNCACHED_ADDR((int16_t *)DMAC_CH_DST_ADDR(1));
 401     mono2stereo(addr);
 402     restore_irq(old);
 403
 404     return addr;
 405
 406 #else
 407     /* Microphone recording is stereo on as3525v2 */
 408     return AS3525_UNCACHED_ADDR((int16_t *)DMAC_CH_DST_ADDR(1));
 409 #endif
 410 }
 411
 412 #endif /* HAVE_RECORDING */