firmware/target/arm/s5l8700/system-s5l8700.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2007 by Rob Purchase
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include "kernel.h"
  23 #include "system.h"
  24 #include "panic.h"
  25
  26 #define default_interrupt(name) \
  27   extern __attribute__((weak,alias("UIRQ"))) void name (void)
  28
  29 void irq_handler(void) __attribute__((interrupt ("IRQ"), naked));
  30 void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked));
  31
  32 default_interrupt(EXT0);
  33 default_interrupt(EXT1);
  34 default_interrupt(EXT2);
  35 default_interrupt(EINT_VBUS);
  36 default_interrupt(EINTG);
  37 default_interrupt(INT_TIMERA);
  38 default_interrupt(INT_WDT);
  39 default_interrupt(INT_TIMERB);
  40 default_interrupt(INT_TIMERC);
  41 default_interrupt(INT_TIMERD);
  42 default_interrupt(INT_DMA);
  43 default_interrupt(INT_ALARM_RTC);
  44 default_interrupt(INT_PRI_RTC);
  45 default_interrupt(RESERVED1);
  46 default_interrupt(INT_UART);
  47 default_interrupt(INT_USB_HOST);
  48 default_interrupt(INT_USB_FUNC);
  49 default_interrupt(INT_LCDC_0);
  50 default_interrupt(INT_LCDC_1);
  51 default_interrupt(INT_ECC);
  52 default_interrupt(INT_CALM);
  53 default_interrupt(INT_ATA);
  54 default_interrupt(INT_UART0);
  55 default_interrupt(INT_SPDIF_OUT);
  56 default_interrupt(INT_SDCI);
  57 default_interrupt(INT_LCD);
  58 default_interrupt(INT_SPI);
  59 default_interrupt(INT_IIC);
  60 default_interrupt(RESERVED2);
  61 default_interrupt(INT_MSTICK);
  62 default_interrupt(INT_ADC_WAKEUP);
  63 default_interrupt(INT_ADC);
  64
  65
  66
  67 static void (* const irqvector[])(void) =
  68 {
  69     EXT0,EXT1,EXT2,EINT_VBUS,EINTG,INT_TIMERA,INT_WDT,INT_TIMERB,
  70     INT_TIMERC,INT_TIMERD,INT_DMA,INT_ALARM_RTC,INT_PRI_RTC,RESERVED1,INT_UART,INT_USB_HOST,
  71     INT_USB_FUNC,INT_LCDC_0,INT_LCDC_1,INT_ECC,INT_CALM,INT_ATA,INT_UART0,INT_SPDIF_OUT,
  72     INT_SDCI,INT_LCD,INT_SPI,INT_IIC,RESERVED2,INT_MSTICK,INT_ADC_WAKEUP,INT_ADC
  73 };
  74
  75 static const char * const irqname[] =
  76 {
  77     "EXT0","EXT1","EXT2","EINT_VBUS","EINTG","INT_TIMERA","INT_WDT","INT_TIMERB",
  78     "INT_TIMERC","INT_TIMERD","INT_DMA","INT_ALARM_RTC","INT_PRI_RTC","Reserved","INT_UART","INT_USB_HOST",
  79     "INT_USB_FUNC","INT_LCDC_0","INT_LCDC_1","INT_ECC","INT_CALM","INT_ATA","INT_UART0","INT_SPDIF_OUT",
  80     "INT_SDCI","INT_LCD","INT_SPI","INT_IIC","Reserved","INT_MSTICK","INT_ADC_WAKEUP","INT_ADC"
  81 };
  82
  83 static void UIRQ(void)
  84 {
  85     unsigned int offset = INTOFFSET;
  86     panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]);
  87 }
  88
  89 void irq_handler(void)
  90 {
  91     /*
  92      * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c
  93      */
  94
  95     asm volatile(   "stmfd sp!, {r0-r7, ip, lr} \n"   /* Store context */
  96                     "sub   sp, sp, #8           \n"); /* Reserve stack */
  97
  98     int irq_no = INTOFFSET;
  99
 100     irqvector[irq_no]();
 101
 102     /* clear interrupt */
 103     SRCPND = (1 << irq_no);
 104     INTPND = INTPND;
 105
 106     asm volatile(   "add   sp, sp, #8           \n"   /* Cleanup stack   */
 107                     "ldmfd sp!, {r0-r7, ip, lr} \n"   /* Restore context */
 108                     "subs  pc, lr, #4           \n"); /* Return from IRQ */
 109 }
 110
 111 void fiq_handler(void)
 112 {
 113     asm volatile (
 114         "subs   pc, lr, #4   \r\n"
 115     );
 116 }
 117
 118
 119 static void gpio_init(void)
 120 {
 121 }
 122
 123 static void clock_init(void)
 124 {
 125 }
 126
 127
 128 void system_init(void)
 129 {
 130 }
 131
 132 void system_reboot(void)
 133 {
 134 }
 135
 136 void system_exception_wait(void)
 137 {
 138     while (1);
 139 }
 140
 141 int system_memory_guard(int newmode)
 142 {
 143     (void)newmode;
 144     return 0;
 145 }
 146
 147 #ifdef HAVE_ADJUSTABLE_CPU_FREQ
 148
 149 void set_cpu_frequency(long frequency)
 150 {
 151     if (cpu_frequency == frequency)
 152         return;
 153
 154     /* CPU/COP frequencies can be scaled between Fbus (min) and Fsys (max).
 155        Fbus should not be set below ~32Mhz with LCD enabled or the display
 156        will be garbled. */
 157     if (frequency == CPUFREQ_MAX)
 158     {
 159     }
 160     else if (frequency == CPUFREQ_NORMAL)
 161     {
 162     }
 163     else
 164     {
 165     }
 166
 167     asm volatile (
 168         "nop      \n\t"
 169         "nop      \n\t"
 170         "nop      \n\t"
 171     );
 172
 173     cpu_frequency = frequency;
 174 }
 175
 176 #endif