firmware/target/arm/tcc780x/ata-nand-tcc780x.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2008 Rob Purchase
  11  *
  12  * All files in this archive are subject to the GNU General Public License.
  13  * See the file COPYING in the source tree root for full license agreement.
  14  *
  15  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  16  * KIND, either express or implied.
  17  *
  18  ****************************************************************************/
  19 #include "ata.h"
  20 #include "ata-target.h"
  21 #include "system.h"
  22 #include <string.h>
  23 #include "led.h"
  24 #include "panic.h"
  25
  26 /* The NAND driver is currently work-in-progress and as such contains
  27    some dead code and debug stuff, such as the next few lines. */
  28
  29 #if defined(BOOTLOADER)
  30 #include "../../../../bootloader/common.h"  /* for printf */
  31 extern int line;
  32 #endif
  33
  34 /* for compatibility */
  35 int ata_spinup_time = 0;
  36
  37 long last_disk_activity = -1;
  38
  39 /** static, private data **/
  40 static bool initialized = false;
  41
  42 static struct mutex ata_mtx SHAREDBSS_ATTR;
  43
  44 #define SECTOR_SIZE 512
  45
  46 /* TCC780x NAND Flash Controller */
  47
  48 #define NFC_CMD    (*(volatile unsigned long *)0xF0053000)
  49 #define NFC_SADDR  (*(volatile unsigned long *)0xF005300C)
  50 #define NFC_SDATA  (*(volatile unsigned long *)0xF0053040)
  51 #define NFC_WDATA  (*(volatile unsigned long *)0xF0053010)
  52 #define NFC_CTRL   (*(volatile unsigned long *)0xF0053050)
  53 #define NFC_IREQ   (*(volatile unsigned long *)0xF0053060)
  54 #define NFC_RST    (*(volatile unsigned long *)0xF0053064)
  55
  56 /* NFC_CTRL flags */
  57 #define NFC_16BIT (1<<26)
  58 #define NFC_CS0   (1<<23)
  59 #define NFC_CS1   (1<<22)
  60 #define NFC_READY (1<<20)
  61
  62 #define ECC_CTRL    (*(volatile unsigned long *)0xF005B000)
  63 #define ECC_BASE    (*(volatile unsigned long *)0xF005B004)
  64 #define ECC_CLR     (*(volatile unsigned long *)0xF005B00C)
  65 #define ECC_MLC0W   (*(volatile unsigned long *)0xF005B030)
  66 #define ECC_MLC1W   (*(volatile unsigned long *)0xF005B034)
  67 #define ECC_MLC2W   (*(volatile unsigned long *)0xF005B038)
  68 #define ECC_ERR     (*(volatile unsigned long *)0xF005B070)
  69 #define ECC_ERRADDR (*(volatile unsigned long *)0xF005B050)
  70 #define ECC_ERRDATA (*(volatile unsigned long *)0xF005B060)
  71
  72 /* ECC_CTRL flags */
  73 #define ECC_M4EN  (1<<6)
  74 #define ECC_ENC   (1<<27)
  75 #define ECC_READY (1<<26)
  76
  77 /* Chip characteristics, initialised by nand_get_chip_info() */
  78
  79 static int page_size       = 0;
  80 static int spare_size      = 0;
  81 static int pages_per_block = 0;
  82 static int blocks_per_bank = 0;
  83 static int pages_per_bank  = 0;
  84 static int row_cycles      = 0;
  85 static int col_cycles      = 0;
  86 static int total_banks     = 0;
  87 static int sectors_per_page    = 0;
  88 static int bytes_per_segment   = 0;
  89 static int sectors_per_segment = 0;
  90 static int segments_per_bank   = 0;
  91
  92 /* Maximum values for static buffers */
  93
  94 #define MAX_PAGE_SIZE       4096
  95 #define MAX_SPARE_SIZE      128
  96 #define MAX_BLOCKS_PER_BANK 8192
  97 #define MAX_PAGES_PER_BLOCK 128
  98
  99 /* In theory we can support 4 banks, but only 2 have been seen on 2/4/8Gb D2s. */
 100 #ifdef COWON_D2
 101 #define MAX_BANKS 2
 102 #else
 103 #define MAX_BANKS 4
 104 #endif
 105
 106 #define MAX_SEGMENTS (MAX_BLOCKS_PER_BANK * MAX_BANKS / 4)
 107
 108 /* Logical/Physical translation table */
 109
 110 struct lpt_entry
 111 {
 112     short chip;
 113     short phys_segment;
 114     //short segment_flag;
 115 };
 116 static struct lpt_entry lpt_lookup[MAX_SEGMENTS];
 117
 118 /* Write Caches */
 119
 120 #define MAX_WRITE_CACHES 8
 121
 122 struct write_cache
 123 {
 124     short chip;
 125     short phys_segment;
 126     short log_segment;
 127     short page_map[MAX_PAGES_PER_BLOCK * 4];
 128 };
 129 static struct write_cache write_caches[MAX_WRITE_CACHES];
 130
 131 static int write_caches_in_use = 0;
 132
 133 /* Read buffer */
 134
 135 unsigned int page_buf[(MAX_PAGE_SIZE + MAX_SPARE_SIZE) / 4];
 136
 137
 138 /* Conversion functions */
 139
 140 static inline int phys_segment_to_page_addr(int phys_segment, int page_in_seg)
 141 {
 142     int page_addr = phys_segment * pages_per_block * 2;
 143
 144     if (page_in_seg & 1)
 145     {
 146         /* Data is located in block+1 */
 147         page_addr += pages_per_block;
 148     }
 149
 150     if (page_in_seg & 2)
 151     {
 152         /* Data is located in second plane */
 153         page_addr += (blocks_per_bank/2) * pages_per_block;
 154     }
 155
 156     page_addr += page_in_seg/4;
 157
 158     return page_addr;
 159 }
 160
 161
 162 /* NAND physical access functions */
 163
 164 static void nand_chip_select(int chip)
 165 {
 166     if (chip == -1)
 167     {
 168         /* Disable both chip selects */
 169         GPIOB_CLEAR = (1<<21);
 170         NFC_CTRL |= NFC_CS0 | NFC_CS1;
 171     }
 172     else
 173     {
 174         /* NFC chip select */
 175         if (chip & 1)
 176         {
 177             NFC_CTRL &= ~NFC_CS0;
 178             NFC_CTRL |= NFC_CS1;
 179         }
 180         else
 181         {
 182             NFC_CTRL |= NFC_CS0;
 183             NFC_CTRL &= ~NFC_CS1;
 184         }
 185
 186         /* Secondary chip select */
 187         if (chip & 2)
 188         {
 189             GPIOB_SET = (1<<21);
 190         }
 191         else
 192         {
 193             GPIOB_CLEAR = (1<<21);
 194         }
 195     }
 196 }
 197
 198
 199 static void nand_read_id(int chip, unsigned char* id_buf)
 200 {
 201     int i;
 202
 203     /* Enable NFC bus clock */
 204     BCLKCTR |= DEV_NAND;
 205
 206     /* Reset NAND controller */
 207     NFC_RST = 0;
 208
 209     /* Set slow cycle timings since the chip is as yet unidentified */
 210     NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x353;
 211
 212     nand_chip_select(chip);
 213
 214     /* Set write protect */
 215     GPIOB_CLEAR = (1<<19);
 216
 217     /* Reset command */
 218     NFC_CMD = 0xFF;
 219
 220     /* Set 8-bit data width */
 221     NFC_CTRL &= ~NFC_16BIT;
 222
 223     /* Read ID command, single address cycle */
 224     NFC_CMD   = 0x90;
 225     NFC_SADDR = 0x00;
 226
 227     /* Read the 5 chip ID bytes */
 228     for (i = 0; i < 5; i++)
 229     {
 230         id_buf[i] = NFC_SDATA & 0xFF;
 231     }
 232
 233     nand_chip_select(-1);
 234
 235     /* Disable NFC bus clock */
 236     BCLKCTR &= ~DEV_NAND;
 237 }
 238
 239
 240 static void nand_read_uid(int chip, unsigned int* uid_buf)
 241 {
 242     int i;
 243
 244     /* Enable NFC bus clock */
 245     BCLKCTR |= DEV_NAND;
 246
 247     /* Set cycle timing (stp = 1, pw = 3, hold = 1) */
 248     NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x131;
 249
 250     nand_chip_select(chip);
 251
 252     /* Set write protect */
 253     GPIOB_CLEAR = 1<<19;
 254
 255     /* Set 8-bit data width */
 256     NFC_CTRL &= ~NFC_16BIT;
 257
 258     /* Undocumented (SAMSUNG specific?) commands set the chip into a
 259        special mode allowing a normally-hidden UID block to be read. */
 260     NFC_CMD = 0x30;
 261     NFC_CMD = 0x65;
 262
 263     /* Read command */
 264     NFC_CMD = 0x00;
 265
 266     /* Write row/column address */
 267     for (i = 0; i < col_cycles; i++) NFC_SADDR = 0;
 268     for (i = 0; i < row_cycles; i++) NFC_SADDR = 0;
 269
 270     /* End of read */
 271     NFC_CMD = 0x30;
 272
 273     /* Wait until complete */
 274     while (!(NFC_CTRL & NFC_READY)) {};
 275
 276     /* Copy data to buffer (data repeats after 8 words) */
 277     for (i = 0; i < 8; i++)
 278     {
 279         uid_buf[i] = NFC_WDATA;
 280     }
 281
 282     /* Reset the chip back to normal mode */
 283     NFC_CMD = 0xFF;
 284
 285     nand_chip_select(-1);
 286
 287     /* Disable NFC bus clock */
 288     BCLKCTR &= ~DEV_NAND;
 289 }
 290
 291
 292 static void nand_read_raw(int chip, int row, int column, int size, void* buf)
 293 {
 294     int i;
 295
 296     /* Enable NFC bus clock */
 297     BCLKCTR |= DEV_NAND;
 298
 299     /* Set cycle timing (stp = 1, pw = 3, hold = 1) */
 300     NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x131;
 301
 302     nand_chip_select(chip);
 303
 304     /* Set write protect */
 305     GPIOB_CLEAR = (1<<19);
 306
 307     /* Set 8-bit data width */
 308     NFC_CTRL &= ~NFC_16BIT;
 309
 310     /* Read command */
 311     NFC_CMD = 0x00;
 312
 313     /* Write column address */
 314     for (i = 0; i < col_cycles; i++)
 315     {
 316         NFC_SADDR = column & 0xFF;
 317         column = column >> 8;
 318     }
 319
 320     /* Write row address */
 321     for (i = 0; i < row_cycles; i++)
 322     {
 323         NFC_SADDR = row & 0xFF;
 324         row = row >> 8;
 325     }
 326
 327     /* End of read command */
 328     NFC_CMD = 0x30;
 329
 330     /* Wait until complete */
 331     while (!(NFC_CTRL & NFC_READY)) {};
 332
 333     /* Read data into page buffer */
 334     if (((unsigned int)buf & 3) || (size & 3))
 335     {
 336         /* Use byte copy since either the buffer or size are not word-aligned */
 337         /* TODO: Byte copy only where necessary (use words for mid-section) */
 338         for (i = 0; i < size; i++)
 339         {
 340             ((unsigned char*)buf)[i] = NFC_SDATA;
 341         }
 342     }
 343     else
 344     {
 345         /* Use 4-byte copy as buffer and size are both word-aligned */
 346         for (i = 0; i < (size/4); i++)
 347         {
 348             ((unsigned int*)buf)[i] = NFC_WDATA;
 349         }
 350     }
 351
 352     nand_chip_select(-1);
 353
 354     /* Disable NFC bus clock */
 355     BCLKCTR &= ~DEV_NAND;
 356 }
 357
 358
 359 static void nand_get_chip_info(void)
 360 {
 361     bool found = false;
 362     unsigned char manuf_id;
 363     unsigned char id_buf[8];
 364
 365     /* Read chip id from bank 0 */
 366     nand_read_id(0, id_buf);
 367
 368     manuf_id = id_buf[0];
 369
 370     switch (manuf_id)
 371     {
 372         case 0xEC:  /* SAMSUNG */
 373
 374             switch(id_buf[1]) /* Chip Id */
 375             {
 376                 case 0xD5:  /* K9LAG08UOM */
 377
 378                     page_size       = 2048;
 379                     spare_size      = 64;
 380                     pages_per_block = 128;
 381                     blocks_per_bank = 8192;
 382                     col_cycles      = 2;
 383                     row_cycles      = 3;
 384
 385                     found = true;
 386                     break;
 387
 388                 case 0xD7:  /* K9LBG08UOM */
 389
 390                     page_size       = 4096;
 391                     spare_size      = 128;
 392                     pages_per_block = 128;
 393                     blocks_per_bank = 8192;
 394                     col_cycles      = 2;
 395                     row_cycles      = 3;
 396
 397                     found = true;
 398                     break;
 399             }
 400             break;
 401     }
 402
 403     if (!found)
 404     {
 405         panicf("Unknown NAND: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x",
 406                 id_buf[0],id_buf[1],id_buf[2],id_buf[3],id_buf[4]);
 407     }
 408
 409     pages_per_bank      = blocks_per_bank * pages_per_block;
 410     segments_per_bank   = blocks_per_bank / 4;
 411     bytes_per_segment   = page_size * pages_per_block * 4;
 412     sectors_per_page    = page_size / SECTOR_SIZE;
 413     sectors_per_segment = bytes_per_segment / SECTOR_SIZE;
 414
 415     /* Establish how many banks are present */
 416     nand_read_id(1, id_buf);
 417
 418     if (id_buf[0] == manuf_id)
 419     {
 420         /* Bank 1 is populated, now check if banks 2/3 are valid */
 421         nand_read_id(2, id_buf);
 422
 423         if (id_buf[0] == manuf_id)
 424         {
 425             /* Bank 2 returned matching id - check if 2/3 are shadowing 0/1 */
 426             unsigned int uid_buf0[8];
 427             unsigned int uid_buf2[8];
 428
 429             nand_read_uid(0, uid_buf0);
 430             nand_read_uid(2, uid_buf2);
 431
 432             if (memcmp(uid_buf0, uid_buf2, 32) == 0)
 433             {
 434                 /* UIDs match, assume banks 2/3 are shadowing 0/1 */
 435                 total_banks = 2;
 436             }
 437             else
 438             {
 439                 /* UIDs differ, assume banks 2/3 are valid */
 440                 total_banks = 4;
 441             }
 442         }
 443         else
 444         {
 445             /* Bank 2 returned differing id - assume 2/3 are junk */
 446             total_banks = 2;
 447         }
 448     }
 449     else
 450     {
 451         /* Bank 1 returned differing id - assume it is junk */
 452         total_banks = 1;
 453     }
 454
 455     /*
 456        Sanity checks:
 457
 458        1. "BMP" tag at block 0, page 0, offset <page_size> [always present]
 459        2. Byte at <page_size>+4 contains number of banks [or 0xff if 1 bank]
 460
 461        If this is confirmed for all D2s we can simplify the above code and
 462        also remove the icky nand_read_uid() function.
 463      */
 464
 465     nand_read_raw(0,          /* bank */
 466                   0,          /* page */
 467                   page_size,  /* offset */
 468                   8, id_buf);
 469
 470     if (strncmp(id_buf, "BMP", 3)) panicf("BMP tag not present");
 471
 472     if (total_banks > 1)
 473     {
 474         if (id_buf[4] != total_banks) panicf("BMPM total_banks mismatch");
 475     }
 476 }
 477
 478
 479 static bool nand_read_sector_of_phys_page(int chip, int page,
 480                                           int sector, void* buf)
 481 {
 482     nand_read_raw(chip, page,
 483                   sector * (SECTOR_SIZE+16),
 484                   SECTOR_SIZE, buf);
 485
 486     /* TODO: Read the 16 spare bytes, perform ECC correction */
 487
 488     return true;
 489 }
 490
 491
 492 static bool nand_read_sector_of_phys_segment(int chip, int phys_segment,
 493                                              int page_in_seg, int sector,
 494                                              void* buf)
 495 {
 496     int page_addr = phys_segment_to_page_addr(phys_segment,
 497                                               page_in_seg);
 498
 499     return nand_read_sector_of_phys_page(chip, page_addr, sector, buf);
 500 }
 501
 502
 503 static bool nand_read_sector_of_logical_segment(int log_segment, int sector,
 504                                                 void* buf)
 505 {
 506     int page_in_segment = sector / sectors_per_page;
 507     int sector_in_page  = sector % sectors_per_page;
 508
 509     int chip = lpt_lookup[log_segment].chip;
 510     int phys_segment = lpt_lookup[log_segment].phys_segment;
 511
 512     /* Check if any of the write caches refer to this segment/page.
 513        If present we need to read the cached page instead. */
 514
 515     int cache_num = 0;
 516     bool found = false;
 517
 518     while (!found && cache_num < write_caches_in_use)
 519     {
 520         if (write_caches[cache_num].log_segment == log_segment
 521             && write_caches[cache_num].page_map[page_in_segment] != -1)
 522         {
 523             found = true;
 524             chip = write_caches[cache_num].chip;
 525             phys_segment = write_caches[cache_num].phys_segment;
 526             page_in_segment = write_caches[cache_num].page_map[page_in_segment];
 527         }
 528         else
 529         {
 530             cache_num++;
 531         }
 532     }
 533
 534     return nand_read_sector_of_phys_segment(chip, phys_segment,
 535                                             page_in_segment,
 536                                             sector_in_page, buf);
 537 }
 538
 539 #if 0   // LPT table is work-in-progress
 540
 541 static void read_lpt_block(int chip, int phys_segment)
 542 {
 543     int page = 1;   /* table starts at page 1 of segment */
 544     bool cont = true;
 545
 546     struct lpt_entry* lpt_ptr = NULL;
 547
 548     while (cont && page < pages_per_block)
 549     {
 550         int i = 0;
 551
 552         nand_read_sector_of_phys_segment(chip, phys_segment,
 553                                          page, 0, /* only sector 0 is used */
 554                                          page_buf);
 555
 556         /* Find out which chunk of the LPT table this section contains.
 557            Do this by reading the logical segment number of entry 0 */
 558         if (lpt_ptr == NULL)
 559         {
 560             int first_chip = page_buf[0] / segments_per_bank;
 561             int first_phys_segment = page_buf[0] % segments_per_bank;
 562
 563             unsigned char spare_buf[16];
 564
 565             nand_read_raw(first_chip,
 566                           phys_segment_to_page_addr(first_phys_segment, 0),
 567                           SECTOR_SIZE, /* offset */
 568                           16, spare_buf);
 569
 570             int first_log_segment = (spare_buf[6] << 8) | spare_buf[7];
 571
 572             lpt_ptr = &lpt_lookup[first_log_segment];
 573
 574 #if defined(BOOTLOADER) && 1
 575             printf("lpt @ %lx:%lx (ls:%lx)",
 576                    first_chip, first_phys_segment, first_log_segment);
 577 #endif
 578         }
 579
 580         while (cont && (i < SECTOR_SIZE/4))
 581         {
 582             if (page_buf[i] != 0xFFFFFFFF)
 583             {
 584                 lpt_ptr->chip = page_buf[i] / segments_per_bank;
 585                 lpt_ptr->phys_segment = page_buf[i] % segments_per_bank;
 586
 587                 lpt_ptr++;
 588                 i++;
 589             }
 590             else cont = false;
 591         }
 592         page++;
 593     }
 594 }
 595
 596 #endif
 597
 598
 599 static void read_write_cache_segment(int chip, int phys_segment)
 600 {
 601     int page;
 602     unsigned char spare_buf[16];
 603
 604     if (write_caches_in_use == MAX_WRITE_CACHES)
 605         panicf("Max NAND write caches reached");
 606
 607     write_caches[write_caches_in_use].chip = chip;
 608     write_caches[write_caches_in_use].phys_segment = phys_segment;
 609
 610     /* Loop over each page in the phys segment (from page 1 onwards).
 611        Read spare for 1st sector, store location of page in array. */
 612     for (page = 1; page < pages_per_block * 4; page++)
 613     {
 614         unsigned short cached_page;
 615         unsigned short log_segment;
 616
 617         nand_read_raw(chip, phys_segment_to_page_addr(phys_segment, page),
 618                       SECTOR_SIZE, /* offset to first sector's spare */
 619                       16, spare_buf);
 620
 621         cached_page = (spare_buf[3] << 8) | spare_buf[2]; /* why does endian */
 622         log_segment = (spare_buf[6] << 8) | spare_buf[7]; /* -ness differ? */
 623
 624         if (cached_page != 0xFFFF)
 625         {
 626             write_caches[write_caches_in_use].log_segment = log_segment;
 627             write_caches[write_caches_in_use].page_map[cached_page] = page;
 628         }
 629     }
 630     write_caches_in_use++;
 631 }
 632
 633
 634 /* TEMP testing functions */
 635
 636 #ifdef BOOTLOADER
 637
 638 #if 0
 639 static void display_page(int chip, int page)
 640 {
 641     int i;
 642     nand_read_raw(chip, page, 0, page_size+spare_size, page_buf);
 643
 644     for (i = 0; i < (page_size+spare_size)/4; i += 132)
 645     {
 646         int j,interesting = 0;
 647         line = 1;
 648         printf("c:%d p:%lx s:%d", chip, page, i/128);
 649
 650         for (j=i; j<(i+131); j++)
 651         {
 652             if (page_buf[j] != 0xffffffff) interesting = 1;
 653         }
 654
 655         if (interesting)
 656         {
 657             for (j=i; j<(i+131); j+=8)
 658             {
 659                 printf("%lx %lx %lx %lx %lx %lx %lx %lx",
 660                        page_buf[j],page_buf[j+1],page_buf[j+2],page_buf[j+3],
 661                        page_buf[j+4],page_buf[j+5],page_buf[j+6],page_buf[j+7]);
 662             }
 663             while (!button_read_device()) {};
 664             while (button_read_device()) {};
 665             reset_screen();
 666         }
 667     }
 668 }
 669 #endif
 670
 671 static void nand_test(void)
 672 {
 673     int segment = 0;
 674
 675     printf("%d banks", total_banks);
 676     printf("* %d pages", pages_per_bank);
 677     printf("* %d bytes per page", page_size);
 678
 679     while (lpt_lookup[segment].chip != -1
 680            && segment < segments_per_bank * total_banks)
 681     {
 682         segment++;
 683     }
 684     printf("%d sequential segments found (%dMb)",
 685            segment, (unsigned)(segment*bytes_per_segment)>>20);
 686 }
 687 #endif
 688
 689
 690 /* API Functions */
 691
 692 void ata_led(bool onoff)
 693 {
 694     led(onoff);
 695 }
 696
 697 int ata_read_sectors(IF_MV2(int drive,) unsigned long start, int incount,
 698                      void* inbuf)
 699 {
 700 #ifdef HAVE_MULTIVOLUME
 701     (void)drive; /* unused for now */
 702 #endif
 703     mutex_lock(&ata_mtx);
 704
 705     while (incount > 0)
 706     {
 707         int done = 0;
 708         int segment = start / sectors_per_segment;
 709         int secmod = start % sectors_per_segment;
 710
 711         while (incount > 0 && secmod < sectors_per_segment)
 712         {
 713             if (!nand_read_sector_of_logical_segment(segment, secmod, inbuf))
 714             {
 715                 mutex_unlock(&ata_mtx);
 716                 return -1;
 717             }
 718
 719             inbuf += SECTOR_SIZE;
 720             incount--;
 721             secmod++;
 722             done++;
 723         }
 724
 725         if (done < 0)
 726         {
 727             mutex_unlock(&ata_mtx);
 728             return -1;
 729         }
 730         start += done;
 731     }
 732
 733     mutex_unlock(&ata_mtx);
 734     return 0;
 735 }
 736
 737 int ata_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
 738                       const void* outbuf)
 739 {
 740 #ifdef HAVE_MULTIVOLUME
 741     (void)drive; /* unused for now */
 742 #endif
 743
 744     /* TODO: Learn more about TNFTL and implement this one day... */
 745     (void)start;
 746     (void)count;
 747     (void)outbuf;
 748     return -1;
 749 }
 750
 751 void ata_spindown(int seconds)
 752 {
 753     /* null */
 754     (void)seconds;
 755 }
 756
 757 bool ata_disk_is_active(void)
 758 {
 759     /* null */
 760     return 0;
 761 }
 762
 763 void ata_sleep(void)
 764 {
 765     /* null */
 766 }
 767
 768 void ata_spin(void)
 769 {
 770     /* null */
 771 }
 772
 773 /* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
 774 int ata_hard_reset(void)
 775 {
 776     /* null */
 777     return 0;
 778 }
 779
 780 int ata_soft_reset(void)
 781 {
 782     /* null */
 783     return 0;
 784 }
 785
 786 void ata_enable(bool on)
 787 {
 788     /* null - flash controller is enabled/disabled as needed. */
 789     (void)on;
 790 }
 791
 792 int ata_init(void)
 793 {
 794     int i, bank, phys_segment;
 795     unsigned char spare_buf[16];
 796
 797     if (initialized) return 0;
 798
 799     /* Get chip characteristics and number of banks */
 800     nand_get_chip_info();
 801
 802     for (i = 0; i < MAX_SEGMENTS; i++)
 803     {
 804         lpt_lookup[i].chip = -1;
 805         lpt_lookup[i].phys_segment = -1;
 806         //lpt_lookup[i].segment_flag = -1;
 807     }
 808
 809     write_caches_in_use = 0;
 810
 811     for (i = 0; i < MAX_WRITE_CACHES; i++)
 812     {
 813         int page;
 814
 815         write_caches[i].log_segment = -1;
 816         write_caches[i].chip = -1;
 817         write_caches[i].phys_segment = -1;
 818
 819         for (page = 0; page < MAX_PAGES_PER_BLOCK * 4; page++)
 820         {
 821             write_caches[i].page_map[page] = -1;
 822         }
 823     }
 824
 825     /* Scan banks to build up block translation table */
 826     for (bank = 0; bank < total_banks; bank++)
 827     {
 828         for (phys_segment = 0; phys_segment < segments_per_bank; phys_segment++)
 829         {
 830             /* Read spare bytes from first sector of each segment */
 831             nand_read_raw(bank, phys_segment_to_page_addr(phys_segment, 0),
 832                           SECTOR_SIZE, /* offset */
 833                           16, spare_buf);
 834
 835             switch (spare_buf[4]) /* block type */
 836             {
 837                 case 0x12:
 838                 {
 839                     /* Log->Phys Translation table (for Main data area) */
 840                     //read_lpt_block(bank, phys_segment);
 841                     break;
 842                 }
 843
 844                 case 0x13:
 845                 case 0x17:
 846                 {
 847                     /* Main data area segment */
 848                     int segment = (spare_buf[6] << 8) | spare_buf[7];
 849
 850                     if (segment < MAX_SEGMENTS)
 851                     {
 852                         /* Store in LPT if not present or 0x17 overrides 0x13 */
 853                         //if (lpt_lookup[segment].segment_flag == -1 ||
 854                         //    lpt_lookup[segment].segment_flag == 0x13)
 855                         {
 856                             lpt_lookup[segment].chip = bank;
 857                             lpt_lookup[segment].phys_segment = phys_segment;
 858                             //lpt_lookup[segment].segment_flag = spare_buf[4];
 859                         }
 860                     }
 861                     break;
 862                 }
 863
 864                 case 0x15:
 865                 {
 866                     /* Recently-written page data (for Main data area) */
 867                     read_write_cache_segment(bank, phys_segment);
 868                     break;
 869                 }
 870             }
 871         }
 872     }
 873
 874     initialized = true;
 875
 876 #ifdef BOOTLOADER
 877     /* TEMP - print out some diagnostics */
 878     nand_test();
 879 #endif
 880
 881     return 0;
 882 }
 883
 884
 885 /* TEMP: This will return junk, it's here for compilation only */
 886 unsigned short* ata_get_identify(void)
 887 {
 888     return (unsigned short*)0x21000000; /* Unused DRAM */
 889 }