3 /* These output formats should be in the config-files */
6 OUTPUT_FORMAT(elf32-m68k)
8 OUTPUT_FORMAT(elf32-littlearm)
10 OUTPUT_FORMAT(elf32-sh)
11 #elif defined(CPU_MIPS)
12 OUTPUT_FORMAT(elf32-littlemips)
14 /* We can have an #error here we don't use this file when build sims! */
15 #error Unknown CPU architecture
19 #define STUBOFFSET 0x10000
26 #define NOCACHE_BASE 0x10000000
28 #define NOCACHE_BASE 0x28000000
30 #define CACHEALIGN_SIZE 16
33 #if CONFIG_CPU==IMX31L
36 #define DRAMSIZE ((MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE \
37 - CODEC_SIZE - QHARRAY_SIZE - FRAME_SIZE - TTB_SIZE)
39 #elif CONFIG_CPU==DM320
40 /* Give this 1 meg to allow it to align to the MMU boundary */
41 #ifndef LCD_NATIVE_WIDTH
42 #define LCD_NATIVE_WIDTH LCD_WIDTH
44 #ifndef LCD_NATIVE_HEIGHT
45 #define LCD_NATIVE_HEIGHT LCD_HEIGHT
48 #define LCD_FUDGE LCD_NATIVE_WIDTH%32
49 #define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
50 #define LCD_TTB_AREA 0x100000*((LCD_BUFFER_SIZE>>19)+1)
52 #define LCD_TTB_AREA 0x100000
55 #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_TTB_AREA
57 #elif CONFIG_CPU==S3C2440
59 /* must be 16Kb (0x4000) aligned */
60 #define TTB_SIZE (0x4000)
61 #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE
63 #elif CONFIG_CPU==TCC7801
65 #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE
67 #elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
69 #define DRAMORIG DRAM_ORIG
70 #if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
71 #define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - TTB_SIZE)
73 #define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - TTB_SIZE)
77 /* default to full RAM (minus codecs&plugins) unless specified otherwise */
79 #define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE
82 /* MCF5249 have 96KB of IRAM */
83 #if CONFIG_CPU == MCF5249
84 #define DRAMORIG 0x31000000
85 #define IRAMORIG 0x1000c000
86 #define IRAMSIZE 0xc000
88 /* MCF5250 have 128KB of IRAM */
89 #elif CONFIG_CPU == MCF5250
90 #define DRAMORIG 0x31000000
91 #define IRAMORIG 0x1000c000
92 #define IRAMSIZE 0x14000
94 #elif CONFIG_CPU == PP5022 || CONFIG_CPU == PP5024
95 /* PP5022/24 have 128KB of IRAM */
96 #define DRAMORIG 0x00000000
97 #define IRAMORIG 0x4000c000
98 #define IRAMSIZE 0x14000
100 #elif defined(CPU_PP)
101 /* all other PP's have 96KB of IRAM */
102 #define DRAMORIG 0x00000000
103 #define IRAMORIG 0x4000c000
104 #define IRAMSIZE 0x0c000
106 #elif CONFIG_CPU == PNX0101
107 #define DRAMORIG 0xc00000 + STUBOFFSET
108 #define IRAMORIG 0x407000
109 #define IRAMSIZE 0x9000
111 #elif CONFIG_CPU == IMX31L || CONFIG_CPU == S3C2440
112 #define DRAMORIG 0x0 + STUBOFFSET
116 #elif CONFIG_CPU==DM320
117 #define DRAMORIG 0x00900000 + STUBOFFSET
119 /* The bit of IRAM that is available is used in the core */
122 #elif defined(CPU_TCC780X) || defined(CPU_TCC77X)
123 #define DRAMORIG 0x20000000
124 /*#define IRAMORIG 0x1000c000
125 #define IRAMSIZE 0xc000*/
129 #elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
130 #if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
131 #define IRAMSIZE 0 /* simulates no IRAM since codec is already entirely in IRAM */
132 #define CODEC_ORIGIN (IRAM_ORIG + IRAM_SIZE - CODEC_SIZE)
133 #define PLUGIN_ORIGIN (DRAM_ORIG + DRAMSIZE)
135 #define IRAMORIG (IRAM_ORIG + 0x20000)
136 #define IRAMSIZE (IRAM_ORIG + IRAM_SIZE - IRAMORIG)
139 #elif CONFIG_CPU==S5L8700
140 #define DRAMORIG 0x08000000
141 #define IRAMORIG (0x00000000 + (64*1024))
142 #define IRAMSIZE (64*1024)
144 #elif CONFIG_CPU==S5L8701
145 #define DRAMORIG 0x08000000
146 #define IRAMORIG (0x00000000 + (96*1024))
147 #define IRAMSIZE (80*1024)
149 #elif CONFIG_CPU == JZ4732
150 #define DRAMORIG 0x80004000 + STUBOFFSET
153 /* The bit of IRAM that is available is used in the core */
155 #define DRAMORIG 0x09000000 + STUBOFFSET
159 /* Default to no offset if target doesn't define this */
160 #define NOCACHE_BASE 0x00000000
163 #define PLUGIN_LENGTH PLUGIN_BUFFER_SIZE
166 #ifndef CODEC_ORIGIN /* targets can specify another origin */
167 #define CODEC_ORIGIN (DRAMORIG + (DRAMSIZE))
170 #ifndef PLUGIN_ORIGIN /* targets can specify another origin */
171 #define PLUGIN_ORIGIN (CODEC_ORIGIN + CODEC_SIZE)
175 #define THIS_LENGTH CODEC_SIZE
176 #define THIS_ORIGIN CODEC_ORIGIN
177 #elif defined OVERLAY_OFFSET
178 #define THIS_LENGTH (DRAMSIZE - OVERLAY_OFFSET)
179 #define THIS_ORIGIN (DRAMORIG + OVERLAY_OFFSET)
181 #define THIS_LENGTH PLUGIN_LENGTH
182 #define THIS_ORIGIN PLUGIN_ORIGIN
187 PLUGIN_RAM : ORIGIN = THIS_ORIGIN, LENGTH = THIS_LENGTH
188 #if defined(IRAMSIZE) && IRAMSIZE != 0
189 PLUGIN_IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
196 _plugin_start_addr = .;
197 plugin_start_addr = .;
204 #if defined(IRAMSIZE) && IRAMSIZE == 0
216 #if defined(IRAMSIZE) && IRAMSIZE == 0
225 #if defined(IRAMSIZE) && IRAMSIZE == 0
230 #if NOCACHE_BASE != 0
231 .ncdata . + NOCACHE_BASE :
233 . = ALIGN(CACHEALIGN_SIZE);
235 . = ALIGN(CACHEALIGN_SIZE);
236 /* EABI currently needs iramcopy defined here, otherwise .iram can sometimes
237 have an incorrect load address, breaking codecs. */
238 #if defined(IRAMSIZE)
239 iramcopy = . - NOCACHE_BASE;
242 /* This definition is used when NOCACHE_BASE is 0. The address offset bug only
243 seems to occur when the empty .ncdata is present. */
244 #elif defined(IRAMSIZE)
256 #if defined(IRAMSIZE) && IRAMSIZE != 0
257 .iram IRAMORIG : AT ( iramcopy)
278 plugin_bss_start = .;
280 #if defined(IRAMSIZE) && IRAMSIZE == 0
287 #if NOCACHE_BASE != 0
288 .ncbss . + NOCACHE_BASE (NOLOAD) :
290 . = ALIGN(CACHEALIGN_SIZE);
292 . = ALIGN(CACHEALIGN_SIZE);
297 .pluginend . - NOCACHE_BASE :
299 _plugin_end_addr = .;
303 /* Special trick to avoid a linker error when no other sections are
304 left after garbage collection (plugin not for this platform) */