1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
24 .section .init.text,"ax",%progbits
29 /* PortalPlayer bootloader and startup code based on startup.s from the iPodLinux
32 * Copyright (c) 2003, Daniel Palffy (dpalffy (at) rainstorm.org)
33 * Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org>
36 #if CONFIG_CPU == PP5002
37 .equ PROC_ID, 0xc4000000
38 .equ CPU_CTRL, 0xcf004054
39 .equ CPU_STATUS, 0xcf004050
40 .equ COP_CTRL, 0xcf004058
41 .equ COP_STATUS, 0xcf004050
42 .equ IIS_CONFIG, 0xc0002500
45 .equ CPUSLEEPING, 0x8000
46 .equ COPSLEEPING, 0x4000
47 .equ CACHE_CTRL, 0xcf004024
48 .equ CACHE_ENAB, 0x2 /* Actually the CACHE_CTL_INIT flag */
50 .equ PROC_ID, 0x60000000
51 .equ CPU_CTRL, 0x60007000
52 .equ CPU_STATUS, 0x60007000
53 .equ COP_CTRL, 0x60007004
54 .equ COP_STATUS, 0x60007004
55 .equ IIS_CONFIG, 0x70002800
56 .equ SLEEP, 0x80000000
58 .equ CPUSLEEPING, 0x80000000
59 .equ COPSLEEPING, 0x80000000
60 .equ CACHE_CTRL, 0x6000c000
64 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ */
65 #ifndef E200R_INSTALLER
66 /* 1 - Copy the bootloader to IRAM */
67 /* get the high part of our execute address */
68 bic r0, pc, #0xff /* r4 = pc & 0xffffff00 */
70 /* Copy bootloader to safe area - 0x40000000 (IRAM) */
80 /* For builds on targets with mi4 firmware, scramble writes data to
81 0xe0-0xeb, so jump past that. pad_skip must then exist at an
88 #endif /* IPOD_ARCH */
91 /* 2 - Jump both CPU and COP there */
92 ldr pc, =start_loc /* jump to the relocated start_loc: */
93 #endif /* E200R_INSTALLER */
96 /* Find out which processor we are */
103 /* put us (co-processor) to sleep */
110 /* Invalidate cache */
118 /* Wait for COP to be sleeping */
125 /* Initialise bss section to zero */
134 /* Set up some stack and munge it with 0xdeadbeef */
143 /* execute the loader - this will load an image to 0x10000000 */
146 /* store actual startup location returned by main() */
154 /* Wake up the coprocessor before executing the firmware */
159 #if defined(SANSA_C200) || defined(PHILIPS_HDD1630) || defined(PHILIPS_HDD6330)
160 /* Magic for loading the c200 OF */
174 .align 8 /* starts at 0x100 */
177 /* here comes the boot table, don't move its offset - preceding
178 code+data must stay <= 256 bytes */
198 #elif CONFIG_CPU == PP5002
199 ldrne r0, =0xf0004000
200 ldreq r0, =0xf000c000
207 #endif /* CPU type */