firmware/target/mips/ingenic_jz47xx/pcm-jz4740.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2008 by Maurus Cuelenaere
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include "system.h"
  23 #include "kernel.h"
  24 #include "logf.h"
  25 #include "audio.h"
  26 #include "sound.h"
  27 #include "pcm.h"
  28 #include "jz4740.h"
  29
  30
  31 /****************************************************************************
  32  ** Playback DMA transfer
  33  **/
  34
  35 void pcm_postinit(void)
  36 {
  37     audiohw_postinit();
  38
  39     /* playback sample: 16 bits burst: 16 bytes */
  40     __i2s_set_iss_sample_size(16);
  41     __i2s_set_oss_sample_size(16);
  42     __i2s_set_transmit_trigger(10);
  43     __i2s_set_receive_trigger(1);
  44
  45     /* Flush FIFO */
  46     __aic_flush_fifo();
  47 }
  48
  49 void pcm_play_dma_init(void)
  50 {
  51     /* TODO */
  52
  53     system_enable_irq(DMA_IRQ(DMA_AIC_TX_CHANNEL));
  54
  55     /* Initialize default register values. */
  56     audiohw_init();
  57 }
  58
  59 void pcm_dma_apply_settings(void)
  60 {
  61     /* TODO */
  62     audiohw_set_frequency(pcm_sampr);
  63 }
  64
  65 static void* playback_address;
  66 static inline void set_dma(const void *addr, size_t size)
  67 {
  68     int burst_size;
  69     logf("%x %d %x", (unsigned int)addr, size, REG_AIC_SR);
  70
  71     if(size % 16)
  72     {
  73         if(size % 4)
  74         {
  75             size /= 2;
  76             burst_size = DMAC_DCMD_DS_16BIT;
  77         }
  78         else
  79         {
  80             size /= 4;
  81             burst_size = DMAC_DCMD_DS_32BIT;
  82         }
  83     }
  84     else
  85     {
  86         size /= 16;
  87         burst_size = DMAC_DCMD_DS_16BYTE;
  88     }
  89
  90     __dcache_writeback_all();
  91     REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = DMAC_DCCSR_NDES;
  92     REG_DMAC_DSAR(DMA_AIC_TX_CHANNEL)  = PHYSADDR((unsigned long)addr);
  93     REG_DMAC_DTAR(DMA_AIC_TX_CHANNEL)  = PHYSADDR((unsigned long)AIC_DR);
  94     REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL)  = size;
  95     REG_DMAC_DRSR(DMA_AIC_TX_CHANNEL)  = DMAC_DRSR_RS_AICOUT;
  96     REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL)  = (DMAC_DCMD_SAI | DMAC_DCMD_SWDH_32 | burst_size | DMAC_DCMD_DWDH_16 | DMAC_DCMD_TIE);
  97
  98     playback_address = (void*)addr;
  99 }
 100
 101 static inline void play_dma_callback(void)
 102 {
 103     unsigned char *start = NULL;
 104     size_t size = 0;
 105
 106     if(pcm_callback_for_more)
 107         pcm_callback_for_more(&start, &size);
 108
 109     if(LIKELY(size > 0 && start))
 110     {
 111         set_dma(start, size);
 112         REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) |= DMAC_DCCSR_EN;
 113     }
 114     else
 115     {
 116         /* Error, callback missing or no more DMA to do */
 117         pcm_play_dma_stop();
 118         pcm_play_dma_stopped_callback();
 119     }
 120 }
 121
 122 void DMA_CALLBACK(DMA_AIC_TX_CHANNEL)(void) __attribute__ ((section(".icode")));
 123 void DMA_CALLBACK(DMA_AIC_TX_CHANNEL)(void)
 124 {
 125     if (REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) & DMAC_DCCSR_AR)
 126     {
 127         logf("PCM DMA address error");
 128         REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) &= ~DMAC_DCCSR_AR;
 129     }
 130
 131     if (REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) & DMAC_DCCSR_HLT)
 132     {
 133         logf("PCM DMA halt");
 134         REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) &= ~DMAC_DCCSR_HLT;
 135     }
 136
 137     if (REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) & DMAC_DCCSR_TT)
 138     {
 139         REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) &= ~DMAC_DCCSR_TT;
 140         play_dma_callback();
 141     }
 142 }
 143
 144 void pcm_play_dma_start(const void *addr, size_t size)
 145 {
 146     dma_enable();
 147
 148     set_dma(addr, size);
 149
 150     __aic_enable_transmit_dma();
 151     __aic_enable_replay();
 152
 153     REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) |= DMAC_DCCSR_EN;
 154 }
 155
 156 void pcm_play_dma_stop(void)
 157 {
 158     int flags = disable_irq_save();
 159
 160     REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) = (REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) | DMAC_DCCSR_HLT) & ~DMAC_DCCSR_EN;
 161
 162     dma_disable();
 163
 164     __aic_disable_transmit_dma();
 165     __aic_disable_replay();
 166
 167     restore_irq(flags);
 168 }
 169
 170 static unsigned int play_lock = 0;
 171 void pcm_play_lock(void)
 172 {
 173     int flags = disable_irq_save();
 174
 175     if (++play_lock == 1)
 176         __dmac_channel_disable_irq(DMA_AIC_TX_CHANNEL);
 177
 178     restore_irq(flags);
 179 }
 180
 181 void pcm_play_unlock(void)
 182 {
 183     int flags = disable_irq_save();
 184
 185     if (--play_lock == 0)
 186         __dmac_channel_enable_irq(DMA_AIC_TX_CHANNEL);
 187
 188     restore_irq(flags);
 189 }
 190
 191 void pcm_play_dma_pause(bool pause)
 192 {
 193     int flags = disable_irq_save();
 194
 195     if(pause)
 196         REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) &= ~DMAC_DCCSR_EN;
 197     else
 198         REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) |= DMAC_DCCSR_EN;
 199
 200     restore_irq(flags);
 201 }
 202
 203 static int get_dma_count(void)
 204 {
 205     int count = REG_DMAC_DTCR(DMA_AIC_TX_CHANNEL);
 206     switch(REG_DMAC_DCMD(DMA_AIC_TX_CHANNEL) & DMAC_DCMD_DS_MASK)
 207     {
 208         case DMAC_DCMD_DS_16BIT:
 209             count *= 2;
 210             break;
 211         case DMAC_DCMD_DS_32BIT:
 212             count *= 4;
 213             break;
 214         case DMAC_DCMD_DS_16BYTE:
 215             count *= 16;
 216             break;
 217     }
 218
 219     return count;
 220 }
 221
 222 size_t pcm_get_bytes_waiting(void)
 223 {
 224     int bytes, flags = disable_irq_save();
 225
 226     if(REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) & DMAC_DCCSR_EN)
 227         bytes = get_dma_count() & ~3;
 228     else
 229         bytes = 0;
 230
 231     restore_irq(flags);
 232
 233     return bytes;
 234 }
 235
 236 const void * pcm_play_dma_get_peak_buffer(int *count)
 237 {
 238     int flags = disable_irq_save();
 239
 240     const void* addr;
 241     if(REG_DMAC_DCCSR(DMA_AIC_TX_CHANNEL) & DMAC_DCCSR_EN)
 242     {
 243         int bytes = get_dma_count();
 244         *count = bytes >> 2;
 245         addr = (const void*)((int)(playback_address + bytes + 2) & ~3);
 246     }
 247     else
 248     {
 249         *count = 0;
 250         addr = NULL;
 251     }
 252
 253     restore_irq(flags);
 254
 255     return addr;
 256 }
 257
 258 void audiohw_close(void)
 259 {
 260     /* TODO: prevent pop */
 261 }
 262
 263 #ifdef HAVE_RECORDING
 264 /* TODO */
 265 void pcm_rec_dma_init(void)
 266 {
 267 }
 268
 269 void pcm_rec_dma_close(void)
 270 {
 271 }
 272
 273 void pcm_rec_dma_start(void *addr, size_t size)
 274 {
 275     (void) addr;
 276     (void) size;
 277 }
 278
 279 void pcm_rec_dma_stop(void)
 280 {
 281 }
 282
 283 void pcm_rec_lock(void)
 284 {
 285 }
 286
 287 void pcm_rec_unlock(void)
 288 {
 289 }
 290
 291 const void * pcm_rec_dma_get_peak_buffer(void)
 292 {
 293     return NULL;
 294 }
 295
 296 void pcm_rec_dma_record_more(void *start, size_t size)
 297 {
 298     (void) start;
 299     (void) size;
 300 }
 301 #endif