1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright (C) 2007 by Dave Chapman
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
29 /**************************************************************************
30 ** The A/D conversion is done every tick, in three steps:
32 ** 1) On the tick interrupt, the conversion of channels 0-3 is started, and
33 ** the A/D interrupt is enabled.
35 ** 2) After the conversion is done, an interrupt
36 ** is generated at level 1, which is the same level as the tick interrupt
37 ** itself. This interrupt will be pending until the tick interrupt is
39 ** When the A/D interrupt is finally served, it will read the results
40 ** from the first conversion and start the conversion of channels 4-7.
42 ** 3) When the conversion of channels 4-7 is finished, the interrupt is
43 ** triggered again, and the results are read. This time, no new
44 ** conversion is started, it will be done in the next tick interrupt.
46 ** Thus, each channel will be updated HZ times per second.
48 *************************************************************************/
50 static int channel_group
;
51 static unsigned short adcdata
[8];
54 static void adc_tick(void)
56 /* Start a conversion of channels 0-3. This will trigger an interrupt,
57 and the interrupt handler will take care of channels 4-7. */
61 PCLKCFG6
|= (1<<15); /* Enable ADC clock */
65 /* Start converting the first 4 channels */
66 for (i
= 0; i
< 4; i
++)
80 adc_status
= ADCSTATUS
;
81 num
= (adc_status
>>24) & 7;
82 if (num
) adcdata
[(adc_status
>> 16) & 0x7] = adc_status
& 0x3ff;
86 if (channel_group
== 0)
88 /* Start conversion of channels 4-7 */
89 for (i
= 4; i
< 8; i
++)
96 PCLKCFG6
&= ~(1<<15); /* Disable ADC clock */
100 unsigned short adc_read(int channel
)
102 return adcdata
[channel
];
107 /* Initialize ADC clocks */
108 PCLKCFG6
= (PCLKCFG6
& 0xffff0000) | 4004;
110 ADCCON
= (1<<4); /* Leave standby mode */
112 /* IRQ enable, auto power-down, single-mode */
113 ADCCFG
|= (1<<3) | (1<<1) | (1<<0);
118 tick_add_task(adc_tick
);
120 sleep(2); /* Ensure adc_data[] contains data before returning */