3 /* These output formats should be in the config-files */
6 OUTPUT_FORMAT(elf32-m68k)
8 OUTPUT_FORMAT(elf32-littlearm)
10 OUTPUT_FORMAT(elf32-sh)
11 #elif defined(CPU_MIPS)
12 OUTPUT_FORMAT(elf32-littlemips)
14 /* We can have an #error here we don't use this file when build sims! */
15 #error Unknown CPU architecture
19 #define STUBOFFSET 0x10000
26 #define NOCACHE_BASE 0x10000000
28 #define NOCACHE_BASE 0x28000000
30 #define CACHEALIGN_SIZE 16
34 /* Default to no offset if target doesn't define this */
35 #define NOCACHE_BASE 0x00000000
38 #if CONFIG_CPU==DM320 || CONFIG_CPU==S3C2440
39 #define LCD_BUFFER_SIZE (LCD_WIDTH*LCD_HEIGHT*2)
41 /* must be 16Kb (0x4000) aligned */
42 #define TTB_SIZE (0x4000)
43 #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE
44 #elif CONFIG_CPU==IMX31L
46 /* Reserve 1mb for LCD buffer/TTB as in app.lds */
47 #define DRAMSIZE (MEMORYSIZE * 0x100000 - 0x100000) - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE
48 #elif CONFIG_CPU==AS3525 && MEMORYSIZE <= 2
49 #define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - STUBOFFSET
51 #define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE
54 #if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300)
58 #if defined(ARCH_IRIVER) || defined(IAUDIO_M3)
59 #define DRAMORIG 0x31000000
60 #define IRAMORIG 0x1000c000
61 #define IRAMSIZE 0xc000
62 #elif defined(IAUDIO_X5) || defined(IAUDIO_M5)
63 #define DRAMORIG 0x31000000
64 #define IRAMORIG 0x10010000
65 #define IRAMSIZE 0x10000
66 #elif CONFIG_CPU == PP5022 || CONFIG_CPU == PP5024
67 /* PP5022/24 have 128KB of IRAM */
68 #define DRAMORIG 0x00000000
69 #define IRAMORIG 0x4000c000
70 #define IRAMSIZE 0x14000
72 /* all other PP's have 96KB of IRAM */
73 #define DRAMORIG 0x00000000
74 #define IRAMORIG 0x4000c000
75 #define IRAMSIZE 0x0c000
76 #elif CONFIG_CPU == PNX0101
77 #define DRAMORIG 0xc00000 + STUBOFFSET
78 #define IRAMORIG 0x407000
79 #define IRAMSIZE 0x9000
80 #elif CONFIG_CPU == S3C2440
81 #define DRAMORIG 0x0 + STUBOFFSET
84 #elif CONFIG_CPU == IMX31L
85 #define DRAMORIG 0x0 + STUBOFFSET
88 #elif CONFIG_CPU==DM320
89 #define DRAMORIG 0x00900000 + STUBOFFSET
91 /* The bit of IRAM that is available is used in the core */
93 #elif defined(CPU_TCC780X) || defined(CPU_TCC77X)
94 #define DRAMORIG 0x20000000
95 /*#define IRAMORIG 0x1000c000
96 #define IRAMSIZE 0xc000*/
99 #elif CONFIG_CPU==AS3525
101 #define IRAMSIZE 0 /* simulates no IRAM since codec is already entirely in IRAM */
102 #define CODEC_ORIGIN (0x50000 - CODEC_SIZE)
103 #define PLUGIN_ORIGIN (DRAMORIG + DRAMSIZE)
106 #define IRAMSIZE 0x50000
108 #define DRAMORIG 0x30000000
110 #elif CONFIG_CPU == JZ4732
111 #define DRAMORIG 0x80004000 + STUBOFFSET
112 //#define IRAMORIG 0x80000000
113 //#define IRAMSIZE 0x4000
115 #define DRAMORIG 0x09000000 + STUBOFFSET
118 #define PLUGIN_LENGTH PLUGIN_BUFFER_SIZE
120 #ifndef CODEC_ORIGIN /* targets can specify another origin */
121 #define CODEC_ORIGIN (DRAMORIG + (DRAMSIZE))
124 #ifndef PLUGIN_ORIGIN /* targets can specify another origin */
125 #define PLUGIN_ORIGIN (CODEC_ORIGIN + CODEC_SIZE)
129 #define THIS_LENGTH CODEC_SIZE
130 #define THIS_ORIGIN CODEC_ORIGIN
131 #elif defined OVERLAY_OFFSET
132 #define THIS_LENGTH (DRAMSIZE - OVERLAY_OFFSET)
133 #define THIS_ORIGIN (DRAMORIG + OVERLAY_OFFSET)
135 #define THIS_LENGTH PLUGIN_LENGTH
136 #define THIS_ORIGIN PLUGIN_ORIGIN
141 PLUGIN_RAM : ORIGIN = THIS_ORIGIN, LENGTH = THIS_LENGTH
142 #if defined(IRAMSIZE) && IRAMSIZE != 0
143 PLUGIN_IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
150 _plugin_start_addr = .;
151 plugin_start_addr = .;
158 #if defined(IRAMSIZE) && IRAMSIZE == 0
170 #if defined(IRAMSIZE) && IRAMSIZE == 0
179 #if defined(IRAMSIZE) && IRAMSIZE == 0
184 #if NOCACHE_BASE != 0
185 .ncdata . + NOCACHE_BASE :
187 . = ALIGN(CACHEALIGN_SIZE);
189 . = ALIGN(CACHEALIGN_SIZE);
193 #if defined(IRAMSIZE)
194 iramcopy = . - NOCACHE_BASE;
205 #if defined(IRAMSIZE) && IRAMSIZE != 0
206 .iram IRAMORIG : AT ( iramcopy)
227 plugin_bss_start = .;
229 #if defined(IRAMSIZE) && IRAMSIZE == 0
236 #if NOCACHE_BASE != 0
237 .ncbss . + NOCACHE_BASE (NOLOAD) :
239 . = ALIGN(CACHEALIGN_SIZE);
241 . = ALIGN(CACHEALIGN_SIZE);
246 .pluginend . - NOCACHE_BASE :
248 _plugin_end_addr = .;
252 /* Special trick to avoid a linker error when no other sections are
253 left after garbage collection (plugin not for this platform) */