firmware/drivers/rtc/rtc_s35380a.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * adopted for HD300 by Marcin Bukat
  11  * Copyright (C) 2009 by Bertrik Sikken
  12  * Copyright (C) 2008 by Robert Kukla
  13  *
  14  * This program is free software; you can redistribute it and/or
  15  * modify it under the terms of the GNU General Public License
  16  * as published by the Free Software Foundation; either version 2
  17  * of the License, or (at your option) any later version.
  18  *
  19  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  20  * KIND, either express or implied.
  21  *
  22  ****************************************************************************/
  23 #include "config.h"
  24 #include "rtc.h"
  25 #include "i2c-coldfire.h"
  26
  27 /*  Driver for the Seiko S35380A real-time clock chip with i2c interface
  28
  29     This driver was derived from rtc_s3539a.c and adapted for the MPIO HD300
  30  */
  31
  32 #define RTC_ADDR   0x60
  33
  34 #define STATUS_REG1     0
  35 #define STATUS_REG2     1
  36 #define REALTIME_DATA1  2
  37 #define REALTIME_DATA2  3
  38 #define INT1_REG        4
  39 #define INT2_REG        5
  40 #define CLOCK_CORR_REG  6
  41 #define FREE_REG        7
  42
  43 /* STATUS_REG1 flags */
  44 #define STATUS_REG1_POC   0x80
  45 #define STATUS_REG1_BLD   0x40
  46 #define STATUS_REG1_INT2  0x20
  47 #define STATUS_REG1_INT1  0x10
  48 #define STATUS_REG1_SC1   0x08
  49 #define STATUS_REG1_SC0   0x04
  50 #define STATUS_REG1_H1224 0x02
  51 #define STATUS_REG1_RESET 0x01
  52
  53 /* STATUS_REG2 flags */
  54 #define STATUS_REG2_TEST   0x80
  55 #define STATUS_REG2_INT2AE 0x40
  56 #define STATUS_REG2_INT2ME 0x20
  57 #define STATUS_REG2_INT2FE 0x10
  58 #define STATUS_REG2_32kE   0x08
  59 #define STATUS_REG2_INT1AE 0x04
  60 #define STATUS_REG2_INT1ME 0x02
  61 #define STATUS_REG2_INT1FE 0x01
  62
  63 /* REALTIME_DATA register bytes */
  64 #define TIME_YEAR     0
  65 #define TIME_MONTH    1
  66 #define TIME_DAY      2
  67 #define TIME_WEEKDAY  3
  68 #define TIME_HOUR     4
  69 #define TIME_MINUTE   5
  70 #define TIME_SECOND   6
  71 #define TIME_REG_SIZE 7
  72
  73 /* INT1, INT2 register bytes */
  74 #define ALARM_WEEKDAY  0
  75 #define ALARM_HOUR     1
  76 #define ALARM_MINUTE   2
  77 #define ALARM_REG_SIZE 3
  78
  79 /* INT1, INT2 register bits */
  80 #define A1WE 0x80
  81 #define A1HE 0x80
  82 #define A1mE 0x80
  83
  84 #define A2WE 0x80
  85 #define A2HE 0x80
  86 #define A2mE 0x80
  87
  88 #define AMPM 0x40
  89
  90 static bool int_flag;
  91
  92 /* s35380a chip has reversed bits order in byte
  93  * This is little helper function to deal with
  94  */
  95 static void reverse_bits(unsigned char* v, int size)
  96 {
  97     static const unsigned char flipnibble[] =
  98         {0x00, 0x08, 0x04, 0x0C, 0x02, 0x0A, 0x06, 0x0E,
  99          0x01, 0x09, 0x05, 0x0D, 0x03, 0x0B, 0x07, 0x0F};
 100     int i;
 101
 102     for (i = 0; i < size; i++) {
 103         v[i] = (flipnibble[v[i] & 0x0F] << 4) |
 104                 flipnibble[(v[i] >> 4) & 0x0F];
 105     }
 106 }
 107
 108 /* Read 'size' bytes from RTC 'reg' and put data in 'buf'
 109  * bits are reversed in data bytes afterwards so they appear in regular order
 110  * return i2c transfer code
 111  */
 112 static int rtc_read(unsigned char reg, unsigned char *buf, int size)
 113 {
 114     int rc;
 115     rc = i2c_read(I2C_IFACE_1, RTC_ADDR|(reg<<1), buf, size);
 116     reverse_bits(buf, size);
 117     return rc;
 118 }
 119
 120 /* Write 'size' bytes to RTC 'reg' and put data in 'buf'
 121  * bits are reversed in data bytes prior to sending them to RTC
 122  * return i2c transfer code
 123  */
 124 static int rtc_write(unsigned char reg, unsigned char *buf, int size)
 125 {
 126     int rc;
 127     reverse_bits(buf, size);
 128     rc = i2c_write(I2C_IFACE_1, RTC_ADDR|(reg<<1), buf, size);
 129     return rc;
 130 }
 131
 132 /* Reset RTC by writing '1' to RESET bit in STATUS_REG1 */
 133 static inline void rtc_reset(void)
 134 {
 135     unsigned char reg = STATUS_REG1_RESET;
 136     rtc_write(STATUS_REG1, &reg, 1);
 137 }
 138
 139 /* Initialize RTC (according to scheme outlined in datasheet).
 140  * Configure chip to 24h time format.
 141  */
 142 void rtc_init(void)
 143 {
 144     unsigned char reg;
 145     static bool initialized = false;
 146
 147     if ( initialized )
 148         return;
 149
 150     rtc_read(STATUS_REG1, &reg, 1);
 151
 152     /* cache INT1, INT2 flags as reading the register seem to clear
 153      * this bits (which is not described in datasheet)
 154      */
 155     int_flag = ((reg & STATUS_REG1_INT1) || (reg & STATUS_REG1_INT2));
 156
 157     /* test POC and BLD flags */
 158     if ( (reg & STATUS_REG1_POC) || (reg & STATUS_REG1_BLD))
 159         rtc_reset();
 160
 161     rtc_read(STATUS_REG2, &reg, 1);
 162
 163     /* test TEST flag */
 164     if ( reg & STATUS_REG2_TEST )
 165         rtc_reset();
 166
 167     /* setup 24h time format */
 168     reg = STATUS_REG1_H1224;
 169     rtc_write(STATUS_REG1, &reg, 1);
 170
 171     initialized = true;
 172 }
 173
 174 /* Read realtime data register */
 175 int rtc_read_datetime(struct tm *tm)
 176 {
 177     unsigned char buf[TIME_REG_SIZE];
 178     unsigned int i;
 179     int ret;
 180
 181     ret = rtc_read(REALTIME_DATA1, buf, sizeof(buf));
 182
 183     buf[TIME_HOUR] &= 0x3f; /* mask out p.m. flag */
 184
 185     for (i = 0; i < sizeof(buf); i++)
 186         buf[i] = BCD2DEC(buf[i]);
 187
 188     tm->tm_sec  = buf[TIME_SECOND];
 189     tm->tm_min  = buf[TIME_MINUTE];
 190     tm->tm_hour = buf[TIME_HOUR];
 191     tm->tm_wday = buf[TIME_WEEKDAY];
 192     tm->tm_mday = buf[TIME_DAY];
 193     tm->tm_mon  = buf[TIME_MONTH] - 1;
 194     tm->tm_year = buf[TIME_YEAR] + 100;
 195
 196     return ret;
 197 }
 198
 199 /* Write to realtime data register */
 200 int rtc_write_datetime(const struct tm *tm)
 201 {
 202     unsigned char buf[TIME_REG_SIZE];
 203     unsigned int i;
 204     int ret;
 205
 206     buf[TIME_SECOND]  = tm->tm_sec;
 207     buf[TIME_MINUTE]  = tm->tm_min;
 208     buf[TIME_HOUR]    = tm->tm_hour;
 209     buf[TIME_WEEKDAY] = tm->tm_wday;
 210     buf[TIME_DAY]     = tm->tm_mday;
 211     buf[TIME_MONTH]   = tm->tm_mon + 1;
 212     buf[TIME_YEAR]    = tm->tm_year - 100;
 213
 214     for (i = 0; i < sizeof(buf); i++)
 215         buf[i] = DEC2BCD(buf[i]);
 216
 217     ret = rtc_write(REALTIME_DATA1, buf, sizeof(buf));
 218
 219     return ret;
 220 }
 221
 222 #ifdef HAVE_RTC_ALARM
 223 /* Set alarm (INT1) data register */
 224 void rtc_set_alarm(int h, int m)
 225 {
 226     unsigned char buf[ALARM_REG_SIZE];
 227
 228     /* INT1 register can be accessed only when IN1AE flag is set */
 229     rtc_enable_alarm(true);
 230
 231     /* A1mE, A1HE - validity flags */
 232     buf[ALARM_MINUTE]  = DEC2BCD(m) | A1mE;
 233     buf[ALARM_HOUR]    = DEC2BCD(h) | A1HE;
 234     buf[ALARM_WEEKDAY] = 0;
 235
 236     /* AM/PM flag has to be set properly regardles of
 237      * time format used (H1224 flag in STATUS_REG1)
 238      * this is not described in datasheet for s35380a
 239      * but is somehow described in datasheet for s35390a
 240      */
 241     if ( h >= 12 )
 242         buf[ALARM_HOUR] |= AMPM;
 243
 244     rtc_write(INT1_REG, buf, sizeof(buf));
 245 }
 246
 247 /* Read alarm (INT1) data register */
 248 void rtc_get_alarm(int *h, int *m)
 249 {
 250     unsigned char buf[ALARM_REG_SIZE];
 251
 252     /* INT1 alarm register can be accessed only when INT1AE is set */
 253     rtc_enable_alarm(true);
 254
 255     /* read the content of INT1 register */
 256     rtc_read(INT1_REG, buf, sizeof(buf));
 257
 258     *h = BCD2DEC(buf[ALARM_HOUR] & 0x3f);   /* mask out A1HE and PM/AM bits */
 259     *m = BCD2DEC(buf[ALARM_MINUTE] & 0x7f); /* mask out A1mE bit */
 260
 261     /* Disable alarm - this is not strictly needed in rockbox
 262      * as after rtc_get_alarm() rtc_set_alarm() or rtc_enable_alarm(false)
 263      * are called. I just found this weird that simple reading register
 264      * changes alarm settings.
 265      */
 266     rtc_enable_alarm(false);
 267 }
 268
 269 /* Check if we just triggered alarm.
 270  * We check both INT1 and INT2. Rockbox uses only INT1 but
 271  * OF in MPIO HD300 uses both
 272  */
 273 bool rtc_check_alarm_flag(void)
 274 {
 275     unsigned char reg;
 276     rtc_read(STATUS_REG1, &reg, 1);
 277
 278     return ((reg & STATUS_REG1_INT1) || (reg & STATUS_REG1_INT2));
 279 }
 280
 281 /* Enable/disable alarm function */
 282 void rtc_enable_alarm(bool enable)
 283 {
 284     unsigned char reg = 0;
 285
 286     if (enable)
 287         reg = STATUS_REG2_INT1AE;
 288
 289     rtc_write(STATUS_REG2, &reg, 1);
 290 }
 291
 292 /* Return true if wakeup is due to RTC alarm */
 293 bool rtc_check_alarm_started(bool release_alarm)
 294 {
 295     static bool run_before;
 296     bool rc;
 297
 298     if (run_before)
 299     {
 300         rc = int_flag;
 301         int_flag &= ~release_alarm;
 302     }
 303     else
 304     {
 305         rc = int_flag;
 306         run_before = true;
 307     }
 308
 309     return rc;
 310 }
 311 #endif