firmware/drivers/audio/uda1341.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id: uda1380.c 21975 2009-07-19 22:45:32Z bertrik $
   9  *
  10  * Copyright (C) 2009 by Bob Cousins
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21 #include <string.h>
  22
  23 #include "config.h"
  24 #include "logf.h"
  25 #include "system.h"
  26 #include "audio.h"
  27 #include "debug.h"
  28
  29 #include "audiohw.h"
  30
  31
  32 const struct sound_settings_info audiohw_settings[] = {
  33     [SOUND_VOLUME]        = {"dB", 0,  1, -84,   0, -25},
  34     [SOUND_BASS]          = {"dB", 0,  2,   0,  24,   0},
  35     [SOUND_TREBLE]        = {"dB", 0,  2,   0,   6,   0},
  36     [SOUND_BALANCE]       = {"%",  0,  1,-100, 100,   0},   /* not used */
  37     [SOUND_CHANNELS]      = {"",   0,  1,   0,   5,   0},   /* not used */
  38     [SOUND_STEREO_WIDTH]  = {"%",  0,  5,   0, 250, 100},   /* not used */
  39 #ifdef HAVE_RECORDING
  40     [SOUND_LEFT_GAIN]     = {"dB", 1,  1,-128,  96,   0},
  41     [SOUND_RIGHT_GAIN]    = {"dB", 1,  1,-128,  96,   0},
  42     [SOUND_MIC_GAIN]      = {"dB", 1,  1,-128, 108,  16},
  43 #endif
  44 };
  45
  46 /* convert tenth of dB volume (-600..0) to master volume register value */
  47 int tenthdb2master(int db)
  48 {
  49     if (db < -600)
  50         return 63;
  51     else                            /* 1 dB steps */
  52         return -(db / 10) + 1;
  53 }
  54
  55 static unsigned short uda_regs[NUM_REG_ID];
  56
  57 /****************************************************************************/
  58
  59 /* ------------------------------------------------- */
  60 /* Local functions and variables */
  61 /* ------------------------------------------------- */
  62
  63 /* Generic L3 functions */
  64
  65 #define L3PORT      GPBDAT
  66 #define L3MODE      (1 << 2)
  67 #define L3DATA      (1 << 3)
  68 #define L3CLOCK     (1 << 4)
  69
  70 static void l3_init (void)
  71 {
  72     L3PORT |= L3MODE | L3CLOCK;
  73     L3PORT &= ~L3DATA;
  74
  75     S3C2440_GPIO_CONFIG (GPBCON, 2, GPIO_OUTPUT);   /* L3 MODE */
  76     S3C2440_GPIO_CONFIG (GPBCON, 3, GPIO_OUTPUT);   /* L3 DATA */
  77     S3C2440_GPIO_CONFIG (GPBCON, 4, GPIO_OUTPUT);   /* L3 CLOCK */
  78
  79     S3C2440_GPIO_PULLUP (GPBUP, 2, GPIO_PULLUP_DISABLE);
  80     S3C2440_GPIO_PULLUP (GPBUP, 3, GPIO_PULLUP_DISABLE);
  81     S3C2440_GPIO_PULLUP (GPBUP, 4, GPIO_PULLUP_DISABLE);
  82 }
  83
  84 static void bit_delay (void)
  85 {
  86     volatile int j;
  87     for (j=0; j<5; j++)
  88         ;
  89 }
  90
  91 static void l3_write_byte (unsigned char data, bool address_mode)
  92 {
  93     int bit;
  94
  95     L3PORT |= L3CLOCK;
  96     if (address_mode)
  97         L3PORT &= ~L3MODE;
  98     else
  99         L3PORT |= L3MODE;
 100     bit_delay();
 101
 102     for (bit=0; bit < 8; bit++)
 103     {
 104         if (data & 1)
 105         {
 106             L3PORT |= L3DATA;
 107         }
 108         else
 109         {
 110             L3PORT &= ~L3DATA;
 111         }
 112         L3PORT &= ~L3CLOCK;
 113         bit_delay();
 114         L3PORT |= L3CLOCK;
 115         bit_delay();
 116
 117         data >>= 1;
 118     }
 119
 120     if (address_mode)
 121         L3PORT |= L3MODE;
 122     else
 123         L3PORT &= ~L3MODE;
 124     bit_delay();
 125 }
 126
 127 static void l3_write_addr (unsigned char addr)
 128 {
 129     /* write address byte */
 130     l3_write_byte (addr, true);
 131 }
 132
 133 static void l3_write_data (unsigned char data)
 134 {
 135     /* write data byte */
 136     l3_write_byte (data, false);
 137 }
 138
 139 /****************************************************************************/
 140
 141 /* UDA1341 access functions */
 142
 143 static int udacodec_write(unsigned char reg, unsigned short value)
 144 {
 145     l3_write_addr (UDA1341_ADDR | reg);
 146     l3_write_data (value & 0xff);
 147     return 0;
 148 }
 149
 150 static void udacodec_reset(void)
 151 {
 152     /* uda reset */
 153     l3_init();
 154
 155     udacodec_write (UDA_REG_STATUS, UDA_STATUS_0 | UDA_RESET | UDA_SYSCLK_256FS |
 156                                     I2S_IFMT_IIS);
 157     udacodec_write (UDA_REG_STATUS, UDA_STATUS_0 | UDA_SYSCLK_256FS | I2S_IFMT_IIS);
 158     udacodec_write (UDA_REG_STATUS, UDA_STATUS_1 | UDA_POWER_DAC_ON);
 159
 160     uda_regs[UDA_REG_ID_CTRL2] = UDA_PEAK_DETECT_POS_AFTER |
 161             UDA_DE_EMPHASIS_NONE | UDA_MUTE_OFF | UDA_MODE_SWITCH_FLAT;
 162
 163 }
 164
 165 /****************************************************************************/
 166
 167 /* Audio API functions */
 168
 169 /* This table must match the table in pcm-xxxx.c if using Master mode */
 170 /* [reserved, master clock rate] */
 171 static const unsigned char uda_freq_parms[HW_NUM_FREQ][2] =
 172 {
 173     [HW_FREQ_44] = { 0, UDA_SYSCLK_384FS },
 174     [HW_FREQ_22] = { 0, UDA_SYSCLK_256FS },
 175     [HW_FREQ_11] = { 0, UDA_SYSCLK_256FS },
 176 };
 177
 178 void audiohw_init(void)
 179 {
 180     udacodec_reset();
 181
 182     audiohw_set_bass (0);
 183     audiohw_set_treble (0);
 184     audiohw_set_master_vol (26, 26);    /* -25 dB */
 185 }
 186
 187 void audiohw_postinit(void)
 188 {
 189 }
 190
 191 void audiohw_close(void)
 192 {
 193     /* DAC, ADC off */
 194     udacodec_write (UDA_REG_STATUS, UDA_STATUS_1 | 0);
 195 }
 196
 197 void audiohw_set_bass(int value)
 198 {
 199     uda_regs [UDA_REG_ID_CTRL1] &= UDA_BASS_BOOST (UDA_BASS_BOOST_MASK);
 200     uda_regs [UDA_REG_ID_CTRL1] |= UDA_BASS_BOOST (value & UDA_BASS_BOOST_MASK);
 201
 202     udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL1 | uda_regs [UDA_REG_ID_CTRL1] );
 203 }
 204
 205 void audiohw_set_treble(int value)
 206 {
 207     uda_regs [UDA_REG_ID_CTRL1] &= UDA_TREBLE (UDA_TREBLE_MASK);
 208     uda_regs [UDA_REG_ID_CTRL1] |= UDA_TREBLE (value & UDA_TREBLE_MASK);
 209
 210     udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL1 | uda_regs [UDA_REG_ID_CTRL1] );
 211 }
 212
 213 /*static void audiohw_mute(bool mute)
 214 {
 215     if (mute)
 216         uda_regs [UDA_REG_ID_CTRL2] |= UDA_MUTE_ON;
 217     else
 218         uda_regs [UDA_REG_ID_CTRL2] &= ~UDA_MUTE_ON;
 219
 220     udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL2 | uda_regs [UDA_REG_ID_CTRL2] );*/
 221 }
 222
 223 void audiohw_set_prescaler(int val)
 224 {
 225     (void)val;
 226 }
 227
 228 /**
 229  * Sets left and right master volume  (1(max) to 62(muted))
 230  */
 231 void audiohw_set_master_vol(int vol_l, int vol_r)
 232 {
 233     uda_regs[UDA_REG_ID_CTRL0] = (vol_l + vol_r) / 2;
 234     udacodec_write (UDA_REG_DATA0, UDA_DATA_CTRL0 | uda_regs[UDA_REG_ID_CTRL0]);
 235 }
 236
 237 void audiohw_set_frequency(int fsel)
 238 {
 239     if ((unsigned)fsel >= HW_NUM_FREQ)
 240         fsel = HW_FREQ_DEFAULT;
 241
 242     uda_regs[UDA_REG_ID_STATUS_0] = I2S_IFMT_IIS | uda_freq_parms[fsel][1];
 243
 244     udacodec_write (UDA_REG_STATUS, UDA_STATUS_0 | uda_regs[UDA_REG_ID_STATUS_0]);
 245 }