firmware/target/sh/system-sh.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2007 by Jens Arnold
  11  * Based on the work of Alan Korr and others
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; either version 2
  16  * of the License, or (at your option) any later version.
  17  *
  18  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  19  * KIND, either express or implied.
  20  *
  21  ****************************************************************************/
  22
  23 #include <stdio.h>
  24 #include "config.h"
  25 #include "system.h"
  26 #include "lcd.h"
  27 #include "font.h"
  28 #include "led.h"
  29
  30 const unsigned bit_n_table[32] = {
  31     1LU<< 0, 1LU<< 1, 1LU<< 2, 1LU<< 3,
  32     1LU<< 4, 1LU<< 5, 1LU<< 6, 1LU<< 7,
  33     1LU<< 8, 1LU<< 9, 1LU<<10, 1LU<<11,
  34     1LU<<12, 1LU<<13, 1LU<<14, 1LU<<15,
  35     1LU<<16, 1LU<<17, 1LU<<18, 1LU<<19,
  36     1LU<<20, 1LU<<21, 1LU<<22, 1LU<<23,
  37     1LU<<24, 1LU<<25, 1LU<<26, 1LU<<27,
  38     1LU<<28, 1LU<<29, 1LU<<30, 1LU<<31
  39 };
  40
  41 static const char* const irqname[] = {
  42     "", "", "", "", "IllInstr", "", "IllSltIn","","",
  43     "CPUAdrEr", "DMAAdrEr", "NMI", "UserBrk",
  44     "","","","","","","","","","","","","","","","","","","",
  45     "Trap32","Trap33","Trap34","Trap35","Trap36","Trap37","Trap38","Trap39",
  46     "Trap40","Trap41","Trap42","Trap43","Trap44","Trap45","Trap46","Trap47",
  47     "Trap48","Trap49","Trap50","Trap51","Trap52","Trap53","Trap54","Trap55",
  48     "Trap56","Trap57","Trap58","Trap59","Trap60","Trap61","Trap62","Trap63",
  49     "Irq0","Irq1","Irq2","Irq3","Irq4","Irq5","Irq6","Irq7",
  50     "Dma0","","Dma1","","Dma2","","Dma3","",
  51     "IMIA0","IMIB0","OVI0","", "IMIA1","IMIB1","OVI1","",
  52     "IMIA2","IMIB2","OVI2","", "IMIA3","IMIB3","OVI3","",
  53     "IMIA4","IMIB4","OVI4","",
  54     "Ser0Err","Ser0Rx","Ser0Tx","Ser0TE",
  55     "Ser1Err","Ser1Rx","Ser1Tx","Ser1TE",
  56     "ParityEr","A/D conv","","","Watchdog","DRAMRefr"
  57 };
  58
  59 #define RESERVE_INTERRUPT(number) "\t.long\t_UIE" #number "\n"
  60 #define DEFAULT_INTERRUPT(name, number)  "\t.weak\t_" #name \
  61                           "\n\t.set\t_" #name ",_UIE" #number \
  62                           "\n\t.long\t_" #name "\n"
  63
  64 asm (
  65
  66 /* Vector table.
  67  * Handled in asm because gcc 4.x doesn't allow weak aliases to symbols
  68  * defined in an asm block -- silly.
  69  * Reset vectors (0..3) are handled in crt0.S */
  70
  71     ".section\t.vectors,\"aw\",@progbits\n"
  72     DEFAULT_INTERRUPT (GII,      4)
  73     RESERVE_INTERRUPT (          5)
  74     DEFAULT_INTERRUPT (ISI,      6)
  75     RESERVE_INTERRUPT (          7)
  76     RESERVE_INTERRUPT (          8)
  77     DEFAULT_INTERRUPT (CPUAE,    9)
  78     DEFAULT_INTERRUPT (DMAAE,   10)
  79     DEFAULT_INTERRUPT (NMI,     11)
  80     DEFAULT_INTERRUPT (UB,      12)
  81     RESERVE_INTERRUPT (         13)
  82     RESERVE_INTERRUPT (         14)
  83     RESERVE_INTERRUPT (         15)
  84     RESERVE_INTERRUPT (         16) /* TCB #0 */
  85     RESERVE_INTERRUPT (         17) /* TCB #1 */
  86     RESERVE_INTERRUPT (         18) /* TCB #2 */
  87     RESERVE_INTERRUPT (         19) /* TCB #3 */
  88     RESERVE_INTERRUPT (         20) /* TCB #4 */
  89     RESERVE_INTERRUPT (         21) /* TCB #5 */
  90     RESERVE_INTERRUPT (         22) /* TCB #6 */
  91     RESERVE_INTERRUPT (         23) /* TCB #7 */
  92     RESERVE_INTERRUPT (         24) /* TCB #8 */
  93     RESERVE_INTERRUPT (         25) /* TCB #9 */
  94     RESERVE_INTERRUPT (         26) /* TCB #10 */
  95     RESERVE_INTERRUPT (         27) /* TCB #11 */
  96     RESERVE_INTERRUPT (         28) /* TCB #12 */
  97     RESERVE_INTERRUPT (         29) /* TCB #13 */
  98     RESERVE_INTERRUPT (         30) /* TCB #14 */
  99     RESERVE_INTERRUPT (         31) /* TCB #15 */
 100     DEFAULT_INTERRUPT (TRAPA32, 32)
 101     DEFAULT_INTERRUPT (TRAPA33, 33)
 102     DEFAULT_INTERRUPT (TRAPA34, 34)
 103     DEFAULT_INTERRUPT (TRAPA35, 35)
 104     DEFAULT_INTERRUPT (TRAPA36, 36)
 105     DEFAULT_INTERRUPT (TRAPA37, 37)
 106     DEFAULT_INTERRUPT (TRAPA38, 38)
 107     DEFAULT_INTERRUPT (TRAPA39, 39)
 108     DEFAULT_INTERRUPT (TRAPA40, 40)
 109     DEFAULT_INTERRUPT (TRAPA41, 41)
 110     DEFAULT_INTERRUPT (TRAPA42, 42)
 111     DEFAULT_INTERRUPT (TRAPA43, 43)
 112     DEFAULT_INTERRUPT (TRAPA44, 44)
 113     DEFAULT_INTERRUPT (TRAPA45, 45)
 114     DEFAULT_INTERRUPT (TRAPA46, 46)
 115     DEFAULT_INTERRUPT (TRAPA47, 47)
 116     DEFAULT_INTERRUPT (TRAPA48, 48)
 117     DEFAULT_INTERRUPT (TRAPA49, 49)
 118     DEFAULT_INTERRUPT (TRAPA50, 50)
 119     DEFAULT_INTERRUPT (TRAPA51, 51)
 120     DEFAULT_INTERRUPT (TRAPA52, 52)
 121     DEFAULT_INTERRUPT (TRAPA53, 53)
 122     DEFAULT_INTERRUPT (TRAPA54, 54)
 123     DEFAULT_INTERRUPT (TRAPA55, 55)
 124     DEFAULT_INTERRUPT (TRAPA56, 56)
 125     DEFAULT_INTERRUPT (TRAPA57, 57)
 126     DEFAULT_INTERRUPT (TRAPA58, 58)
 127     DEFAULT_INTERRUPT (TRAPA59, 59)
 128     DEFAULT_INTERRUPT (TRAPA60, 60)
 129     DEFAULT_INTERRUPT (TRAPA61, 61)
 130     DEFAULT_INTERRUPT (TRAPA62, 62)
 131     DEFAULT_INTERRUPT (TRAPA63, 63)
 132     DEFAULT_INTERRUPT (IRQ0,    64)
 133     DEFAULT_INTERRUPT (IRQ1,    65)
 134     DEFAULT_INTERRUPT (IRQ2,    66)
 135     DEFAULT_INTERRUPT (IRQ3,    67)
 136     DEFAULT_INTERRUPT (IRQ4,    68)
 137     DEFAULT_INTERRUPT (IRQ5,    69)
 138     DEFAULT_INTERRUPT (IRQ6,    70)
 139     DEFAULT_INTERRUPT (IRQ7,    71)
 140     DEFAULT_INTERRUPT (DEI0,    72)
 141     RESERVE_INTERRUPT (         73)
 142     DEFAULT_INTERRUPT (DEI1,    74)
 143     RESERVE_INTERRUPT (         75)
 144     DEFAULT_INTERRUPT (DEI2,    76)
 145     RESERVE_INTERRUPT (         77)
 146     DEFAULT_INTERRUPT (DEI3,    78)
 147     RESERVE_INTERRUPT (         79)
 148     DEFAULT_INTERRUPT (IMIA0,   80)
 149     DEFAULT_INTERRUPT (IMIB0,   81)
 150     DEFAULT_INTERRUPT (OVI0,    82)
 151     RESERVE_INTERRUPT (         83)
 152     DEFAULT_INTERRUPT (IMIA1,   84)
 153     DEFAULT_INTERRUPT (IMIB1,   85)
 154     DEFAULT_INTERRUPT (OVI1,    86)
 155     RESERVE_INTERRUPT (         87)
 156     DEFAULT_INTERRUPT (IMIA2,   88)
 157     DEFAULT_INTERRUPT (IMIB2,   89)
 158     DEFAULT_INTERRUPT (OVI2,    90)
 159     RESERVE_INTERRUPT (         91)
 160     DEFAULT_INTERRUPT (IMIA3,   92)
 161     DEFAULT_INTERRUPT (IMIB3,   93)
 162     DEFAULT_INTERRUPT (OVI3,    94)
 163     RESERVE_INTERRUPT (         95)
 164     DEFAULT_INTERRUPT (IMIA4,   96)
 165     DEFAULT_INTERRUPT (IMIB4,   97)
 166     DEFAULT_INTERRUPT (OVI4,    98)
 167     RESERVE_INTERRUPT (         99)
 168     DEFAULT_INTERRUPT (REI0,   100)
 169     DEFAULT_INTERRUPT (RXI0,   101)
 170     DEFAULT_INTERRUPT (TXI0,   102)
 171     DEFAULT_INTERRUPT (TEI0,   103)
 172     DEFAULT_INTERRUPT (REI1,   104)
 173     DEFAULT_INTERRUPT (RXI1,   105)
 174     DEFAULT_INTERRUPT (TXI1,   106)
 175     DEFAULT_INTERRUPT (TEI1,   107)
 176     RESERVE_INTERRUPT (        108)
 177     DEFAULT_INTERRUPT (ADITI,  109)
 178
 179 /* UIE# block.
 180  * Must go into the same section as the UIE() handler */
 181
 182     "\t.text\n"
 183     "_UIE4:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 184     "_UIE5:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 185     "_UIE6:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 186     "_UIE7:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 187     "_UIE8:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 188     "_UIE9:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 189     "_UIE10:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 190     "_UIE11:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 191     "_UIE12:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 192     "_UIE13:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 193     "_UIE14:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 194     "_UIE15:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 195     "_UIE16:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 196     "_UIE17:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 197     "_UIE18:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 198     "_UIE19:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 199     "_UIE20:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 200     "_UIE21:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 201     "_UIE22:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 202     "_UIE23:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 203     "_UIE24:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 204     "_UIE25:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 205     "_UIE26:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 206     "_UIE27:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 207     "_UIE28:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 208     "_UIE29:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 209     "_UIE30:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 210     "_UIE31:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 211     "_UIE32:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 212     "_UIE33:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 213     "_UIE34:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 214     "_UIE35:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 215     "_UIE36:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 216     "_UIE37:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 217     "_UIE38:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 218     "_UIE39:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 219     "_UIE40:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 220     "_UIE41:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 221     "_UIE42:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 222     "_UIE43:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 223     "_UIE44:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 224     "_UIE45:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 225     "_UIE46:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 226     "_UIE47:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 227     "_UIE48:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 228     "_UIE49:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 229     "_UIE50:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 230     "_UIE51:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 231     "_UIE52:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 232     "_UIE53:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 233     "_UIE54:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 234     "_UIE55:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 235     "_UIE56:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 236     "_UIE57:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 237     "_UIE58:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 238     "_UIE59:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 239     "_UIE60:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 240     "_UIE61:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 241     "_UIE62:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 242     "_UIE63:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 243     "_UIE64:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 244     "_UIE65:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 245     "_UIE66:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 246     "_UIE67:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 247     "_UIE68:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 248     "_UIE69:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 249     "_UIE70:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 250     "_UIE71:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 251     "_UIE72:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 252     "_UIE73:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 253     "_UIE74:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 254     "_UIE75:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 255     "_UIE76:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 256     "_UIE77:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 257     "_UIE78:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 258     "_UIE79:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 259     "_UIE80:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 260     "_UIE81:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 261     "_UIE82:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 262     "_UIE83:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 263     "_UIE84:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 264     "_UIE85:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 265     "_UIE86:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 266     "_UIE87:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 267     "_UIE88:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 268     "_UIE89:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 269     "_UIE90:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 270     "_UIE91:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 271     "_UIE92:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 272     "_UIE93:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 273     "_UIE94:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 274     "_UIE95:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 275     "_UIE96:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 276     "_UIE97:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 277     "_UIE98:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 278     "_UIE99:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 279     "_UIE100:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 280     "_UIE101:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 281     "_UIE102:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 282     "_UIE103:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 283     "_UIE104:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 284     "_UIE105:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 285     "_UIE106:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 286     "_UIE107:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 287     "_UIE108:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 288     "_UIE109:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 289
 290 );
 291
 292 extern void UIE4(void); /* needed for calculating the UIE number */
 293
 294 void UIE (unsigned int pc) __attribute__((section(".text")));
 295 void UIE (unsigned int pc) /* Unexpected Interrupt or Exception */
 296 {
 297     unsigned int n;
 298
 299     asm volatile ("sts\tpr,%0" : "=r"(n));
 300
 301     /* clear screen */
 302 #ifdef HAVE_LCD_BITMAP
 303 #if LCD_DEPTH > 1
 304     lcd_set_backdrop(NULL);
 305     lcd_set_drawmode(DRMODE_SOLID);
 306     lcd_set_foreground(LCD_BLACK);
 307     lcd_set_background(LCD_WHITE);
 308 #endif
 309     lcd_setfont(FONT_SYSFIXED);
 310     lcd_set_viewport(NULL);
 311 #endif
 312
 313     lcd_clear_display();
 314     /* output exception */
 315     n = (n - (unsigned)UIE4 + 12)>>2; /* get exception or interrupt number */
 316     lcd_putsf(0, 0, "I%02x:%s", n, irqname[n]);
 317     lcd_putsf(0, 1, "at %08x", pc);
 318     lcd_update();
 319
 320      /* try to restart firmware if ON is pressed */
 321     system_exception_wait();
 322
 323     /* enable the watchguard timer, but don't service it */
 324     RSTCSR_W = 0x5a40; /* Reset enabled, power-on reset */
 325     TCSR_W = 0xa560; /* Watchdog timer mode, timer enabled, sysclk/2 */
 326     while (1);
 327 }
 328
 329 void system_init(void)
 330 {
 331     /* Disable all interrupts */
 332     IPRA = 0;
 333     IPRB = 0;
 334     IPRC = 0;
 335     IPRD = 0;
 336     IPRE = 0;
 337
 338     /* NMI level low, falling edge on all interrupts */
 339     ICR = 0;
 340
 341     /* Enable burst and RAS down mode on DRAM */
 342     DCR |= 0x5000;
 343
 344     /* Activate Warp mode (simultaneous internal and external mem access) */
 345     BCR |= 0x2000;
 346
 347     /* Bus state controller initializations. These are only necessary when
 348        running from flash. */
 349     WCR1 = 0x40FD; /* Long wait states for CS6 (ATA), short for the rest. */
 350     WCR3 = 0x8000; /* WAIT is pulled up, 1 state inserted for CS6 */
 351 }
 352
 353 void system_reboot (void)
 354 {
 355     disable_irq();
 356
 357     asm volatile ("ldc\t%0,vbr" : : "r"(0));
 358
 359     PACR2 |= 0x4000; /* for coldstart detection */
 360     IPRA = 0;
 361     IPRB = 0;
 362     IPRC = 0;
 363     IPRD = 0;
 364     IPRE = 0;
 365     ICR = 0;
 366
 367     asm volatile ("jmp @%0; mov.l @%1,r15" : :
 368                   "r"(*(int*)0),"r"(4));
 369 }
 370
 371 void system_exception_wait(void)
 372 {
 373 #if (CONFIG_LED == LED_REAL)
 374     bool state = false;
 375     int i = 0;
 376 #endif
 377
 378     while (1)
 379     {
 380 #if (CONFIG_LED == LED_REAL)
 381         if (--i <= 0)
 382         {
 383             state = !state;
 384             led(state);
 385             i = 240000;
 386         }
 387 #endif
 388
 389 #if CONFIG_KEYPAD == PLAYER_PAD
 390         /* Player */
 391         if (!(PADRL & 0x20))
 392 #elif CONFIG_KEYPAD == RECORDER_PAD
 393         /* Recorder */
 394 #ifdef HAVE_FMADC
 395         if (!(PCDR & 0x0008))
 396 #else
 397         if (!(PBDRH & 0x01))
 398 #endif
 399 #elif CONFIG_KEYPAD == ONDIO_PAD
 400         /* Ondio */
 401         if (!(PCDR & 0x0008))
 402 #endif /* CONFIG_KEYPAD */
 403             return;
 404     }
 405 }
 406
 407 /* Utilise the user break controller to catch invalid memory accesses. */
 408 int system_memory_guard(int newmode)
 409 {
 410     static const struct {
 411         unsigned long  addr;
 412         unsigned long  mask;
 413         unsigned short bbr;
 414     } modes[MAXMEMGUARD] = {
 415         /* catch nothing */
 416         { 0x00000000, 0x00000000, 0x0000 },
 417         /* catch writes to area 02 (flash ROM) */
 418         { 0x02000000, 0x00FFFFFF, 0x00F8 },
 419         /* catch all accesses to areas 00 (internal ROM) and 01 (free) */
 420         { 0x00000000, 0x01FFFFFF, 0x00FC }
 421     };
 422
 423     int oldmode = MEMGUARD_NONE;
 424     int i;
 425
 426     /* figure out the old mode from what is in the UBC regs. If the register
 427        values don't match any mode, assume MEMGUARD_NONE */
 428     for (i = MEMGUARD_NONE; i < MAXMEMGUARD; i++)
 429     {
 430         if (BAR == modes[i].addr && BAMR == modes[i].mask &&
 431             BBR == modes[i].bbr)
 432         {
 433             oldmode = i;
 434             break;
 435         }
 436     }
 437
 438     if (newmode == MEMGUARD_KEEP)
 439         newmode = oldmode;
 440
 441     BBR = 0;  /* switch off everything first */
 442
 443     /* always set the UBC according to the mode, in case the old settings
 444        didn't match any valid mode */
 445     BAR  = modes[newmode].addr;
 446     BAMR = modes[newmode].mask;
 447     BBR  = modes[newmode].bbr;
 448
 449     return oldmode;
 450 }