1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright (C) 2006,2007 by Greg White
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
24 /* TTB routines not used */
26 /** Cache coherency **/
29 * Invalidate DCache for this range
31 * void invalidate_dcache_range(const void *base, unsigned int size)
33 .section .text, "ax", %progbits
35 .global invalidate_dcache_range
36 .type invalidate_dcache_range, %function
37 @ MVA format: 31:5 = Modified virtual address, 4:0 = Ignored
38 invalidate_dcache_range:
39 add r1, r0, r1 @ size -> end
40 cmp r1, r0 @ end <= start?
41 subhi r1, r1, #1 @ round it down
43 mcrrhi p15, 0, r1, r0, c14 @ Clean and invalidate DCache range
44 mcrhi p15, 0, r2, c7, c10, 4 @ Data synchronization barrier
46 .size invalidate_dcache_range, .-invalidate_dcache_range
49 * clean DCache for this range
50 * forces DCache writeback for the specified range
51 * void clean_dcache_range(const void *base, unsigned int size);
53 .section .text, "ax", %progbits
55 .global clean_dcache_range
56 .type clean_dcache_range, %function
57 @ MVA format: 31:5 = Modified virtual address, 4:0 = Ignored
59 add r1, r0, r1 @ size -> end
60 cmp r1, r0 @ end <= start?
61 subhi r1, r1, #1 @ round it down
63 mcrrhi p15, 0, r1, r0, c12 @ Clean DCache range
64 mcrhi p15, 0, r2, c7, c10, 4 @ Data synchronization barrier
66 .size clean_dcache_range, .-clean_dcache_range
69 * Dump DCache for this range
70 * will *NOT* do write back except for buffer edges not on a line boundary
71 * void dump_dcache_range(const void *base, unsigned int size);
73 .section .text, "ax", %progbits
75 .global dump_dcache_range
76 .type dump_dcache_range, %function
77 @ MVA format (mcr): 31:5 = Modified virtual address, 4:0 = SBZ
78 @ MVA format (mcrr): 31:5 = Modified virtual address, 4:0 = Ignored
80 add r1, r0, r1 @ size -> end
81 cmp r1, r0 @ end <= start?
83 tst r0, #31 @ Check first line for bits set
84 bicne r0, r0, #31 @ Clear low five bits (down)
85 mcrne p15, 0, r0, c7, c14, 1 @ Clean and invalidate line by MVA
86 @ if not cache aligned
87 addne r0, r0, #32 @ Move to the next cache line
89 tst r1, #31 @ Check last line for bits set
90 bicne r1, r1, #31 @ Clear low five bits (down)
91 mcrne p15, 0, r1, c7, c14, 1 @ Clean and invalidate line by MVA
92 @ if not cache aligned
93 sub r1, r1, #32 @ Move to the previous cache line
94 cmp r1, r0 @ end < start now?
95 mcrrhs p15, 0, r1, r0, c6 @ Invalidate DCache range
97 mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier
99 .size dump_dcache_range, .-dump_dcache_range
103 * Cleans entire DCache
104 * void clean_dcache(void);
106 .section .text, "ax", %progbits
109 .type clean_dcache, %function
110 .global cpucache_flush @ Alias
114 mcr p15, 0, r0, c7, c10, 0 @ Clean entire DCache
115 mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier
117 .size clean_dcache, .-clean_dcache
120 * Invalidate entire DCache
122 * void invalidate_dcache(void);
124 .section .text, "ax", %progbits
126 .global invalidate_dcache
127 .type invalidate_dcache, %function
130 mcr p15, 0, r0, c7, c14, 0 @ Clean and invalidate entire DCache
131 mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier
133 .size invalidate_dcache, .-invalidate_dcache
136 * Invalidate entire ICache and DCache
138 * void invalidate_idcache(void);
140 .section .text, "ax", %progbits
142 .global invalidate_idcache
143 .type invalidate_idcache, %function
144 .global cpucache_invalidate @ Alias
148 mcr p15, 0, r0, c7, c14, 0 @ Clean and invalidate entire DCache
149 mcr p15, 0, r0, c7, c5, 0 @ Invalidate entire ICache
150 @ Also flushes the branch target cache
151 mcr p15, 0, r0, c7, c10, 4 @ Data synchronization barrier
152 mcr p15, 0, r0, c7, c5, 4 @ Flush prefetch buffer (IMB)
154 .size invalidate_idcache, .-invalidate_idcache