gdb/sh-stub.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2002 by Linus Nielsen Feltzing
  11  *
  12  * All files in this archive are subject to the GNU General Public License.
  13  * See the file COPYING in the source tree root for full license agreement.
  14  *
  15  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  16  * KIND, either express or implied.
  17  *
  18  ****************************************************************************/
  19 /* sh-stub.c -- debugging stub for the Hitachi-SH.
  20
  21  NOTE!! This code has to be compiled with optimization, otherwise the
  22  function inlining which generates the exception handlers won't work.
  23
  24 */
  25
  26 /*   This is originally based on an m68k software stub written by Glenn
  27      Engel at HP, but has changed quite a bit.
  28
  29      Modifications for the SH by Ben Lee and Steve Chamberlain
  30
  31      Even more modifications for GCC 3.0 and The Rockbox by Linus
  32      Nielsen Feltzing
  33 */
  34
  35 /****************************************************************************
  36
  37                 THIS SOFTWARE IS NOT COPYRIGHTED
  38
  39    HP offers the following for use in the public domain.  HP makes no
  40    warranty with regard to the software or it's performance and the
  41    user accepts the software "AS IS" with all faults.
  42
  43    HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD
  44    TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  45    OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  46
  47 ****************************************************************************/
  48
  49
  50 /* Remote communication protocol.
  51
  52    A debug packet whose contents are <data>
  53    is encapsulated for transmission in the form:
  54
  55         $ <data> # CSUM1 CSUM2
  56
  57         <data> must be ASCII alphanumeric and cannot include characters
  58         '$' or '#'.  If <data> starts with two characters followed by
  59         ':', then the existing stubs interpret this as a sequence number.
  60
  61         CSUM1 and CSUM2 are ascii hex representation of an 8-bit
  62         checksum of <data>, the most significant nibble is sent first.
  63         the hex digits 0-9,a-f are used.
  64
  65    Receiver responds with:
  66
  67         +       - if CSUM is correct and ready for next packet
  68         -       - if CSUM is incorrect
  69
  70    <data> is as follows:
  71    All values are encoded in ascii hex digits.
  72
  73         Request         Packet
  74
  75         read registers  g
  76         reply           XX....X         Each byte of register data
  77                                         is described by two hex digits.
  78                                         Registers are in the internal order
  79                                         for GDB, and the bytes in a register
  80                                         are in the same order the machine uses.
  81                         or ENN          for an error.
  82
  83         write regs      GXX..XX         Each byte of register data
  84                                         is described by two hex digits.
  85         reply           OK              for success
  86                         ENN             for an error
  87
  88         write reg       Pn...=r...      Write register n... with value r...,
  89                                         which contains two hex digits for each
  90                                         byte in the register (target byte
  91                                         order).
  92         reply           OK              for success
  93                         ENN             for an error
  94         (not supported by all stubs).
  95
  96         read mem        mAA..AA,LLLL    AA..AA is address, LLLL is length.
  97         reply           XX..XX          XX..XX is mem contents
  98                                         Can be fewer bytes than requested
  99                                         if able to read only part of the data.
 100                         or ENN          NN is errno
 101
 102         write mem       MAA..AA,LLLL:XX..XX
 103                                         AA..AA is address,
 104                                         LLLL is number of bytes,
 105                                         XX..XX is data
 106         reply           OK              for success
 107                         ENN             for an error (this includes the case
 108                                         where only part of the data was
 109                                         written).
 110
 111         cont            cAA..AA         AA..AA is address to resume
 112                                         If AA..AA is omitted,
 113                                         resume at same address.
 114
 115         step            sAA..AA         AA..AA is address to resume
 116                                         If AA..AA is omitted,
 117                                         resume at same address.
 118
 119         last signal     ?               Reply the current reason for stopping.
 120                                         This is the same reply as is generated
 121                                         for step or cont : SAA where AA is the
 122                                         signal number.
 123
 124         There is no immediate reply to step or cont.
 125         The reply comes when the machine stops.
 126         It is           SAA             AA is the "signal number"
 127
 128         or...           TAAn...:r...;n:r...;n...:r...;
 129                                         AA = signal number
 130                                         n... = register number
 131                                         r... = register contents
 132         or...           WAA             The process exited, and AA is
 133                                         the exit status.  This is only
 134                                         applicable for certains sorts of
 135                                         targets.
 136         kill request    k
 137
 138         toggle debug    d               toggle debug flag (see 386 & 68k stubs)
 139         reset           r               reset -- see sparc stub.
 140         reserved        <other>         On other requests, the stub should
 141                                         ignore the request and send an empty
 142                                         response ($#<checksum>).  This way
 143                                         we can extend the protocol and GDB
 144                                         can tell whether the stub it is
 145                                         talking to uses the old or the new.
 146         search          tAA:PP,MM       Search backwards starting at address
 147                                         AA for a match with pattern PP and
 148                                         mask MM.  PP and MM are 4 bytes.
 149                                         Not supported by all stubs.
 150
 151         general query   qXXXX           Request info about XXXX.
 152         general set     QXXXX=yyyy      Set value of XXXX to yyyy.
 153         query sect offs qOffsets        Get section offsets.  Reply is
 154                                         Text=xxx;Data=yyy;Bss=zzz
 155         console output  Otext           Send text to stdout.  Only comes from
 156                                         remote target.
 157
 158         Responses can be run-length encoded to save space.  A '*' means that
 159         the next character is an ASCII encoding giving a repeat count which
 160         stands for that many repititions of the character preceding the '*'.
 161         The encoding is n+29, yielding a printable character where n >=3
 162         (which is where rle starts to win).  Don't use an n > 126.
 163
 164         So
 165         "0* " means the same as "0000".  */
 166
 167 #include "sh7034.h"
 168 #include <string.h>
 169
 170 typedef int jmp_buf[20];
 171
 172 void longjmp(jmp_buf __jmpb, int __retval);
 173 int setjmp(jmp_buf __jmpb);
 174
 175 /* We need to undefine this from the sh7034.h file */
 176 #undef GBR
 177
 178 /* Hitachi SH architecture instruction encoding masks */
 179
 180 #define COND_BR_MASK   0xff00
 181 #define UCOND_DBR_MASK 0xe000
 182 #define UCOND_RBR_MASK 0xf0df
 183 #define TRAPA_MASK     0xff00
 184
 185 #define COND_DISP      0x00ff
 186 #define UCOND_DISP     0x0fff
 187 #define UCOND_REG      0x0f00
 188
 189 /* Hitachi SH instruction opcodes */
 190
 191 #define BF_INSTR       0x8b00
 192 #define BT_INSTR       0x8900
 193 #define BRA_INSTR      0xa000
 194 #define BSR_INSTR      0xb000
 195 #define JMP_INSTR      0x402b
 196 #define JSR_INSTR      0x400b
 197 #define RTS_INSTR      0x000b
 198 #define RTE_INSTR      0x002b
 199 #define TRAPA_INSTR    0xc300
 200 #define SSTEP_INSTR    0xc37f
 201
 202 /* Hitachi SH processor register masks */
 203
 204 #define T_BIT_MASK     0x0001
 205
 206 /*
 207  * BUFMAX defines the maximum number of characters in inbound/outbound
 208  * buffers. At least NUMREGBYTES*2 are needed for register packets.
 209  */
 210 #define BUFMAX 1024
 211
 212 /*
 213  * Number of bytes for registers
 214  */
 215 #define NUMREGBYTES 112         /* 92 */
 216
 217 /*
 218  * Forward declarations
 219  */
 220
 221 static int hex (char);
 222 static char *mem2hex (char *mem, char *buf, int count);
 223 static char *hex2mem (char *buf, char *mem, int count);
 224 static int hex2int (char **ptr, int *intValue);
 225 static unsigned char *getpacket (void);
 226 static void putpacket (register char *buffer);
 227 static int computeSignal (int exceptionVector);
 228 void handle_buserror (void);
 229 void handle_exception (int exceptionVector);
 230 void init_serial(void);
 231
 232 void serial_putc (char ch);
 233 char serial_getc (void);
 234
 235 /* These are in the file but in asm statements so the compiler can't see them */
 236 void catch_exception_4 (void);
 237 void catch_exception_5 (void);
 238 void catch_exception_6 (void);
 239 void catch_exception_7 (void);
 240 void catch_exception_8 (void);
 241 void catch_exception_9 (void);
 242 void catch_exception_10 (void);
 243 void catch_exception_11 (void);
 244 void catch_exception_12 (void);
 245 void catch_exception_13 (void);
 246 void catch_exception_14 (void);
 247 void catch_exception_15 (void);
 248 void catch_exception_16 (void);
 249 void catch_exception_17 (void);
 250 void catch_exception_18 (void);
 251 void catch_exception_19 (void);
 252 void catch_exception_20 (void);
 253 void catch_exception_21 (void);
 254 void catch_exception_22 (void);
 255 void catch_exception_23 (void);
 256 void catch_exception_24 (void);
 257 void catch_exception_25 (void);
 258 void catch_exception_26 (void);
 259 void catch_exception_27 (void);
 260 void catch_exception_28 (void);
 261 void catch_exception_29 (void);
 262 void catch_exception_30 (void);
 263 void catch_exception_31 (void);
 264 void catch_exception_32 (void);
 265 void catch_exception_33 (void);
 266 void catch_exception_34 (void);
 267 void catch_exception_35 (void);
 268 void catch_exception_36 (void);
 269 void catch_exception_37 (void);
 270 void catch_exception_38 (void);
 271 void catch_exception_39 (void);
 272 void catch_exception_40 (void);
 273 void catch_exception_41 (void);
 274 void catch_exception_42 (void);
 275 void catch_exception_43 (void);
 276 void catch_exception_44 (void);
 277 void catch_exception_45 (void);
 278 void catch_exception_46 (void);
 279 void catch_exception_47 (void);
 280 void catch_exception_48 (void);
 281 void catch_exception_49 (void);
 282 void catch_exception_50 (void);
 283 void catch_exception_51 (void);
 284 void catch_exception_52 (void);
 285 void catch_exception_53 (void);
 286 void catch_exception_54 (void);
 287 void catch_exception_55 (void);
 288 void catch_exception_56 (void);
 289 void catch_exception_57 (void);
 290 void catch_exception_58 (void);
 291 void catch_exception_59 (void);
 292 void catch_exception_60 (void);
 293 void catch_exception_61 (void);
 294 void catch_exception_62 (void);
 295 void catch_exception_63 (void);
 296 void catch_exception_64 (void);
 297 void catch_exception_65 (void);
 298 void catch_exception_66 (void);
 299 void catch_exception_67 (void);
 300 void catch_exception_68 (void);
 301 void catch_exception_69 (void);
 302 void catch_exception_70 (void);
 303 void catch_exception_71 (void);
 304 void catch_exception_72 (void);
 305 void catch_exception_73 (void);
 306 void catch_exception_74 (void);
 307 void catch_exception_75 (void);
 308 void catch_exception_76 (void);
 309 void catch_exception_77 (void);
 310 void catch_exception_78 (void);
 311 void catch_exception_79 (void);
 312 void catch_exception_80 (void);
 313 void catch_exception_81 (void);
 314 void catch_exception_82 (void);
 315 void catch_exception_83 (void);
 316 void catch_exception_84 (void);
 317 void catch_exception_85 (void);
 318 void catch_exception_86 (void);
 319 void catch_exception_87 (void);
 320 void catch_exception_88 (void);
 321 void catch_exception_89 (void);
 322 void catch_exception_90 (void);
 323 void catch_exception_91 (void);
 324 void catch_exception_92 (void);
 325 void catch_exception_93 (void);
 326 void catch_exception_94 (void);
 327 void catch_exception_95 (void);
 328 void catch_exception_96 (void);
 329 void catch_exception_97 (void);
 330 void catch_exception_98 (void);
 331 void catch_exception_99 (void);
 332 void catch_exception_100 (void);
 333 void catch_exception_101 (void);
 334 void catch_exception_102 (void);
 335 void catch_exception_103 (void);
 336 void catch_exception_104 (void);
 337 void catch_exception_105 (void);
 338 void catch_exception_106 (void);
 339 void catch_exception_107 (void);
 340 void catch_exception_108 (void);
 341 void catch_exception_109 (void);
 342 void catch_exception_110 (void);
 343 void catch_exception_111 (void);
 344 void catch_exception_112 (void);
 345 void catch_exception_113 (void);
 346 void catch_exception_114 (void);
 347 void catch_exception_115 (void);
 348 void catch_exception_116 (void);
 349 void catch_exception_117 (void);
 350 void catch_exception_118 (void);
 351 void catch_exception_119 (void);
 352 void catch_exception_120 (void);
 353 void catch_exception_121 (void);
 354 void catch_exception_122 (void);
 355 void catch_exception_123 (void);
 356 void catch_exception_124 (void);
 357 void catch_exception_125 (void);
 358 void catch_exception_126 (void);
 359 void catch_exception_127 (void);
 360
 361 void breakpoint (void);
 362
 363
 364 //#define stub_stack_size 2*1024
 365
 366 //int stub_stack[stub_stack_size] __attribute__ ((section (".stack"))) = {0};
 367
 368 extern int stub_stack[];
 369
 370 void INIT (void);
 371 void start (void);
 372
 373 #define CPU_BUS_ERROR_VEC  9
 374 #define DMA_BUS_ERROR_VEC 10
 375 #define NMI_VEC           11
 376 #define INVALID_INSN_VEC   4
 377 #define INVALID_SLOT_VEC   6
 378 #define TRAP_VEC          32
 379 #define IO_VEC            33
 380 #define USER_VEC         127
 381
 382 char in_nmi;   /* Set when handling an NMI, so we don't reenter */
 383 int dofault;  /* Non zero, bus errors will raise exception */
 384
 385 int *stub_sp;
 386
 387 /* debug > 0 prints ill-formed commands in valid packets & checksum errors */
 388 int remote_debug;
 389
 390 /* jump buffer used for setjmp/longjmp */
 391 jmp_buf remcomEnv;
 392
 393 enum regnames
 394 {
 395     R0, R1, R2, R3, R4, R5, R6, R7,
 396     R8, R9, R10, R11, R12, R13, R14,
 397     R15, PC, PR, GBR, VBR, MACH, MACL, SR,
 398     TICKS, STALLS, CYCLES, INSTS, PLR
 399 };
 400
 401 typedef struct
 402 {
 403     short *memAddr;
 404     short oldInstr;
 405 }
 406 stepData;
 407
 408 int registers[NUMREGBYTES / 4];
 409 stepData instrBuffer;
 410 char stepped;
 411 static const char hexchars[] = "0123456789abcdef";
 412 static char remcomInBuffer[BUFMAX];
 413 static char remcomOutBuffer[BUFMAX];
 414
 415 #define ATA_NSECTOR     (*((volatile unsigned char*)0x06100102))
 416 #define ATA_COMMAND     (*((volatile unsigned char*)0x06100107))
 417
 418 /* You may need to change this depending on your ATA I/O address
 419 ** 0x200 - 0x06200206
 420 ** 0x300 - 0x06200306
 421 */
 422 #define ATA_CONTROL     (*((volatile unsigned char*)0x06200206))
 423 #define ATA_ALT_STATUS  ATA_CONTROL
 424
 425 #define STATUS_BSY      0x80
 426 #define STATUS_RDY      0x40
 427
 428 #define CMD_STANDBY_IMMEDIATE      0xE0
 429 #define CMD_STANDBY                0xE2
 430
 431 void ata_wait_for_bsy(void)
 432 {
 433     while (ATA_ALT_STATUS & STATUS_BSY);
 434 }
 435
 436 int ata_wait_for_rdy(void)
 437 {
 438     ata_wait_for_bsy();
 439     return ATA_ALT_STATUS & STATUS_RDY;
 440 }
 441
 442 int ata_spindown(int time)
 443 {
 444         /* Port A setup */
 445         PAIOR |= 0x0280; /* output for ATA reset, IDE enable */
 446         PADR |= 0x0200; /* release ATA reset */
 447         PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */
 448
 449     /* activate ATA */
 450     PADR &= ~0x80;
 451
 452     if(!ata_wait_for_rdy())
 453         return -1;
 454
 455     if ( time == -1 ) {
 456         ATA_COMMAND = CMD_STANDBY_IMMEDIATE;
 457     }
 458     else {
 459         if (time > 255)
 460             return -1;
 461         ATA_NSECTOR = time & 0xff;
 462         ATA_COMMAND = CMD_STANDBY;
 463     }
 464
 465     if (!ata_wait_for_rdy())
 466         return -1;
 467
 468     return 0;
 469 }
 470
 471 void blink(void)
 472 {
 473     while(1)
 474     {
 475         int i;
 476         PBDR ^= 0x40; /* toggle PB6 */
 477         for(i = 0;i < 500000;i++)
 478         {
 479         }
 480     }
 481 }
 482
 483 char highhex(int  x)
 484 {
 485     return hexchars[(x >> 4) & 0xf];
 486 }
 487
 488 char lowhex(int  x)
 489 {
 490     return hexchars[x & 0xf];
 491 }
 492
 493 /*
 494  * Assembly macros
 495  */
 496
 497 #define BREAKPOINT()   asm("trapa       #0x20"::);
 498
 499
 500 /*
 501  * Routines to handle hex data
 502  */
 503
 504 static int hex (char ch)
 505 {
 506     if ((ch >= 'a') && (ch <= 'f'))
 507         return (ch - 'a' + 10);
 508     if ((ch >= '0') && (ch <= '9'))
 509         return (ch - '0');
 510     if ((ch >= 'A') && (ch <= 'F'))
 511         return (ch - 'A' + 10);
 512     return (-1);
 513 }
 514
 515 /* convert the memory, pointed to by mem into hex, placing result in buf */
 516 /* return a pointer to the last char put in buf (null) */
 517 static char *mem2hex (char *mem, char *buf, int count)
 518 {
 519     int i;
 520     int ch;
 521     for (i = 0; i < count; i++)
 522     {
 523         ch = *mem++;
 524         *buf++ = highhex (ch);
 525         *buf++ = lowhex (ch);
 526     }
 527     *buf = 0;
 528     return (buf);
 529 }
 530
 531 /* convert the hex array pointed to by buf into binary, to be placed in mem */
 532 /* return a pointer to the character after the last byte written */
 533 static char *hex2mem (char *buf, char *mem, int count)
 534 {
 535     int i;
 536     unsigned char ch;
 537     for (i = 0; i < count; i++)
 538     {
 539         ch = hex (*buf++) << 4;
 540         ch = ch + hex (*buf++);
 541         *mem++ = ch;
 542     }
 543     return (mem);
 544 }
 545
 546 /**********************************************/
 547 /* WHILE WE FIND NICE HEX CHARS, BUILD AN INT */
 548 /* RETURN NUMBER OF CHARS PROCESSED           */
 549 /**********************************************/
 550 static int hex2int (char **ptr, int *intValue)
 551 {
 552     int numChars = 0;
 553     int hexValue;
 554
 555     *intValue = 0;
 556
 557     while (**ptr)
 558     {
 559         hexValue = hex (**ptr);
 560         if (hexValue >= 0)
 561         {
 562             *intValue = (*intValue << 4) | hexValue;
 563             numChars++;
 564         }
 565         else
 566             break;
 567
 568         (*ptr)++;
 569     }
 570
 571     return (numChars);
 572 }
 573
 574 /*
 575  * Routines to get and put packets
 576  */
 577
 578 /* scan for the sequence $<data>#<checksum>     */
 579
 580 unsigned char *getpacket (void)
 581 {
 582     unsigned char *buffer = &remcomInBuffer[0];
 583     unsigned char checksum;
 584     unsigned char xmitcsum;
 585     int count;
 586     char ch;
 587
 588     while (1)
 589     {
 590         /* wait around for the start character, ignore all other characters */
 591         while ((ch = serial_getc ()) != '$')
 592             ;
 593
 594       retry:
 595         checksum = 0;
 596         xmitcsum = -1;
 597         count = 0;
 598
 599         /* now, read until a # or end of buffer is found */
 600         while (count < BUFMAX)
 601         {
 602             ch = serial_getc ();
 603             if (ch == '$')
 604                 goto retry;
 605             if (ch == '#')
 606                 break;
 607             checksum = checksum + ch;
 608             buffer[count] = ch;
 609             count = count + 1;
 610         }
 611         buffer[count] = 0;
 612
 613         if (ch == '#')
 614         {
 615             ch = serial_getc ();
 616             xmitcsum = hex (ch) << 4;
 617             ch = serial_getc ();
 618             xmitcsum += hex (ch);
 619
 620             if (checksum != xmitcsum)
 621             {
 622                 serial_putc ('-');      /* failed checksum */
 623             }
 624             else
 625             {
 626                 serial_putc ('+');      /* successful transfer */
 627
 628                 /* if a sequence char is present, reply the sequence ID */
 629                 if (buffer[2] == ':')
 630                 {
 631                     serial_putc (buffer[0]);
 632                     serial_putc (buffer[1]);
 633
 634                     return &buffer[3];
 635                 }
 636
 637                 return &buffer[0];
 638             }
 639         }
 640     }
 641 }
 642
 643
 644 /* send the packet in buffer. */
 645
 646 static void putpacket (register char *buffer)
 647 {
 648     register  int checksum;
 649
 650     /*  $<packet info>#<checksum>. */
 651     do
 652     {
 653         char *src = buffer;
 654         serial_putc ('$');
 655         checksum = 0;
 656
 657         while (*src)
 658         {
 659             int runlen;
 660
 661             /* Do run length encoding */
 662             for (runlen = 0; runlen < 100; runlen ++)
 663             {
 664                 if (src[0] != src[runlen] || runlen == 99)
 665                 {
 666                     if (runlen > 3)
 667                     {
 668                         int encode;
 669                         /* Got a useful amount */
 670                         serial_putc (*src);
 671                         checksum += *src;
 672                         serial_putc ('*');
 673                         checksum += '*';
 674                         checksum += (encode = runlen + ' ' - 4);
 675                         serial_putc (encode);
 676                         src += runlen;
 677                     }
 678                     else
 679                     {
 680                         serial_putc (*src);
 681                         checksum += *src;
 682                         src++;
 683                     }
 684                     break;
 685                 }
 686             }
 687         }
 688
 689
 690         serial_putc ('#');
 691         serial_putc (highhex(checksum));
 692         serial_putc (lowhex(checksum));
 693     }
 694     while  (serial_getc() != '+');
 695 }
 696
 697
 698 /* a bus error has occurred, perform a longjmp
 699    to return execution and allow handling of the error */
 700
 701 void handle_buserror (void)
 702 {
 703     longjmp (remcomEnv, 1);
 704 }
 705
 706 #define SIGINT  2       /* interrupt */
 707 #define SIGILL  4       /* illegal instruction (not reset when caught) */
 708 #define SIGTRAP 5       /* trace trap (not reset when caught) */
 709 #define SIGEMT  7       /* EMT instruction */
 710 #define SIGBUS  10      /* bus error */
 711
 712 /*
 713  * this function takes the SH-1 exception number and attempts to
 714  * translate this number into a unix compatible signal value
 715  */
 716 static int computeSignal (int exceptionVector)
 717 {
 718     int sigval;
 719     switch (exceptionVector)
 720     {
 721         case INVALID_INSN_VEC:
 722             sigval = SIGILL;
 723             break;
 724         case INVALID_SLOT_VEC:
 725             sigval = SIGILL;
 726             break;
 727         case CPU_BUS_ERROR_VEC:
 728             sigval = SIGBUS;
 729             break;
 730         case DMA_BUS_ERROR_VEC:
 731             sigval = SIGBUS;
 732             break;
 733         case NMI_VEC:
 734             sigval = SIGINT;
 735             break;
 736
 737         case TRAP_VEC:
 738         case USER_VEC:
 739             sigval = SIGTRAP;
 740             break;
 741
 742         default:
 743             sigval = SIGEMT;            /* "software generated"*/
 744             break;
 745     }
 746     return (sigval);
 747 }
 748
 749 void doSStep (void)
 750 {
 751     short *instrMem;
 752     int displacement;
 753     int reg;
 754     unsigned short opcode;
 755
 756     instrMem = (short *) registers[PC];
 757
 758     opcode = *instrMem;
 759     stepped = 1;
 760
 761     if ((opcode & COND_BR_MASK) == BT_INSTR)
 762     {
 763         if (registers[SR] & T_BIT_MASK)
 764         {
 765             displacement = (opcode & COND_DISP) << 1;
 766             if (displacement & 0x80)
 767                 displacement |= 0xffffff00;
 768             /*
 769              * Remember PC points to second instr.
 770              * after PC of branch ... so add 4
 771              */
 772             instrMem = (short *) (registers[PC] + displacement + 4);
 773         }
 774         else
 775             instrMem += 1;
 776     }
 777     else if ((opcode & COND_BR_MASK) == BF_INSTR)
 778     {
 779         if (registers[SR] & T_BIT_MASK)
 780             instrMem += 1;
 781         else
 782         {
 783             displacement = (opcode & COND_DISP) << 1;
 784             if (displacement & 0x80)
 785                 displacement |= 0xffffff00;
 786             /*
 787              * Remember PC points to second instr.
 788              * after PC of branch ... so add 4
 789              */
 790             instrMem = (short *) (registers[PC] + displacement + 4);
 791         }
 792     }
 793     else if ((opcode & UCOND_DBR_MASK) == BRA_INSTR)
 794     {
 795         displacement = (opcode & UCOND_DISP) << 1;
 796         if (displacement & 0x0800)
 797             displacement |= 0xfffff000;
 798
 799         /*
 800          * Remember PC points to second instr.
 801          * after PC of branch ... so add 4
 802          */
 803         instrMem = (short *) (registers[PC] + displacement + 4);
 804     }
 805     else if ((opcode & UCOND_RBR_MASK) == JSR_INSTR)
 806     {
 807         reg = (char) ((opcode & UCOND_REG) >> 8);
 808
 809         instrMem = (short *) registers[reg];
 810     }
 811     else if (opcode == RTS_INSTR)
 812         instrMem = (short *) registers[PR];
 813     else if (opcode == RTE_INSTR)
 814         instrMem = (short *) registers[15];
 815     else if ((opcode & TRAPA_MASK) == TRAPA_INSTR)
 816         instrMem = (short *) ((opcode & ~TRAPA_MASK) << 2);
 817     else
 818         instrMem += 1;
 819
 820     instrBuffer.memAddr = instrMem;
 821     instrBuffer.oldInstr = *instrMem;
 822     *instrMem = SSTEP_INSTR;
 823 }
 824
 825
 826 /* Undo the effect of a previous doSStep.  If we single stepped,
 827    restore the old instruction. */
 828 void undoSStep (void)
 829 {
 830     if (stepped)
 831     {
 832         short *instrMem;
 833         instrMem = instrBuffer.memAddr;
 834         *instrMem = instrBuffer.oldInstr;
 835     }
 836     stepped = 0;
 837 }
 838
 839 /*
 840  * This function does all exception handling.  It only does two things -
 841  * it figures out why it was called and tells gdb, and then it reacts
 842  * to gdb's requests.
 843  *
 844 */
 845 void gdb_handle_exception (int exceptionVector)
 846 {
 847     int sigval, stepping;
 848     int addr, length;
 849     char *ptr;
 850
 851     /* reply to host that an exception has occurred */
 852     sigval = computeSignal (exceptionVector);
 853     remcomOutBuffer[0] = 'S';
 854     remcomOutBuffer[1] = highhex(sigval);
 855     remcomOutBuffer[2] = lowhex (sigval);
 856     remcomOutBuffer[3] = 0;
 857
 858     putpacket (remcomOutBuffer);
 859
 860     /*
 861      * exception 127 indicates a software trap
 862      * inserted in place of code ... so back up
 863      * PC by one instruction, since this instruction
 864      * will later be replaced by its original one!
 865      */
 866     if (exceptionVector == USER_VEC
 867         || exceptionVector == TRAP_VEC)
 868         registers[PC] -= 2;
 869
 870     /*
 871      * Do the things needed to undo
 872      * any stepping we may have done!
 873      */
 874     undoSStep ();
 875
 876     stepping = 0;
 877
 878     while (1)
 879     {
 880         remcomOutBuffer[0] = 0;
 881         ptr = getpacket ();
 882
 883         switch (*ptr++)
 884         {
 885         case '?':
 886             remcomOutBuffer[0] = 'S';
 887             remcomOutBuffer[1] = highhex (sigval);
 888             remcomOutBuffer[2] = lowhex (sigval);
 889             remcomOutBuffer[3] = 0;
 890             break;
 891         case 'd':
 892             remote_debug = !(remote_debug);     /* toggle debug flag */
 893             break;
 894         case 'g':   /* return the value of the CPU registers */
 895             mem2hex ((char *) registers, remcomOutBuffer, NUMREGBYTES);
 896             break;
 897         case 'G':   /* set the value of the CPU registers - return OK */
 898             hex2mem (ptr, (char *) registers, NUMREGBYTES);
 899             strcpy (remcomOutBuffer, "OK");
 900             break;
 901
 902             /* mAA..AA,LLLL  Read LLLL bytes at address AA..AA */
 903         case 'm':
 904             if (setjmp (remcomEnv) == 0)
 905             {
 906                 dofault = 0;
 907                 /* TRY, TO READ %x,%x.  IF SUCCEED, SET PTR = 0 */
 908                 if (hex2int (&ptr, &addr))
 909                     if (*(ptr++) == ',')
 910                         if (hex2int (&ptr, &length))
 911                         {
 912                             ptr = 0;
 913                             mem2hex ((char *) addr, remcomOutBuffer, length);
 914                         }
 915                 if (ptr)
 916                     strcpy (remcomOutBuffer, "E01");
 917             }
 918             else
 919                 strcpy (remcomOutBuffer, "E03");
 920
 921             /* restore handler for bus error */
 922             dofault = 1;
 923             break;
 924
 925             /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
 926         case 'M':
 927             if (setjmp (remcomEnv) == 0)
 928             {
 929                 dofault = 0;
 930
 931                 /* TRY, TO READ '%x,%x:'.  IF SUCCEED, SET PTR = 0 */
 932                 if (hex2int (&ptr, &addr))
 933                     if (*(ptr++) == ',')
 934                         if (hex2int (&ptr, &length))
 935                             if (*(ptr++) == ':')
 936                             {
 937                                 hex2mem (ptr, (char *) addr, length);
 938                                 ptr = 0;
 939                                 strcpy (remcomOutBuffer, "OK");
 940                             }
 941                 if (ptr)
 942                     strcpy (remcomOutBuffer, "E02");
 943             }
 944             else
 945                 strcpy (remcomOutBuffer, "E03");
 946
 947             /* restore handler for bus error */
 948             dofault = 1;
 949             break;
 950
 951             /* cAA..AA    Continue at address AA..AA(optional) */
 952             /* sAA..AA   Step one instruction from AA..AA(optional) */
 953         case 's':
 954             stepping = 1;
 955         case 'c':
 956         {
 957             /* tRY, to read optional parameter, pc unchanged if no parm */
 958             if (hex2int (&ptr, &addr))
 959                 registers[PC] = addr;
 960
 961             if (stepping)
 962                 doSStep ();
 963         }
 964
 965         return;
 966         break;
 967
 968         /* kill the program */
 969         case 'k':               /* do nothing */
 970             break;
 971
 972         default:
 973             break;
 974         }                       /* switch */
 975
 976         /* reply to the request */
 977         putpacket (remcomOutBuffer);
 978     }
 979 }
 980
 981
 982 /* We've had an exception - go into the gdb stub */
 983 void handle_exception(int exceptionVector)
 984 {
 985     gdb_handle_exception (exceptionVector);
 986 }
 987
 988 /* This function will generate a breakpoint exception.  It is used at the
 989    beginning of a program to sync up with a debugger and can be used
 990    otherwise as a quick means to stop program execution and "break" into
 991    the debugger. */
 992 void breakpoint (void)
 993 {
 994     BREAKPOINT ();
 995 }
 996
 997 /**** Processor-specific routines start here ****/
 998 /**** Processor-specific routines start here ****/
 999 /**** Processor-specific routines start here ****/
1000
1001 extern int stack[];
1002
1003 /* SH1/SH2 exception vector table format */
1004 typedef struct
1005 {
1006         void (*func_cold) (void);
1007         int *stack_cold;
1008         void (*func_warm) (void);
1009         int *stack_warm;
1010         void (*(handler[128 - 4])) (void);
1011 } vec_type;
1012
1013 /* vectable is the SH1/SH2 vector table. It must be at address 0
1014 ** or wherever your vbr points.
1015 ** Note that we only define the first 128 vectors, since the Jukebox
1016 ** firmware has its entry point at 0x200
1017 */
1018 const vec_type vectable  __attribute__ ((section (".vectors"))) =
1019 {
1020     &start,                             /* 0: Power-on reset PC */
1021     stack,                              /* 1: Power-on reset SP */
1022     &start,                             /* 2: Manual reset PC */
1023     stack,                              /* 3: Manual reset SP */
1024     {
1025         &catch_exception_4,             /* 4: General invalid instruction */
1026         &catch_exception_5,             /* 5: Reserved for system */
1027         &catch_exception_6,             /* 6: Invalid slot instruction */
1028         &catch_exception_7,             /* 7: Reserved for system */
1029         &catch_exception_8,             /* 8: Reserved for system */
1030         &catch_exception_9,             /* 9: CPU bus error */
1031         &catch_exception_10,            /* 10: DMA bus error */
1032         &catch_exception_11,            /* 11: NMI */
1033         &catch_exception_12,            /* 12: User break */
1034         &catch_exception_13,            /* 13: Reserved for system */
1035         &catch_exception_14,            /* 14: Reserved for system */
1036         &catch_exception_15,            /* 15: Reserved for system */
1037         &catch_exception_16,            /* 16: Reserved for system */
1038         &catch_exception_17,            /* 17: Reserved for system */
1039         &catch_exception_18,            /* 18: Reserved for system */
1040         &catch_exception_19,            /* 19: Reserved for system */
1041         &catch_exception_20,            /* 20: Reserved for system */
1042         &catch_exception_21,            /* 21: Reserved for system */
1043         &catch_exception_22,            /* 22: Reserved for system */
1044         &catch_exception_23,            /* 23: Reserved for system */
1045         &catch_exception_24,            /* 24: Reserved for system */
1046         &catch_exception_25,            /* 25: Reserved for system */
1047         &catch_exception_26,            /* 26: Reserved for system */
1048         &catch_exception_27,            /* 27: Reserved for system */
1049         &catch_exception_28,            /* 28: Reserved for system */
1050         &catch_exception_29,            /* 29: Reserved for system */
1051         &catch_exception_30,            /* 30: Reserved for system */
1052         &catch_exception_31,            /* 31: Reserved for system */
1053         &catch_exception_32,            /* 32: Trap instr (user vectors) */
1054         &catch_exception_33,            /* 33: Trap instr (user vectors) */
1055         &catch_exception_34,            /* 34: Trap instr (user vectors) */
1056         &catch_exception_35,            /* 35: Trap instr (user vectors) */
1057         &catch_exception_36,            /* 36: Trap instr (user vectors) */
1058         &catch_exception_37,            /* 37: Trap instr (user vectors) */
1059         &catch_exception_38,            /* 38: Trap instr (user vectors) */
1060         &catch_exception_39,            /* 39: Trap instr (user vectors) */
1061         &catch_exception_40,            /* 40: Trap instr (user vectors) */
1062         &catch_exception_41,            /* 41: Trap instr (user vectors) */
1063         &catch_exception_42,            /* 42: Trap instr (user vectors) */
1064         &catch_exception_43,            /* 43: Trap instr (user vectors) */
1065         &catch_exception_44,            /* 44: Trap instr (user vectors) */
1066         &catch_exception_45,            /* 45: Trap instr (user vectors) */
1067         &catch_exception_46,            /* 46: Trap instr (user vectors) */
1068         &catch_exception_47,            /* 47: Trap instr (user vectors) */
1069         &catch_exception_48,            /* 48: Trap instr (user vectors) */
1070         &catch_exception_49,            /* 49: Trap instr (user vectors) */
1071         &catch_exception_50,            /* 50: Trap instr (user vectors) */
1072         &catch_exception_51,            /* 51: Trap instr (user vectors) */
1073         &catch_exception_52,            /* 52: Trap instr (user vectors) */
1074         &catch_exception_53,            /* 53: Trap instr (user vectors) */
1075         &catch_exception_54,            /* 54: Trap instr (user vectors) */
1076         &catch_exception_55,            /* 55: Trap instr (user vectors) */
1077         &catch_exception_56,            /* 56: Trap instr (user vectors) */
1078         &catch_exception_57,            /* 57: Trap instr (user vectors) */
1079         &catch_exception_58,            /* 58: Trap instr (user vectors) */
1080         &catch_exception_59,            /* 59: Trap instr (user vectors) */
1081         &catch_exception_60,            /* 60: Trap instr (user vectors) */
1082         &catch_exception_61,            /* 61: Trap instr (user vectors) */
1083         &catch_exception_62,            /* 62: Trap instr (user vectors) */
1084         &catch_exception_63,            /* 63: Trap instr (user vectors) */
1085         &catch_exception_64,            /* 64: IRQ0 */
1086         &catch_exception_65,            /* 65: IRQ1 */
1087         &catch_exception_66,            /* 66: IRQ2 */
1088         &catch_exception_67,            /* 67: IRQ3 */
1089         &catch_exception_68,            /* 68: IRQ4 */
1090         &catch_exception_69,            /* 69: IRQ5 */
1091         &catch_exception_70,            /* 70: IRQ6 */
1092         &catch_exception_71,            /* 71: IRQ7 */
1093         &catch_exception_72,
1094         &catch_exception_73,
1095         &catch_exception_74,
1096         &catch_exception_75,
1097         &catch_exception_76,
1098         &catch_exception_77,
1099         &catch_exception_78,
1100         &catch_exception_79,
1101         &catch_exception_80,
1102         &catch_exception_81,
1103         &catch_exception_82,
1104         &catch_exception_83,
1105         &catch_exception_84,
1106         &catch_exception_85,
1107         &catch_exception_86,
1108         &catch_exception_87,
1109         &catch_exception_88,
1110         &catch_exception_89,
1111         &catch_exception_90,
1112         &catch_exception_91,
1113         &catch_exception_92,
1114         &catch_exception_93,
1115         &catch_exception_94,
1116         &catch_exception_95,
1117         &catch_exception_96,
1118         &catch_exception_97,
1119         &catch_exception_98,
1120         &catch_exception_99,
1121         &catch_exception_100,
1122         &catch_exception_101,
1123         &catch_exception_102,
1124         &catch_exception_103,
1125         &catch_exception_104,
1126         &catch_exception_105,
1127         &catch_exception_106,
1128         &catch_exception_107,
1129         &catch_exception_108,
1130         &catch_exception_109,
1131         &catch_exception_110,
1132         &catch_exception_111,
1133         &catch_exception_112,
1134         &catch_exception_113,
1135         &catch_exception_114,
1136         &catch_exception_115,
1137         &catch_exception_116,
1138         &catch_exception_117,
1139         &catch_exception_118,
1140         &catch_exception_119,
1141         &catch_exception_120,
1142         &catch_exception_121,
1143         &catch_exception_122,
1144         &catch_exception_123,
1145         &catch_exception_124,
1146         &catch_exception_125,
1147         &catch_exception_126,
1148         &catch_exception_127}};
1149
1150 void INIT (void)
1151 {
1152     /* Disable all timer interrupts */
1153     TIER0 = 0;
1154     TIER1 = 0;
1155     TIER2 = 0;
1156     TIER3 = 0;
1157     TIER4 = 0;
1158
1159     init_serial();
1160
1161     in_nmi = 0;
1162     dofault = 1;
1163     stepped = 0;
1164
1165     ata_spindown(-1);
1166
1167     stub_sp = stub_stack;
1168     breakpoint ();
1169
1170     /* We should never come here */
1171     blink();
1172 }
1173
1174 void sr(void)
1175 {
1176     /* Calling Reset does the same as pressing the button */
1177     asm (".global _Reset\n"
1178          "        .global _WarmReset\n"
1179          "_Reset:\n"
1180          "_WarmReset:\n"
1181          "         mov.l L_sp,r15\n"
1182          "         bra   _INIT\n"
1183          "         nop\n"
1184          "         .align 2\n"
1185          "L_sp:    .long _stack");
1186
1187     asm("saveRegisters:\n");
1188     asm(" mov.l @(L_reg, pc), r0\n"
1189         "       mov.l   @r15+, r1               ! pop R0\n"
1190         "       mov.l   r2, @(0x08, r0)         ! save R2\n"
1191         "       mov.l   r1, @r0                 ! save R0\n"
1192         "       mov.l   @r15+, r1               ! pop R1\n"
1193         "       mov.l   r3, @(0x0c, r0)         ! save R3\n"
1194         "       mov.l   r1, @(0x04, r0)         ! save R1\n"
1195         "       mov.l   r4, @(0x10, r0)         ! save R4\n"
1196         "       mov.l   r5, @(0x14, r0)         ! save R5\n"
1197         "       mov.l   r6, @(0x18, r0)         ! save R6\n"
1198         "       mov.l   r7, @(0x1c, r0)         ! save R7\n"
1199         "       mov.l   r8, @(0x20, r0)         ! save R8\n"
1200         "       mov.l   r9, @(0x24, r0)         ! save R9\n"
1201         "       mov.l   r10, @(0x28, r0)        ! save R10\n"
1202         "       mov.l   r11, @(0x2c, r0)        ! save R11\n"
1203         "       mov.l   r12, @(0x30, r0)        ! save R12\n"
1204         "       mov.l   r13, @(0x34, r0)        ! save R13\n"
1205         "       mov.l   r14, @(0x38, r0)        ! save R14\n"
1206         "       mov.l   @r15+, r4               ! save arg to handleException\n"
1207         "       add     #8, r15                 ! hide PC/SR values on stack\n"
1208         "       mov.l   r15, @(0x3c, r0)        ! save R15\n"
1209         "       add     #-8, r15                ! save still needs old SP value\n"
1210         "       add     #92, r0                 ! readjust register pointer\n"
1211         "       mov     r15, r2\n"
1212         "       add     #4, r2\n"
1213         "       mov.l   @r2, r2                 ! R2 has SR\n"
1214         "       mov.l   @r15, r1                ! R1 has PC\n"
1215         "       mov.l   r2, @-r0                ! save SR\n"
1216         "       sts.l   macl, @-r0              ! save MACL\n"
1217         "       sts.l   mach, @-r0              ! save MACH\n"
1218         "       stc.l   vbr, @-r0               ! save VBR\n"
1219         "       stc.l   gbr, @-r0               ! save GBR\n"
1220         "       sts.l   pr, @-r0                ! save PR\n"
1221         "       mov.l   @(L_stubstack, pc), r2\n"
1222         "       mov.l   @(L_hdl_except, pc), r3\n"
1223         "       mov.l   @r2, r15\n"
1224         "       jsr     @r3\n"
1225         "       mov.l   r1, @-r0                ! save PC\n"
1226         "       mov.l   @(L_stubstack, pc), r0\n"
1227         "       mov.l   @(L_reg, pc), r1\n"
1228         "       bra     restoreRegisters\n"
1229         "       mov.l   r15, @r0                ! save __stub_stack\n"
1230
1231         "       .align 2\n"
1232         "L_reg:\n"
1233         "       .long   _registers\n"
1234         "L_stubstack:\n"
1235         "       .long   _stub_sp\n"
1236         "L_hdl_except:\n"
1237         "       .long   _handle_exception");
1238 }
1239
1240 void rr(void)
1241 {
1242     asm("       .align 2        \n"
1243         "        .global _resume\n"
1244         "_resume:\n"
1245         "       mov     r4,r1\n"
1246         "restoreRegisters:\n"
1247         "       add     #8, r1                  ! skip to R2\n"
1248         "       mov.l   @r1+, r2                ! restore R2\n"
1249         "       mov.l   @r1+, r3                ! restore R3\n"
1250         "       mov.l   @r1+, r4                ! restore R4\n"
1251         "       mov.l   @r1+, r5                ! restore R5\n"
1252         "       mov.l   @r1+, r6                ! restore R6\n"
1253         "       mov.l   @r1+, r7                ! restore R7\n"
1254         "       mov.l   @r1+, r8                ! restore R8\n"
1255         "       mov.l   @r1+, r9                ! restore R9\n"
1256         "       mov.l   @r1+, r10               ! restore R10\n"
1257         "       mov.l   @r1+, r11               ! restore R11\n"
1258         "       mov.l   @r1+, r12               ! restore R12\n"
1259         "       mov.l   @r1+, r13               ! restore R13\n"
1260         "       mov.l   @r1+, r14               ! restore R14\n"
1261         "       mov.l   @r1+, r15               ! restore programs stack\n"
1262         "       mov.l   @r1+, r0\n"
1263         "       add     #-8, r15                ! uncover PC/SR on stack \n"
1264         "       mov.l   r0, @r15                ! restore PC onto stack\n"
1265         "       lds.l   @r1+, pr                ! restore PR\n"
1266         "       ldc.l   @r1+, gbr               ! restore GBR\n"
1267         "       ldc.l   @r1+, vbr               ! restore VBR\n"
1268         "       lds.l   @r1+, mach              ! restore MACH\n"
1269         "       lds.l   @r1+, macl              ! restore MACL\n"
1270         "       mov.l   @r1, r0 \n"
1271         "       add     #-88, r1                ! readjust reg pointer to R1\n"
1272         "       mov.l   r0, @(4, r15)           ! restore SR onto stack+4\n"
1273         "       mov.l   r2, @-r15\n"
1274         "       mov.l   L_in_nmi, r0\n"
1275         "       mov             #0, r2\n"
1276         "       mov.b   r2, @r0\n"
1277         "       mov.l   @r15+, r2\n"
1278         "       mov.l   @r1+, r0                ! restore R0\n"
1279         "       rte\n"
1280         "       mov.l   @r1, r1                 ! restore R1");
1281 }
1282
1283 static inline void code_for_catch_exception(unsigned int n)
1284 {
1285     asm("               .globl  _catch_exception_%O0" : : "X" (n) );
1286     asm("       _catch_exception_%O0:" :: "X" (n) );
1287
1288     asm("               add     #-4, r15        ! reserve spot on stack ");
1289     asm("               mov.l   r1, @-r15       ! push R1               ");
1290
1291     if (n == NMI_VEC)
1292     {
1293         /* Special case for NMI - make sure that they don't nest */
1294         asm("   mov.l   r0, @-r15       ! push R0");
1295         asm("   mov.l   L_in_nmi, r0");
1296         asm("   tas.b   @r0             ! Fend off against addtnl NMIs");
1297         asm("   bt              noNMI");
1298         asm("   mov.l   @r15+, r0");
1299         asm("   mov.l   @r15+, r1");
1300         asm("   add             #4, r15");
1301         asm("   rte");
1302         asm("   nop");
1303         asm(".align 2");
1304         asm("L_in_nmi: .long    _in_nmi");
1305         asm("noNMI:");
1306     }
1307     else
1308     {
1309
1310         if (n == CPU_BUS_ERROR_VEC)
1311         {
1312             /* Exception 9 (bus errors) are disasbleable - so that you
1313                can probe memory and get zero instead of a fault.
1314                Because the vector table may be in ROM we don't revector
1315                the interrupt like all the other stubs, we check in here
1316             */
1317             asm("mov.l  L_dofault,r1");
1318             asm("mov.l  @r1,r1");
1319             asm("tst    r1,r1");
1320             asm("bf     faultaway");
1321             asm("bsr    _handle_buserror");
1322             asm(".align 2");
1323             asm("L_dofault: .long _dofault");
1324             asm("faultaway:");
1325         }
1326         asm("           mov     #15<<4, r1                              ");
1327         asm("           ldc     r1, sr          ! disable interrupts    ");
1328         asm("           mov.l   r0, @-r15       ! push R0               ");
1329     }
1330
1331     /* Prepare for saving context, we've already pushed r0 and r1, stick
1332        exception number into the frame */
1333     asm("               mov     r15, r0                         ");
1334     asm("               add     #8, r0                          ");
1335     asm("               mov     %0,r1" :: "X" (n));
1336     asm("               extu.b  r1,r1                           ");
1337     asm("               bra     saveRegisters   ! save register values  ");
1338     asm("               mov.l   r1, @r0         ! save exception #      ");
1339 }
1340
1341 /* Here we call all defined exceptions, so the inline assembler gets
1342    generated */
1343 void exceptions (void)
1344 {
1345     code_for_catch_exception (4);
1346     code_for_catch_exception (5);
1347     code_for_catch_exception (6);
1348     code_for_catch_exception (7);
1349     code_for_catch_exception (8);
1350     code_for_catch_exception (9);
1351     code_for_catch_exception (10);
1352     code_for_catch_exception (11);
1353     code_for_catch_exception (12);
1354     code_for_catch_exception (13);
1355     code_for_catch_exception (14);
1356     code_for_catch_exception (15);
1357     code_for_catch_exception (16);
1358     code_for_catch_exception (17);
1359     code_for_catch_exception (18);
1360     code_for_catch_exception (19);
1361     code_for_catch_exception (20);
1362     code_for_catch_exception (21);
1363     code_for_catch_exception (22);
1364     code_for_catch_exception (23);
1365     code_for_catch_exception (24);
1366     code_for_catch_exception (25);
1367     code_for_catch_exception (26);
1368     code_for_catch_exception (27);
1369     code_for_catch_exception (28);
1370     code_for_catch_exception (29);
1371     code_for_catch_exception (30);
1372     code_for_catch_exception (31);
1373     code_for_catch_exception (32);
1374     code_for_catch_exception (33);
1375     code_for_catch_exception (34);
1376     code_for_catch_exception (35);
1377     code_for_catch_exception (36);
1378     code_for_catch_exception (37);
1379     code_for_catch_exception (38);
1380     code_for_catch_exception (39);
1381     code_for_catch_exception (40);
1382     code_for_catch_exception (41);
1383     code_for_catch_exception (42);
1384     code_for_catch_exception (43);
1385     code_for_catch_exception (44);
1386     code_for_catch_exception (45);
1387     code_for_catch_exception (46);
1388     code_for_catch_exception (47);
1389     code_for_catch_exception (48);
1390     code_for_catch_exception (49);
1391     code_for_catch_exception (50);
1392     code_for_catch_exception (51);
1393     code_for_catch_exception (52);
1394     code_for_catch_exception (53);
1395     code_for_catch_exception (54);
1396     code_for_catch_exception (55);
1397     code_for_catch_exception (56);
1398     code_for_catch_exception (57);
1399     code_for_catch_exception (58);
1400     code_for_catch_exception (59);
1401     code_for_catch_exception (60);
1402     code_for_catch_exception (61);
1403     code_for_catch_exception (62);
1404     code_for_catch_exception (63);
1405     code_for_catch_exception (64);
1406     code_for_catch_exception (65);
1407     code_for_catch_exception (66);
1408     code_for_catch_exception (67);
1409     code_for_catch_exception (68);
1410     code_for_catch_exception (69);
1411     code_for_catch_exception (70);
1412     code_for_catch_exception (71);
1413     code_for_catch_exception (72);
1414     code_for_catch_exception (73);
1415     code_for_catch_exception (74);
1416     code_for_catch_exception (75);
1417     code_for_catch_exception (76);
1418     code_for_catch_exception (77);
1419     code_for_catch_exception (78);
1420     code_for_catch_exception (79);
1421     code_for_catch_exception (80);
1422     code_for_catch_exception (81);
1423     code_for_catch_exception (82);
1424     code_for_catch_exception (83);
1425     code_for_catch_exception (84);
1426     code_for_catch_exception (85);
1427     code_for_catch_exception (86);
1428     code_for_catch_exception (87);
1429     code_for_catch_exception (88);
1430     code_for_catch_exception (89);
1431     code_for_catch_exception (90);
1432     code_for_catch_exception (91);
1433     code_for_catch_exception (92);
1434     code_for_catch_exception (93);
1435     code_for_catch_exception (94);
1436     code_for_catch_exception (95);
1437     code_for_catch_exception (96);
1438     code_for_catch_exception (97);
1439     code_for_catch_exception (98);
1440     code_for_catch_exception (99);
1441     code_for_catch_exception (100);
1442     code_for_catch_exception (101);
1443     code_for_catch_exception (102);
1444     code_for_catch_exception (103);
1445     code_for_catch_exception (104);
1446     code_for_catch_exception (105);
1447     code_for_catch_exception (106);
1448     code_for_catch_exception (107);
1449     code_for_catch_exception (108);
1450     code_for_catch_exception (109);
1451     code_for_catch_exception (110);
1452     code_for_catch_exception (111);
1453     code_for_catch_exception (112);
1454     code_for_catch_exception (113);
1455     code_for_catch_exception (114);
1456     code_for_catch_exception (115);
1457     code_for_catch_exception (116);
1458     code_for_catch_exception (117);
1459     code_for_catch_exception (118);
1460     code_for_catch_exception (119);
1461     code_for_catch_exception (120);
1462     code_for_catch_exception (121);
1463     code_for_catch_exception (122);
1464     code_for_catch_exception (123);
1465     code_for_catch_exception (124);
1466     code_for_catch_exception (125);
1467     code_for_catch_exception (126);
1468     code_for_catch_exception (127);
1469 }
1470
1471 /*
1472  * Port B Control Register (PBCR1)
1473  */
1474 #define PB15MD1         0x8000
1475 #define PB15MD0         0x4000
1476 #define PB14MD1         0x2000
1477 #define PB14MD0         0x1000
1478 #define PB13MD1         0x0800
1479 #define PB13MD0         0x0400
1480 #define PB12MD1         0x0200
1481 #define PB12MD0         0x0100
1482 #define PB11MD1         0x0080
1483 #define PB11MD0         0x0040
1484 #define PB10MD1         0x0020
1485 #define PB10MD0         0x0010
1486 #define PB9MD1          0x0008
1487 #define PB9MD0          0x0004
1488 #define PB8MD1          0x0002
1489 #define PB8MD0          0x0001
1490
1491 #define PB15MD          PB15MD1|PB14MD0
1492 #define PB14MD          PB14MD1|PB14MD0
1493 #define PB13MD          PB13MD1|PB13MD0
1494 #define PB12MD          PB12MD1|PB12MD0
1495 #define PB11MD          PB11MD1|PB11MD0
1496 #define PB10MD          PB10MD1|PB10MD0
1497 #define PB9MD           PB9MD1|PB9MD0
1498 #define PB8MD           PB8MD1|PB8MD0
1499
1500 #define PB_TXD1         PB11MD1
1501 #define PB_RXD1         PB10MD1
1502 #define PB_TXD0         PB9MD1
1503 #define PB_RXD0         PB8MD1
1504
1505 #define PB7MD   PB7MD1|PB7MD0
1506 #define PB6MD   PB6MD1|PB6MD0
1507 #define PB5MD   PB5MD1|PB5MD0
1508 #define PB4MD   PB4MD1|PB4MD0
1509 #define PB3MD   PB3MD1|PB3MD0
1510 #define PB2MD   PB2MD1|PB2MD0
1511 #define PB1MD   PB1MD1|PB1MD0
1512 #define PB0MD   PB0MD1|PB0MD0
1513
1514
1515 void handleError (char theSSR);
1516
1517 void nop (void)
1518 {
1519 }
1520
1521 void init_serial (void)
1522 {
1523     int i;
1524
1525     /* Clear Channel 1's SCR   */
1526     SCR1 = 0;
1527
1528     /* Set communication to be async, 8-bit data,
1529        no parity, 1 stop bit and use internal clock */
1530     SMR1 = 0;
1531
1532 #ifdef RECORDER
1533     #warning 115200
1534     BRR1 = 2; /* 115200 */
1535 #else
1536     BRR1 = 9; /* 38400 */
1537 #endif
1538
1539     SCR1 &= ~(SCI_CKE1 | SCI_CKE0);
1540
1541     /* let the hardware settle */
1542     for (i = 0; i < 1000; i++)
1543         nop ();
1544
1545     /* Turn on in and out */
1546     SCR1 |= SCI_RE | SCI_TE;
1547
1548     /* Set the PFC to make RXD1 (pin PB8) an input pin
1549        and TXD1 (pin PB9) an output pin */
1550     PBCR1 &= ~(PB_TXD1 | PB_RXD1);
1551     PBCR1 |= PB_TXD1 | PB_RXD1;
1552 }
1553
1554
1555 int serial_waitc(void)
1556 {
1557     char mySSR;
1558     mySSR = SSR1 & ( SCI_PER | SCI_FER | SCI_ORER );
1559     if ( mySSR )
1560         handleError ( mySSR );
1561     return SSR1 & SCI_RDRF ;
1562 }
1563
1564 char serial_getc (void)
1565 {
1566     char ch;
1567     char mySSR;
1568
1569     while ( ! serial_waitc())
1570         ;
1571
1572     ch = RDR1;
1573     SSR1 &= ~SCI_RDRF;
1574
1575     mySSR = SSR1 & (SCI_PER | SCI_FER | SCI_ORER);
1576
1577     if (mySSR)
1578         handleError (mySSR);
1579
1580     return ch;
1581 }
1582
1583 void serial_putc (char ch)
1584 {
1585     while (!(SSR1 & SCI_TDRE))
1586     {
1587         ;
1588     }
1589
1590     /*
1591      * Write data into TDR and clear TDRE
1592      */
1593     TDR1 = ch;
1594     SSR1 &= ~SCI_TDRE;
1595 }
1596
1597 void handleError (char theSSR)
1598 {
1599     /* Clear all error bits, otherwise the receiver will stop */
1600     SSR1 &= ~(SCI_ORER | SCI_PER | SCI_FER);
1601 }
1602
1603 void *memcpy(void *dest, const void *src0, size_t n)
1604 {
1605     char *dst = (char *) dest;
1606     char *src = (char *) src0;
1607
1608     void *save = dest;
1609
1610     while(n--)
1611     {
1612         *dst++ = *src++;
1613     }
1614
1615     return save;
1616 }