1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright © 2008 Rafaël Carré
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
26 #include "dma-target.h"
27 #include "clock-target.h"
33 #define MAX_TRANSFER (4*((1<<11)-1)) /* maximum data we can transfer via DMA
34 * i.e. 32 bits at once (size of I2SO_DATA)
35 * and the number of 32bits words has to
36 * fit in 11 bits of DMA register */
38 static unsigned char *dma_start_addr
;
39 static size_t dma_size
; /* in 4*32 bits */
40 static void dma_callback(void);
41 static int locked
= 0;
43 /* Mask the DMA interrupt */
44 void pcm_play_lock(void)
47 VIC_INT_EN_CLEAR
= INTERRUPT_DMAC
;
50 /* Unmask the DMA interrupt if enabled */
51 void pcm_play_unlock(void)
54 VIC_INT_ENABLE
= INTERRUPT_DMAC
;
57 static void play_start_pcm(void)
59 const unsigned char* addr
= dma_start_addr
;
60 size_t size
= dma_size
;
61 if(size
> MAX_TRANSFER
)
65 dma_start_addr
+= size
;
67 clean_dcache_range((void*)addr
, size
); /* force write back */
68 dma_enable_channel(1, (void*)addr
, (void*)I2SOUT_DATA
, DMA_PERI_I2SOUT
,
69 DMAC_FLOWCTRL_DMAC_MEM_TO_PERI
, true, false, size
>> 2, DMA_S1
,
73 static void dma_callback(void)
77 register pcm_more_callback_type get_more
= pcm_callback_for_more
;
79 get_more(&dma_start_addr
, &dma_size
);
85 pcm_play_dma_stopped_callback();
91 void pcm_play_dma_start(const void *addr
, size_t size
)
94 dma_start_addr
= (unsigned char*)addr
;
98 I2SOUT_CONTROL
|= 1<<6; /* dma */
100 CGU_PERI
|= CGU_I2SOUT_APB_CLOCK_ENABLE
;
101 CGU_AUDIO
|= (1<<11);
106 void pcm_play_dma_stop(void)
108 dma_disable_channel(1);
113 CGU_PERI
&= ~CGU_I2SOUT_APB_CLOCK_ENABLE
;
114 CGU_AUDIO
&= ~(1<<11);
117 void pcm_play_dma_pause(bool pause
)
120 dma_disable_channel(1);
125 void pcm_play_dma_init(void)
127 CGU_PERI
|= CGU_I2SOUT_APB_CLOCK_ENABLE
;
129 CGU_AUDIO
= (CGU_AUDIO
& ~(3<<0)) | (1<<0); /* clock source PLLA */
131 I2SOUT_CONTROL
= (1<<3) /* stereo */;
136 void pcm_postinit(void)
141 void pcm_dma_apply_settings(void)
143 unsigned long frequency
= pcm_sampr
;
145 /* TODO : use a table ? */
146 const int divider
= (((AS3525_PLLA_FREQ
/128) + (frequency
/2)) / frequency
) - 1;
148 int cgu_audio
= CGU_AUDIO
; /* read register */
149 cgu_audio
&= ~(511 << 2); /* clear i2sout divider */
150 cgu_audio
|= divider
<< 2; /* set new i2sout divider */
151 #ifdef HAVE_RECORDING
152 cgu_audio
&= ~(511 << 14); /* clear i2sin divider */
153 cgu_audio
|= divider
<< 14; /* set new i2sin divider */
155 CGU_AUDIO
= cgu_audio
; /* write back register */
158 size_t pcm_get_bytes_waiting(void)
163 const void * pcm_play_dma_get_peak_buffer(int *count
)
165 *count
= dma_size
>> 2;
166 return (const void*)dma_start_addr
;
169 #ifdef HAVE_PCM_DMA_ADDRESS
170 void * pcm_dma_addr(void *addr
)
173 addr
= UNCACHED_ADDR(addr
);
179 /****************************************************************************
180 ** Recording DMA transfer
182 #ifdef HAVE_RECORDING
184 static int rec_locked
= 0;
185 static unsigned int *rec_start_addr
;
186 static size_t rec_size
;
189 void pcm_rec_lock(void)
191 if(++rec_locked
== 1)
192 VIC_INT_EN_CLEAR
= INTERRUPT_I2SIN
;
196 void pcm_rec_unlock(void)
198 if(--rec_locked
== 0)
199 VIC_INT_ENABLE
= INTERRUPT_I2SIN
;
203 void pcm_record_more(void *start
, size_t size
)
205 rec_start_addr
= start
;
210 void pcm_rec_dma_stop(void)
212 VIC_INT_EN_CLEAR
= INTERRUPT_I2SIN
;
214 I2SOUT_CONTROL
&= ~(1<<5); /* source = i2soutif fifo */
215 CGU_AUDIO
&= ~((1<<23)|(1<<11));
216 CGU_PERI
&= ~(CGU_I2SIN_APB_CLOCK_ENABLE
|CGU_I2SOUT_APB_CLOCK_ENABLE
);
223 register pcm_more_callback_type2 more_ready
;
225 status
= I2SIN_STATUS
;
228 if ( status
& ((1<<6)|(1<<0)) ) /* errors */
229 panicf("i2sin error: 0x%x = %s %s", status
,
230 (status
& (1<<6)) ? "push" : "",
231 (status
& (1<<0)) ? "pop" : ""
235 while (((I2SIN_RAW_STATUS
& (1<<5)) == 0) && rec_size
)
237 /* 14 bits per sample = 1 32 bits word */
238 *rec_start_addr
++ = *I2SIN_DATA
;
242 I2SIN_CLEAR
= status
;
246 more_ready
= pcm_callback_more_ready
;
247 if(!more_ready
|| more_ready(0) < 0)
249 /* Finished recording */
251 pcm_rec_dma_stopped_callback();
257 void pcm_rec_dma_start(void *addr
, size_t size
)
259 rec_start_addr
= addr
;
262 CGU_PERI
|= CGU_I2SIN_APB_CLOCK_ENABLE
|CGU_I2SOUT_APB_CLOCK_ENABLE
;
263 CGU_AUDIO
|= ((1<<23)|(1<<11));
265 I2SOUT_CONTROL
|= 1<<5; /* source = loopback from i2sin fifo */
267 /* 14 bits samples, i2c clk src = I2SOUTIF, sdata src = AFE,
268 * data valid at positive edge of SCLK */
269 I2SIN_CONTROL
= (1<<5) | (1<<2);
272 while ( ( I2SIN_RAW_STATUS
& ( 1<<5 ) ) == 0 )
273 tmp
= *I2SIN_DATA
; /* FLUSH FIFO */
274 I2SIN_CLEAR
= (1<<6)|(1<<0); /* push error, pop error */
275 I2SIN_MASK
= (1<<6) | (1<<0) |
276 (1<<3) | (1<<2) | (1<<1); /* half full, almost full, full */
278 VIC_INT_ENABLE
= INTERRUPT_I2SIN
;
282 void pcm_rec_dma_close(void)
288 void pcm_rec_dma_init(void)
290 CGU_AUDIO
= (CGU_AUDIO
& ~(3<<12)) | (1<<12); /* clock source = PLLA */
291 pcm_dma_apply_settings();
295 const void * pcm_rec_dma_get_peak_buffer(int *count
)
297 const void *peak_buffer
;
300 *count
= rec_size
>> 2;
301 peak_buffer
= (const void*)rec_start_addr
;
307 #endif /* HAVE_RECORDING */