firmware/rolo.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2002 Randy D. Wood
  11  *
  12  * All files in this archive are subject to the GNU General Public License.
  13  * See the file COPYING in the source tree root for full license agreement.
  14  *
  15  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  16  * KIND, either express or implied.
  17  *
  18  ****************************************************************************/
  19
  20 #include "config.h"
  21 #include "lcd.h"
  22 #include "lcd-remote.h"
  23 #include "thread.h"
  24 #include "kernel.h"
  25 #include "sprintf.h"
  26 #include "button.h"
  27 #include "file.h"
  28 #include "audio.h"
  29 #include "system.h"
  30 #include "i2c.h"
  31 #include "adc.h"
  32 #include "string.h"
  33 #include "buffer.h"
  34 #include "rolo.h"
  35
  36 #ifdef MI4_FORMAT
  37 #include "crc32-mi4.h"
  38 #undef FIRMWARE_OFFSET_FILE_CRC
  39 #undef FIRMWARE_OFFSET_FILE_DATA
  40 #define FIRMWARE_OFFSET_FILE_CRC     0xC
  41 #define FIRMWARE_OFFSET_FILE_DATA    0x200
  42 #endif
  43
  44 #if !defined(IRIVER_IFP7XX_SERIES) && \
  45     (CONFIG_CPU != PP5002)
  46 /* FIX: this doesn't work on iFP, 3rd Gen ipods */
  47
  48 #define IRQ0_EDGE_TRIGGER 0x80
  49
  50 #ifdef CPU_PP
  51 /* Handle the COP properly - it needs to jump to a function outside SDRAM while
  52  * the new firmware is being loaded, and then jump to the start of SDRAM
  53  * TODO: Use the mailboxes built into the PP processor for this
  54  */
  55
  56 #if NUM_CORES > 1
  57 volatile unsigned char IDATA_ATTR cpu_message = 0;
  58 volatile unsigned char IDATA_ATTR cpu_reply = 0;
  59 extern int cop_idlestackbegin[];
  60
  61 void rolo_restart_cop(void) ICODE_ATTR;
  62 void rolo_restart_cop(void)
  63 {
  64     if (CURRENT_CORE == CPU)
  65     {
  66         /* There should be free thread slots aplenty */
  67         create_thread(rolo_restart_cop, cop_idlestackbegin, IDLE_STACK_SIZE,
  68                       0, "rolo COP" IF_PRIO(, PRIORITY_REALTIME)
  69                       IF_COP(, COP));
  70         return;
  71     }
  72
  73     COP_INT_CLR = -1;
  74
  75     /* Invalidate cache */
  76     invalidate_icache();
  77
  78     /* Disable cache */
  79     CACHE_CTL = CACHE_CTL_DISABLE;
  80
  81     /* Tell the main core that we're ready to reload */
  82     cpu_reply = 1;
  83
  84     /* Wait while RoLo loads the image into SDRAM */
  85     /* TODO: Accept checksum failure gracefully */
  86     while(cpu_message != 1);
  87
  88     /* Acknowledge the CPU and then reload */
  89     cpu_reply = 2;
  90
  91     asm volatile(
  92         "mov   r0, #0x10000000   \n"
  93         "mov   pc, r0            \n"
  94     );
  95 }
  96 #endif /* NUM_CORES > 1 */
  97 #endif /* CPU_PP */
  98
  99 static void rolo_error(const char *text)
 100 {
 101     lcd_clear_display();
 102     lcd_puts(0, 0, "ROLO error:");
 103     lcd_puts_scroll(0, 1, text);
 104     lcd_update();
 105     button_get(true);
 106     button_get(true);
 107     button_get(true);
 108     lcd_stop_scroll();
 109 }
 110
 111 #if CONFIG_CPU == SH7034
 112 /* these are in assembler file "descramble.S" */
 113 extern unsigned short descramble(const unsigned char* source,
 114                                  unsigned char* dest, int length);
 115 extern void rolo_restart(const unsigned char* source, unsigned char* dest,
 116                          int length);
 117 #else
 118
 119 /* explicitly put this code in iram, ICODE_ATTR is defined to be null for some
 120    targets that are low on iram, like the gigabeat F/X */
 121 void rolo_restart(const unsigned char* source, unsigned char* dest,
 122                   long length) __attribute__ ((section(".icode")));
 123 void rolo_restart(const unsigned char* source, unsigned char* dest,
 124                   long length)
 125 {
 126     long i;
 127     unsigned char* localdest = dest;
 128
 129     /* This is the equivalent of a call to memcpy() but this must be done from
 130        iram to avoid overwriting itself and we don't want to depend on memcpy()
 131        always being in iram */
 132     for(i = 0;i < length;i++)
 133         *localdest++ = *source++;
 134
 135 #if defined(CPU_COLDFIRE)
 136     asm (
 137         "movec.l %0,%%vbr    \n"
 138         "move.l  (%0)+,%%sp  \n"
 139         "move.l  (%0),%0     \n"
 140         "jmp     (%0)        \n"
 141         : : "a"(dest)
 142     );
 143 #elif defined(CPU_PP502x)
 144     CPU_INT_CLR = -1;
 145
 146     /* Flush cache */
 147     flush_icache();
 148
 149     /* Disable cache */
 150     CACHE_CTL = CACHE_CTL_DISABLE;
 151
 152     /* Reset the memory mapping registers to zero */
 153     {
 154         volatile unsigned long *mmap_reg;
 155         for (mmap_reg = &MMAP_FIRST; mmap_reg <= &MMAP_LAST; mmap_reg++)
 156             *mmap_reg = 0;
 157     }
 158
 159 #if NUM_CORES > 1
 160     /* Tell the COP it's safe to continue rebooting */
 161     cpu_message = 1;
 162
 163     /* Wait for the COP to tell us it is rebooting */
 164     while(cpu_reply != 2);
 165 #endif
 166
 167     asm volatile(
 168         "mov   r0, #0x10000000   \n"
 169         "mov   pc, r0            \n"
 170     );
 171
 172 #elif defined(CPU_TCC780X) || (CONFIG_CPU==IMX31L) || (CONFIG_CPU == S3C2440)
 173     /* Flush and invalidate caches */
 174     invalidate_icache();
 175
 176     asm volatile(
 177         "mov   pc, %0            \n"
 178         : : "r"(dest)
 179     );
 180 #endif
 181 }
 182 #endif
 183
 184 /* This is assigned in the linker control file */
 185 extern unsigned long loadaddress;
 186
 187 /***************************************************************************
 188  *
 189  * Name: rolo_load_app(char *filename,int scrambled)
 190  * Filename must be a fully defined filename including the path and extension
 191  *
 192  ***************************************************************************/
 193 int rolo_load(const char* filename)
 194 {
 195     int fd;
 196     long length;
 197 #if defined(CPU_COLDFIRE) || defined(CPU_ARM)
 198 #if !defined(MI4_FORMAT)
 199     int i;
 200 #endif
 201     unsigned long checksum,file_checksum;
 202 #else
 203     long file_length;
 204     unsigned short checksum,file_checksum;
 205 #endif
 206     unsigned char* ramstart = (void*)&loadaddress;
 207
 208     lcd_clear_display();
 209     lcd_puts(0, 0, "ROLO...");
 210     lcd_puts(0, 1, "Loading");
 211     lcd_update();
 212 #ifdef HAVE_REMOTE_LCD
 213     lcd_remote_clear_display();
 214     lcd_remote_puts(0, 0, "ROLO...");
 215     lcd_remote_puts(0, 1, "Loading");
 216     lcd_remote_update();
 217 #endif
 218
 219     audio_stop();
 220
 221     fd = open(filename, O_RDONLY);
 222     if(-1 == fd) {
 223         rolo_error("File not found");
 224         return -1;
 225     }
 226
 227     length = filesize(fd) - FIRMWARE_OFFSET_FILE_DATA;
 228
 229 #if defined(CPU_COLDFIRE) || defined(CPU_PP) || (CONFIG_CPU==DM320) \
 230      || defined(CPU_TCC780X) || (CONFIG_CPU==IMX31L) || (CONFIG_CPU == S3C2440)
 231     /* Read and save checksum */
 232     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 233     if (read(fd, &file_checksum, 4) != 4) {
 234         rolo_error("Error Reading checksum");
 235         return -1;
 236     }
 237
 238 #if !defined(MI4_FORMAT)
 239     /* Rockbox checksums are big-endian */
 240     file_checksum = betoh32(file_checksum);
 241 #endif
 242
 243 #if defined(CPU_PP) && NUM_CORES > 1
 244     lcd_puts(0, 2, "Waiting for coprocessor...");
 245     lcd_update();
 246     rolo_restart_cop();
 247     /* Wait for COP to be in safe code */
 248     while(cpu_reply != 1);
 249     lcd_puts(0, 2, "                          ");
 250     lcd_update();
 251 #endif
 252
 253     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 254
 255     if (read(fd, audiobuf, length) != length) {
 256         rolo_error("Error Reading File");
 257         return -1;
 258     }
 259
 260 #ifdef MI4_FORMAT
 261     /* Check CRC32 to see if we have a valid file */
 262     chksum_crc32gentab();
 263     checksum = chksum_crc32 (audiobuf, length);
 264 #else
 265     checksum = MODEL_NUMBER;
 266
 267     for(i = 0;i < length;i++) {
 268         checksum += audiobuf[i];
 269     }
 270 #endif
 271
 272     /* Verify checksum against file header */
 273     if (checksum != file_checksum) {
 274         rolo_error("Checksum Error");
 275         return -1;
 276     }
 277
 278     lcd_puts(0, 1, "Executing");
 279     lcd_update();
 280 #ifdef HAVE_REMOTE_LCD
 281     lcd_remote_puts(0, 1, "Executing");
 282     lcd_remote_update();
 283 #endif
 284     adc_close();
 285
 286 #ifdef CPU_ARM
 287     disable_fiq();
 288 #endif
 289     set_irq_level(DISABLE_INTERRUPTS);
 290
 291 #elif CONFIG_CPU == SH7034
 292     /* Read file length from header and compare to real file length */
 293     lseek(fd, FIRMWARE_OFFSET_FILE_LENGTH, SEEK_SET);
 294     if(read(fd, &file_length, 4) != 4) {
 295         rolo_error("Error Reading File Length");
 296         return -1;
 297     }
 298     if (length != file_length) {
 299         rolo_error("File length mismatch");
 300         return -1;
 301     }
 302
 303     /* Read and save checksum */
 304     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 305     if (read(fd, &file_checksum, 2) != 2) {
 306         rolo_error("Error Reading checksum");
 307         return -1;
 308     }
 309     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 310
 311     /* verify that file can be read and descrambled */
 312     if ((audiobuf + (2*length)+4) >= audiobufend) {
 313         rolo_error("Not enough room to load file");
 314         return -1;
 315     }
 316
 317     if (read(fd, &audiobuf[length], length) != (int)length) {
 318         rolo_error("Error Reading File");
 319         return -1;
 320     }
 321
 322     lcd_puts(0, 1, "Descramble");
 323     lcd_update();
 324
 325     checksum = descramble(audiobuf + length, audiobuf, length);
 326
 327     /* Verify checksum against file header */
 328     if (checksum != file_checksum) {
 329         rolo_error("Checksum Error");
 330         return -1;
 331     }
 332
 333     lcd_puts(0, 1, "Executing     ");
 334     lcd_update();
 335
 336     set_irq_level(HIGHEST_IRQ_LEVEL);
 337
 338     /* Calling these 2 initialization routines was necessary to get the
 339        the origional Archos version of the firmware to load and execute. */
 340     system_init();           /* Initialize system for restart */
 341     i2c_init();              /* Init i2c bus - it seems like a good idea */
 342     ICR = IRQ0_EDGE_TRIGGER; /* Make IRQ0 edge triggered */
 343     TSTR = 0xE0;             /* disable all timers */
 344     /* model-specific de-init, needed when flashed */
 345     /* Especially the Archos software is picky about this */
 346 #if defined(ARCHOS_RECORDER) || defined(ARCHOS_RECORDERV2) || \
 347     defined(ARCHOS_FMRECORDER)
 348     PAIOR = 0x0FA0;
 349 #endif
 350 #endif
 351     rolo_restart(audiobuf, ramstart, length);
 352
 353     return 0; /* this is never reached */
 354     (void)checksum; (void)file_checksum;
 355 }
 356 #else  /* !defined(IRIVER_IFP7XX_SERIES) */
 357 int rolo_load(const char* filename)
 358 {
 359     /* dummy */
 360     (void)filename;
 361     return 0;
 362 }
 363
 364 #endif /* !defined(IRIVER_IFP7XX_SERIES) */