firmware/target/mips/ingenic_jz47xx/usb-jz4740.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2008 by Maurus Cuelenaere
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include "config.h"
  23 /*#define LOGF_ENABLE*/
  24 #include "logf.h"
  25 #include "system.h"
  26 #include "usb_ch9.h"
  27 #include "usb_drv.h"
  28 #include "usb_core.h"
  29 #include "usb-target.h"
  30 #include "jz4740.h"
  31 #include "thread.h"
  32
  33 /*
  34     The Jz4740 USB controller is called MUSBHSFC in the datasheet.
  35     It also seems to be a more generic controller, with support for
  36     up to 15 endpoints (the Jz4740 only has 5).
  37 */
  38
  39 #define EP_BUF_LEFT(ep)  ((ep)->length - (ep)->sent)
  40 #define EP_PTR(ep)       ((void*)((unsigned int)(ep)->buf + (ep)->sent))
  41 #define EP_NUMBER(ep)    (((int)(ep) - (int)&endpoints[0])/sizeof(struct usb_endpoint))
  42 #define EP_NUMBER2(ep)   (EP_NUMBER((ep))/2)
  43 #define TOTAL_EP()       (sizeof(endpoints)/sizeof(struct usb_endpoint))
  44 #define EP_IS_IN(ep)     (EP_NUMBER((ep))%2)
  45
  46 enum ep_type
  47 {
  48     ep_control,
  49     ep_bulk,
  50     ep_interrupt,
  51     ep_isochronous
  52 };
  53
  54 struct usb_endpoint
  55 {
  56     void *buf;
  57     size_t length;
  58     union
  59     {
  60         size_t sent;
  61         size_t received;
  62     };
  63     bool busy;
  64
  65     const enum ep_type type;
  66     const bool use_dma;
  67
  68     const long fifo_addr;
  69     unsigned short fifo_size;
  70
  71     bool wait;
  72     struct wakeup wakeup;
  73 };
  74
  75 static unsigned char ep0_rx_buf[64];
  76 static struct usb_endpoint endpoints[] =
  77 {
  78     { .type = ep_control,   .fifo_addr = USB_FIFO_EP0, .fifo_size = 64 },
  79     { .type = ep_control,   .fifo_addr = USB_FIFO_EP0, .buf = &ep0_rx_buf },
  80     { .type = ep_bulk,      .fifo_addr = USB_FIFO_EP1, .fifo_size = 512 },
  81     { .type = ep_bulk,      .fifo_addr = USB_FIFO_EP1, .fifo_size = 512 },
  82     { .type = ep_interrupt, .fifo_addr = USB_FIFO_EP2, .fifo_size = 64 },
  83 };
  84
  85 static inline void select_endpoint(int ep)
  86 {
  87     REG_USB_REG_INDEX = ep;
  88 }
  89
  90 static void readFIFO(struct usb_endpoint *ep, unsigned int size)
  91 {
  92     logf("%s(EP%d, %d)", __func__, EP_NUMBER2(ep), size);
  93
  94     register unsigned char *ptr = (unsigned char*)EP_PTR(ep);
  95     register unsigned int *ptr32 = (unsigned int*)ptr;
  96     register unsigned int s = size >> 2;
  97     register unsigned int x;
  98
  99     if(size > 0)
 100     {
 101         if( ((unsigned int)ptr & 3) == 0 )
 102         {
 103             while(s--)
 104                 *ptr32++ = REG32(ep->fifo_addr);
 105
 106             ptr = (unsigned char*)ptr32;
 107         }
 108         else
 109         {
 110             while(s--)
 111             {
 112                 x = REG32(ep->fifo_addr);
 113                 *ptr++ = x & 0xFF; x >>= 8;
 114                 *ptr++ = x & 0xFF; x >>= 8;
 115                 *ptr++ = x & 0xFF; x >>= 8;
 116                 *ptr++ = x;
 117             }
 118         }
 119
 120         s = size & 3;
 121         while(s--)
 122             *ptr++ = REG8(ep->fifo_addr);
 123     }
 124 }
 125
 126 static void writeFIFO(struct usb_endpoint *ep, size_t size)
 127 {
 128     logf("%s(EP%d, %d)", __func__, EP_NUMBER2(ep), size);
 129
 130     register unsigned int *d32 = (unsigned int *)EP_PTR(ep);
 131     register size_t s = size >> 2;
 132
 133     if(size > 0)
 134     {
 135         while (s--)
 136             REG32(ep->fifo_addr) = *d32++;
 137
 138         if( (s = size & 3) )
 139         {
 140             register unsigned char *d8 = (unsigned char *)d32;
 141             while (s--)
 142                 REG8(ep->fifo_addr) = *d8++;
 143         }
 144     }
 145 }
 146
 147 static void flushFIFO(struct usb_endpoint *ep)
 148 {
 149     logf("%s(%d)", __func__, EP_NUMBER(ep));
 150
 151     switch (ep->type)
 152     {
 153         case ep_control:
 154         break;
 155
 156         case ep_bulk:
 157         case ep_interrupt:
 158         case ep_isochronous:
 159             if(EP_IS_IN(ep))
 160                 REG_USB_REG_INCSR |= (USB_INCSR_FF | USB_INCSR_CDT);
 161             else
 162                 REG_USB_REG_OUTCSR |= (USB_OUTCSR_FF | USB_OUTCSR_CDT);
 163         break;
 164     }
 165 }
 166
 167 static inline void ep_transfer_completed(struct usb_endpoint* ep)
 168 {
 169     ep->sent   = 0;
 170     ep->length = 0;
 171     ep->buf    = NULL;
 172     ep->busy   = false;
 173     if(ep->wait)
 174         wakeup_signal(&ep->wakeup);
 175 }
 176
 177 static void EP0_send(void)
 178 {
 179     struct usb_endpoint* ep = &endpoints[0];
 180     unsigned int length;
 181     unsigned char csr0;
 182
 183     select_endpoint(0);
 184     csr0 = REG_USB_REG_CSR0;
 185
 186     if(ep->sent == 0)
 187         length = MIN(ep->length, ep->fifo_size);
 188     else
 189         length = MIN(EP_BUF_LEFT(ep), ep->fifo_size);
 190
 191     writeFIFO(ep, length);
 192     ep->sent += length;
 193
 194     if(ep->sent >= ep->length)
 195     {
 196         REG_USB_REG_CSR0 = (csr0 | USB_CSR0_INPKTRDY | USB_CSR0_DATAEND); /* Set data end! */
 197         usb_core_transfer_complete(0, USB_DIR_IN, 0, ep->sent);
 198         ep_transfer_completed(ep);
 199     }
 200     else
 201         REG_USB_REG_CSR0 = (csr0 | USB_CSR0_INPKTRDY);
 202 }
 203
 204 static void EP0_handler(void)
 205 {
 206     logf("%s()", __func__);
 207
 208     unsigned char csr0;
 209     struct usb_endpoint *ep_send = &endpoints[0];
 210     struct usb_endpoint *ep_recv = &endpoints[1];
 211
 212     /* Read CSR0 */
 213     select_endpoint(0);
 214     csr0 = REG_USB_REG_CSR0;
 215
 216     /* Check for SentStall:
 217         This bit is set when a STALL handshake is transmitted. The CPU should clear this bit.
 218      */
 219     if(csr0 & USB_CSR0_SENTSTALL)
 220     {
 221         REG_USB_REG_CSR0 = csr0 & ~USB_CSR0_SENTSTALL;
 222         return;
 223     }
 224
 225     /* Check for SetupEnd:
 226         This bit will be set when a control transaction ends before the DataEnd bit has been set.
 227         An interrupt will be generated and the FIFO flushed at this time.
 228         The bit is cleared by the CPU writing a 1 to the ServicedSetupEnd bit.
 229      */
 230     if(csr0 & USB_CSR0_SETUPEND)
 231     {
 232         REG_USB_REG_CSR0 = csr0 | USB_CSR0_SVDSETUPEND;
 233         return;
 234     }
 235
 236     /* Call relevant routines for endpoint 0 state */
 237     if(ep_send->busy)
 238         EP0_send();
 239     else if(csr0 & USB_CSR0_OUTPKTRDY)   /* There is a packet in the fifo */
 240     {
 241         readFIFO(ep_recv, REG_USB_REG_COUNT0);
 242         REG_USB_REG_CSR0 = csr0 | USB_CSR0_SVDOUTPKTRDY; /* clear OUTPKTRDY bit */
 243         usb_core_control_request((struct usb_ctrlrequest*)ep_recv->buf);
 244     }
 245 }
 246
 247 static void EPIN_handler(unsigned int endpoint)
 248 {
 249     struct usb_endpoint* ep = &endpoints[endpoint*2];
 250     unsigned int length, csr;
 251
 252     select_endpoint(endpoint);
 253     csr = REG_USB_REG_INCSR;
 254     logf("%s(%d): 0x%x", __func__, endpoint, csr);
 255
 256     if(!ep->busy)
 257     {
 258         logf("Entered EPIN handler without work!");
 259         return;
 260     }
 261
 262     if(csr & USB_INCSR_SENTSTALL)
 263     {
 264         REG_USB_REG_INCSR = csr & ~USB_INCSR_SENTSTALL;
 265         return;
 266     }
 267
 268     if(ep->use_dma)
 269         return;
 270
 271     if(csr & USB_INCSR_FFNOTEMPT)
 272     {
 273         logf("FIFO is not empty! 0x%x", csr);
 274         return;
 275     }
 276
 277     logf("EP%d: %d -> %d", endpoint, ep->sent, ep->length);
 278
 279     if(ep->sent == 0)
 280         length = MIN(ep->length, ep->fifo_size);
 281     else
 282         length = MIN(EP_BUF_LEFT(ep), ep->fifo_size);
 283
 284     writeFIFO(ep, length);
 285     REG_USB_REG_INCSR = csr | USB_INCSR_INPKTRDY;
 286     ep->sent += length;
 287
 288     if(ep->sent >= ep->length)
 289     {
 290         usb_core_transfer_complete(endpoint, USB_DIR_IN, 0, ep->sent);
 291         ep_transfer_completed(ep);
 292         logf("sent complete");
 293     }
 294 }
 295
 296 static void EPOUT_handler(unsigned int endpoint)
 297 {
 298     struct usb_endpoint* ep = &endpoints[endpoint*2+1];
 299     unsigned int size, csr;
 300
 301     if(!ep->busy)
 302     {
 303         logf("Entered EPOUT handler without work!");
 304         return;
 305     }
 306
 307     select_endpoint(endpoint);
 308     while((csr = REG_USB_REG_OUTCSR) & (USB_OUTCSR_SENTSTALL|USB_OUTCSR_OUTPKTRDY))
 309     {
 310         logf("%s(%d): 0x%x", __func__, endpoint, csr);
 311         if(csr & USB_OUTCSR_SENTSTALL)
 312         {
 313             logf("stall sent, flushing fifo..");
 314             flushFIFO(ep);
 315             REG_USB_REG_OUTCSR = csr & ~USB_OUTCSR_SENTSTALL;
 316             return;
 317         }
 318
 319         if(ep->use_dma)
 320             return;
 321
 322         if(csr & USB_OUTCSR_OUTPKTRDY) /* There is a packet in the fifo */
 323         {
 324             size = REG_USB_REG_OUTCOUNT;
 325
 326             readFIFO(ep, size);
 327             ep->received += size;
 328
 329             /*if(csr & USB_OUTCSR_FFFULL)
 330                 csr &= ~USB_OUTCSR_FFFULL;*/
 331
 332             REG_USB_REG_OUTCSR = csr & ~USB_OUTCSR_OUTPKTRDY;
 333
 334             logf("received: %d max length: %d", ep->received, ep->length);
 335
 336             if(size < ep->fifo_size || ep->received >= ep->length)
 337             {
 338                 usb_core_transfer_complete(endpoint, USB_DIR_OUT, 0, ep->received);
 339                 ep_transfer_completed(ep);
 340                 logf("receive transfer_complete");
 341             }
 342         }
 343     }
 344 }
 345
 346 static void EPDMA_handler(int number)
 347 {
 348     int endpoint = -1;
 349     unsigned int size = 0;
 350
 351     if(number == USB_INTR_DMA_BULKIN)
 352         endpoint = (REG_USB_REG_CNTL1 >> 4) & 0xF;
 353     else if(number == USB_INTR_DMA_BULKOUT)
 354         endpoint = (REG_USB_REG_CNTL2 >> 4) & 0xF;
 355
 356     struct usb_endpoint* ep = &endpoints[endpoint];
 357     logf("DMA_BULK%d %d", number, endpoint);
 358
 359     if(number == USB_INTR_DMA_BULKIN)
 360         size = (unsigned int)ep->buf - REG_USB_REG_ADDR1;
 361     else if(number == USB_INTR_DMA_BULKOUT)
 362         size = (unsigned int)ep->buf - REG_USB_REG_ADDR2;
 363
 364     if(number == USB_INTR_DMA_BULKOUT)
 365     {
 366         /* Disable DMA */
 367         REG_USB_REG_CNTL2 = 0;
 368
 369         __dcache_invalidate_all();
 370
 371         select_endpoint(endpoint);
 372         /* Read out last packet manually */
 373         unsigned int lpack_size = REG_USB_REG_OUTCOUNT;
 374         if(lpack_size > 0)
 375         {
 376             ep->buf += ep->length - lpack_size;
 377             readFIFO(ep, lpack_size);
 378             REG_USB_REG_OUTCSR &= ~USB_OUTCSR_OUTPKTRDY;
 379         }
 380     }
 381     else if(number == USB_INTR_DMA_BULKIN && size % ep->fifo_size)
 382     {
 383         /* If the last packet is less than MAXP, set INPKTRDY manually */
 384         REG_USB_REG_INCSR |= USB_INCSR_INPKTRDY;
 385     }
 386
 387     usb_core_transfer_complete(endpoint, EP_IS_IN(ep) ? USB_DIR_IN : USB_DIR_OUT,
 388                                0, ep->length);
 389     ep_transfer_completed(ep);
 390 }
 391
 392 static void setup_endpoint(struct usb_endpoint *ep)
 393 {
 394     int csr, csrh;
 395
 396     select_endpoint(EP_NUMBER2(ep));
 397
 398     ep->busy = false;
 399     ep->wait = false;
 400     ep->sent = 0;
 401     ep->length = 0;
 402
 403     if(ep->type == ep_bulk)
 404     {
 405         if(REG_USB_REG_POWER & USB_POWER_HSMODE)
 406             ep->fifo_size = 512;
 407         else
 408             ep->fifo_size = 64;
 409     }
 410
 411     if(EP_IS_IN(ep))
 412     {
 413         csr = (USB_INCSR_FF | USB_INCSR_CDT);
 414         csrh = USB_INCSRH_MODE;
 415
 416         if(ep->use_dma)
 417             csrh |= (USB_INCSRH_DMAREQENAB | USB_INCSRH_AUTOSET | USB_INCSRH_DMAREQMODE);
 418
 419         if(ep->type == ep_interrupt)
 420             csrh |= USB_INCSRH_FRCDATATOG;
 421
 422         REG_USB_REG_INMAXP   = ep->fifo_size;
 423         REG_USB_REG_INCSR    = csr;
 424         REG_USB_REG_INCSRH   = csrh;
 425         REG_USB_REG_INTRINE |= USB_INTR_EP(EP_NUMBER2(ep));
 426     }
 427     else
 428     {
 429         csr = (USB_OUTCSR_FF | USB_OUTCSR_CDT);
 430         csrh = 0;
 431
 432         if(ep->type == ep_interrupt)
 433             csrh |= USB_OUTCSRH_DNYT;
 434
 435         if(ep->use_dma)
 436             csrh |= (USB_OUTCSRH_DMAREQENAB | USB_OUTCSRH_AUTOCLR | USB_OUTCSRH_DMAREQMODE);
 437
 438         REG_USB_REG_OUTMAXP   = ep->fifo_size;
 439         REG_USB_REG_OUTCSR    = csr;
 440         REG_USB_REG_OUTCSRH   = csrh;
 441         REG_USB_REG_INTROUTE |= USB_INTR_EP(EP_NUMBER2(ep));
 442     }
 443 }
 444
 445 static void udc_reset(void)
 446 {
 447     /* From the datasheet:
 448
 449        When a reset condition is detected on the USB, the controller performs the following actions:
 450            * Sets FAddr to 0.
 451            * Sets Index to 0.
 452            * Flushes all endpoint FIFOs.
 453            * Clears all control/status registers.
 454            * Enables all endpoint interrupts.
 455            * Generates a Reset interrupt.
 456     */
 457
 458     logf("%s()", __func__);
 459
 460     unsigned int i;
 461
 462     /* Disable interrupts */
 463     REG_USB_REG_INTRINE  = 0;
 464     REG_USB_REG_INTROUTE = 0;
 465     REG_USB_REG_INTRUSBE = 0;
 466
 467     /* Disable DMA */
 468     REG_USB_REG_CNTL1 = 0;
 469     REG_USB_REG_CNTL2 = 0;
 470
 471     /* High speed, softconnect and suspend/resume */
 472     REG_USB_REG_POWER = (USB_POWER_SOFTCONN | USB_POWER_HSENAB | USB_POWER_SUSPENDM);
 473
 474     /* Reset EP0 */
 475     select_endpoint(0);
 476     REG_USB_REG_CSR0 = (USB_CSR0_SVDOUTPKTRDY | USB_CSR0_SVDSETUPEND);
 477
 478     /* Reset other endpoints */
 479     for(i=2; i<TOTAL_EP(); i++)
 480         setup_endpoint(&endpoints[i]);
 481
 482     /* Enable interrupts */
 483     REG_USB_REG_INTRINE  |= USB_INTR_EP0;
 484     REG_USB_REG_INTRUSBE |= USB_INTR_RESET;
 485
 486     usb_core_bus_reset();
 487 }
 488
 489 /* Interrupt handler */
 490 void UDC(void)
 491 {
 492     /* Read interrupt registers */
 493     unsigned char    intrUSB = REG_USB_REG_INTRUSB & 0x07; /* Mask SOF */
 494     unsigned short   intrIn  = REG_USB_REG_INTRIN;
 495     unsigned short   intrOut = REG_USB_REG_INTROUT;
 496     unsigned char    intrDMA = REG_USB_REG_INTR;
 497
 498     logf("%x %x %x %x", intrUSB, intrIn, intrOut, intrDMA);
 499
 500     /* EPIN & EPOUT are all handled in DMA */
 501     if(intrIn & USB_INTR_EP0)
 502         EP0_handler();
 503     if(intrIn & USB_INTR_INEP1)
 504         EPIN_handler(1);
 505     if(intrIn & USB_INTR_INEP2)
 506         EPIN_handler(2);
 507     if(intrOut & USB_INTR_OUTEP1)
 508         EPOUT_handler(1);
 509     if(intrOut & USB_INTR_OUTEP2)
 510         EPOUT_handler(2);
 511     if(intrUSB & USB_INTR_RESET)
 512         udc_reset();
 513     if(intrUSB & USB_INTR_SUSPEND)
 514     {
 515         logf("USB suspend");
 516     }
 517     if(intrUSB & USB_INTR_RESUME)
 518     {
 519         logf("USB resume");
 520     }
 521     if(intrDMA & USB_INTR_DMA_BULKIN)
 522         EPDMA_handler(USB_INTR_DMA_BULKIN);
 523     if(intrDMA & USB_INTR_DMA_BULKOUT)
 524         EPDMA_handler(USB_INTR_DMA_BULKOUT);
 525 }
 526
 527 bool usb_drv_stalled(int endpoint, bool in)
 528 {
 529     endpoint &= 0x7F;
 530
 531     logf("%s(%d, %s)", __func__, endpoint, in?"IN":"OUT");
 532
 533     select_endpoint(endpoint);
 534
 535     if(endpoint == EP_CONTROL)
 536         return (REG_USB_REG_CSR0 & USB_CSR0_SENDSTALL) != 0;
 537     else
 538     {
 539         if(in)
 540             return (REG_USB_REG_INCSR & USB_INCSR_SENDSTALL) != 0;
 541         else
 542             return (REG_USB_REG_OUTCSR & USB_OUTCSR_SENDSTALL) != 0;
 543     }
 544 }
 545
 546 void usb_drv_stall(int endpoint, bool stall, bool in)
 547 {
 548     endpoint &= 0x7F;
 549
 550     logf("%s(%d,%s,%s)", __func__, endpoint, stall?"Y":"N", in?"IN":"OUT");
 551
 552     select_endpoint(endpoint);
 553
 554     if(endpoint == EP_CONTROL)
 555     {
 556         if(stall)
 557             REG_USB_REG_CSR0 |= USB_CSR0_SENDSTALL;
 558         else
 559             REG_USB_REG_CSR0 &= ~USB_CSR0_SENDSTALL;
 560     }
 561     else
 562     {
 563         if(in)
 564         {
 565             if(stall)
 566                 REG_USB_REG_INCSR |= USB_INCSR_SENDSTALL;
 567             else
 568                 REG_USB_REG_INCSR = (REG_USB_REG_INCSR & ~USB_INCSR_SENDSTALL) | USB_INCSR_CDT;
 569         }
 570         else
 571         {
 572             if(stall)
 573                 REG_USB_REG_OUTCSR |= USB_OUTCSR_SENDSTALL;
 574             else
 575                 REG_USB_REG_OUTCSR = (REG_USB_REG_OUTCSR & ~USB_OUTCSR_SENDSTALL) | USB_OUTCSR_CDT;
 576         }
 577     }
 578 }
 579
 580 bool usb_drv_connected(void)
 581 {
 582     return USB_DRV_CONNECTED();
 583 }
 584
 585 int usb_detect(void)
 586 {
 587     return usb_drv_connected() ? USB_INSERTED : USB_EXTRACTED;
 588 }
 589
 590 void usb_init_device(void)
 591 {
 592     unsigned int i;
 593
 594     USB_INIT_GPIO();
 595 #ifdef USB_GPIO_IRQ
 596     system_enable_irq(IRQ_GPIO_UDC_DETE);
 597 #endif
 598     system_enable_irq(IRQ_UDC);
 599
 600     for(i=0; i<TOTAL_EP(); i++)
 601         wakeup_init(&endpoints[i].wakeup);
 602 }
 603
 604 #ifdef USB_GPIO_IRQ
 605 static unsigned long last_tick;
 606 void USB_GPIO_IRQ(void)
 607 {
 608     /* Prevent enabled-disabled bouncing */
 609     if(current_tick - last_tick > HZ/16)
 610     {
 611         usb_status_event(usb_detect());
 612         last_tick = current_tick;
 613     }
 614 }
 615 #endif
 616
 617 void usb_enable(bool on)
 618 {
 619     if(on)
 620         usb_core_init();
 621     else
 622         usb_core_exit();
 623 }
 624
 625 void usb_attach(void)
 626 {
 627     usb_enable(true);
 628 }
 629
 630 void usb_drv_init(void)
 631 {
 632     logf("%s()", __func__);
 633
 634     /* Set this bit to allow the UDC entering low-power mode when
 635      * there are no actions on the USB bus.
 636      * UDC still works during this bit was set.
 637      */
 638     //__cpm_stop_udc();
 639     __cpm_start_udc();
 640
 641     /* Enable the USB PHY */
 642     REG_CPM_SCR |= CPM_SCR_USBPHY_ENABLE;
 643
 644     /* Dis- and reconnect from USB */
 645     REG_USB_REG_POWER &= ~USB_POWER_SOFTCONN;
 646     REG_USB_REG_POWER |= USB_POWER_SOFTCONN;
 647
 648     udc_reset();
 649 }
 650
 651 void usb_drv_exit(void)
 652 {
 653     logf("%s()", __func__);
 654
 655     /* Disable interrupts */
 656     REG_USB_REG_INTRINE  = 0;
 657     REG_USB_REG_INTROUTE = 0;
 658     REG_USB_REG_INTRUSBE = 0;
 659
 660     /* Disable DMA */
 661     REG_USB_REG_CNTL1 = 0;
 662     REG_USB_REG_CNTL2 = 0;
 663
 664     /* Disconnect from USB */
 665     REG_USB_REG_POWER &= ~USB_POWER_SOFTCONN;
 666
 667     /* Disable the USB PHY */
 668     REG_CPM_SCR &= ~CPM_SCR_USBPHY_ENABLE;
 669
 670     __cpm_stop_udc();
 671 }
 672
 673 void usb_drv_set_address(int address)
 674 {
 675     logf("%s(%d)", __func__, address);
 676
 677     REG_USB_REG_FADDR = address;
 678 }
 679
 680 static void usb_drv_send_internal(struct usb_endpoint* ep, void* ptr, int length, bool blocking)
 681 {
 682     if(ep->type == ep_control && ptr == NULL && length == 0)
 683         return; /* ACK request, handled in the ISR */
 684
 685     int flags = disable_irq_save();
 686
 687     ep->buf = ptr;
 688     ep->sent = 0;
 689     ep->length = length;
 690     ep->busy = true;
 691     if(blocking)
 692         ep->wait = true;
 693
 694     if(ep->type == ep_control)
 695     {
 696         EP0_send();
 697     }
 698     else
 699     {
 700         if(ep->use_dma)
 701         {
 702             //dma_cache_wback_inv((unsigned long)ptr, length);
 703             __dcache_writeback_all();
 704             REG_USB_REG_ADDR1 = PHYSADDR((unsigned long)ptr);
 705             REG_USB_REG_COUNT1 = length;
 706             REG_USB_REG_CNTL1 = (USB_CNTL_INTR_EN | USB_CNTL_MODE_1 |
 707                                  USB_CNTL_DIR_IN  | USB_CNTL_ENA |
 708                                  USB_CNTL_EP(EP_NUMBER2(ep)) | USB_CNTL_BURST_16);
 709         }
 710         else
 711             EPIN_handler(EP_NUMBER2(ep));
 712     }
 713
 714     restore_irq(flags);
 715
 716     if(blocking)
 717     {
 718         wakeup_wait(&ep->wakeup, TIMEOUT_BLOCK);
 719         ep->wait = false;
 720     }
 721 }
 722
 723 int usb_drv_send_nonblocking(int endpoint, void* ptr, int length)
 724 {
 725     logf("%s(%d, 0x%x, %d)", __func__, endpoint, (int)ptr, length);
 726
 727     usb_drv_send_internal(&endpoints[(endpoint & 0x7F)*2], ptr, length, false);
 728
 729     return 0;
 730 }
 731
 732 int usb_drv_send(int endpoint, void* ptr, int length)
 733 {
 734     logf("%s(%d, 0x%x, %d)", __func__, endpoint, (int)ptr, length);
 735
 736     usb_drv_send_internal(&endpoints[(endpoint & 0x7F)*2], ptr, length, true);
 737
 738     return 0;
 739 }
 740
 741 int usb_drv_recv(int endpoint, void* ptr, int length)
 742 {
 743     int flags;
 744     struct usb_endpoint *ep;
 745     endpoint &= 0x7F;
 746
 747     logf("%s(%d, 0x%x, %d)", __func__, endpoint, (int)ptr, length);
 748
 749     if(endpoint == EP_CONTROL)
 750         return 0; /* all EP0 OUT transactions are handled within the ISR */
 751     else
 752     {
 753         flags = disable_irq_save();
 754         ep = &endpoints[endpoint*2+1];
 755
 756         ep->buf = ptr;
 757         ep->received = 0;
 758         ep->length = length;
 759         ep->busy = true;
 760         if(ep->use_dma)
 761         {
 762             //dma_cache_wback_inv((unsigned long)ptr, length);
 763             __dcache_writeback_all();
 764             REG_USB_REG_ADDR2 = PHYSADDR((unsigned long)ptr);
 765             REG_USB_REG_COUNT2 = length;
 766             REG_USB_REG_CNTL2 = (USB_CNTL_INTR_EN | USB_CNTL_MODE_1 |
 767                                  USB_CNTL_ENA | USB_CNTL_EP(endpoint) |
 768                                  USB_CNTL_BURST_16);
 769         }
 770         else
 771             EPOUT_handler(endpoint);
 772
 773         restore_irq(flags);
 774         return 0;
 775     }
 776 }
 777
 778 void usb_drv_set_test_mode(int mode)
 779 {
 780     logf("%s(%d)", __func__, mode);
 781
 782     switch(mode)
 783     {
 784         case 0:
 785             REG_USB_REG_TESTMODE &= ~USB_TEST_ALL;
 786             break;
 787         case 1:
 788             REG_USB_REG_TESTMODE |= USB_TEST_J;
 789             break;
 790         case 2:
 791             REG_USB_REG_TESTMODE |= USB_TEST_K;
 792             break;
 793         case 3:
 794             REG_USB_REG_TESTMODE |= USB_TEST_SE0NAK;
 795             break;
 796         case 4:
 797             REG_USB_REG_TESTMODE |= USB_TEST_PACKET;
 798             break;
 799     }
 800 }
 801
 802 int usb_drv_port_speed(void)
 803 {
 804     return (REG_USB_REG_POWER & USB_POWER_HSMODE) ? 1 : 0;
 805 }
 806
 807 void usb_drv_cancel_all_transfers(void)
 808 {
 809     logf("%s()", __func__);
 810
 811     unsigned int i, flags;
 812     flags = disable_irq_save();
 813
 814     for(i=0; i<TOTAL_EP(); i++)
 815     {
 816         if(i != 1) /* ep0 out needs special handling */
 817             endpoints[i].buf = NULL;
 818
 819         endpoints[i].sent = 0;
 820         endpoints[i].length = 0;
 821
 822         select_endpoint(i/2);
 823         flushFIFO(&endpoints[i]);
 824     }
 825     restore_irq(flags);
 826 }
 827
 828 void usb_drv_release_endpoint(int ep)
 829 {
 830     (void)ep;
 831     logf("%s(%d, %s)", __func__, (ep & 0x7F), (ep >> 7) ? "IN" : "OUT");
 832 }
 833
 834 int usb_drv_request_endpoint(int type, int dir)
 835 {
 836     logf("%s(%d, %s)", __func__, type, (dir == USB_DIR_IN) ? "IN" : "OUT");
 837
 838     dir  &= USB_ENDPOINT_DIR_MASK;
 839     type &= USB_ENDPOINT_XFERTYPE_MASK;
 840
 841     /* There are only 3+2 endpoints, so hardcode this ... */
 842     switch(type)
 843     {
 844         case USB_ENDPOINT_XFER_BULK:
 845             if(dir == USB_DIR_IN)
 846                 return (1 | USB_DIR_IN);
 847             else
 848                 return (1 | USB_DIR_OUT);
 849
 850         case USB_ENDPOINT_XFER_INT:
 851             if(dir == USB_DIR_IN)
 852                 return (2 | USB_DIR_IN);
 853
 854         default:
 855             return -1;
 856     }
 857 }