firmware/target/arm/as3525/debug-as3525.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright © 2008 Rafaël Carré
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include <stdbool.h>
  23 #include "debug-target.h"
  24 #include "button.h"
  25 #include "lcd.h"
  26 #include "font.h"
  27 #include "system.h"
  28 #include "sprintf.h"
  29 #include "cpu.h"
  30 #include "pl180.h"
  31 #include "ascodec-target.h"
  32 #include "adc.h"
  33
  34 #define ON "Enabled"
  35 #define OFF "Disabled"
  36
  37 #define CP15_MMU (1<<0)            /* mmu off/on */
  38 #define CP15_DC  (1<<2)            /* dcache off/on */
  39 #define CP15_IC  (1<<12)           /* icache off/on */
  40
  41 #define CLK_MAIN         24000000     /* 24 MHz  */
  42
  43 #define CLK_PLLA             0
  44 #define CLK_PLLB             1
  45 #define CLK_922T             2
  46 #define CLK_FCLK             3
  47 #define CLK_EXTMEM           4
  48 #define CLK_PCLK             5
  49 #define CLK_IDE              6
  50 #define CLK_I2C              7
  51 #define CLK_I2SI             8
  52 #define CLK_I2SO             9
  53 #define CLK_DBOP             10
  54 #define CLK_SD_MCLK_NAND    11
  55 #define CLK_SD_MCLK_MSD     12
  56 #define CLK_USB              13
  57
  58 #define I2C2_CPSR0      *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x1C))
  59 #define I2C2_CPSR1      *((volatile unsigned int *)(I2C_AUDIO_BASE + 0x20))
  60 #define MCI_NAND        *((volatile unsigned long *)(NAND_FLASH_BASE + 0x04))
  61 #define MCI_SD          *((volatile unsigned long *)(SD_MCI_BASE + 0x04))
  62
  63
  64 /* FIXME: target tree is including ./debug-target.h rather than the one in
  65  * sansa-fuze/, even though deps contains the correct one
  66  * if I put the below into a sansa-fuze/debug-target.h, it doesn't work*/
  67 #if defined(SANSA_FUZE) || defined(SANSA_E200V2) || defined(SANSA_C200V2)
  68 #define DEBUG_DBOP
  69 unsigned short button_dbop_data(void);
  70 #endif
  71
  72 static inline unsigned read_cp15 (void)
  73 {
  74     unsigned cp15_value;
  75     asm volatile (
  76         "mrc p15, 0, %0, c1, c0, 0   @ read control reg\n" : "=r"(cp15_value));
  77     return (cp15_value);
  78 }
  79
  80 int calc_freq(int clk)
  81 {
  82     int out_div;
  83     unsigned int prediv = ((unsigned int)CGU_PROC>>2) & 0x3;
  84     unsigned int postdiv = ((unsigned int)CGU_PROC>>4) & 0xf;
  85
  86     switch(clk) {
  87         /* clk_main = clk_int = 24MHz oscillator */
  88         case CLK_PLLA:
  89             if(CGU_PLLASUP & (1<<3))
  90                 return 0;
  91
  92                  /*assume 24MHz oscillator only input available */
  93             out_div = ((CGU_PLLA>>13) & 0x3);         /* bits 13:14 */
  94             if (out_div == 3)                         /* for 11 NO=4  */
  95                 out_div=4;
  96             if(out_div)                               /*  NO = 0 not allowed */
  97                 return ((2 * (CGU_PLLA & 0xff))*CLK_MAIN)/
  98                                                (((CGU_PLLA>>8) & 0x1f)*out_div);
  99             return 0;
 100        case CLK_PLLB:
 101             if(CGU_PLLBSUP & (1<<3))
 102                 return 0;
 103
 104                  /*assume 24MHz oscillator only input available */
 105             out_div = ((CGU_PLLB>>13) & 0x3);         /* bits 13:14 */
 106             if (out_div == 3)                         /* for 11 NO=4  */
 107                 out_div=4;
 108             if(out_div)                               /*  NO = 0 not allowed */
 109                 return ((2 * (CGU_PLLB & 0xff))*CLK_MAIN)/
 110                                                (((CGU_PLLB>>8) & 0x1f)*out_div);
 111             return 0;
 112         case CLK_922T:
 113             if (!(read_cp15()>>30))                 /* fastbus */
 114                 return calc_freq(CLK_PCLK);
 115             else                                    /* Synch or Asynch bus*/
 116                 return calc_freq(CLK_FCLK);
 117         case CLK_FCLK:
 118             switch(CGU_PROC & 3) {
 119                 case 0:
 120                     return (CLK_MAIN * (8 - prediv)) / (8 * (postdiv + 1));
 121                 case 1:
 122                     return (calc_freq(CLK_PLLA) * (8 - prediv)) /
 123                                                             (8 * (postdiv + 1));
 124                 case 2:
 125                     return (calc_freq(CLK_PLLB) * (8 - prediv)) /
 126                                                             (8 * (postdiv + 1));
 127                 default:
 128                     return 0;
 129             }
 130         case CLK_EXTMEM:
 131             switch(CGU_PERI & 3) {
 132                 case 0:
 133                     return CLK_MAIN/(((CGU_PERI>>2)& 0xf)+1);
 134                 case 1:
 135                     return calc_freq(CLK_PLLA)/(((CGU_PERI>>2)& 0xf)+1);
 136                 case 2:
 137                     return calc_freq(CLK_PLLB)/(((CGU_PERI>>2)& 0xf)+1);
 138                 case 3:
 139                     return calc_freq(CLK_FCLK)/(((CGU_PERI>>2)& 0xf)+1);
 140                 default:
 141                     return 0;
 142             }
 143         case CLK_PCLK:
 144             return calc_freq(CLK_EXTMEM)/(((CGU_PERI>>6)& 0x1)+1);
 145         case CLK_IDE:
 146             switch(CGU_IDE & 3) {
 147                 case 0:
 148                     return CLK_MAIN/(((CGU_IDE>>2)& 0xf)+1);
 149                 case 1:
 150                     return calc_freq(CLK_PLLA)/(((CGU_IDE>>2)& 0xf)+1);
 151                 case 2:
 152                     return calc_freq(CLK_PLLB)/(((CGU_IDE>>2)& 0xf)+1);
 153                 default:
 154                     return 0;
 155             }
 156         case CLK_I2C:
 157             return calc_freq(CLK_PCLK)/(I2C2_CPSR1<<8 | I2C2_CPSR0);
 158         case CLK_I2SI:
 159             switch((CGU_AUDIO>>12) & 3) {
 160                 case 0:
 161                     return CLK_MAIN/(((CGU_AUDIO>>14) & 0x1ff)+1);
 162                 case 1:
 163                     return calc_freq(CLK_PLLA)/(((CGU_AUDIO>>14) & 0x1ff)+1);
 164                 case 2:
 165                     return calc_freq(CLK_PLLB)/(((CGU_AUDIO>>14) & 0x1ff)+1);
 166                 default:
 167                     return 0;
 168             }
 169         case CLK_I2SO:
 170             switch(CGU_AUDIO & 3) {
 171                 case 0:
 172                     return CLK_MAIN/(((CGU_AUDIO>>2) & 0x1ff)+1);
 173                 case 1:
 174                     return calc_freq(CLK_PLLA)/(((CGU_AUDIO>>2) & 0x1ff)+1);
 175                 case 2:
 176                     return calc_freq(CLK_PLLB)/(((CGU_AUDIO>>2) & 0x1ff)+1);
 177                 default:
 178                     return 0;
 179             }
 180         case CLK_DBOP:
 181             return calc_freq(CLK_PCLK)/((CGU_DBOP & 7)+1);
 182         case CLK_SD_MCLK_NAND:
 183             if(!(MCI_NAND & (1<<8)))
 184                 return 0;
 185             else if(MCI_NAND & (1<<10))
 186                 return calc_freq(CLK_PCLK);
 187             else
 188                 return calc_freq(CLK_PCLK)/(((MCI_NAND & 0xff)+1)*2);
 189         case CLK_SD_MCLK_MSD:
 190             if(!(MCI_SD & (1<<8)))
 191                 return 0;
 192             else if(MCI_SD & (1<<10))
 193                 return calc_freq(CLK_PCLK);
 194             else
 195             return calc_freq(CLK_PCLK)/(((MCI_SD & 0xff)+1)*2);
 196         case CLK_USB:
 197             switch(CGU_USB & 3) {     /* 0-> div=1  other->div=1/(2*n)  */
 198                 case 0:
 199                     if (!((CGU_USB>>2) & 0xf))
 200                         return CLK_MAIN;
 201                     else
 202                         return CLK_MAIN/(2*((CGU_USB>>2) & 0xf));
 203                 case 1:
 204                     if (!((CGU_USB>>2) & 0xf))
 205                         return calc_freq(CLK_PLLA);
 206                     else
 207                         return calc_freq(CLK_PLLA)/(2*((CGU_USB>>2) & 0xf));
 208                 case 2:
 209                     if (!((CGU_USB>>2) & 0xf))
 210                         return calc_freq(CLK_PLLB);
 211                     else
 212                         return calc_freq(CLK_PLLB)/(2*((CGU_USB>>2) & 0xf));
 213                 default:
 214                     return 0;
 215             }
 216         default:
 217             return 0;
 218         }
 219 }
 220
 221 bool __dbg_hw_info(void)
 222 {
 223     int line;
 224     int last_nand = 0;
 225 #if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2)
 226     int last_sd = 0;
 227 #endif
 228
 229     lcd_clear_display();
 230     lcd_setfont(FONT_SYSFIXED);
 231
 232     while(1)
 233     {
 234         while(1)
 235         {
 236         lcd_clear_display();
 237         line = 0;
 238         lcd_puts(0, line++, "[Clock Frequencies:]");
 239         lcd_puts(0, line++, "      SET       ACTUAL");
 240         lcd_putsf(0, line++, "922T:%s     %3dMHz",
 241                                         (!(read_cp15()>>30)) ? "FAST " :
 242                                         (read_cp15()>>31) ? "ASYNC" : "SYNC ",
 243                                          calc_freq(CLK_922T)/1000000);
 244         lcd_putsf(0, line++, "PLLA:%3dMHz    %3dMHz", AS3525_PLLA_FREQ/1000000,
 245                                                    calc_freq(CLK_PLLA)/1000000);
 246         lcd_putsf(0, line++, "PLLB:          %3dMHz", calc_freq(CLK_PLLB)/1000000);
 247         lcd_putsf(0, line++, "FCLK:          %3dMHz", calc_freq(CLK_FCLK)/1000000);
 248
 249 #if LCD_HEIGHT < 176  /* clip  */
 250         lcd_update();
 251         int btn = button_get_w_tmo(HZ/10);
 252         if(btn == (DEBUG_CANCEL|BUTTON_REL))
 253             goto end;
 254         else if(btn == (BUTTON_DOWN|BUTTON_REL))
 255             break;
 256         }
 257         while(1)
 258         {
 259         lcd_clear_display();
 260         line = 0;
 261 #endif  /*  LCD_HEIGHT < 176 */
 262
 263         lcd_putsf(0, line++, "DRAM:%3dMHz    %3dMHz", AS3525_PCLK_FREQ/1000000,
 264                                                  calc_freq(CLK_EXTMEM)/1000000);
 265         lcd_putsf(0, line++, "PCLK:%3dMHz    %3dMHz", AS3525_PCLK_FREQ/1000000,
 266                                                    calc_freq(CLK_PCLK)/1000000);
 267         lcd_putsf(0, line++, "IDE :%3dMHz    %3dMHz", AS3525_IDE_FREQ/1000000,
 268                                                     calc_freq(CLK_IDE)/1000000);
 269         lcd_putsf(0, line++, "DBOP:%3dMHz    %3dMHz", AS3525_DBOP_FREQ/1000000,
 270                                                    calc_freq(CLK_DBOP)/1000000);
 271         lcd_putsf(0, line++, "I2C :%3dkHz    %3dkHz", AS3525_I2C_FREQ/1000,
 272                                                        calc_freq(CLK_I2C)/1000);
 273         lcd_putsf(0, line++, "I2SI: %s      %3dMHz", (CGU_AUDIO & (1<<23)) ?
 274                                    "on " : "off" , calc_freq(CLK_I2SI)/1000000);
 275
 276 #if LCD_HEIGHT < 176  /* clip  */
 277         lcd_update();
 278         int btn = button_get_w_tmo(HZ/10);
 279         if(btn == (DEBUG_CANCEL|BUTTON_REL))
 280             goto end;
 281         else if(btn == (BUTTON_DOWN|BUTTON_REL))
 282             break;
 283         }
 284         while(1)
 285         {
 286         lcd_clear_display();
 287         line = 0;
 288 #endif  /*  LCD_HEIGHT < 176 */
 289
 290         lcd_putsf(0, line++, "I2SO: %s      %3dMHz", (CGU_AUDIO & (1<<11)) ?
 291                                     "on " : "off", calc_freq(CLK_I2SO)/1000000);
 292         if(MCI_NAND)
 293             last_nand = MCI_NAND;
 294                                                 /*  MCLK == PCLK  */
 295         lcd_putsf(0, line++, "SD  :%3dMHz    %3dMHz",
 296             ((last_nand ? (AS3525_PCLK_FREQ/ 1000000): 0) /
 297             ((last_nand & MCI_CLOCK_BYPASS)? 1:(((last_nand & 0xff)+1) * 2))),
 298             calc_freq(CLK_SD_MCLK_NAND)/1000000);
 299 #if defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_C200V2)
 300         if(MCI_SD)
 301             last_sd = MCI_SD;
 302         lcd_putsf(0, line++, "uSD :%3dMHz    %3dMHz",
 303             ((last_sd ? (AS3525_PCLK_FREQ/ 1000000): 0) /
 304             ((last_sd & MCI_CLOCK_BYPASS) ? 1: (((last_sd & 0xff) + 1) * 2))),
 305             calc_freq(CLK_SD_MCLK_MSD)/1000000);
 306 #endif
 307         lcd_putsf(0, line++, "USB :          %3dMHz", calc_freq(CLK_USB)/1000000);
 308         lcd_putsf(0, line++, "MMU :  %s CVDDP:%4d", (read_cp15() & CP15_MMU) ?
 309                                         " on" : "off", adc_read(ADC_CVDD) * 25);
 310         lcd_putsf(0, line++, "Icache:%s Dcache:%s",
 311                                       (read_cp15() & CP15_IC)  ? " on" : "off",
 312                                       (read_cp15() & CP15_DC)  ? " on" : "off");
 313
 314         lcd_update();
 315         int btn = button_get_w_tmo(HZ/10);
 316         if(btn == (DEBUG_CANCEL|BUTTON_REL))
 317             goto end;
 318         else if(btn == (BUTTON_DOWN|BUTTON_REL))
 319             break;
 320         }
 321         while(1)
 322         {
 323         lcd_clear_display();
 324         line = 0;
 325
 326         lcd_putsf(0, line++, "CGU_PLLA  :%8x", (unsigned int)(CGU_PLLA));
 327         lcd_putsf(0, line++, "CGU_PLLB  :%8x", (unsigned int)(CGU_PLLB));
 328         lcd_putsf(0, line++, "CGU_PROC  :%8x", (unsigned int)(CGU_PROC));
 329         lcd_putsf(0, line++, "CGU_PERI  :%8x", (unsigned int)(CGU_PERI));
 330         lcd_putsf(0, line++, "CGU_IDE   :%8x", (unsigned int)(CGU_IDE));
 331         lcd_putsf(0, line++, "CGU_DBOP  :%8x", (unsigned int)(CGU_DBOP));
 332
 333 #if LCD_HEIGHT < 176  /* clip  */
 334         lcd_update();
 335         int btn = button_get_w_tmo(HZ/10);
 336         if(btn == (DEBUG_CANCEL|BUTTON_REL))
 337             goto end;
 338         else if(btn == (BUTTON_DOWN|BUTTON_REL))
 339             break;
 340         }
 341         while(1)
 342         {
 343         lcd_clear_display();
 344         line = 0;
 345 #endif  /*  LCD_HEIGHT < 176 */
 346
 347         lcd_putsf(0, line++, "CGU_AUDIO :%8x", (unsigned int)(CGU_AUDIO));
 348         lcd_putsf(0, line++, "CGU_USB   :%8x", (unsigned int)(CGU_USB));
 349         lcd_putsf(0, line++, "I2C2_CPSR :%8x", (unsigned int)(I2C2_CPSR1<<8 |
 350                                                        I2C2_CPSR0));
 351         lcd_putsf(0, line++, "MCI_NAND  :%8x", (unsigned int)(MCI_NAND));
 352         lcd_putsf(0, line++, "MCI_SD    :%8x", (unsigned int)(MCI_SD));
 353
 354         lcd_update();
 355         int btn = button_get_w_tmo(HZ/10);
 356         if(btn == (DEBUG_CANCEL|BUTTON_REL))
 357             goto end;
 358         else if(btn == (BUTTON_DOWN|BUTTON_REL))
 359             break;
 360         }
 361     }
 362
 363 end:
 364     lcd_setfont(FONT_UI);
 365     return false;
 366 }
 367
 368 bool __dbg_ports(void)
 369 {
 370     int line;
 371
 372     lcd_clear_display();
 373     lcd_setfont(FONT_SYSFIXED);
 374
 375     while(1)
 376     {
 377         line = 0;
 378         lcd_puts(0, line++, "[GPIO Values and Directions]");
 379         lcd_putsf(0, line++, "GPIOA: %2x DIR: %2x", GPIOA_DATA, GPIOA_DIR);
 380         lcd_putsf(0, line++, "GPIOB: %2x DIR: %2x", GPIOB_DATA, GPIOB_DIR);
 381         lcd_putsf(0, line++, "GPIOC: %2x DIR: %2x", GPIOC_DATA, GPIOC_DIR);
 382         lcd_putsf(0, line++, "GPIOD: %2x DIR: %2x", GPIOD_DATA, GPIOD_DIR);
 383 #ifdef DEBUG_DBOP
 384         line++;
 385         lcd_puts(0, line++, "[DBOP_DIN]");
 386         lcd_putsf(0, line++, "DBOP_DIN: %4x", button_dbop_data());
 387 #endif
 388         line++;
 389         lcd_puts(0, line++, "[CP15]");
 390         lcd_putsf(0, line++, "CP15: 0x%8x", read_cp15());
 391         lcd_update();
 392         if (button_get_w_tmo(HZ/10) == (DEBUG_CANCEL|BUTTON_REL))
 393             break;
 394     }
 395     lcd_setfont(FONT_UI);
 396     return false;
 397 }