firmware/target/arm/as3525/sd-as3525.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2006 Daniel Ankers
  11  * Copyright © 2008-2009 Rafaël Carré
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; either version 2
  16  * of the License, or (at your option) any later version.
  17  *
  18  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  19  * KIND, either express or implied.
  20  *
  21  ****************************************************************************/
  22
  23 /* Driver for the ARM PL180 SD/MMC controller inside AS3525 SoC */
  24
  25 #include "config.h" /* for HAVE_MULTIDRIVE & AMS_OF_SIZE */
  26 #include "fat.h"
  27 #include "thread.h"
  28 #include "led.h"
  29 #include "hotswap.h"
  30 #include "system.h"
  31 #include "cpu.h"
  32 #include <stdio.h>
  33 #include <stdlib.h>
  34 #include <string.h>
  35 #include "as3525.h"
  36 #include "pl180.h"  /* SD controller */
  37 #include "pl081.h"  /* DMA controller */
  38 #include "dma-target.h" /* DMA request lines */
  39 #include "clock-target.h"
  40 #include "panic.h"
  41 #ifdef HAVE_BUTTON_LIGHT
  42 #include "backlight-target.h"
  43 #endif
  44 #include "stdbool.h"
  45 #include "ata_idle_notify.h"
  46 #include "sd.h"
  47 #include "usb.h"
  48
  49 #ifdef HAVE_HOTSWAP
  50 #include "disk.h"
  51 #endif
  52
  53 /* command flags */
  54 #define MCI_NO_FLAGS    (0<<0)
  55 #define MCI_RESP        (1<<0)
  56 #define MCI_LONG_RESP   (1<<1)
  57 #define MCI_ARG         (1<<2)
  58
  59 /* ARM PL180 registers */
  60 #define MCI_POWER(i)       (*(volatile unsigned char *) (pl180_base[i]+0x00))
  61 #define MCI_CLOCK(i)       (*(volatile unsigned long *) (pl180_base[i]+0x04))
  62 #define MCI_ARGUMENT(i)    (*(volatile unsigned long *) (pl180_base[i]+0x08))
  63 #define MCI_COMMAND(i)     (*(volatile unsigned long *) (pl180_base[i]+0x0C))
  64 #define MCI_RESPCMD(i)     (*(volatile unsigned long *) (pl180_base[i]+0x10))
  65 #define MCI_RESP0(i)       (*(volatile unsigned long *) (pl180_base[i]+0x14))
  66 #define MCI_RESP1(i)       (*(volatile unsigned long *) (pl180_base[i]+0x18))
  67 #define MCI_RESP2(i)       (*(volatile unsigned long *) (pl180_base[i]+0x1C))
  68 #define MCI_RESP3(i)       (*(volatile unsigned long *) (pl180_base[i]+0x20))
  69 #define MCI_DATA_TIMER(i)  (*(volatile unsigned long *) (pl180_base[i]+0x24))
  70 #define MCI_DATA_LENGTH(i) (*(volatile unsigned short*) (pl180_base[i]+0x28))
  71 #define MCI_DATA_CTRL(i)   (*(volatile unsigned char *) (pl180_base[i]+0x2C))
  72 #define MCI_DATA_CNT(i)    (*(volatile unsigned short*) (pl180_base[i]+0x30))
  73 #define MCI_STATUS(i)      (*(volatile unsigned long *) (pl180_base[i]+0x34))
  74 #define MCI_CLEAR(i)       (*(volatile unsigned long *) (pl180_base[i]+0x38))
  75 #define MCI_MASK0(i)       (*(volatile unsigned long *) (pl180_base[i]+0x3C))
  76 #define MCI_MASK1(i)       (*(volatile unsigned long *) (pl180_base[i]+0x40))
  77 #define MCI_SELECT(i)      (*(volatile unsigned long *) (pl180_base[i]+0x44))
  78 #define MCI_FIFO_CNT(i)    (*(volatile unsigned long *) (pl180_base[i]+0x48))
  79
  80 #define MCI_DATA_ERROR    \
  81     ( MCI_DATA_CRC_FAIL   \
  82     | MCI_DATA_TIMEOUT    \
  83     | MCI_TX_UNDERRUN     \
  84     | MCI_RX_OVERRUN      \
  85     | MCI_START_BIT_ERR)
  86
  87 #define MCI_RESPONSE_ERROR    \
  88     ( MCI_CMD_TIMEOUT         \
  89     | MCI_CMD_CRC_FAIL)
  90
  91 #define MCI_FIFO(i)        ((unsigned long *) (pl180_base[i]+0x80))
  92 /* volumes */
  93 #define     INTERNAL_AS3525 0   /* embedded SD card */
  94 #define     SD_SLOT_AS3525   1   /* SD slot if present */
  95
  96 static const int pl180_base[NUM_DRIVES] = {
  97             NAND_FLASH_BASE
  98 #ifdef HAVE_MULTIDRIVE
  99             , SD_MCI_BASE
 100 #endif
 101 };
 102
 103 static int sd_wait_for_state(const int drive, unsigned int state);
 104 static int sd_select_bank(signed char bank);
 105 static int sd_init_card(const int drive);
 106 static void init_pl180_controller(const int drive);
 107
 108 #define BLOCKS_PER_BANK 0x7a7800u
 109
 110 static tCardInfo card_info[NUM_DRIVES];
 111
 112 /* maximum timeouts recommanded in the SD Specification v2.00 */
 113 #define SD_MAX_READ_TIMEOUT     ((AS3525_PCLK_FREQ) / 1000 * 100) /* 100 ms */
 114 #define SD_MAX_WRITE_TIMEOUT    ((AS3525_PCLK_FREQ) / 1000 * 250) /* 250 ms */
 115
 116 /* for compatibility */
 117 static long last_disk_activity = -1;
 118
 119 #define MIN_YIELD_PERIOD 5  /* ticks */
 120 static long next_yield = 0;
 121
 122 static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x200)/sizeof(long)];
 123 static const char         sd_thread_name[] = "ata/sd";
 124 static struct mutex       sd_mtx;
 125 static struct event_queue sd_queue;
 126 #ifndef BOOTLOADER
 127 bool sd_enabled = false;
 128 #endif
 129
 130 #if defined(HAVE_MULTIDRIVE)
 131 static bool hs_card = false;
 132 #define EXT_SD_BITS (1<<2)
 133 #endif
 134
 135 static struct wakeup transfer_completion_signal;
 136 static volatile unsigned int transfer_error[NUM_VOLUMES];
 137 #define PL180_MAX_TRANSFER_ERRORS 10
 138
 139 #define UNALIGNED_NUM_SECTORS 10
 140 static unsigned char aligned_buffer[UNALIGNED_NUM_SECTORS* SD_BLOCK_SIZE] __attribute__((aligned(32)));   /* align on cache line size */
 141 static unsigned char *uncached_buffer = UNCACHED_ADDR(&aligned_buffer[0]);
 142
 143
 144 static inline void mci_delay(void) { udelay(1000) ; }
 145
 146
 147 static inline bool card_detect_target(void)
 148 {
 149 #if defined(HAVE_MULTIDRIVE)
 150     return !(GPIOA_PIN(2));
 151 #else
 152     return false;
 153 #endif
 154 }
 155
 156
 157 #ifdef HAVE_HOTSWAP
 158 static int sd1_oneshot_callback(struct timeout *tmo)
 159 {
 160     (void)tmo;
 161
 162     /* This is called only if the state was stable for 300ms - check state
 163      * and post appropriate event. */
 164     if (card_detect_target())
 165     {
 166         queue_broadcast(SYS_HOTSWAP_INSERTED, 0);
 167     }
 168     else
 169         queue_broadcast(SYS_HOTSWAP_EXTRACTED, 0);
 170
 171     return 0;
 172 }
 173
 174 void sd_gpioa_isr(void)
 175 {
 176     static struct timeout sd1_oneshot;
 177     if (GPIOA_MIS & EXT_SD_BITS)
 178         timeout_register(&sd1_oneshot, sd1_oneshot_callback, (3*HZ/10), 0);
 179     /* acknowledge interrupt */
 180     GPIOA_IC = EXT_SD_BITS;
 181 }
 182 #endif  /* HAVE_HOTSWAP */
 183
 184 void INT_NAND(void)
 185 {
 186     const int status = MCI_STATUS(INTERNAL_AS3525);
 187
 188     transfer_error[INTERNAL_AS3525] = status & MCI_DATA_ERROR;
 189
 190     wakeup_signal(&transfer_completion_signal);
 191     MCI_CLEAR(INTERNAL_AS3525) = status;
 192 }
 193
 194 #ifdef HAVE_MULTIDRIVE
 195 void INT_MCI0(void)
 196 {
 197     const int status = MCI_STATUS(SD_SLOT_AS3525);
 198
 199     transfer_error[SD_SLOT_AS3525] = status & MCI_DATA_ERROR;
 200
 201     wakeup_signal(&transfer_completion_signal);
 202     MCI_CLEAR(SD_SLOT_AS3525) = status;
 203 }
 204 #endif
 205
 206 static bool send_cmd(const int drive, const int cmd, const int arg,
 207                      const int flags, long *response)
 208 {
 209     int status;
 210
 211     /* Clear old status flags */
 212     MCI_CLEAR(drive) = 0x7ff;
 213
 214     /* Load command argument or clear if none */
 215     MCI_ARGUMENT(drive) = (flags & MCI_ARG) ? arg : 0;
 216
 217     /* Construct MCI_COMMAND & enable CPSM */
 218     MCI_COMMAND(drive) =
 219        /*b0:5*/  cmd
 220        /* b6 */| ((flags & (MCI_RESP|MCI_LONG_RESP)) ? MCI_COMMAND_RESPONSE : 0)
 221        /* b7 */| ((flags & MCI_LONG_RESP) ? MCI_COMMAND_LONG_RESPONSE : 0)
 222        /* b8   | MCI_COMMAND_INTERRUPT */
 223        /* b9   | MCI_COMMAND_PENDING */  /*Only used with stream data transfer*/
 224        /* b10*/| MCI_COMMAND_ENABLE;     /* Enables CPSM */
 225
 226     /* Wait while cmd completes then disable CPSM */
 227     while(MCI_STATUS(drive) & MCI_CMD_ACTIVE);
 228     MCI_COMMAND(drive) = 0;
 229
 230     status = MCI_STATUS(drive);
 231
 232     /*  Handle command responses */
 233     if(flags & MCI_RESP)                   /*  CMD expects response  */
 234     {
 235         response[0] = MCI_RESP0(drive);    /*  Always prepare short response  */
 236
 237         if(status & MCI_RESPONSE_ERROR)    /* timeout or crc failure */
 238             return false;
 239
 240         if(status & MCI_CMD_RESP_END)      /* Response passed CRC check */
 241         {
 242             if(flags & MCI_LONG_RESP)
 243             {   /* response[0] has already been read */
 244                 response[1] = MCI_RESP1(drive);
 245                 response[2] = MCI_RESP2(drive);
 246                 response[3] = MCI_RESP3(drive);
 247             }
 248             return true;
 249         }
 250     }
 251     else if(status & MCI_CMD_SENT)          /* CMD sent, no response required */
 252         return true;
 253
 254     return false;
 255 }
 256
 257 #define MCI_FULLSPEED     (MCI_CLOCK_ENABLE | MCI_CLOCK_BYPASS)     /* MCLK   */
 258 #define MCI_HALFSPEED     (MCI_CLOCK_ENABLE)                        /* MCLK/2 */
 259 #define MCI_QUARTERSPEED  (MCI_CLOCK_ENABLE | 1)                    /* MCLK/4 */
 260 #define MCI_IDENTSPEED    (MCI_CLOCK_ENABLE | AS3525_SD_IDENT_DIV)  /* IDENT  */
 261
 262 static int sd_init_card(const int drive)
 263 {
 264     unsigned long response;
 265     long init_timeout;
 266     bool sd_v2 = false;
 267
 268     /* MCLCK on and set to 400kHz ident frequency  */
 269     MCI_CLOCK(drive) = MCI_IDENTSPEED;
 270
 271     /* 100 - 400kHz clock required for Identification Mode  */
 272     /*  Start of Card Identification Mode ************************************/
 273
 274     /* CMD0 Go Idle  */
 275     if(!send_cmd(drive, SD_GO_IDLE_STATE, 0, MCI_NO_FLAGS, NULL))
 276         return -1;
 277     mci_delay();
 278
 279     /* CMD8 Check for v2 sd card.  Must be sent before using ACMD41
 280       Non v2 cards will not respond to this command*/
 281     if(send_cmd(drive, SD_SEND_IF_COND, 0x1AA, MCI_RESP|MCI_ARG, &response))
 282         if((response & 0xFFF) == 0x1AA)
 283             sd_v2 = true;
 284
 285     /* timeout for initialization is 1sec, from SD Specification 2.00 */
 286     init_timeout = current_tick + HZ;
 287
 288     do {
 289         /* this timeout is the only valid error for this loop*/
 290         if(TIME_AFTER(current_tick, init_timeout))
 291             return -2;
 292
 293         /* app_cmd */
 294         send_cmd(drive, SD_APP_CMD, 0, MCI_RESP|MCI_ARG, &response);
 295
 296         /* ACMD41 For v2 cards set HCS bit[30] & send host voltage range to all */
 297         send_cmd(drive, SD_APP_OP_COND, (0x00FF8000 | (sd_v2 ? 1<<30 : 0)),
 298                         MCI_RESP|MCI_ARG, &card_info[drive].ocr);
 299
 300     } while(!(card_info[drive].ocr & (1<<31)));
 301
 302     /* CMD2 send CID */
 303     if(!send_cmd(drive, SD_ALL_SEND_CID, 0, MCI_RESP|MCI_LONG_RESP|MCI_ARG,
 304                             card_info[drive].cid))
 305         return -3;
 306
 307     /* CMD3 send RCA */
 308     if(!send_cmd(drive, SD_SEND_RELATIVE_ADDR, 0, MCI_RESP|MCI_ARG,
 309                 &card_info[drive].rca))
 310         return -4;
 311
 312     /*  End of Card Identification Mode   ************************************/
 313
 314 #ifdef HAVE_MULTIDRIVE        /*  The internal SDs are v1 */
 315
 316     /* Try to switch V2 cards to HS timings, non HS seem to ignore this */
 317     if(sd_v2)
 318     {
 319         /*  CMD7 w/rca: Select card to put it in TRAN state */
 320         if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
 321             return -5;
 322         mci_delay();
 323
 324         if(sd_wait_for_state(drive, SD_TRAN))
 325             return -6;
 326         /* CMD6 */
 327         if(!send_cmd(drive, SD_SWITCH_FUNC, 0x80fffff1, MCI_ARG, NULL))
 328             return -7;
 329         mci_delay();
 330
 331         /*  go back to STBY state so we can read csd */
 332         /*  CMD7 w/rca=0:  Deselect card to put it in STBY state */
 333         if(!send_cmd(drive, SD_DESELECT_CARD, 0, MCI_ARG, NULL))
 334             return -8;
 335         mci_delay();
 336     }
 337 #endif /*  HAVE_MULTIDRIVE  */
 338
 339     /* CMD9 send CSD */
 340     if(!send_cmd(drive, SD_SEND_CSD, card_info[drive].rca,
 341                  MCI_RESP|MCI_LONG_RESP|MCI_ARG, card_info[drive].csd))
 342         return -9;
 343
 344     sd_parse_csd(&card_info[drive]);
 345
 346 #if defined(HAVE_MULTIDRIVE)
 347     hs_card = (card_info[drive].speed == 50000000);
 348 #endif
 349
 350     /* Boost MCICLK to operating speed */
 351     if(drive == INTERNAL_AS3525)
 352         MCI_CLOCK(drive) = MCI_HALFSPEED;  /* MCICLK = IDE_CLK/2 = 25 MHz  */
 353 #if defined(HAVE_MULTIDRIVE)
 354     else
 355         /* MCICLK = PCLK/2 = 31MHz(HS) or PCLK/4 = 15.5 Mhz (STD)*/
 356         MCI_CLOCK(drive) = (hs_card ? MCI_HALFSPEED : MCI_QUARTERSPEED);
 357 #endif
 358
 359     /*  CMD7 w/rca: Select card to put it in TRAN state */
 360     if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
 361         return -10;
 362     mci_delay();
 363
 364     /*
 365      * enable bank switching
 366      * without issuing this command, we only have access to 1/4 of the blocks
 367      * of the first bank (0x1E9E00 blocks, which is the size reported in the
 368      * CSD register)
 369      */
 370     if(drive == INTERNAL_AS3525)
 371     {
 372         const int ret = sd_select_bank(-1);
 373         if(ret < 0)
 374             return ret -16;
 375
 376         /*  CMD7 w/rca = 0: Select card to put it in STBY state */
 377         if(!send_cmd(drive, SD_SELECT_CARD, 0, MCI_ARG, NULL))
 378             return -17;
 379         mci_delay();
 380
 381         /* CMD9 send CSD again, so we got the correct number of blocks */
 382         if(!send_cmd(drive, SD_SEND_CSD, card_info[drive].rca,
 383                      MCI_RESP|MCI_LONG_RESP|MCI_ARG, card_info[drive].csd))
 384             return -18;
 385
 386         sd_parse_csd(&card_info[drive]);
 387         /* The OF is stored in the first blocks */
 388         card_info[INTERNAL_AS3525].numblocks -= AMS_OF_SIZE;
 389
 390         /*  CMD7 w/rca: Select card to put it in TRAN state */
 391         if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
 392             return -19;
 393         mci_delay();
 394     }
 395
 396     card_info[drive].initialized = 1;
 397
 398     return 0;
 399 }
 400
 401 static void sd_thread(void) __attribute__((noreturn));
 402 static void sd_thread(void)
 403 {
 404     struct queue_event ev;
 405     bool idle_notified = false;
 406
 407     while (1)
 408     {
 409         queue_wait_w_tmo(&sd_queue, &ev, HZ);
 410
 411         switch ( ev.id )
 412         {
 413 #ifdef HAVE_HOTSWAP
 414         case SYS_HOTSWAP_INSERTED:
 415         case SYS_HOTSWAP_EXTRACTED:
 416         {
 417             int microsd_init = 1;
 418             fat_lock();          /* lock-out FAT activity first -
 419                                     prevent deadlocking via disk_mount that
 420                                     would cause a reverse-order attempt with
 421                                     another thread */
 422             mutex_lock(&sd_mtx); /* lock-out card activity - direct calls
 423                                     into driver that bypass the fat cache */
 424
 425             /* We now have exclusive control of fat cache and ata */
 426
 427             disk_unmount(SD_SLOT_AS3525);     /* release "by force", ensure file
 428                                     descriptors aren't leaked and any busy
 429                                     ones are invalid if mounting */
 430
 431             /* Force card init for new card, re-init for re-inserted one or
 432              * clear if the last attempt to init failed with an error. */
 433             card_info[SD_SLOT_AS3525].initialized = 0;
 434
 435             if (ev.id == SYS_HOTSWAP_INSERTED)
 436             {
 437                 sd_enable(true);
 438                 init_pl180_controller(SD_SLOT_AS3525);
 439                 microsd_init = sd_init_card(SD_SLOT_AS3525);
 440                 if (microsd_init < 0) /* initialisation failed */
 441                     panicf("microSD init failed : %d", microsd_init);
 442
 443                 microsd_init = disk_mount(SD_SLOT_AS3525); /* 0 if fail */
 444             }
 445
 446             /*
 447              * Mount succeeded, or this was an EXTRACTED event,
 448              * in both cases notify the system about the changed filesystems
 449              */
 450             if (microsd_init)
 451                 queue_broadcast(SYS_FS_CHANGED, 0);
 452
 453             /* Access is now safe */
 454             mutex_unlock(&sd_mtx);
 455             fat_unlock();
 456             sd_enable(false);
 457         }
 458             break;
 459 #endif
 460         case SYS_TIMEOUT:
 461             if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
 462             {
 463                 idle_notified = false;
 464             }
 465             else
 466             {
 467                 /* never let a timer wrap confuse us */
 468                 next_yield = current_tick;
 469
 470                 if (!idle_notified)
 471                 {
 472                     call_storage_idle_notifys(false);
 473                     idle_notified = true;
 474                 }
 475             }
 476             break;
 477
 478         case SYS_USB_CONNECTED:
 479             usb_acknowledge(SYS_USB_CONNECTED_ACK);
 480             /* Wait until the USB cable is extracted again */
 481             usb_wait_for_disconnect(&sd_queue);
 482
 483             break;
 484         case SYS_USB_DISCONNECTED:
 485             usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
 486             break;
 487         }
 488     }
 489 }
 490
 491 static void init_pl180_controller(const int drive)
 492 {
 493     MCI_COMMAND(drive) = MCI_DATA_CTRL(drive) = 0;
 494     MCI_CLEAR(drive) = 0x7ff;
 495
 496     MCI_MASK0(drive) = MCI_DATA_ERROR | MCI_DATA_END;
 497     MCI_MASK1(drive) = 0;
 498 #ifdef HAVE_MULTIDRIVE
 499     VIC_INT_ENABLE =
 500         (drive == INTERNAL_AS3525) ? INTERRUPT_NAND : INTERRUPT_MCI0;
 501     /* clear previous irq */
 502     GPIOA_IC = EXT_SD_BITS;
 503     /* enable edge detecting */
 504     GPIOA_IS &= ~EXT_SD_BITS;
 505     /* detect both raising and falling edges */
 506     GPIOA_IBE |= EXT_SD_BITS;
 507
 508 #else
 509     VIC_INT_ENABLE = INTERRUPT_NAND;
 510 #endif
 511
 512     MCI_POWER(drive) = MCI_POWER_UP | (MCI_VDD_3_0);  /*  OF Setting  */
 513     mci_delay();
 514
 515     MCI_POWER(drive) |= MCI_POWER_ON;
 516     mci_delay();
 517
 518     MCI_SELECT(drive) = 0;
 519
 520     /* Pl180 clocks get turned on at start of card init */
 521 }
 522
 523 int sd_init(void)
 524 {
 525     int ret;
 526     CGU_IDE =   (1<<6)                  /*  enable non AHB interface*/
 527             |   (AS3525_IDE_DIV << 2)
 528             |    AS3525_CLK_PLLA;       /* clock source = PLLA */
 529
 530     CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
 531 #ifdef HAVE_MULTIDRIVE
 532     CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
 533     CCU_IO &= ~(1<<3);           /* bits 3:2 = 01, xpd is SD interface */
 534     CCU_IO |= (1<<2);
 535 #endif
 536
 537     wakeup_init(&transfer_completion_signal);
 538
 539     init_pl180_controller(INTERNAL_AS3525);
 540     ret = sd_init_card(INTERNAL_AS3525);
 541     if(ret < 0)
 542         return ret;
 543 #ifdef HAVE_MULTIDRIVE
 544     init_pl180_controller(SD_SLOT_AS3525);
 545 #endif
 546
 547     /* init mutex */
 548     mutex_init(&sd_mtx);
 549
 550     queue_init(&sd_queue, true);
 551     create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
 552             sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE) IF_COP(, CPU));
 553
 554 #ifndef BOOTLOADER
 555     sd_enabled = true;
 556     sd_enable(false);
 557 #endif
 558     return 0;
 559 }
 560
 561 #ifdef HAVE_HOTSWAP
 562 bool sd_removable(IF_MD_NONVOID(int drive))
 563 {
 564     return (drive==1);
 565 }
 566
 567 bool sd_present(IF_MD_NONVOID(int drive))
 568 {
 569     return (drive == 0) ? true : card_detect_target();
 570 }
 571 #endif /* HAVE_HOTSWAP */
 572
 573 static int sd_wait_for_state(const int drive, unsigned int state)
 574 {
 575     unsigned long response = 0;
 576     unsigned int timeout = current_tick + HZ;
 577
 578     while (1)
 579     {
 580         if(!send_cmd(drive, SD_SEND_STATUS, card_info[drive].rca,
 581                     MCI_RESP|MCI_ARG, &response))
 582             return -1;
 583
 584         if (((response >> 9) & 0xf) == state)
 585             return 0;
 586
 587         if(TIME_AFTER(current_tick, timeout))
 588             return -2;
 589
 590         if (TIME_AFTER(current_tick, next_yield))
 591         {
 592             yield();
 593             next_yield = current_tick + MIN_YIELD_PERIOD;
 594         }
 595     }
 596 }
 597
 598 static int sd_select_bank(signed char bank)
 599 {
 600     int ret;
 601     unsigned loops = 0;
 602
 603     do {
 604         if(loops++ > PL180_MAX_TRANSFER_ERRORS)
 605             panicf("SD bank %d error : 0x%x", bank,
 606                     transfer_error[INTERNAL_AS3525]);
 607
 608         ret = sd_wait_for_state(INTERNAL_AS3525, SD_TRAN);
 609         if (ret < 0)
 610             return ret - 2;
 611
 612         if(!send_cmd(INTERNAL_AS3525, SD_SWITCH_FUNC, 0x80ffffef, MCI_ARG, NULL))
 613             return -1;
 614
 615         mci_delay();
 616
 617         if(!send_cmd(INTERNAL_AS3525, 35, 0, MCI_NO_FLAGS, NULL))
 618             return -2;
 619
 620         mci_delay();
 621
 622         memset(uncached_buffer, 0, 512);
 623         if(bank == -1)
 624         {   /* enable bank switching */
 625             uncached_buffer[0] = 16;
 626             uncached_buffer[1] = 1;
 627             uncached_buffer[2] = 10;
 628         }
 629         else
 630             uncached_buffer[0] = bank;
 631
 632         dma_retain();
 633         /* we don't use the uncached buffer here, because we need the
 634          * physical memory address for DMA transfers */
 635         dma_enable_channel(0, aligned_buffer, MCI_FIFO(INTERNAL_AS3525),
 636             DMA_PERI_SD, DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8,
 637             NULL);
 638
 639         MCI_DATA_TIMER(INTERNAL_AS3525) = SD_MAX_WRITE_TIMEOUT;
 640         MCI_DATA_LENGTH(INTERNAL_AS3525) = 512;
 641         MCI_DATA_CTRL(INTERNAL_AS3525) =  (1<<0) /* enable */   |
 642                                 (0<<1) /* transfer direction */ |
 643                                 (1<<3) /* DMA */                |
 644                                 (9<<4) /* 2^9 = 512 */ ;
 645
 646         /* Wakeup signal from NAND/MCIO isr on MCI_DATA_ERROR | MCI_DATA_END */
 647         wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
 648
 649         /*  Wait for FIFO to empty, card may still be in PRG state  */
 650         while(MCI_STATUS(INTERNAL_AS3525) & MCI_TX_ACTIVE );
 651
 652         dma_release();
 653
 654     } while(transfer_error[INTERNAL_AS3525]);
 655
 656     card_info[INTERNAL_AS3525].current_bank = (bank == -1) ? 0 : bank;
 657
 658     return 0;
 659 }
 660
 661 static int sd_transfer_sectors(IF_MD2(int drive,) unsigned long start,
 662                                int count, void* buf, const bool write)
 663 {
 664 #ifndef HAVE_MULTIDRIVE
 665     const int drive = 0;
 666 #endif
 667     int ret = 0;
 668     unsigned loops = 0;
 669
 670     mutex_lock(&sd_mtx);
 671 #ifndef BOOTLOADER
 672     sd_enable(true);
 673     led(true);
 674 #endif
 675
 676     if (card_info[drive].initialized <= 0)
 677     {
 678         ret = sd_init_card(drive);
 679         if (!(card_info[drive].initialized))
 680             goto sd_transfer_error;
 681     }
 682
 683     if(count < 0) /* XXX: why is it signed ? */
 684     {
 685         ret = -20;
 686         goto sd_transfer_error;
 687     }
 688     if((start+count) > card_info[drive].numblocks)
 689     {
 690         ret = -21;
 691         goto sd_transfer_error;
 692     }
 693
 694     /* skip SanDisk OF */
 695     if (drive == INTERNAL_AS3525)
 696         start += AMS_OF_SIZE;
 697
 698     last_disk_activity = current_tick;
 699
 700     dma_retain();
 701
 702     while(count)
 703     {
 704         /* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH
 705          * register, so we have to transfer maximum 127 sectors at a time. */
 706         unsigned int transfer = (count >= 128) ? 127 : count; /* sectors */
 707         void *dma_buf;
 708         const int cmd =
 709             write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
 710         unsigned long bank_start = start;
 711
 712         /* Only switch banks for internal storage */
 713         if(drive == INTERNAL_AS3525)
 714         {
 715             unsigned int bank = 0;
 716             while(bank_start >= BLOCKS_PER_BANK)
 717             {
 718                 bank_start -= BLOCKS_PER_BANK;
 719                 bank++;
 720             }
 721
 722             /* Switch bank if needed */
 723             if(card_info[INTERNAL_AS3525].current_bank != bank)
 724             {
 725                 ret = sd_select_bank(bank);
 726                 if (ret < 0)
 727                 {
 728                     ret -= 20;
 729                     goto sd_transfer_error;
 730                 }
 731             }
 732
 733             /* Do not cross a bank boundary in a single transfer loop */
 734             if((transfer + bank_start) > BLOCKS_PER_BANK)
 735                 transfer = BLOCKS_PER_BANK - bank_start;
 736         }
 737
 738         /* Set bank_start to the correct unit (blocks or bytes) */
 739         if(!(card_info[drive].ocr & (1<<30)))   /* not SDHC */
 740             bank_start *= SD_BLOCK_SIZE;
 741
 742         dma_buf = aligned_buffer;
 743         if(transfer > UNALIGNED_NUM_SECTORS)
 744             transfer = UNALIGNED_NUM_SECTORS;
 745
 746         if(write)
 747             memcpy(uncached_buffer, buf, transfer * SD_BLOCK_SIZE);
 748
 749         ret = sd_wait_for_state(drive, SD_TRAN);
 750         if (ret < 0)
 751         {
 752             ret -= 2*20;
 753             goto sd_transfer_error;
 754         }
 755
 756         if(!send_cmd(drive, cmd, bank_start, MCI_ARG, NULL))
 757         {
 758             ret -= 3*20;
 759             goto sd_transfer_error;
 760         }
 761
 762         if(write)
 763         {
 764             dma_enable_channel(0, dma_buf, MCI_FIFO(drive),
 765                 (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
 766                 DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL);
 767
 768             /*Small delay for writes prevents data crc failures at lower freqs*/
 769 #ifdef HAVE_MULTIDRIVE
 770             if((drive == SD_SLOT_AS3525) && !hs_card)
 771             {
 772                 int write_delay = 125;
 773                 while(write_delay--);
 774             }
 775 #endif
 776         }
 777         else
 778             dma_enable_channel(0, MCI_FIFO(drive), dma_buf,
 779                 (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
 780                 DMAC_FLOWCTRL_PERI_PERI_TO_MEM, false, true, 0, DMA_S8, NULL);
 781
 782         MCI_DATA_TIMER(drive) = write ?
 783                 SD_MAX_WRITE_TIMEOUT : SD_MAX_READ_TIMEOUT;
 784         MCI_DATA_LENGTH(drive) = transfer * SD_BLOCK_SIZE;
 785         MCI_DATA_CTRL(drive) =  (1<<0) /* enable */                     |
 786                                 (!write<<1) /* transfer direction */    |
 787                                 (1<<3) /* DMA */                        |
 788                                 (9<<4) /* 2^9 = 512 */ ;
 789
 790         /* Wakeup signal from NAND/MCIO isr on MCI_DATA_ERROR | MCI_DATA_END */
 791         wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
 792
 793         /*  Wait for FIFO to empty, card may still be in PRG state for writes */
 794         while(MCI_STATUS(drive) & MCI_TX_ACTIVE);
 795
 796         last_disk_activity = current_tick;
 797
 798         if(!send_cmd(drive, SD_STOP_TRANSMISSION, 0, MCI_NO_FLAGS, NULL))
 799         {
 800             ret = -4*20;
 801             goto sd_transfer_error;
 802         }
 803
 804         if(!transfer_error[drive])
 805         {
 806             if(!write)
 807                 memcpy(buf, uncached_buffer, transfer * SD_BLOCK_SIZE);
 808             buf += transfer * SD_BLOCK_SIZE;
 809             start += transfer;
 810             count -= transfer;
 811             loops = 0;  /* reset errors counter */
 812         }
 813         else if(loops++ > PL180_MAX_TRANSFER_ERRORS)
 814                 panicf("SD Xfer %s err:0x%x Disk%d", (write? "write": "read"),
 815                                                   transfer_error[drive], drive);
 816     }
 817
 818     ret = 0;    /* success */
 819
 820 sd_transfer_error:
 821
 822     dma_release();
 823
 824 #ifndef BOOTLOADER
 825     led(false);
 826     sd_enable(false);
 827 #endif
 828
 829     if (ret)    /* error */
 830         card_info[drive].initialized = 0;
 831
 832     mutex_unlock(&sd_mtx);
 833     return ret;
 834 }
 835
 836 int sd_read_sectors(IF_MD2(int drive,) unsigned long start, int count,
 837                      void* buf)
 838 {
 839     return sd_transfer_sectors(IF_MD2(drive,) start, count, buf, false);
 840 }
 841
 842 int sd_write_sectors(IF_MD2(int drive,) unsigned long start, int count,
 843                      const void* buf)
 844 {
 845
 846 #ifdef BOOTLOADER /* we don't need write support in bootloader */
 847 #ifdef HAVE_MULTIDRIVE
 848     (void) drive;
 849 #endif
 850     (void) start;
 851     (void) count;
 852     (void) buf;
 853     return -1;
 854 #else
 855     return sd_transfer_sectors(IF_MD2(drive,) start, count, (void*)buf, true);
 856 #endif
 857 }
 858
 859 #ifndef BOOTLOADER
 860 long sd_last_disk_activity(void)
 861 {
 862     return last_disk_activity;
 863 }
 864
 865 void sd_enable(bool on)
 866 {
 867 #if defined(HAVE_BUTTON_LIGHT) && defined(HAVE_MULTIDRIVE)
 868     extern int buttonlight_is_on;
 869 #endif
 870
 871 #if defined(HAVE_HOTSWAP) && defined (HAVE_ADJUSTABLE_CPU_VOLTAGE)
 872     static bool cpu_boosted = false;
 873 #endif
 874
 875     if (sd_enabled == on)
 876         return; /* nothing to do */
 877     if(on)
 878     {
 879         /*  Enable both NAF_CLOCK & IDE clk for internal SD */
 880         CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
 881         CGU_IDE  |= (1<<6);     /* enable non AHB interface*/
 882 #ifdef HAVE_MULTIDRIVE
 883         /* Enable MCI clk for uSD */
 884         CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
 885 #ifdef HAVE_BUTTON_LIGHT
 886         /* buttonlight AMSes need a bit of special handling for the buttonlight
 887          * here due to the dual mapping of GPIOD and XPD */
 888         CCU_IO |= (1<<2);              /* XPD is SD-MCI interface (b3:2 = 01) */
 889         if (buttonlight_is_on)
 890             GPIOD_DIR &= ~(1<<7);
 891         else
 892             _buttonlight_off();
 893 #endif /* HAVE_BUTTON_LIGHT */
 894 #endif /* HAVE_MULTIDRIVE */
 895         sd_enabled = true;
 896
 897 #if defined(HAVE_HOTSWAP) && defined (HAVE_ADJUSTABLE_CPU_VOLTAGE)
 898         if(card_detect_target())  /* If SD card present Boost cpu for voltage */
 899         {
 900             cpu_boosted = true;
 901             cpu_boost(true);
 902         }
 903 #endif  /* defined(HAVE_HOTSWAP) && defined (HAVE_ADJUSTABLE_CPU_VOLTAGE) */
 904     }
 905     else
 906     {
 907 #if defined(HAVE_HOTSWAP) && defined (HAVE_ADJUSTABLE_CPU_VOLTAGE)
 908         if(cpu_boosted)
 909         {
 910             cpu_boost(false);
 911             cpu_boosted = false;
 912         }
 913 #endif  /* defined(HAVE_HOTSWAP) && defined (HAVE_ADJUSTABLE_CPU_VOLTAGE) */
 914
 915         /* not sure why we have to wait, but without this, test_disk freezes
 916          * when closing the 300MB file which was just written to */
 917         udelay(100);
 918
 919         sd_enabled = false;
 920
 921 #ifdef HAVE_MULTIDRIVE
 922 #ifdef HAVE_BUTTON_LIGHT
 923         CCU_IO &= ~(1<<2);           /* XPD is general purpose IO (b3:2 = 00) */
 924         if (buttonlight_is_on)
 925             _buttonlight_on();
 926 #endif /* HAVE_BUTTON_LIGHT */
 927         /* Disable MCI clk for uSD */
 928         CGU_PERI &= ~CGU_MCI_CLOCK_ENABLE;
 929 #endif /* HAVE_MULTIDRIVE */
 930
 931         /*  Disable both NAF_CLOCK & IDE clk for internal SD */
 932         CGU_PERI &= ~CGU_NAF_CLOCK_ENABLE;
 933         CGU_IDE &= ~(1<<6);       /* disable non AHB interface*/
 934     }
 935 }
 936
 937 tCardInfo *card_get_info_target(int card_no)
 938 {
 939     return &card_info[card_no];
 940 }
 941
 942 #ifdef HAVE_HOTSWAP
 943 void card_enable_monitoring_target(bool on)
 944 {
 945     if (on) /* enable interrupt */
 946         GPIOA_IE |= EXT_SD_BITS;
 947     else    /* disable interrupt */
 948         GPIOA_IE &= ~EXT_SD_BITS;
 949 }
 950 #endif /* HAVE_HOTSWAP */
 951
 952 #endif /* !BOOTLOADER */
 953
 954 #ifdef CONFIG_STORAGE_MULTI
 955 int sd_num_drives(int first_drive)
 956 {
 957     /* We don't care which logical drive number(s) we have been assigned */
 958     (void)first_drive;
 959
 960     return NUM_DRIVES;
 961 }
 962 #endif /* CONFIG_STORAGE_MULTI */