firmware/rolo.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2002 Randy D. Wood
  11  *
  12  * All files in this archive are subject to the GNU General Public License.
  13  * See the file COPYING in the source tree root for full license agreement.
  14  *
  15  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  16  * KIND, either express or implied.
  17  *
  18  ****************************************************************************/
  19
  20 #include "config.h"
  21 #include "lcd.h"
  22 #include "lcd-remote.h"
  23 #include "thread.h"
  24 #include "kernel.h"
  25 #include "sprintf.h"
  26 #include "button.h"
  27 #include "file.h"
  28 #include "audio.h"
  29 #include "system.h"
  30 #include "i2c.h"
  31 #include "string.h"
  32 #include "buffer.h"
  33
  34 #ifdef MI4_FORMAT
  35 #include "crc32-mi4.h"
  36 #undef FIRMWARE_OFFSET_FILE_CRC
  37 #undef FIRMWARE_OFFSET_FILE_DATA
  38 #define FIRMWARE_OFFSET_FILE_CRC     0xC
  39 #define FIRMWARE_OFFSET_FILE_DATA    0x200
  40 #endif
  41
  42 #if !defined(IRIVER_IFP7XX_SERIES) && \
  43     (CONFIG_CPU != PP5002) && (CONFIG_CPU != S3C2440)
  44 /* FIX: this doesn't work on iFP, 3rd Gen ipods */
  45
  46 #define IRQ0_EDGE_TRIGGER 0x80
  47
  48 #ifdef CPU_PP
  49 /* Handle the COP properly - it needs to jump to a function outside SDRAM while
  50  * the new firmware is being loaded, and then jump to the start of SDRAM
  51  * TODO: Use the mailboxes built into the PP processor for this
  52  */
  53
  54 #if NUM_CORES > 1
  55 volatile unsigned char IDATA_ATTR cpu_message = 0;
  56 volatile unsigned char IDATA_ATTR cpu_reply = 0;
  57 extern int cop_idlestackbegin[];
  58
  59 void rolo_restart_cop(void) ICODE_ATTR;
  60 void rolo_restart_cop(void)
  61 {
  62     if (CURRENT_CORE == CPU)
  63     {
  64         /* There should be free thread slots aplenty */
  65         create_thread(rolo_restart_cop, cop_idlestackbegin, IDLE_STACK_SIZE,
  66                       0, "rolo COP" IF_PRIO(, PRIORITY_REALTIME)
  67                       IF_COP(, COP));
  68         return;
  69     }
  70
  71     COP_INT_CLR = -1;
  72
  73     /* Invalidate cache */
  74     invalidate_icache();
  75
  76     /* Disable cache */
  77     CACHE_CTL = CACHE_CTL_DISABLE;
  78
  79     /* Tell the main core that we're ready to reload */
  80     cpu_reply = 1;
  81
  82     /* Wait while RoLo loads the image into SDRAM */
  83     /* TODO: Accept checksum failure gracefully */
  84     while(cpu_message != 1);
  85
  86     /* Acknowledge the CPU and then reload */
  87     cpu_reply = 2;
  88
  89     asm volatile(
  90         "mov   r0, #0x10000000   \n"
  91         "mov   pc, r0            \n"
  92     );
  93 }
  94 #endif /* NUM_CORES > 1 */
  95 #endif /* CPU_PP */
  96
  97 static void rolo_error(const char *text)
  98 {
  99     lcd_clear_display();
 100     lcd_puts(0, 0, "ROLO error:");
 101     lcd_puts_scroll(0, 1, text);
 102     lcd_update();
 103     button_get(true);
 104     button_get(true);
 105     button_get(true);
 106     lcd_stop_scroll();
 107 }
 108
 109 #if CONFIG_CPU == SH7034
 110 /* these are in assembler file "descramble.S" */
 111 extern unsigned short descramble(const unsigned char* source,
 112                                  unsigned char* dest, int length);
 113 extern void rolo_restart(const unsigned char* source, unsigned char* dest,
 114                          int length);
 115 #else
 116
 117 /* explicitly put this code in iram, ICODE_ATTR is defined to be null for some
 118    targets that are low on iram, like the gigabeat F/X */
 119 void rolo_restart(const unsigned char* source, unsigned char* dest,
 120                   long length) __attribute__ ((section(".icode")));
 121 void rolo_restart(const unsigned char* source, unsigned char* dest,
 122                   long length)
 123 {
 124     long i;
 125     unsigned char* localdest = dest;
 126
 127     /* This is the equivalent of a call to memcpy() but this must be done from
 128        iram to avoid overwriting itself and we don't want to depend on memcpy()
 129        always being in iram */
 130     for(i = 0;i < length;i++)
 131         *localdest++ = *source++;
 132
 133 #if defined(CPU_COLDFIRE)
 134     asm (
 135         "movec.l %0,%%vbr    \n"
 136         "move.l  (%0)+,%%sp  \n"
 137         "move.l  (%0),%0     \n"
 138         "jmp     (%0)        \n"
 139         : : "a"(dest)
 140     );
 141 #elif defined(CPU_PP502x)
 142     CPU_INT_CLR = -1;
 143
 144     /* Flush cache */
 145     flush_icache();
 146
 147     /* Disable cache */
 148     CACHE_CTL = CACHE_CTL_DISABLE;
 149
 150     /* Reset the memory mapping registers to zero */
 151     {
 152         volatile unsigned long *mmap_reg;
 153         for (mmap_reg = &MMAP_FIRST; mmap_reg <= &MMAP_LAST; mmap_reg++)
 154             *mmap_reg = 0;
 155     }
 156
 157 #if NUM_CORES > 1
 158     /* Tell the COP it's safe to continue rebooting */
 159     cpu_message = 1;
 160
 161     /* Wait for the COP to tell us it is rebooting */
 162     while(cpu_reply != 2);
 163 #endif
 164
 165     asm volatile(
 166         "mov   r0, #0x10000000   \n"
 167         "mov   pc, r0            \n"
 168     );
 169 #endif
 170 }
 171 #endif
 172
 173 /* This is assigned in the linker control file */
 174 extern unsigned long loadaddress;
 175
 176 /***************************************************************************
 177  *
 178  * Name: rolo_load_app(char *filename,int scrambled)
 179  * Filename must be a fully defined filename including the path and extension
 180  *
 181  ***************************************************************************/
 182 int rolo_load(const char* filename)
 183 {
 184     int fd;
 185     long length;
 186 #if defined(CPU_COLDFIRE) || defined(CPU_ARM)
 187 #if !defined(MI4_FORMAT)
 188     int i;
 189 #endif
 190     unsigned long checksum,file_checksum;
 191 #else
 192     long file_length;
 193     unsigned short checksum,file_checksum;
 194 #endif
 195     unsigned char* ramstart = (void*)&loadaddress;
 196
 197     lcd_clear_display();
 198     lcd_puts(0, 0, "ROLO...");
 199     lcd_puts(0, 1, "Loading");
 200     lcd_update();
 201 #ifdef HAVE_REMOTE_LCD
 202     lcd_remote_clear_display();
 203     lcd_remote_puts(0, 0, "ROLO...");
 204     lcd_remote_puts(0, 1, "Loading");
 205     lcd_remote_update();
 206 #endif
 207
 208     audio_stop();
 209
 210     fd = open(filename, O_RDONLY);
 211     if(-1 == fd) {
 212         rolo_error("File not found");
 213         return -1;
 214     }
 215
 216     length = filesize(fd) - FIRMWARE_OFFSET_FILE_DATA;
 217
 218 #if defined(CPU_COLDFIRE) || defined(CPU_PP) || (CONFIG_CPU==DM320)
 219     /* Read and save checksum */
 220     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 221     if (read(fd, &file_checksum, 4) != 4) {
 222         rolo_error("Error Reading checksum");
 223         return -1;
 224     }
 225
 226 #if !defined(MI4_FORMAT)
 227     /* Rockbox checksums are big-endian */
 228     file_checksum = betoh32(file_checksum);
 229 #endif
 230
 231 #if defined(CPU_PP) && NUM_CORES > 1
 232     lcd_puts(0, 2, "Waiting for coprocessor...");
 233     lcd_update();
 234     rolo_restart_cop();
 235     /* Wait for COP to be in safe code */
 236     while(cpu_reply != 1);
 237     lcd_puts(0, 2, "                          ");
 238     lcd_update();
 239 #endif
 240
 241     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 242
 243     if (read(fd, audiobuf, length) != length) {
 244         rolo_error("Error Reading File");
 245         return -1;
 246     }
 247
 248 #ifdef MI4_FORMAT
 249     /* Check CRC32 to see if we have a valid file */
 250     chksum_crc32gentab();
 251     checksum = chksum_crc32 (audiobuf, length);
 252 #else
 253     checksum = MODEL_NUMBER;
 254
 255     for(i = 0;i < length;i++) {
 256         checksum += audiobuf[i];
 257     }
 258 #endif
 259
 260     /* Verify checksum against file header */
 261     if (checksum != file_checksum) {
 262         rolo_error("Checksum Error");
 263         return -1;
 264     }
 265
 266     lcd_puts(0, 1, "Executing");
 267     lcd_update();
 268 #ifdef HAVE_REMOTE_LCD
 269     lcd_remote_puts(0, 1, "Executing");
 270     lcd_remote_update();
 271 #endif
 272     adc_close();
 273
 274     set_irq_level(HIGHEST_IRQ_LEVEL);
 275 #elif CONFIG_CPU == SH7034
 276     /* Read file length from header and compare to real file length */
 277     lseek(fd, FIRMWARE_OFFSET_FILE_LENGTH, SEEK_SET);
 278     if(read(fd, &file_length, 4) != 4) {
 279         rolo_error("Error Reading File Length");
 280         return -1;
 281     }
 282     if (length != file_length) {
 283         rolo_error("File length mismatch");
 284         return -1;
 285     }
 286
 287     /* Read and save checksum */
 288     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 289     if (read(fd, &file_checksum, 2) != 2) {
 290         rolo_error("Error Reading checksum");
 291         return -1;
 292     }
 293     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 294
 295     /* verify that file can be read and descrambled */
 296     if ((audiobuf + (2*length)+4) >= audiobufend) {
 297         rolo_error("Not enough room to load file");
 298         return -1;
 299     }
 300
 301     if (read(fd, &audiobuf[length], length) != (int)length) {
 302         rolo_error("Error Reading File");
 303         return -1;
 304     }
 305
 306     lcd_puts(0, 1, "Descramble");
 307     lcd_update();
 308
 309     checksum = descramble(audiobuf + length, audiobuf, length);
 310
 311     /* Verify checksum against file header */
 312     if (checksum != file_checksum) {
 313         rolo_error("Checksum Error");
 314         return -1;
 315     }
 316
 317     lcd_puts(0, 1, "Executing     ");
 318     lcd_update();
 319
 320     set_irq_level(HIGHEST_IRQ_LEVEL);
 321
 322     /* Calling these 2 initialization routines was necessary to get the
 323        the origional Archos version of the firmware to load and execute. */
 324     system_init();           /* Initialize system for restart */
 325     i2c_init();              /* Init i2c bus - it seems like a good idea */
 326     ICR = IRQ0_EDGE_TRIGGER; /* Make IRQ0 edge triggered */
 327     TSTR = 0xE0;             /* disable all timers */
 328     /* model-specific de-init, needed when flashed */
 329     /* Especially the Archos software is picky about this */
 330 #if defined(ARCHOS_RECORDER) || defined(ARCHOS_RECORDERV2) || \
 331     defined(ARCHOS_FMRECORDER)
 332     PAIOR = 0x0FA0;
 333 #endif
 334 #endif
 335     rolo_restart(audiobuf, ramstart, length);
 336
 337     return 0; /* this is never reached */
 338 }
 339 #else  /* !defined(IRIVER_IFP7XX_SERIES) */
 340 int rolo_load(const char* filename)
 341 {
 342     /* dummy */
 343     (void)filename;
 344     return 0;
 345 }
 346
 347 #endif /* !defined(IRIVER_IFP7XX_SERIES) */