firmware/target/arm/as3525/usb-drv-as3525.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright © 2010 Tobias Diedrich
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include "system.h"
  23 #include "usb.h"
  24 #include "usb_drv.h"
  25 #include "as3525.h"
  26 #include "clock-target.h"
  27 #include "ascodec.h"
  28 #include "as3514.h"
  29 #include <stdbool.h>
  30 #include "panic.h"
  31 /*#define LOGF_ENABLE*/
  32 #include "logf.h"
  33 #include "usb_ch9.h"
  34 #include "usb_core.h"
  35 #include "string.h"
  36
  37 #if defined(USE_ROCKBOX_USB)
  38
  39 #include "usb-drv-as3525.h"
  40
  41 static struct usb_endpoint endpoints[USB_NUM_EPS][2];
  42
  43 /*
  44  * dma/setup descriptors and buffers should avoid sharing
  45  * a cacheline with other data.
  46  * dmadescs may share with each other, since we only access them uncached.
  47  */
  48 static struct usb_dev_dma_desc dmadescs[USB_NUM_EPS][2] __attribute__((aligned(32)));
  49 /* reuse unused EP2 OUT descriptor here */
  50 static struct usb_dev_setup_buf *setup_desc = (void*)&dmadescs[2][1];
  51
  52 #if AS3525_MCLK_SEL != AS3525_CLK_PLLB
  53 static inline void usb_enable_pll(void)
  54 {
  55     CGU_COUNTB = CGU_LOCK_CNT;
  56     CGU_PLLB = AS3525_PLLB_SETTING;
  57     CGU_PLLBSUP = 0;                       /* enable PLLB */
  58     while(!(CGU_INTCTRL & CGU_PLLB_LOCK)); /* wait until PLLB is locked */
  59 }
  60
  61 static inline void usb_disable_pll(void)
  62 {
  63     CGU_PLLBSUP = CGU_PLL_POWERDOWN;
  64 }
  65 #else
  66 static inline void usb_enable_pll(void)
  67 {
  68 }
  69
  70 static inline void usb_disable_pll(void)
  71 {
  72 }
  73 #endif /* AS3525_MCLK_SEL != AS3525_CLK_PLLB */
  74
  75 void usb_attach(void)
  76 {
  77     usb_enable(true);
  78 }
  79
  80 /* delay is in milliseconds */
  81 static inline void usb_delay(int delay)
  82 {
  83     while(delay--)
  84         udelay(1000);
  85 }
  86
  87 static void usb_phy_on(void)
  88 {
  89     /* PHY clock */
  90     CGU_USB = 1<<5 /* enable */
  91         | (CLK_DIV(AS3525_PLLB_FREQ, 48000000) / 2) << 2
  92         | 2; /* source = PLLB */
  93
  94     /* UVDD on */
  95     ascodec_write(AS3515_USB_UTIL, ascodec_read(AS3515_USB_UTIL) | (1<<4));
  96     usb_delay(100);
  97
  98     /* reset */
  99     CCU_SRC = CCU_SRC_USB_AHB_EN|CCU_SRC_USB_PHY_EN;
 100     CCU_SRL = CCU_SRL_MAGIC_NUMBER;
 101     usb_delay(1);
 102     CCU_SRC = CCU_SRC_USB_AHB_EN;
 103     usb_delay(1);
 104     CCU_SRC = CCU_SRL = 0;
 105
 106     USB_GPIO_CSR = USB_GPIO_TX_ENABLE_N
 107                  | USB_GPIO_TX_BIT_STUFF_EN
 108                  | USB_GPIO_XO_ON
 109                  | USB_GPIO_CLK_SEL10; /* 0x06180000; */
 110 }
 111
 112 static void usb_phy_suspend(void)
 113 {
 114     USB_GPIO_CSR |= USB_GPIO_ASESSVLD_EXT |
 115                     USB_GPIO_BSESSVLD_EXT |
 116                     USB_GPIO_VBUS_VLD_EXT;
 117     usb_delay(3);
 118     USB_GPIO_CSR |= USB_GPIO_VBUS_VLD_EXT_SEL;
 119     usb_delay(10);
 120 }
 121
 122 static void usb_phy_resume(void)
 123 {
 124     USB_GPIO_CSR &= ~(USB_GPIO_ASESSVLD_EXT |
 125                       USB_GPIO_BSESSVLD_EXT |
 126                       USB_GPIO_VBUS_VLD_EXT);
 127     usb_delay(3);
 128     USB_GPIO_CSR &= ~USB_GPIO_VBUS_VLD_EXT_SEL;
 129     usb_delay(10);
 130 }
 131
 132 static void setup_desc_init(struct usb_dev_setup_buf *desc)
 133 {
 134     struct usb_dev_setup_buf *uc_desc = AS3525_UNCACHED_ADDR(desc);
 135
 136     uc_desc->status = USB_DMA_DESC_BS_HST_RDY;
 137     uc_desc->resv   = 0xffffffff;
 138     uc_desc->data1  = 0xffffffff;
 139     uc_desc->data2  = 0xffffffff;
 140 }
 141
 142 static void dma_desc_init(int ep, int dir)
 143 {
 144     struct usb_dev_dma_desc *desc = &dmadescs[ep][dir];
 145     struct usb_dev_dma_desc *uc_desc = AS3525_UNCACHED_ADDR(desc);
 146
 147     endpoints[ep][dir].uc_desc = uc_desc;
 148
 149     uc_desc->status    = USB_DMA_DESC_BS_DMA_DONE | \
 150                          USB_DMA_DESC_LAST | \
 151                          USB_DMA_DESC_ZERO_LEN;
 152     uc_desc->resv      = 0xffffffff;
 153     uc_desc->data_ptr  = 0;
 154     uc_desc->next_desc = 0;
 155 }
 156
 157 static void reset_endpoints(int init)
 158 {
 159     int i;
 160
 161     /*
 162      * OUT EP 2 is an alias for OUT EP 0 on this HW!
 163      *
 164      * Resonates with "3 bidirectional- plus 1 in-endpoints in device mode"
 165      * from the datasheet, but why ep2 and not ep3?
 166      *
 167      * Reserve it here so we will skip over it in request_endpoint().
 168      */
 169     endpoints[2][1].state |= EP_STATE_ALLOCATED;
 170
 171     for(i = 0; i < USB_NUM_EPS; i++) {
 172         /*
 173          * LS: 8 (control), no bulk available
 174          * FS: 64 (control), 64 (bulk)
 175          * HS: 64 (control), 512 (bulk)
 176          * TODO: switch depending on speed.
 177          */
 178         int mps = i == 0 ? 64 : 512;
 179
 180         if (init) {
 181             endpoints[i][0].state = 0;
 182             wakeup_init(&endpoints[i][0].complete);
 183
 184             if (i != 2) { /* Skip the OUT EP0 alias */
 185                 endpoints[i][1].state = 0;
 186                 wakeup_init(&endpoints[i][1].complete);
 187                 USB_OEP_SUP_PTR(i)    = 0;
 188             }
 189         }
 190
 191         dma_desc_init(i, 0);
 192         USB_IEP_CTRL    (i) = USB_EP_CTRL_FLUSH|USB_EP_CTRL_SNAK;
 193         USB_IEP_MPS     (i) = mps; /* in bytes */
 194         /* We don't care about the 'IN token received' event */
 195         USB_IEP_STS_MASK(i) = USB_EP_STAT_IN; /* OF: 0x840 */
 196         USB_IEP_TXFSIZE (i) = mps/2; /* in dwords => mps*2 bytes */
 197         USB_IEP_STS     (i) = 0xffffffff; /* clear status */
 198         USB_IEP_DESC_PTR(i) = 0;
 199
 200         if (i != 2) { /* Skip the OUT EP0 alias */
 201             dma_desc_init(i, 1);
 202             USB_OEP_CTRL    (i) = USB_EP_CTRL_FLUSH|USB_EP_CTRL_SNAK;
 203             USB_OEP_MPS     (i) = (mps/2 << 23) | mps;
 204             USB_OEP_STS_MASK(i) = 0x0000; /* OF: 0x1800 */
 205             USB_OEP_RXFR    (i) = 0;      /* Always 0 in OF trace? */
 206             USB_OEP_STS     (i) = 0xffffffff; /* clear status */
 207             USB_OEP_DESC_PTR(i) = 0;
 208         }
 209     }
 210
 211     setup_desc_init(setup_desc);
 212     USB_OEP_SUP_PTR(0)    = (int)setup_desc;
 213 }
 214
 215 void usb_drv_init(void)
 216 {
 217     logf("usb_drv_init() !!!!\n");
 218
 219     usb_enable_pll();
 220
 221     /* length regulator: normal operation */
 222     ascodec_write(AS3514_CVDD_DCDC3, ascodec_read(AS3514_CVDD_DCDC3) | 1<<2);
 223
 224     /* AHB part */
 225     CGU_PERI |= CGU_USB_CLOCK_ENABLE;
 226
 227     /* reset AHB */
 228     CCU_SRC = CCU_SRC_USB_AHB_EN;
 229     CCU_SRL = CCU_SRL_MAGIC_NUMBER;
 230     usb_delay(1);
 231     CCU_SRC = CCU_SRL = 0;
 232
 233     USB_GPIO_CSR = USB_GPIO_TX_ENABLE_N
 234                  | USB_GPIO_TX_BIT_STUFF_EN
 235                  | USB_GPIO_XO_ON
 236                  | USB_GPIO_CLK_SEL10; /* 0x06180000; */
 237
 238     /* bug workaround according to linux patch */
 239     USB_DEV_CFG = (USB_DEV_CFG & ~3) | 1; /* full speed */
 240
 241     /* enable soft disconnect */
 242     USB_DEV_CTRL |= USB_DEV_CTRL_SOFT_DISCONN;
 243
 244     usb_phy_on();
 245     usb_phy_suspend();
 246     USB_DEV_CTRL |= USB_DEV_CTRL_SOFT_DISCONN;
 247
 248     /* We don't care about SVC or SOF events */
 249     /* Right now we don't handle suspend, so mask those too */
 250     USB_DEV_INTR_MASK = USB_DEV_INTR_SVC |
 251                         USB_DEV_INTR_SOF |
 252                         USB_DEV_INTR_USB_SUSPEND |
 253                         USB_DEV_INTR_EARLY_SUSPEND;
 254
 255     USB_DEV_CFG = USB_DEV_CFG_STAT_ACK      |
 256                   USB_DEV_CFG_UNI_DIR       |
 257                   USB_DEV_CFG_PI_16BIT      |
 258                   USB_DEV_CFG_HS            |
 259                   USB_DEV_CFG_SELF_POWERED  |
 260                   USB_DEV_CFG_CSR_PRG       |
 261                   USB_DEV_CFG_PHY_ERR_DETECT;
 262
 263     USB_DEV_CTRL = USB_DEV_CTRL_BLEN_1DWORD  |
 264                    USB_DEV_CTRL_DESC_UPDATE  |
 265                    USB_DEV_CTRL_THRES_ENABLE |
 266                    USB_DEV_CTRL_RDE          |
 267                    0x04000000;
 268
 269     USB_DEV_EP_INTR_MASK &= ~((1<<0) | (1<<16));    /* ep 0 */
 270
 271     reset_endpoints(1);
 272
 273     /* clear pending interrupts */
 274     USB_DEV_EP_INTR = 0xffffffff;
 275     USB_DEV_INTR    = 0xffffffff;
 276
 277     VIC_INT_ENABLE = INTERRUPT_USB;
 278
 279     usb_phy_resume();
 280     USB_DEV_CTRL &= ~USB_DEV_CTRL_SOFT_DISCONN;
 281
 282     USB_GPIO_CSR = USB_GPIO_TX_ENABLE_N
 283                  | USB_GPIO_TX_BIT_STUFF_EN
 284                  | USB_GPIO_XO_ON
 285                  | USB_GPIO_HS_INTR
 286                  | USB_GPIO_CLK_SEL10; /* 0x06180000; */
 287
 288 }
 289
 290 void usb_drv_exit(void)
 291 {
 292     USB_DEV_CTRL |= (1<<10); /* soft disconnect */
 293     /*
 294      * mask all interrupts _before_ writing to VIC_INT_EN_CLEAR,
 295      * or else the core might latch the interrupt while
 296      * the write ot VIC_INT_EN_CLEAR is in the pipeline and
 297      * so cause a fake spurious interrupt.
 298      */
 299     USB_DEV_EP_INTR_MASK = 0xffffffff;
 300     USB_DEV_INTR_MASK    = 0xffffffff;
 301     VIC_INT_EN_CLEAR = INTERRUPT_USB;
 302     CGU_USB &= ~(1<<5);
 303     CGU_PERI &= ~CGU_USB_CLOCK_ENABLE;
 304     /* Disable UVDD generating LDO */
 305     ascodec_write(AS3515_USB_UTIL, ascodec_read(AS3515_USB_UTIL) & ~(1<<4));
 306     usb_disable_pll();
 307     logf("usb_drv_exit() !!!!\n");
 308 }
 309
 310 int usb_drv_port_speed(void)
 311 {
 312     return (USB_DEV_STS & USB_DEV_STS_MASK_SPD) ? 0 : 1;
 313 }
 314
 315 int usb_drv_request_endpoint(int type, int dir)
 316 {
 317     int d = dir == USB_DIR_IN ? 0 : 1;
 318     int i = 1; /* skip the control EP */
 319
 320     for(; i < USB_NUM_EPS; i++) {
 321         if (endpoints[i][d].state & EP_STATE_ALLOCATED)
 322             continue;
 323
 324         endpoints[i][d].state |= EP_STATE_ALLOCATED;
 325
 326         if (dir == USB_DIR_IN) {
 327             USB_IEP_CTRL(i) = USB_EP_CTRL_FLUSH |
 328                               USB_EP_CTRL_SNAK  |
 329                               USB_EP_CTRL_ACT   |
 330                               (type << 4);
 331             USB_DEV_EP_INTR_MASK &= ~(1<<i);
 332         } else {
 333             USB_OEP_CTRL(i) = USB_EP_CTRL_FLUSH |
 334                               USB_EP_CTRL_SNAK  |
 335                               USB_EP_CTRL_ACT   |
 336                               (type << 4);
 337             USB_DEV_EP_INTR_MASK &= ~(1<<(16+i));
 338         }
 339         /* logf("usb_drv_request_endpoint(%d, %d): returning %02x\n", type, dir, i | dir); */
 340         return i | dir;
 341     }
 342
 343     logf("usb_drv_request_endpoint(%d, %d): no free endpoint found\n", type, dir);
 344     return -1;
 345 }
 346
 347 void usb_drv_release_endpoint(int ep)
 348 {
 349     int i = ep & 0x7f;
 350     int d = ep & USB_DIR_IN ? 0 : 1;
 351
 352     if (i >= USB_NUM_EPS)
 353         return;
 354     /*
 355      * Check for control EP and ignore it.
 356      * Unfortunately the usb core calls
 357      * usb_drv_release_endpoint() for ep=0..(USB_NUM_ENDPOINTS-1),
 358      * but doesn't request a new control EP after that...
 359      */
 360     if (i == 0 || /* Don't mask control EP */
 361         (i == 2 && d == 1)) /* See reset_endpoints(), EP2_OUT == EP0_OUT */
 362         return;
 363
 364     if (!(endpoints[i][d].state & EP_STATE_ALLOCATED))
 365         return;
 366
 367     /* logf("usb_drv_release_endpoint(%d, %d)\n", i, d); */
 368     endpoints[i][d].state = 0;
 369     USB_DEV_EP_INTR_MASK |= (1<<(16*d+i));
 370     USB_EP_CTRL(i, !d) = USB_EP_CTRL_FLUSH | USB_EP_CTRL_SNAK;
 371 }
 372
 373 void usb_drv_cancel_all_transfers(void)
 374 {
 375     logf("usb_drv_cancel_all_transfers()\n");
 376     return;
 377
 378     int flags = disable_irq_save();
 379     reset_endpoints(0);
 380     restore_irq(flags);
 381 }
 382
 383 int usb_drv_recv(int ep, void *ptr, int len)
 384 {
 385     struct usb_dev_dma_desc *uc_desc = endpoints[ep][1].uc_desc;
 386
 387     ep &= 0x7f;
 388     logf("usb_drv_recv(%d,%x,%d)\n", ep, (int)ptr, len);
 389
 390     if ((int)ptr & 31) {
 391         logf("addr %08x not aligned!\n", (int)ptr);
 392     }
 393
 394     endpoints[ep][1].state |= EP_STATE_BUSY;
 395     endpoints[ep][1].len = len;
 396     endpoints[ep][1].rc = -1;
 397
 398     /* remove data buffer from cache */
 399     invalidate_dcache();
 400
 401     /* DMA setup */
 402     uc_desc->status    = USB_DMA_DESC_BS_HST_RDY |
 403                          USB_DMA_DESC_LAST |
 404                          len;
 405     if (len == 0) {
 406         uc_desc->status   |= USB_DMA_DESC_ZERO_LEN;
 407         uc_desc->data_ptr  = 0;
 408     } else {
 409         uc_desc->data_ptr  = ptr;
 410     }
 411     USB_OEP_DESC_PTR(ep) = (int)&dmadescs[ep][1];
 412     USB_OEP_STS(ep)      = USB_EP_STAT_OUT_RCVD; /* clear status */
 413     USB_OEP_CTRL(ep)    |= USB_EP_CTRL_CNAK;
 414
 415     return 0;
 416 }
 417
 418 #if defined(LOGF_ENABLE)
 419 static char hexbuf[1025];
 420 static char hextab[16] = "0123456789abcdef";
 421
 422 char *make_hex(char *data, int len)
 423 {
 424     int i;
 425     if (!((int)data & 0x40000000))
 426         data = AS3525_UNCACHED_ADDR(data); /* don't pollute the cache */
 427
 428     if (len > 512)
 429         len = 512;
 430
 431     for (i=0; i<len; i++) {
 432         hexbuf[2*i  ] = hextab[(unsigned char)data[i] >> 4 ];
 433         hexbuf[2*i+1] = hextab[(unsigned char)data[i] & 0xf];
 434     }
 435     hexbuf[2*i] = 0;
 436
 437     return hexbuf;
 438 }
 439 #endif
 440
 441 void ep_send(int ep, void *ptr, int len)
 442 {
 443     struct usb_dev_dma_desc *uc_desc = endpoints[ep][0].uc_desc;
 444
 445     endpoints[ep][0].state |= EP_STATE_BUSY;
 446     endpoints[ep][0].len = len;
 447     endpoints[ep][0].rc = -1;
 448
 449     /* Make sure data is committed to memory */
 450     clean_dcache();
 451
 452     logf("xx%s\n", make_hex(ptr, len));
 453
 454     uc_desc->status    = USB_DMA_DESC_BS_HST_RDY |
 455                          USB_DMA_DESC_LAST |
 456                          len;
 457     if (len == 0)
 458         uc_desc->status |= USB_DMA_DESC_ZERO_LEN;
 459
 460     uc_desc->data_ptr  = ptr;
 461
 462     USB_IEP_DESC_PTR(ep) = (int)&dmadescs[ep][0];
 463     USB_IEP_STS(ep)      = 0xffffffff; /* clear status */
 464     /* start transfer */
 465     USB_IEP_CTRL(ep)     |= USB_EP_CTRL_CNAK | USB_EP_CTRL_PD;
 466     /* HW automatically sets NAK bit later */
 467 }
 468
 469 int usb_drv_send(int ep, void *ptr, int len)
 470 {
 471     logf("usb_drv_send(%d,%x,%d): ", ep, (int)ptr, len);
 472
 473     ep &= 0x7f;
 474     ep_send(ep, ptr, len);
 475     while (endpoints[ep][0].state & EP_STATE_BUSY)
 476         wakeup_wait(&endpoints[ep][0].complete, TIMEOUT_BLOCK);
 477
 478     return endpoints[ep][0].rc;
 479 }
 480
 481 int usb_drv_send_nonblocking(int ep, void *ptr, int len)
 482 {
 483     logf("usb_drv_send_nonblocking(%d,%x,%d): ", ep, (int)ptr, len);
 484     ep &= 0x7f;
 485     endpoints[ep][0].state |= EP_STATE_ASYNC;
 486     ep_send(ep, ptr, len);
 487     return 0;
 488 }
 489
 490 static void handle_in_ep(int ep)
 491 {
 492     int ep_sts = USB_IEP_STS(ep) & ~USB_IEP_STS_MASK(ep);
 493
 494     if (ep > 3)
 495         panicf("in_ep > 3?!");
 496
 497     USB_IEP_STS(ep) = ep_sts; /* ack */
 498
 499     if (ep_sts & USB_EP_STAT_BNA) { /* Buffer was not set up */
 500         logf("ep%d IN, status %x (BNA)\n", ep, ep_sts);
 501         panicf("ep%d IN 0x%x (BNA)", ep, ep_sts);
 502     }
 503
 504     if (ep_sts & USB_EP_STAT_TDC) {
 505         endpoints[ep][0].state &= ~EP_STATE_BUSY;
 506         endpoints[ep][0].rc = 0;
 507         logf("EP%d %x %stx done len %x stat %08x\n",
 508              ep, ep_sts, endpoints[ep][0].state & EP_STATE_ASYNC ? "async " :"",
 509              endpoints[ep][0].len,
 510              endpoints[ep][0].uc_desc->status);
 511         if (endpoints[ep][0].state & EP_STATE_ASYNC) {
 512             endpoints[ep][0].state &= ~EP_STATE_ASYNC;
 513             usb_core_transfer_complete(ep, USB_DIR_IN, 0, endpoints[ep][0].len);
 514         } else {
 515             wakeup_signal(&endpoints[ep][0].complete);
 516         }
 517         ep_sts &= ~USB_EP_STAT_TDC;
 518     }
 519
 520     if (ep_sts) {
 521         logf("ep%d IN, hwstat %lx, epstat %x\n", ep, USB_IEP_STS(ep), endpoints[ep][0].state);
 522         panicf("ep%d IN 0x%x", ep, ep_sts);
 523     }
 524
 525     /* HW automatically disables RDE, re-enable it */
 526     /* But this an IN ep, I wonder... */
 527     USB_DEV_CTRL |= USB_DEV_CTRL_RDE;
 528 }
 529
 530 static void handle_out_ep(int ep)
 531 {
 532     struct usb_ctrlrequest *req = (void*)AS3525_UNCACHED_ADDR(&setup_desc->data1);
 533     int ep_sts = USB_OEP_STS(ep) & ~USB_OEP_STS_MASK(ep);
 534     struct usb_dev_dma_desc *uc_desc = endpoints[ep][1].uc_desc;
 535
 536     if (ep > 3)
 537         panicf("out_ep > 3!?");
 538
 539     USB_OEP_STS(ep) = ep_sts; /* ACK */
 540
 541     if (ep_sts & USB_EP_STAT_BNA) { /* Buffer was not set up */
 542         logf("ep%d OUT, status %x (BNA)\n", ep, ep_sts);
 543         panicf("ep%d OUT 0x%x (BNA)", ep, ep_sts);
 544     }
 545
 546     if (ep_sts & USB_EP_STAT_OUT_RCVD) {
 547         int dma_sts = uc_desc->status;
 548         int dma_len = dma_sts & 0xffff;
 549
 550         if (!(dma_sts & USB_DMA_DESC_ZERO_LEN)) {
 551              logf("EP%d OUT token, st:%08x len:%d frm:%x data=%s epstate=%d\n",
 552                  ep, dma_sts & 0xf8000000, dma_len, (dma_sts >> 16) & 0x7ff,
 553                  make_hex(uc_desc->data_ptr, dma_len), endpoints[ep][1].state);
 554              /*
 555               * If parts of the just dmaed range are in cache, dump them now.
 556               */
 557              dump_dcache_range(uc_desc->data_ptr, dma_len);
 558         } else{
 559              logf("EP%d OUT token, st:%08x frm:%x (no data)\n", ep,
 560                  dma_mst, dma_frm);
 561         }
 562
 563         if (endpoints[ep][1].state & EP_STATE_BUSY) {
 564             endpoints[ep][1].state &= ~EP_STATE_BUSY;
 565             endpoints[ep][1].rc = 0;
 566             usb_core_transfer_complete(ep, USB_DIR_OUT, 0, dma_len);
 567         } else {
 568             logf("EP%d OUT, but no one was listening?\n", ep);
 569         }
 570
 571         USB_OEP_CTRL(ep) |= USB_EP_CTRL_SNAK; /* make sure NAK is set */
 572
 573         ep_sts &= ~USB_EP_STAT_OUT_RCVD;
 574     }
 575
 576     if (ep_sts & USB_EP_STAT_SETUP_RCVD) {
 577         static struct usb_ctrlrequest req_copy;
 578
 579         req_copy = *req;
 580         logf("t%ld:got SETUP packet: type=%d req=%d val=%d ind=%d len=%d\n",
 581              current_tick,
 582              req->bRequestType,
 583              req->bRequest,
 584              req->wValue,
 585              req->wIndex,
 586              req->wLength);
 587
 588         usb_core_control_request(&req_copy);
 589         setup_desc_init(setup_desc);
 590
 591         ep_sts &= ~USB_EP_STAT_SETUP_RCVD;
 592     }
 593
 594     if (ep_sts) {
 595         logf("ep%d OUT, status %x\n", ep, ep_sts);
 596         panicf("ep%d OUT 0x%x", ep, ep_sts);
 597     }
 598
 599     /* HW automatically disables RDE, re-enable it */
 600     /* THEORY: Because we only set up one DMA buffer... */
 601     USB_DEV_CTRL |= USB_DEV_CTRL_RDE;
 602 }
 603
 604 /* interrupt service routine */
 605 void INT_USB(void)
 606 {
 607     int ep = USB_DEV_EP_INTR & ~USB_DEV_EP_INTR_MASK;
 608     int intr = USB_DEV_INTR & ~USB_DEV_INTR_MASK;
 609
 610     /* ACK interrupt sources */
 611     USB_DEV_EP_INTR = ep;
 612     USB_DEV_INTR = intr;
 613
 614     /* Handle endpoint interrupts */
 615     while (ep) {
 616         int onebit = 31-__builtin_clz(ep);
 617
 618         if (onebit < 16) handle_in_ep(onebit);
 619         else handle_out_ep(onebit-16);
 620
 621         ep &= ~(1 << onebit);
 622     }
 623
 624     /* Handle general device interrupts */
 625     if (intr) {
 626         if (intr & USB_DEV_INTR_SET_INTERFACE) {/* SET_INTERFACE received */
 627             logf("set interface\n");
 628             panicf("set interface");
 629             intr &= ~USB_DEV_INTR_SET_INTERFACE;
 630         }
 631         if (intr & USB_DEV_INTR_SET_CONFIG) {/* SET_CONFIGURATION received */
 632             /*
 633              * This is handled in HW, we have to fake a request here
 634              * for usb_core.
 635              */
 636             static struct usb_ctrlrequest set_config = {
 637             bRequestType: USB_TYPE_STANDARD | USB_RECIP_DEVICE,
 638             bRequest: USB_REQ_SET_CONFIGURATION,
 639             wValue: 0,
 640             wIndex: 0,
 641             wLength: 0,
 642             };
 643
 644             logf("set config\n");
 645
 646             set_config.wValue = USB_DEV_STS & USB_DEV_STS_MASK_CFG;
 647             usb_core_control_request(&set_config);
 648
 649             /* Tell the HW we handled the request */
 650             USB_DEV_CTRL |= USB_DEV_CTRL_APCSR_DONE;
 651             intr &= ~USB_DEV_INTR_SET_CONFIG;
 652         }
 653         if (intr & USB_DEV_INTR_EARLY_SUSPEND) {/* idle >3ms detected */
 654             logf("usb idle\n");
 655             intr &= ~USB_DEV_INTR_EARLY_SUSPEND;
 656         }
 657         if (intr & USB_DEV_INTR_USB_RESET) {/* usb reset from host? */
 658             logf("usb reset\n");
 659             reset_endpoints(1);
 660             usb_core_bus_reset();
 661             intr &= ~USB_DEV_INTR_USB_RESET;
 662         }
 663         if (intr & USB_DEV_INTR_USB_SUSPEND) {/* suspend req from host? */
 664             logf("usb suspend\n");
 665             intr &= ~USB_DEV_INTR_USB_SUSPEND;
 666         }
 667         if (intr & USB_DEV_INTR_SOF) {/* sof received */
 668             logf("sof\n");
 669             intr &= ~USB_DEV_INTR_SOF;
 670         }
 671         if (intr & USB_DEV_INTR_SVC) {/* device status changed */
 672             logf("svc: %08x otg: %08x\n", (int)USB_DEV_STS, (int)USB_OTG_CSR);
 673             intr &= ~USB_DEV_INTR_SVC;
 674         }
 675         if (intr & USB_DEV_INTR_ENUM_DONE) {/* speed enumeration complete */
 676             int spd = USB_DEV_STS & USB_DEV_STS_MASK_SPD;  /* Enumerated Speed */
 677
 678             logf("speed enum complete: ");
 679             if (spd == USB_DEV_STS_SPD_HS) logf("hs\n");
 680             if (spd == USB_DEV_STS_SPD_FS) logf("fs\n");
 681             if (spd == USB_DEV_STS_SPD_LS) logf("ls\n");
 682
 683             USB_PHY_EP0_INFO = 0x00200000       |
 684                                USB_CSR_DIR_OUT  |
 685                                USB_CSR_TYPE_CTL;
 686             USB_PHY_EP1_INFO = 0x00200000       |
 687                                USB_CSR_DIR_IN   |
 688                                USB_CSR_TYPE_CTL;
 689             USB_PHY_EP2_INFO = 0x00200001       |
 690                                USB_CSR_DIR_IN   |
 691                                USB_CSR_TYPE_BULK;
 692             USB_PHY_EP3_INFO = 0x00200001       |
 693                                USB_CSR_DIR_IN   |
 694                                USB_CSR_TYPE_BULK;
 695             USB_DEV_CTRL |= USB_DEV_CTRL_APCSR_DONE;
 696             USB_IEP_CTRL(0) |= USB_EP_CTRL_ACT;
 697             USB_OEP_CTRL(0) |= USB_EP_CTRL_ACT;
 698             intr &= ~USB_DEV_INTR_ENUM_DONE;
 699         }
 700         if (intr)
 701             panicf("usb devirq 0x%x", intr);
 702     }
 703
 704     if (!(USB_DEV_CTRL & USB_DEV_CTRL_RDE)){
 705         logf("re-enabling receive DMA\n");
 706         USB_DEV_CTRL |= USB_DEV_CTRL_RDE;
 707     }
 708
 709 }
 710
 711 /* (not essential? , not implemented in usb-tcc.c) */
 712 void usb_drv_set_test_mode(int mode)
 713 {
 714     (void)mode;
 715 }
 716
 717 /* handled internally by controller */
 718 void usb_drv_set_address(int address)
 719 {
 720     (void)address;
 721 }
 722
 723 void usb_drv_stall(int ep, bool stall, bool in)
 724 {
 725    if (stall) USB_EP_CTRL(ep, in) |= USB_EP_CTRL_STALL;
 726    else USB_EP_CTRL(ep, in) &= ~USB_EP_CTRL_STALL;
 727 }
 728
 729 bool usb_drv_stalled(int ep, bool in)
 730 {
 731     return USB_EP_CTRL(ep, in) & USB_EP_CTRL_STALL;
 732 }
 733
 734 #else
 735
 736 void usb_attach(void)
 737 {
 738 }
 739
 740 void usb_drv_init(void)
 741 {
 742 }
 743
 744 void usb_drv_exit(void)
 745 {
 746 }
 747
 748 int usb_drv_port_speed(void)
 749 {
 750     return 0;
 751 }
 752
 753 int usb_drv_request_endpoint(int type, int dir)
 754 {
 755     (void)type;
 756     (void)dir;
 757
 758     return -1;
 759 }
 760
 761 void usb_drv_release_endpoint(int ep)
 762 {
 763     (void)ep;
 764 }
 765
 766 void usb_drv_cancel_all_transfers(void)
 767 {
 768 }
 769
 770 void usb_drv_set_test_mode(int mode)
 771 {
 772     (void)mode;
 773 }
 774
 775 void usb_drv_set_address(int address)
 776 {
 777     (void)address;
 778 }
 779
 780 int usb_drv_recv(int ep, void *ptr, int len)
 781 {
 782     (void)ep;
 783     (void)ptr;
 784     (void)len;
 785
 786     return -1;
 787 }
 788
 789 int usb_drv_send(int ep, void *ptr, int len)
 790 {
 791     (void)ep;
 792     (void)ptr;
 793     (void)len;
 794
 795     return -1;
 796 }
 797
 798 int usb_drv_send_nonblocking(int ep, void *ptr, int len)
 799 {
 800     (void)ep;
 801     (void)ptr;
 802     (void)len;
 803
 804     return -1;
 805 }
 806
 807 void usb_drv_stall(int ep, bool stall, bool in)
 808 {
 809     (void)ep;
 810     (void)stall;
 811     (void)in;
 812 }
 813
 814 bool usb_drv_stalled(int ep, bool in)
 815 {
 816     (void)ep;
 817     (void)in;
 818
 819     return 0;
 820 }
 821
 822 #endif