3 /* These output formats should be in the config-files */
6 OUTPUT_FORMAT(elf32-m68k)
8 OUTPUT_FORMAT(elf32-littlearm)
10 OUTPUT_FORMAT(elf32-sh)
11 #elif defined(CPU_MIPS)
12 OUTPUT_FORMAT(elf32-littlemips)
14 /* We can have an #error here we don't use this file when build sims! */
15 #error Unknown CPU architecture
19 #define STUBOFFSET 0x10000
26 #define NOCACHE_BASE 0x10000000
28 #define NOCACHE_BASE 0x28000000
30 #define CACHEALIGN_SIZE 16
34 /* Default to no offset if target doesn't define this */
35 #define NOCACHE_BASE 0x00000000
38 #if CONFIG_CPU==DM320 || CONFIG_CPU==IMX31L
39 /* Give this 1 meg to allow it to align to the MMU boundary */
41 #ifndef LCD_NATIVE_WIDTH
42 #define LCD_NATIVE_WIDTH LCD_WIDTH
45 #ifndef LCD_NATIVE_HEIGHT
46 #define LCD_NATIVE_HEIGHT LCD_HEIGHT
49 #define LCD_FUDGE LCD_NATIVE_WIDTH%32
50 #define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
51 #define LCD_TTB_AREA 0x100000*((LCD_BUFFER_SIZE>>19)+1)
53 #define LCD_TTB_AREA 0x100000
56 #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_TTB_AREA
58 #elif CONFIG_CPU==S3C2440
60 /* must be 16Kb (0x4000) aligned */
61 #define TTB_SIZE (0x4000)
62 #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE
64 #elif CONFIG_CPU==TCC7801
66 #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE
68 #elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
70 #define DRAMORIG DRAM_ORIG
71 #if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
72 #define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - TTB_SIZE)
74 #define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - TTB_SIZE)
78 /* default to full RAM (minus codecs&plugins) unless specified otherwise */
80 #define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE
83 /* MCF5249 have 96KB of IRAM */
84 #if CONFIG_CPU == MCF5249
85 #define DRAMORIG 0x31000000
86 #define IRAMORIG 0x1000c000
87 #define IRAMSIZE 0xc000
89 /* MCF5250 have 128KB of IRAM */
90 #elif CONFIG_CPU == MCF5250
91 #define DRAMORIG 0x31000000
92 #define IRAMORIG 0x1000c000
93 #define IRAMSIZE 0x14000
95 #elif CONFIG_CPU == PP5022 || CONFIG_CPU == PP5024
96 /* PP5022/24 have 128KB of IRAM */
97 #define DRAMORIG 0x00000000
98 #define IRAMORIG 0x4000c000
99 #define IRAMSIZE 0x14000
101 #elif defined(CPU_PP)
102 /* all other PP's have 96KB of IRAM */
103 #define DRAMORIG 0x00000000
104 #define IRAMORIG 0x4000c000
105 #define IRAMSIZE 0x0c000
107 #elif CONFIG_CPU == PNX0101
108 #define DRAMORIG 0xc00000 + STUBOFFSET
109 #define IRAMORIG 0x407000
110 #define IRAMSIZE 0x9000
112 #elif CONFIG_CPU == IMX31L || CONFIG_CPU == S3C2440
113 #define DRAMORIG 0x0 + STUBOFFSET
117 #elif CONFIG_CPU==DM320
118 #define DRAMORIG 0x00900000 + STUBOFFSET
120 /* The bit of IRAM that is available is used in the core */
123 #elif defined(CPU_TCC780X) || defined(CPU_TCC77X)
124 #define DRAMORIG 0x20000000
125 /*#define IRAMORIG 0x1000c000
126 #define IRAMSIZE 0xc000*/
130 #elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
131 #if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
132 #define IRAMSIZE 0 /* simulates no IRAM since codec is already entirely in IRAM */
133 #define CODEC_ORIGIN (IRAM_ORIG + IRAM_SIZE - CODEC_SIZE)
134 #define PLUGIN_ORIGIN (DRAM_ORIG + DRAMSIZE)
136 #define IRAMORIG (IRAM_ORIG + 0x20000)
137 #define IRAMSIZE (IRAM_ORIG + IRAM_SIZE - IRAMORIG)
140 #elif CONFIG_CPU==S5L8700
141 #define DRAMORIG 0x08000000
142 #define IRAMORIG (0x00000000 + (64*1024))
143 #define IRAMSIZE (64*1024)
145 #elif CONFIG_CPU==S5L8701
146 #define DRAMORIG 0x08000000
147 #define IRAMORIG (0x00000000 + (96*1024))
148 #define IRAMSIZE (80*1024)
150 #elif CONFIG_CPU == JZ4732
151 #define DRAMORIG 0x80004000 + STUBOFFSET
154 /* The bit of IRAM that is available is used in the core */
156 #define DRAMORIG 0x09000000 + STUBOFFSET
159 #define PLUGIN_LENGTH PLUGIN_BUFFER_SIZE
162 #ifndef CODEC_ORIGIN /* targets can specify another origin */
163 #define CODEC_ORIGIN (DRAMORIG + (DRAMSIZE))
166 #ifndef PLUGIN_ORIGIN /* targets can specify another origin */
167 #define PLUGIN_ORIGIN (CODEC_ORIGIN + CODEC_SIZE)
171 #define THIS_LENGTH CODEC_SIZE
172 #define THIS_ORIGIN CODEC_ORIGIN
173 #elif defined OVERLAY_OFFSET
174 #define THIS_LENGTH (DRAMSIZE - OVERLAY_OFFSET)
175 #define THIS_ORIGIN (DRAMORIG + OVERLAY_OFFSET)
177 #define THIS_LENGTH PLUGIN_LENGTH
178 #define THIS_ORIGIN PLUGIN_ORIGIN
183 PLUGIN_RAM : ORIGIN = THIS_ORIGIN, LENGTH = THIS_LENGTH
184 #if defined(IRAMSIZE) && IRAMSIZE != 0
185 PLUGIN_IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
192 _plugin_start_addr = .;
193 plugin_start_addr = .;
200 #if defined(IRAMSIZE) && IRAMSIZE == 0
212 #if defined(IRAMSIZE) && IRAMSIZE == 0
221 #if defined(IRAMSIZE) && IRAMSIZE == 0
226 #if NOCACHE_BASE != 0
227 .ncdata . + NOCACHE_BASE :
229 . = ALIGN(CACHEALIGN_SIZE);
231 . = ALIGN(CACHEALIGN_SIZE);
232 /* EABI currently needs iramcopy defined here, otherwise .iram can sometimes
233 have an incorrect load address, breaking codecs. */
234 #if defined(IRAMSIZE)
235 iramcopy = . - NOCACHE_BASE;
238 /* This definition is used when NOCACHE_BASE is 0. The address offset bug only
239 seems to occur when the empty .ncdata is present. */
240 #elif defined(IRAMSIZE)
252 #if defined(IRAMSIZE) && IRAMSIZE != 0
253 .iram IRAMORIG : AT ( iramcopy)
274 plugin_bss_start = .;
276 #if defined(IRAMSIZE) && IRAMSIZE == 0
283 #if NOCACHE_BASE != 0
284 .ncbss . + NOCACHE_BASE (NOLOAD) :
286 . = ALIGN(CACHEALIGN_SIZE);
288 . = ALIGN(CACHEALIGN_SIZE);
293 .pluginend . - NOCACHE_BASE :
295 _plugin_end_addr = .;
299 /* Special trick to avoid a linker error when no other sections are
300 left after garbage collection (plugin not for this platform) */