firmware/target/arm/tms320dm320/timer-dm320.c

   1 /***************************************************************************
   2 *             __________               __   ___.
   3 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7 *                     \/            \/     \/    \/            \/
   8 * $Id$
   9 *
  10 * Copyright (C) 2007 by Karl Kurbjun
  11 *
  12 * This program is free software; you can redistribute it and/or
  13 * modify it under the terms of the GNU General Public License
  14 * as published by the Free Software Foundation; either version 2
  15 * of the License, or (at your option) any later version.
  16 *
  17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18 * KIND, either express or implied.
  19 *
  20 ****************************************************************************/
  21
  22 #include "config.h"
  23 #include "cpu.h"
  24 #include "system.h"
  25 #include "timer.h"
  26 #include "logf.h"
  27
  28 /* GPB0/TOUT0 should already have been configured as output so that pin
  29   should not be a functional pin and TIMER0 output unseen there */
  30 void TIMER0(void)  __attribute__ ((section(".icode")));
  31 void TIMER0(void)
  32 {
  33     IO_INTC_IRQ0 = INTR_IRQ0_TMR0; /* clear TIMER0 interrupt */
  34     if (pfn_timer != NULL)
  35         pfn_timer();
  36 }
  37
  38 bool timer_set(long cycles, bool start)
  39 {
  40     int oldlevel;
  41     unsigned int divider=cycles, prescaler=0;
  42
  43     if(cycles<1)
  44         return false;
  45
  46     oldlevel = set_irq_level(HIGHEST_IRQ_LEVEL);
  47
  48     IO_CLK_MOD2 |= CLK_MOD2_TMR0; //enable TIMER0 clock!!!!!!!!!
  49
  50     IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP;
  51
  52     if (start && pfn_unregister != NULL)
  53     {
  54         pfn_unregister();
  55         pfn_unregister = NULL;
  56     }
  57
  58     oldlevel = disable_irq_save();
  59
  60     /* Increase prescale values starting from 0 to make the cycle count fit */
  61     while(divider>65535 && prescaler<1024)
  62     {
  63         prescaler++;
  64         divider=cycles/(prescaler+1);
  65     }
  66
  67     IO_TIMER0_TMPRSCL = prescaler;
  68     IO_TIMER0_TMDIV = divider;
  69
  70     restore_irq(oldlevel);
  71
  72     return true;
  73 }
  74
  75 static void stop_timer(void)
  76 {
  77     IO_INTC_EINT0 &= ~INTR_EINT0_TMR0; //disable TIMER0 interrupt
  78
  79     IO_INTC_IRQ0 = INTR_IRQ0_TMR0; //clear TIMER0 interrupt
  80
  81     IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_STOP;
  82
  83     IO_CLK_MOD2 &= ~CLK_MOD2_TMR0; //disable TIMER0 clock
  84 }
  85
  86 bool timer_start(void)
  87 {
  88     int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS);
  89
  90     stop_timer();
  91
  92     IO_CLK_MOD2 |= CLK_MOD2_TMR0; //enable TIMER0 clock!!!!!!!!!
  93
  94     /* Turn Timer0 to Free Run mode */
  95     IO_TIMER0_TMMD = CONFIG_TIMER0_TMMD_FREE_RUN;
  96
  97     IO_INTC_EINT0 |= INTR_EINT0_TMR0; //enable TIMER0 interrupt
  98
  99     restore_interrupt(oldstatus);
 100
 101     return true;
 102 }
 103
 104 void timer_stop(void)
 105 {
 106     int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS);
 107     stop_timer();
 108     restore_interrupt(oldstatus);
 109 }