1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright (C) 2008 by Maurus Cuelenaere
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
22 #ifndef __SYSTEM_TARGET_H_
23 #define __SYSTEM_TARGET_H_
29 #define CACHE_SIZE 16*1024
30 #define CACHE_LINE_SIZE 32
33 /* This one returns the old status */
34 static inline int set_interrupt_status(int status
, int mask
)
36 unsigned int res
, oldstatus
;
38 res
= oldstatus
= read_c0_status();
40 res
|= (status
& mask
);
46 static inline void enable_interrupt(void)
49 set_c0_status(ST0_IE
);
52 static inline void disable_interrupt(void)
55 clear_c0_status(ST0_IE
);
58 static inline int disable_interrupt_save(int mask
)
60 return set_interrupt_status(0, mask
);
63 static inline void restore_interrupt(int status
)
65 write_c0_status(status
);
68 #define disable_irq() disable_interrupt()
69 #define enable_irq() enable_interrupt()
70 #define HIGHEST_IRQ_LEVEL 0
71 #define set_irq_level(status) set_interrupt_status((status), ST0_IE)
72 #define disable_irq_save() disable_interrupt_save(ST0_IE)
73 #define restore_irq(c0_status) restore_interrupt(c0_status)
75 #define swap16(x) (((x) & 0xff) << 8 | ((x) >> 8) & 0xff)
76 #define swap32(x) (((x) & 0xff) << 24 | ((x) & 0xff00) << 8 | \
77 ((x) & 0xff0000) >> 8 | ((x) >> 24) & 0xff)
79 #define UNCACHED_ADDRESS(addr) ((unsigned int)(addr) | 0xA0000000)
80 #define UNCACHED_ADDR(x) UNCACHED_ADDRESS((x))
81 #define PHYSADDR(x) ((x) & 0x1fffffff)
83 void system_enable_irq(unsigned int irq
);
84 void udelay(unsigned int usec
);
85 void mdelay(unsigned int msec
);
86 void dma_enable(void);
87 void dma_disable(void);
89 #define DMA_AIC_TX_CHANNEL 0
90 #define DMA_NAND_CHANNEL 1
91 #define DMA_USB_CHANNEL 2
92 #define DMA_LCD_CHANNEL 3
94 #define XDMA_CALLBACK(n) DMA ## n
95 #define DMA_CALLBACK(n) XDMA_CALLBACK(n)
97 #define DMA_IRQ(n) (IRQ_DMA_0 + (n))
98 #define GPIO_IRQ(n) (IRQ_GPIO_0 + (n))
100 #endif /* __SYSTEM_TARGET_H_ */