firmware/target/arm/tcc780x/ata-nand-tcc780x.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2008 Rob Purchase
  11  *
  12  * All files in this archive are subject to the GNU General Public License.
  13  * See the file COPYING in the source tree root for full license agreement.
  14  *
  15  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  16  * KIND, either express or implied.
  17  *
  18  ****************************************************************************/
  19 #include "ata.h"
  20 #include "ata-target.h"
  21 #include "system.h"
  22 #include <string.h>
  23 #include "led.h"
  24 #include "panic.h"
  25
  26 /* The NAND driver is currently work-in-progress and as such contains
  27    some dead code and debug stuff, such as the next few lines. */
  28
  29 #if defined(BOOTLOADER)
  30 #include "../../../../bootloader/common.h"  /* for printf */
  31 extern int line;
  32 #endif
  33
  34 /* for compatibility */
  35 int ata_spinup_time = 0;
  36
  37 long last_disk_activity = -1;
  38
  39 /** static, private data **/
  40 static bool initialized = false;
  41
  42 static long next_yield = 0;
  43 #define MIN_YIELD_PERIOD 2000
  44
  45 static struct mutex ata_mtx NOCACHEBSS_ATTR;
  46
  47 #define SECTOR_SIZE 512
  48
  49 /* TCC780x NAND Flash Controller */
  50
  51 #define NFC_CMD    (*(volatile unsigned long *)0xF0053000)
  52 #define NFC_SADDR  (*(volatile unsigned long *)0xF005300C)
  53 #define NFC_SDATA  (*(volatile unsigned long *)0xF0053040)
  54 #define NFC_WDATA  (*(volatile unsigned long *)0xF0053010)
  55 #define NFC_CTRL   (*(volatile unsigned long *)0xF0053050)
  56 #define NFC_IREQ   (*(volatile unsigned long *)0xF0053060)
  57 #define NFC_RST    (*(volatile unsigned long *)0xF0053064)
  58
  59 /* NFC_CTRL flags */
  60 #define NFC_16BIT (1<<26)
  61 #define NFC_CS0   (1<<23)
  62 #define NFC_CS1   (1<<22)
  63 #define NFC_READY (1<<20)
  64
  65 #define ECC_CTRL    (*(volatile unsigned long *)0xF005B000)
  66 #define ECC_BASE    (*(volatile unsigned long *)0xF005B004)
  67 #define ECC_CLR     (*(volatile unsigned long *)0xF005B00C)
  68 #define ECC_MLC0W   (*(volatile unsigned long *)0xF005B030)
  69 #define ECC_MLC1W   (*(volatile unsigned long *)0xF005B034)
  70 #define ECC_MLC2W   (*(volatile unsigned long *)0xF005B038)
  71 #define ECC_ERR     (*(volatile unsigned long *)0xF005B070)
  72 #define ECC_ERRADDR (*(volatile unsigned long *)0xF005B050)
  73 #define ECC_ERRDATA (*(volatile unsigned long *)0xF005B060)
  74
  75 /* ECC_CTRL flags */
  76 #define ECC_M4EN  (1<<6)
  77 #define ECC_ENC   (1<<27)
  78 #define ECC_READY (1<<26)
  79
  80 /* Chip characteristics, initialised by nand_get_chip_info() */
  81
  82 static int page_size       = 0;
  83 static int spare_size      = 0;
  84 static int pages_per_block = 0;
  85 static int blocks_per_bank = 0;
  86 static int pages_per_bank  = 0;
  87 static int row_cycles      = 0;
  88 static int col_cycles      = 0;
  89 static int total_banks     = 0;
  90 static int sectors_per_page    = 0;
  91 static int bytes_per_segment   = 0;
  92 static int sectors_per_segment = 0;
  93 static int segments_per_bank   = 0;
  94
  95 /* Maximum values for static buffers */
  96
  97 #define MAX_PAGE_SIZE       4096
  98 #define MAX_SPARE_SIZE      128
  99 #define MAX_BLOCKS_PER_BANK 8192
 100 #define MAX_PAGES_PER_BLOCK 128
 101
 102 /* In theory we can support 4 banks, but only 2 have been seen on 2/4/8Gb D2s. */
 103 #ifdef COWON_D2
 104 #define MAX_BANKS 2
 105 #else
 106 #define MAX_BANKS 4
 107 #endif
 108
 109 #define MAX_SEGMENTS (MAX_BLOCKS_PER_BANK * MAX_BANKS / 4)
 110
 111 /* Logical/Physical translation table */
 112
 113 struct lpt_entry
 114 {
 115     short chip;
 116     short phys_segment;
 117     //short segment_flag;
 118 };
 119 static struct lpt_entry lpt_lookup[MAX_SEGMENTS];
 120
 121 /* Write Caches */
 122
 123 #define MAX_WRITE_CACHES 8
 124
 125 struct write_cache
 126 {
 127     short chip;
 128     short phys_segment;
 129     short log_segment;
 130     short page_map[MAX_PAGES_PER_BLOCK * 4];
 131 };
 132 static struct write_cache write_caches[MAX_WRITE_CACHES];
 133
 134 static int write_caches_in_use = 0;
 135
 136 /* Read buffer */
 137
 138 unsigned int page_buf[(MAX_PAGE_SIZE + MAX_SPARE_SIZE) / 4];
 139
 140
 141 /* Conversion functions */
 142
 143 static inline int phys_segment_to_page_addr(int phys_segment, int page_in_seg)
 144 {
 145     int page_addr = phys_segment * pages_per_block * 2;
 146
 147     if (page_in_seg & 1)
 148     {
 149         /* Data is located in block+1 */
 150         page_addr += pages_per_block;
 151     }
 152
 153     if (page_in_seg & 2)
 154     {
 155         /* Data is located in second plane */
 156         page_addr += (blocks_per_bank/2) * pages_per_block;
 157     }
 158
 159     page_addr += page_in_seg/4;
 160
 161     return page_addr;
 162 }
 163
 164
 165 /* NAND physical access functions */
 166
 167 static void nand_chip_select(int chip)
 168 {
 169     if (chip == -1)
 170     {
 171         /* Disable both chip selects */
 172         GPIOB_CLEAR = (1<<21);
 173         NFC_CTRL |= NFC_CS0 | NFC_CS1;
 174     }
 175     else
 176     {
 177         /* NFC chip select */
 178         if (chip & 1)
 179         {
 180             NFC_CTRL &= ~NFC_CS0;
 181             NFC_CTRL |= NFC_CS1;
 182         }
 183         else
 184         {
 185             NFC_CTRL |= NFC_CS0;
 186             NFC_CTRL &= ~NFC_CS1;
 187         }
 188
 189         /* Secondary chip select */
 190         if (chip & 2)
 191         {
 192             GPIOB_SET = (1<<21);
 193         }
 194         else
 195         {
 196             GPIOB_CLEAR = (1<<21);
 197         }
 198     }
 199 }
 200
 201
 202 static void nand_read_id(int chip, unsigned char* id_buf)
 203 {
 204     int i;
 205
 206     /* Enable NFC bus clock */
 207     BCLKCTR |= DEV_NAND;
 208
 209     /* Reset NAND controller */
 210     NFC_RST = 0;
 211
 212     /* Set slow cycle timings since the chip is as yet unidentified */
 213     NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x353;
 214
 215     nand_chip_select(chip);
 216
 217     /* Set write protect */
 218     GPIOB_CLEAR = (1<<19);
 219
 220     /* Reset command */
 221     NFC_CMD = 0xFF;
 222
 223     /* Set 8-bit data width */
 224     NFC_CTRL &= ~NFC_16BIT;
 225
 226     /* Read ID command, single address cycle */
 227     NFC_CMD   = 0x90;
 228     NFC_SADDR = 0x00;
 229
 230     /* Read the 5 chip ID bytes */
 231     for (i = 0; i < 5; i++)
 232     {
 233         id_buf[i] = NFC_SDATA & 0xFF;
 234     }
 235
 236     nand_chip_select(-1);
 237
 238     /* Disable NFC bus clock */
 239     BCLKCTR &= ~DEV_NAND;
 240 }
 241
 242
 243 static void nand_read_uid(int chip, unsigned int* uid_buf)
 244 {
 245     int i;
 246
 247     /* Enable NFC bus clock */
 248     BCLKCTR |= DEV_NAND;
 249
 250     /* Set cycle timing (stp = 1, pw = 3, hold = 1) */
 251     NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x131;
 252
 253     nand_chip_select(chip);
 254
 255     /* Set write protect */
 256     GPIOB_CLEAR = 1<<19;
 257
 258     /* Set 8-bit data width */
 259     NFC_CTRL &= ~NFC_16BIT;
 260
 261     /* Undocumented (SAMSUNG specific?) commands set the chip into a
 262        special mode allowing a normally-hidden UID block to be read. */
 263     NFC_CMD = 0x30;
 264     NFC_CMD = 0x65;
 265
 266     /* Read command */
 267     NFC_CMD = 0x00;
 268
 269     /* Write row/column address */
 270     for (i = 0; i < col_cycles; i++) NFC_SADDR = 0;
 271     for (i = 0; i < row_cycles; i++) NFC_SADDR = 0;
 272
 273     /* End of read */
 274     NFC_CMD = 0x30;
 275
 276     /* Wait until complete */
 277     while (!(NFC_CTRL & NFC_READY)) {};
 278
 279     /* Copy data to buffer (data repeats after 8 words) */
 280     for (i = 0; i < 8; i++)
 281     {
 282         uid_buf[i] = NFC_WDATA;
 283     }
 284
 285     /* Reset the chip back to normal mode */
 286     NFC_CMD = 0xFF;
 287
 288     nand_chip_select(-1);
 289
 290     /* Disable NFC bus clock */
 291     BCLKCTR &= ~DEV_NAND;
 292 }
 293
 294
 295 static void nand_read_raw(int chip, int row, int column, int size, void* buf)
 296 {
 297     int i;
 298
 299     /* Enable NFC bus clock */
 300     BCLKCTR |= DEV_NAND;
 301
 302     /* Set cycle timing (stp = 1, pw = 3, hold = 1) */
 303     NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x131;
 304
 305     nand_chip_select(chip);
 306
 307     /* Set write protect */
 308     GPIOB_CLEAR = (1<<19);
 309
 310     /* Set 8-bit data width */
 311     NFC_CTRL &= ~NFC_16BIT;
 312
 313     /* Read command */
 314     NFC_CMD = 0x00;
 315
 316     /* Write column address */
 317     for (i = 0; i < col_cycles; i++)
 318     {
 319         NFC_SADDR = column & 0xFF;
 320         column = column >> 8;
 321     }
 322
 323     /* Write row address */
 324     for (i = 0; i < row_cycles; i++)
 325     {
 326         NFC_SADDR = row & 0xFF;
 327         row = row >> 8;
 328     }
 329
 330     /* End of read command */
 331     NFC_CMD = 0x30;
 332
 333     /* Wait until complete */
 334     while (!(NFC_CTRL & NFC_READY)) {};
 335
 336     /* Read data into page buffer */
 337     if (((unsigned int)buf & 3) || (size & 3))
 338     {
 339         /* Use byte copy since either the buffer or size are not word-aligned */
 340         /* TODO: Byte copy only where necessary (use words for mid-section) */
 341         for (i = 0; i < size; i++)
 342         {
 343             ((unsigned char*)buf)[i] = NFC_SDATA;
 344         }
 345     }
 346     else
 347     {
 348         /* Use 4-byte copy as buffer and size are both word-aligned */
 349         for (i = 0; i < (size/4); i++)
 350         {
 351             ((unsigned int*)buf)[i] = NFC_WDATA;
 352         }
 353     }
 354
 355     nand_chip_select(-1);
 356
 357     /* Disable NFC bus clock */
 358     BCLKCTR &= ~DEV_NAND;
 359 }
 360
 361
 362 static void nand_get_chip_info(void)
 363 {
 364     bool found = false;
 365     unsigned char manuf_id;
 366     unsigned char id_buf[8];
 367
 368     /* Read chip id from bank 0 */
 369     nand_read_id(0, id_buf);
 370
 371     manuf_id = id_buf[0];
 372
 373     switch (manuf_id)
 374     {
 375         case 0xEC:  /* SAMSUNG */
 376
 377             switch(id_buf[1]) /* Chip Id */
 378             {
 379                 case 0xD5:  /* K9LAG08UOM */
 380
 381                     page_size       = 2048;
 382                     spare_size      = 64;
 383                     pages_per_block = 128;
 384                     blocks_per_bank = 8192;
 385                     col_cycles      = 2;
 386                     row_cycles      = 3;
 387
 388                     found = true;
 389                     break;
 390
 391                 case 0xD7:  /* K9LBG08UOM */
 392
 393                     page_size       = 4096;
 394                     spare_size      = 128;
 395                     pages_per_block = 128;
 396                     blocks_per_bank = 8192;
 397                     col_cycles      = 2;
 398                     row_cycles      = 3;
 399
 400                     found = true;
 401                     break;
 402             }
 403             break;
 404     }
 405
 406     if (!found)
 407     {
 408         panicf("Unknown NAND: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x",
 409                 id_buf[0],id_buf[1],id_buf[2],id_buf[3],id_buf[4]);
 410     }
 411
 412     pages_per_bank      = blocks_per_bank * pages_per_block;
 413     segments_per_bank   = blocks_per_bank / 4;
 414     bytes_per_segment   = page_size * pages_per_block * 4;
 415     sectors_per_page    = page_size / SECTOR_SIZE;
 416     sectors_per_segment = bytes_per_segment / SECTOR_SIZE;
 417
 418     /* Establish how many banks are present */
 419     nand_read_id(1, id_buf);
 420
 421     if (id_buf[0] == manuf_id)
 422     {
 423         /* Bank 1 is populated, now check if banks 2/3 are valid */
 424         nand_read_id(2, id_buf);
 425
 426         if (id_buf[0] == manuf_id)
 427         {
 428             /* Bank 2 returned matching id - check if 2/3 are shadowing 0/1 */
 429             unsigned int uid_buf0[8];
 430             unsigned int uid_buf2[8];
 431
 432             nand_read_uid(0, uid_buf0);
 433             nand_read_uid(2, uid_buf2);
 434
 435             if (memcmp(uid_buf0, uid_buf2, 32) == 0)
 436             {
 437                 /* UIDs match, assume banks 2/3 are shadowing 0/1 */
 438                 total_banks = 2;
 439             }
 440             else
 441             {
 442                 /* UIDs differ, assume banks 2/3 are valid */
 443                 total_banks = 4;
 444             }
 445         }
 446         else
 447         {
 448             /* Bank 2 returned differing id - assume 2/3 are junk */
 449             total_banks = 2;
 450         }
 451     }
 452     else
 453     {
 454         /* Bank 1 returned differing id - assume it is junk */
 455         total_banks = 1;
 456     }
 457
 458     /*
 459        Sanity checks:
 460
 461        1. "BMP" tag at block 0, page 0, offset <page_size> [always present]
 462        2. Byte at <page_size>+4 contains number of banks [or 0xff if 1 bank]
 463
 464        If this is confirmed for all D2s we can simplify the above code and
 465        also remove the icky nand_read_uid() function.
 466      */
 467
 468     nand_read_raw(0,          /* bank */
 469                   0,          /* page */
 470                   page_size,  /* offset */
 471                   8, id_buf);
 472
 473     if (strncmp(id_buf, "BMP", 3)) panicf("BMP tag not present");
 474
 475     if (total_banks > 1)
 476     {
 477         if (id_buf[4] != total_banks) panicf("BMPM total_banks mismatch");
 478     }
 479 }
 480
 481
 482 static bool nand_read_sector_of_phys_page(int chip, int page,
 483                                           int sector, void* buf)
 484 {
 485     nand_read_raw(chip, page,
 486                   sector * (SECTOR_SIZE+16),
 487                   SECTOR_SIZE, buf);
 488
 489     /* TODO: Read the 16 spare bytes, perform ECC correction */
 490
 491     return true;
 492 }
 493
 494
 495 static bool nand_read_sector_of_phys_segment(int chip, int phys_segment,
 496                                              int page_in_seg, int sector,
 497                                              void* buf)
 498 {
 499     int page_addr = phys_segment_to_page_addr(phys_segment,
 500                                               page_in_seg);
 501
 502     return nand_read_sector_of_phys_page(chip, page_addr, sector, buf);
 503 }
 504
 505
 506 static bool nand_read_sector_of_logical_segment(int log_segment, int sector,
 507                                                 void* buf)
 508 {
 509     int page_in_segment = sector / sectors_per_page;
 510     int sector_in_page  = sector % sectors_per_page;
 511
 512     int chip = lpt_lookup[log_segment].chip;
 513     int phys_segment = lpt_lookup[log_segment].phys_segment;
 514
 515     /* Check if any of the write caches refer to this segment/page.
 516        If present we need to read the cached page instead. */
 517
 518     int cache_num = 0;
 519     bool found = false;
 520
 521     while (!found && cache_num < write_caches_in_use)
 522     {
 523         if (write_caches[cache_num].log_segment == log_segment
 524             && write_caches[cache_num].page_map[page_in_segment] != -1)
 525         {
 526             found = true;
 527             chip = write_caches[cache_num].chip;
 528             phys_segment = write_caches[cache_num].phys_segment;
 529             page_in_segment = write_caches[cache_num].page_map[page_in_segment];
 530         }
 531         else
 532         {
 533             cache_num++;
 534         }
 535     }
 536
 537     return nand_read_sector_of_phys_segment(chip, phys_segment,
 538                                             page_in_segment,
 539                                             sector_in_page, buf);
 540 }
 541
 542 #if 0   // LPT table is work-in-progress
 543
 544 static void read_lpt_block(int chip, int phys_segment)
 545 {
 546     int page = 1;   /* table starts at page 1 of segment */
 547     bool cont = true;
 548
 549     struct lpt_entry* lpt_ptr = NULL;
 550
 551     while (cont && page < pages_per_block)
 552     {
 553         int i = 0;
 554
 555         nand_read_sector_of_phys_segment(chip, phys_segment,
 556                                          page, 0, /* only sector 0 is used */
 557                                          page_buf);
 558
 559         /* Find out which chunk of the LPT table this section contains.
 560            Do this by reading the logical segment number of entry 0 */
 561         if (lpt_ptr == NULL)
 562         {
 563             int first_chip = page_buf[0] / segments_per_bank;
 564             int first_phys_segment = page_buf[0] % segments_per_bank;
 565
 566             unsigned char spare_buf[16];
 567
 568             nand_read_raw(first_chip,
 569                           phys_segment_to_page_addr(first_phys_segment, 0),
 570                           SECTOR_SIZE, /* offset */
 571                           16, spare_buf);
 572
 573             int first_log_segment = (spare_buf[6] << 8) | spare_buf[7];
 574
 575             lpt_ptr = &lpt_lookup[first_log_segment];
 576
 577 #if defined(BOOTLOADER) && 1
 578             printf("lpt @ %lx:%lx (ls:%lx)",
 579                    first_chip, first_phys_segment, first_log_segment);
 580 #endif
 581         }
 582
 583         while (cont && (i < SECTOR_SIZE/4))
 584         {
 585             if (page_buf[i] != 0xFFFFFFFF)
 586             {
 587                 lpt_ptr->chip = page_buf[i] / segments_per_bank;
 588                 lpt_ptr->phys_segment = page_buf[i] % segments_per_bank;
 589
 590                 lpt_ptr++;
 591                 i++;
 592             }
 593             else cont = false;
 594         }
 595         page++;
 596     }
 597 }
 598
 599 #endif
 600
 601
 602 static void read_write_cache_segment(int chip, int phys_segment)
 603 {
 604     int page;
 605     unsigned char spare_buf[16];
 606
 607     if (write_caches_in_use == MAX_WRITE_CACHES)
 608         panicf("Max NAND write caches reached");
 609
 610     write_caches[write_caches_in_use].chip = chip;
 611     write_caches[write_caches_in_use].phys_segment = phys_segment;
 612
 613     /* Loop over each page in the phys segment (from page 1 onwards).
 614        Read spare for 1st sector, store location of page in array. */
 615     for (page = 1; page < pages_per_block * 4; page++)
 616     {
 617         unsigned short cached_page;
 618         unsigned short log_segment;
 619
 620         nand_read_raw(chip, phys_segment_to_page_addr(phys_segment, page),
 621                       SECTOR_SIZE, /* offset to first sector's spare */
 622                       16, spare_buf);
 623
 624         cached_page = (spare_buf[3] << 8) | spare_buf[2]; /* why does endian */
 625         log_segment = (spare_buf[6] << 8) | spare_buf[7]; /* -ness differ? */
 626
 627         if (cached_page != 0xFFFF)
 628         {
 629             write_caches[write_caches_in_use].log_segment = log_segment;
 630             write_caches[write_caches_in_use].page_map[cached_page] = page;
 631         }
 632     }
 633     write_caches_in_use++;
 634 }
 635
 636
 637 /* TEMP testing functions */
 638
 639 #ifdef BOOTLOADER
 640
 641 #if 0
 642 static void display_page(int chip, int page)
 643 {
 644     int i;
 645     nand_read_raw(chip, page, 0, page_size+spare_size, page_buf);
 646
 647     for (i = 0; i < (page_size+spare_size)/4; i += 132)
 648     {
 649         int j,interesting = 0;
 650         line = 1;
 651         printf("c:%d p:%lx s:%d", chip, page, i/128);
 652
 653         for (j=i; j<(i+131); j++)
 654         {
 655             if (page_buf[j] != 0xffffffff) interesting = 1;
 656         }
 657
 658         if (interesting)
 659         {
 660             for (j=i; j<(i+131); j+=8)
 661             {
 662                 printf("%lx %lx %lx %lx %lx %lx %lx %lx",
 663                        page_buf[j],page_buf[j+1],page_buf[j+2],page_buf[j+3],
 664                        page_buf[j+4],page_buf[j+5],page_buf[j+6],page_buf[j+7]);
 665             }
 666             while (!button_read_device()) {};
 667             while (button_read_device()) {};
 668             reset_screen();
 669         }
 670     }
 671 }
 672 #endif
 673
 674 static void nand_test(void)
 675 {
 676     int segment = 0;
 677
 678     printf("%d banks", total_banks);
 679     printf("* %d pages", pages_per_bank);
 680     printf("* %d bytes per page", page_size);
 681
 682     while (lpt_lookup[segment].chip != -1
 683            && segment < segments_per_bank * total_banks)
 684     {
 685         segment++;
 686     }
 687     printf("%d sequential segments found (%dMb)",
 688            segment, (unsigned)(segment*bytes_per_segment)>>20);
 689 }
 690 #endif
 691
 692
 693 /* API Functions */
 694
 695 void ata_led(bool onoff)
 696 {
 697     led(onoff);
 698 }
 699
 700 int ata_read_sectors(IF_MV2(int drive,) unsigned long start, int incount,
 701                      void* inbuf)
 702 {
 703 #ifdef HAVE_MULTIVOLUME
 704     (void)drive; /* unused for now */
 705 #endif
 706     mutex_lock(&ata_mtx);
 707
 708     while (incount > 0)
 709     {
 710         int done = 0;
 711         int segment = start / sectors_per_segment;
 712         int secmod = start % sectors_per_segment;
 713
 714         while (incount > 0 && secmod < sectors_per_segment)
 715         {
 716             if (!nand_read_sector_of_logical_segment(segment, secmod, inbuf))
 717             {
 718                 mutex_unlock(&ata_mtx);
 719                 return -1;
 720             }
 721
 722             inbuf += SECTOR_SIZE;
 723             incount--;
 724             secmod++;
 725             done++;
 726         }
 727
 728         if (done < 0)
 729         {
 730             mutex_unlock(&ata_mtx);
 731             return -1;
 732         }
 733         start += done;
 734     }
 735
 736     mutex_unlock(&ata_mtx);
 737     return 0;
 738 }
 739
 740 int ata_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
 741                       const void* outbuf)
 742 {
 743     #warning function not implemented
 744     (void)start;
 745     (void)count;
 746     (void)outbuf;
 747     return -1;
 748 }
 749
 750 void ata_spindown(int seconds)
 751 {
 752     /* null */
 753     (void)seconds;
 754 }
 755
 756 bool ata_disk_is_active(void)
 757 {
 758     /* null */
 759     return 0;
 760 }
 761
 762 void ata_sleep(void)
 763 {
 764     /* null */
 765 }
 766
 767 void ata_spin(void)
 768 {
 769     /* null */
 770 }
 771
 772 /* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
 773 int ata_hard_reset(void)
 774 {
 775     /* null */
 776     return 0;
 777 }
 778
 779 int ata_soft_reset(void)
 780 {
 781     /* null */
 782     return 0;
 783 }
 784
 785 void ata_enable(bool on)
 786 {
 787     /* null - flash controller is enabled/disabled as needed. */
 788     (void)on;
 789 }
 790
 791 int ata_init(void)
 792 {
 793     int i, bank, phys_segment;
 794     unsigned char spare_buf[16];
 795
 796     if (initialized) return 0;
 797
 798     /* Get chip characteristics and number of banks */
 799     nand_get_chip_info();
 800
 801     for (i = 0; i < MAX_SEGMENTS; i++)
 802     {
 803         lpt_lookup[i].chip = -1;
 804         lpt_lookup[i].phys_segment = -1;
 805         //lpt_lookup[i].segment_flag = -1;
 806     }
 807
 808     write_caches_in_use = 0;
 809
 810     for (i = 0; i < MAX_WRITE_CACHES; i++)
 811     {
 812         int page;
 813
 814         write_caches[i].log_segment = -1;
 815         write_caches[i].chip = -1;
 816         write_caches[i].phys_segment = -1;
 817
 818         for (page = 0; page < MAX_PAGES_PER_BLOCK * 4; page++)
 819         {
 820             write_caches[i].page_map[page] = -1;
 821         }
 822     }
 823
 824     /* Scan banks to build up block translation table */
 825     for (bank = 0; bank < total_banks; bank++)
 826     {
 827         for (phys_segment = 0; phys_segment < segments_per_bank; phys_segment++)
 828         {
 829             /* Read spare bytes from first sector of each segment */
 830             nand_read_raw(bank, phys_segment_to_page_addr(phys_segment, 0),
 831                           SECTOR_SIZE, /* offset */
 832                           16, spare_buf);
 833
 834             switch (spare_buf[4]) /* block type */
 835             {
 836                 case 0x12:
 837                 {
 838                     /* Log->Phys Translation table (for Main data area) */
 839                     //read_lpt_block(bank, phys_segment);
 840                     break;
 841                 }
 842
 843                 case 0x13:
 844                 case 0x17:
 845                 {
 846                     /* Main data area segment */
 847                     int segment = (spare_buf[6] << 8) | spare_buf[7];
 848
 849                     if (segment < MAX_SEGMENTS)
 850                     {
 851                         /* Store in LPT if not present or 0x17 overrides 0x13 */
 852                         //if (lpt_lookup[segment].segment_flag == -1 ||
 853                         //    lpt_lookup[segment].segment_flag == 0x13)
 854                         {
 855                             lpt_lookup[segment].chip = bank;
 856                             lpt_lookup[segment].phys_segment = phys_segment;
 857                             //lpt_lookup[segment].segment_flag = spare_buf[4];
 858                         }
 859                     }
 860                     break;
 861                 }
 862
 863                 case 0x15:
 864                 {
 865                     /* Recently-written page data (for Main data area) */
 866                     read_write_cache_segment(bank, phys_segment);
 867                     break;
 868                 }
 869             }
 870         }
 871     }
 872
 873     initialized = true;
 874
 875 #ifdef BOOTLOADER
 876     /* TEMP - print out some diagnostics */
 877     nand_test();
 878 #endif
 879
 880     return 0;
 881 }
 882
 883
 884 /* TEMP: This will return junk, it's here for compilation only */
 885 unsigned short* ata_get_identify(void)
 886 {
 887     return (unsigned short*)0x21000000; /* Unused DRAM */
 888 }