firmware/export/wm8758.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2005 by Dave Chapman
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #ifndef _WM8758_H
  23 #define _WM8758_H
  24
  25 /* volume/balance/treble/bass interdependency */
  26 #define VOLUME_MIN -890
  27 #define VOLUME_MAX  60
  28
  29 #define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP | BASS_CUTOFF_CAP | TREBLE_CUTOFF_CAP)
  30
  31 extern int tenthdb2master(int db);
  32 extern int tenthdb2mixer(int db);
  33
  34 extern void audiohw_set_master_vol(int vol_l, int vol_r);
  35 extern void audiohw_set_lineout_vol(int vol_l, int vol_r);
  36 extern void audiohw_set_mixer_vol(int channel1, int channel2);
  37 extern void audiohw_enable_lineout(bool enable);
  38
  39 #define RESET                   0x00
  40 #define RESET_RESET             0x0
  41
  42 #define PWRMGMT1                0x01
  43 #define PWRMGMT1_VMIDSEL_OFF    (0 << 0)
  44 #define PWRMGMT1_VMIDSEL_75K    (1 << 0)
  45 #define PWRMGMT1_VMIDSEL_300K   (2 << 0)
  46 #define PWRMGMT1_VMIDSEL_5K     (3 << 0)
  47 #define PWRMGMT1_BUFIOEN        (1 << 2)
  48 #define PWRMGMT1_BIASEN         (1 << 3)
  49 #define PWRMGMT1_MICBEN         (1 << 4)
  50 #define PWRMGMT1_PLLEN          (1 << 5)
  51 #define PWRMGMT1_OUT3MIXEN      (1 << 6)
  52 #define PWRMGMT1_OUT4MIXEN      (1 << 7)
  53 #define PWRMGMT1_BUFDCOPEN      (1 << 8)
  54
  55 #define PWRMGMT2                0x02
  56 #define PWRMGMT2_ADCENL         (1 << 0)
  57 #define PWRMGMT2_ADCENR         (1 << 1)
  58 #define PWRMGMT2_INPGAENL       (1 << 2)
  59 #define PWRMGMT2_INPGAENR       (1 << 3)
  60 #define PWRMGMT2_BOOSTENL       (1 << 4)
  61 #define PWRMGMT2_BOOSTENR       (1 << 5)
  62 #define PWRMGMT2_SLEEP          (1 << 6)
  63 #define PWRMGMT2_LOUT1EN        (1 << 7)
  64 #define PWRMGMT2_ROUT1EN        (1 << 8)
  65
  66 #define PWRMGMT3                0x03
  67 #define PWRMGMT3_DACENL         (1 << 0)
  68 #define PWRMGMT3_DACENR         (1 << 1)
  69 #define PWRMGMT3_LMIXEN         (1 << 2)
  70 #define PWRMGMT3_RMIXEN         (1 << 3)
  71 #define PWRMGMT3_ROUT2EN        (1 << 5)
  72 #define PWRMGMT3_LOUT2EN        (1 << 6)
  73 #define PWRMGMT3_OUT3EN         (1 << 7)
  74 #define PWRMGMT3_OUT4EN         (1 << 8)
  75
  76 #define AINTFCE                 0x04
  77 #define AINTFCE_MONO            (1 << 0)
  78 #define AINTFCE_ALRSWAP         (1 << 1)
  79 #define AINTFCE_DLRSWAP         (1 << 2)
  80 #define AINTFCE_FORMAT_MSB_RJUST (0 << 3)
  81 #define AINTFCE_FORMAT_MSB_LJUST (1 << 3)
  82 #define AINTFCE_FORMAT_I2S      (2 << 3)
  83 #define AINTFCE_FORMAT_DSP      (3 << 3)
  84 #define AINTFCE_FORMAT_MASK     (3 << 3)
  85 #define AINTFCE_IWL_16BIT       (0 << 5)
  86 #define AINTFCE_IWL_20BIT       (1 << 5)
  87 #define AINTFCE_IWL_24BIT       (2 << 5)
  88 #define AINTFCE_IWL_32BIT       (3 << 5)
  89 #define AINTFCE_IWL_MASK        (3 << 5)
  90 #define AINTFCE_LRP             (1 << 7)
  91 #define AINTFCE_BCP             (1 << 8)
  92
  93 #define COMPCTRL                0x05 /* unused */
  94
  95 #define CLKCTRL                 0x06
  96 #define CLKCTRL_MS              (1 << 0)
  97 #define CLKCTRL_BCLKDIV_1       (0 << 2)
  98 #define CLKCTRL_BCLKDIV_2       (1 << 2)
  99 #define CLKCTRL_BCLKDIV_4       (2 << 2)
 100 #define CLKCTRL_BCLKDIV_8       (3 << 2)
 101 #define CLKCTRL_BCLKDIV_16      (4 << 2)
 102 #define CLKCTRL_BCLKDIV_32      (5 << 2)
 103 #define CLKCTRL_MCLKDIV_1       (0 << 5)
 104 #define CLKCTRL_MCLKDIV_1_5     (1 << 5)
 105 #define CLKCTRL_MCLKDIV_2       (2 << 5)
 106 #define CLKCTRL_MCLKDIV_3       (3 << 5)
 107 #define CLKCTRL_MCLKDIV_4       (4 << 5)
 108 #define CLKCTRL_MCLKDIV_6       (5 << 5)
 109 #define CLKCTRL_MCLKDIV_8       (6 << 5)
 110 #define CLKCTRL_MCLKDIV_12      (7 << 5)
 111 #define CLKCTRL_MCLKDIV_MASK    (7 << 5)
 112 #define CLKCTRL_CLKSEL          (1 << 8)
 113
 114 #define ADDCTRL                 0x07
 115 #define ADDCTRL_SLOWCLKEN       (1 << 0)
 116 #define ADDCTRL_SR_48kHz        (0 << 1)
 117 #define ADDCTRL_SR_32kHz        (1 << 1)
 118 #define ADDCTRL_SR_24kHz        (2 << 1)
 119 #define ADDCTRL_SR_16kHz        (3 << 1)
 120 #define ADDCTRL_SR_12kHz        (4 << 1)
 121 #define ADDCTRL_SR_8kHz         (5 << 1)
 122 #define ADDCTRL_SR_MASK         (7 << 1)
 123
 124 /* unused */
 125 #define GPIOCTRL                0x08
 126 #define JACKDETECTCTRL1         0x09
 127
 128 #define DACCTRL                 0x0a
 129 #define DACCTRL_DACLPOL         (1 << 0)
 130 #define DACCTRL_DACRPOL         (1 << 1)
 131 #define DACCTRL_AMUTE           (1 << 2)
 132 #define DACCTRL_DACOSR128       (1 << 3)
 133 #define DACCTRL_SOFTMUTE        (1 << 6)
 134
 135 #define LDACVOL                 0x0b
 136 #define LDACVOL_MASK            0xff
 137 #define LDACVOL_DACVU           (1 << 8)
 138
 139 #define RDACVOL                 0x0c
 140 #define RDACVOL_MASK            0xff
 141 #define RDACVOL_DACVU           (1 << 8)
 142
 143 #define JACKDETECTCTRL2         0x0d /* unused */
 144
 145 #define ADCCTRL                 0x0e
 146 #define ADCCTRL_ADCLPOL         (1 << 0)
 147 #define ADCCTRL_ADCRPOL         (1 << 1)
 148 #define ADCCTRL_ADCOSR128       (1 << 3)
 149 #define ADCCTRL_HPFCUT_MASK     (7 << 4)
 150 #define ADCCTRL_HPFAPP          (1 << 7)
 151 #define ADCCTRL_HPFEN           (1 << 8)
 152
 153 #define LADCVOL                 0x0f
 154 #define LADCVOL_MASK            0xff
 155 #define LADCVOL_ADCVU           (1 << 8)
 156
 157 #define RADCVOL                 0x10
 158 #define RADCVOL_MASK            0xff
 159 #define RADCVOL_ADCVU           (1 << 8)
 160
 161 #define EQ1                     0x12
 162 #define EQ5                     0x16
 163 /* note: the WM8983 used for reference has a true 5 band EQ, but the WM8758
 164  * does only have low shelf & high shelf (tested). Not sure about 3D mode. */
 165 #define EQ1_EQ3DMODE            (1 << 8)
 166 #define EQ_GAIN_MASK            0x1f
 167 #define EQ_CUTOFF_MASK          (3 << 5)
 168 #define EQ_GAIN_VALUE(x)        (((-x) + 12) & 0x1f)
 169 #define EQ_CUTOFF_VALUE(x)      ((((x) - 1) & 0x03) << 5)
 170
 171 /* unused */
 172 #define DACLIMITER1             0x18
 173 #define DACLIMITER2             0x19
 174 #define NOTCHFILTER1            0x1b
 175 #define NOTCHFILTER2            0x1c
 176 #define NOTCHFILTER3            0x1d
 177 #define NOTCHFILTER4            0x1e
 178 #define ALCCONTROL1             0x20
 179 #define ALCCONTROL2             0x21
 180 #define ALCCONTROL3             0x22
 181 #define NOISEGATE               0x23
 182
 183 #define PLLN                    0x24
 184 #define PLLN_PLLN_MASK          0x0f
 185 #define PLLN_PLLPRESCALE        (1 << 4)
 186
 187 #define PLLK1                   0x25
 188 #define PLLK1_MASK              0x3f
 189
 190 #define PLLK2                   0x26
 191 #define PLLK3                   0x27
 192
 193 #define THREEDCTRL              0x29
 194 #define THREEDCTRL_DEPTH3D_MASK 0x0f
 195
 196 #define OUT4TOADC               0x2a
 197 #define OUT4TOADC_OUT1DEL       (1 << 0)
 198 #define OUT4TOADC_DELEN         (1 << 1)
 199 #define OUT4TOADC_POBCTRL       (1 << 2)
 200 #define OUT4TOADC_OUT4_2LNR     (1 << 5)
 201 #define OUT4TOADC_OUT4_ADCVOL_MASK (7 << 6)
 202
 203 #define BEEPCTRL                0x2b
 204 #define BEEPCTRL_BEEPEN         (1 << 0)
 205 #define BEEPCTRL_BEEPVOL_MASK   (7 << 1)
 206 #define BEEPCTRL_INVROUT2       (1 << 4)
 207 #define BEEPCTRL_MUTERPGA2INV   (1 << 5)
 208 #define BEEPCTRL_BYPR2LMIX      (1 << 7)
 209 #define BEEPCTRL_BYPL2RMIX      (1 << 8)
 210
 211 #define INCTRL                  0x2c
 212 #define INCTRL_LIP2INPGA        (1 << 0)
 213 #define INCTRL_LIN2INPGA        (1 << 1)
 214 #define INCTRL_L2_2INPGA        (1 << 2)
 215 #define INCTRL_RIP2INPGA        (1 << 4)
 216 #define INCTRL_RIN2INPGA        (1 << 5)
 217 #define INCTRL_R2_2INPGA        (1 << 6)
 218 #define INCTRL_MBVSEL           (1 << 8)
 219
 220 #define LINPGAVOL               0x2d
 221 #define LINPGAVOL_INPGAVOL_MASK 0x3f
 222 #define LINPGAVOL_INPGAMUTEL    (1 << 6)
 223 #define LINPGAVOL_INPGAZCL      (1 << 7)
 224 #define LINPGAVOL_INPGAVU       (1 << 8)
 225
 226 #define RINPGAVOL               0x2e
 227 #define RINPGAVOL_INPGAVOL_MASK 0x3f
 228 #define RINPGAVOL_INPGAMUTER    (1 << 6)
 229 #define RINPGAVOL_INPGAZCR      (1 << 7)
 230 #define RINPGAVOL_INPGAVU       (1 << 8)
 231
 232 #define LADCBOOST               0x2f
 233 #define LADCBOOST_AUXL2BOOST_MASK (7 << 0)
 234 #define LADCBOOST_L2_2BOOST_MASK  (7 << 4)
 235 #define LADCBOOST_L2_2BOOST(x)  ((x) << 4)
 236 #define LADCBOOST_PGABOOSTL     (1 << 8)
 237
 238 #define RADCBOOST               0x30
 239 #define RADCBOOST_AUXR2BOOST_MASK (7 << 0)
 240 #define RADCBOOST_R2_2BOOST_MASK  (7 << 4)
 241 #define RADCBOOST_R2_2BOOST(x)  ((x) << 4)
 242 #define RADCBOOST_PGABOOSTR     (1 << 8)
 243
 244 #define OUTCTRL                 0x31
 245 #define OUTCTRL_VROI            (1 << 0)
 246 #define OUTCTRL_TSDEN           (1 << 1)
 247 #define OUTCTRL_SPKBOOST        (1 << 2)
 248 #define OUTCTRL_OUT3BOOST       (1 << 3)
 249 #define OUTCTRL_OUT4BOOST       (1 << 4)
 250 #define OUTCTRL_DACR2LMIX       (1 << 5)
 251 #define OUTCTRL_DACL2RMIX       (1 << 6)
 252
 253 #define LOUTMIX                 0x32
 254 #define LOUTMIX_DACL2LMIX       (1 << 0)
 255 #define LOUTMIX_BYPL2LMIX       (1 << 1)
 256 #define LOUTMIX_BYP2LMIXVOL_MASK (7 << 2)
 257 #define LOUTMIX_BYP2LMIXVOL(x)  ((x) << 2)
 258 #define LOUTMIX_AUXL2LMIX       (1 << 5)
 259 #define LOUTMIX_AUXLMIXVOL_MASK (7 << 6)
 260
 261 #define ROUTMIX                 0x33
 262 #define ROUTMIX_DACR2RMIX       (1 << 0)
 263 #define ROUTMIX_BYPR2RMIX       (1 << 1)
 264 #define ROUTMIX_BYP2RMIXVOL_MASK (7 << 2)
 265 #define ROUTMIX_BYP2RMIXVOL(x)  ((x) << 2)
 266 #define ROUTMIX_AUXR2RMIX       (1 << 5)
 267 #define ROUTMIX_AUXRMIXVOL_MASK (7 << 6)
 268
 269 #define LOUT1VOL                0x34
 270 #define LOUT1VOL_MASK           0x3f
 271 #define LOUT1VOL_LOUT1MUTE      (1 << 6)
 272 #define LOUT1VOL_LOUT1ZC        (1 << 7)
 273 #define LOUT1VOL_OUT1VU         (1 << 8)
 274
 275 #define ROUT1VOL                0x35
 276 #define ROUT1VOL_MASK           0x3f
 277 #define ROUT1VOL_ROUT1MUTE      (1 << 6)
 278 #define ROUT1VOL_ROUT1ZC        (1 << 7)
 279 #define ROUT1VOL_OUT1VU         (1 << 8)
 280
 281 #define LOUT2VOL                0x36
 282 #define LOUT2VOL_MASK           0x3f
 283 #define LOUT2VOL_LOUT2MUTE      (1 << 6)
 284 #define LOUT2VOL_LOUT2ZC        (1 << 7)
 285 #define LOUT2VOL_OUT2VU         (1 << 8)
 286
 287 #define ROUT2VOL                0x37
 288 #define ROUT2VOL_MASK           0x3f
 289 #define ROUT2VOL_ROUT2MUTE      (1 << 6)
 290 #define ROUT2VOL_ROUT2ZC        (1 << 7)
 291 #define ROUT2VOL_OUT2VU         (1 << 8)
 292
 293
 294 /* Dummy definition, to be removed when the audio driver API gets reworked. */
 295 #define WM8758_44100HZ     0
 296
 297 #endif /* _WM8758_H */