as3525*: make sure fclk is 24MHz before using it as the clock source for pclk
[kugel-rb.git] / firmware / export / uda1341.h
bloba43d33a1371460cf1b83debfd9c6b299871741f5
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
10 * Copyright (C) 2009 by Bob Cousins
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
22 #ifndef _UDA1341_H
23 #define _UDA1341_H
25 /* volume/balance/treble/bass interdependency */
26 #define VOLUME_MIN -840
27 #define VOLUME_MAX 0
29 #define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP)
31 extern int tenthdb2master(int db);
32 extern int tenthdb2mixer(int db);
34 extern void audiohw_set_master_vol(int vol_l, int vol_r);
35 extern void audiohw_set_mixer_vol(int channel1, int channel2);
37 /* These are logical register numbers for driver */
38 enum uda_register {
39 UDA_REG_ID_STATUS_0,
40 UDA_REG_ID_STATUS_1,
41 UDA_REG_ID_CTRL0,
42 UDA_REG_ID_CTRL1,
43 UDA_REG_ID_CTRL2,
44 UDA_REG_ID_EXT_0,
45 UDA_REG_ID_EXT_1,
46 UDA_REG_ID_EXT_2,
47 UDA_REG_ID_EXT_4,
48 UDA_REG_ID_EXT_5,
49 UDA_REG_ID_EXT_6,
50 NUM_REG_ID
54 /* Address byte */
55 #define UDA1341_ADDR 0x14
56 #define UDA_REG_DATA0 0x00
57 #define UDA_REG_DATA1 0x01
58 #define UDA_REG_STATUS 0x02
60 /* STATUS */
61 #define UDA_STATUS_0 (0 << 7)
62 #define UDA_STATUS_1 (1 << 7)
64 #define UDA_RESET (1 << 6)
65 #define UDA_SYSCLK_512FS (0 << 4)
66 #define UDA_SYSCLK_384FS (1 << 4)
67 #define UDA_SYSCLK_256FS (2 << 4)
68 #define I2S_IFMT_IIS (0 << 1)
69 #define I2S_IFMT_LSB16 (1 << 1)
70 #define I2S_IFMT_LSB18 (2 << 1)
71 #define I2S_IFMT_LSB20 (3 << 1)
72 #define I2S_IFMT_MSB (4 << 1)
73 #define I2S_IFMT_LSB16_OFMT_MSB (5 << 1)
74 #define I2S_IFMT_LSB18_OFMT_MSB (6 << 1)
75 #define I2S_IFMT_LSB20_OFMT_MSB (7 << 1)
76 #define UDA_DC_FILTER (1 << 0)
78 #define UDA_OUTPUT_GAIN (1 << 6)
79 #define UDA_INPUT_GAIN (1 << 5)
80 #define UDA_ADC_INVERT (1 << 4)
81 #define UDA_DAC_INVERT (1 << 3)
82 #define UDA_DOUBLE_SPEED (1 << 2)
83 #define UDA_POWER_ADC_ON (1 << 1)
84 #define UDA_POWER_DAC_ON (1 << 0)
86 /* DATA0 */
87 #define UDA_DATA_CTRL0 (0 << 6) /* volume */
88 #define UDA_DATA_CTRL1 (1 << 6) /* bass, treble */
89 #define UDA_DATA_CTRL2 (2 << 6) /* peak det pos, de-emp, mute */
90 #define UDA_DATA_EXT_ADDR (6 << 5)
91 #define UDA_DATA_EXT_DATA (7 << 5)
93 #define UDA_VOLUME(x) ((x) << 0) /* 1=0dB, 61=-60dB */
95 #define UDA_BASS_BOOST(x) ((x) << 2) /* see datasheet */
96 #define UDA_BASS_BOOST_MASK 0x0F
97 #define UDA_TREBLE(x) ((x) << 0) /* see datasheet */
98 #define UDA_TREBLE_MASK 0x03
100 #define UDA_PEAK_DETECT_POS_BEFORE (0 << 5)
101 #define UDA_PEAK_DETECT_POS_AFTER (1 << 5)
102 #define UDA_DE_EMPHASIS_NONE (0 << 3)
103 #define UDA_DE_EMPHASIS_32 (1 << 3)
104 #define UDA_DE_EMPHASIS_44_1 (2 << 3)
105 #define UDA_DE_EMPHASIS_48 (3 << 3)
106 #define UDA_MUTE_ON (1 << 2)
107 #define UDA_MUTE_OFF (0 << 2)
108 #define UDA_MODE_SWITCH_FLAT (0 << 0)
109 #define UDA_MODE_SWITCH_MIN (1 << 0)
110 #define UDA_MODE_SWITCH_MAX (3 << 0)
112 #define UDA_EXT_0 (0 << 5) /* Mixer Gain Chan 1 */
113 #define UDA_EXT_1 (1 << 5) /* Mixer Gain Chan 2 */
114 #define UDA_EXT_2 (2 << 5) /* Mic sens and mixer mode */
115 #define UDA_EXT_4 (4 << 5) /* AGC, Input amp gain */
116 #define UDA_EXT_5 (5 << 5) /* Input amp gain */
117 #define UDA_EXT_6 (6 << 5) /* AGC settings */
119 /* TODO: DATA0 extended registers */
121 /* DATA1: see datasheet */
123 #endif /* _UDA_1341_H */