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Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with...
[kugel-rb.git] / firmware / target / arm / sandisk / ata-c200_e200.c
blobe4a538897860150e3109a150d38759c718543643
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006 Daniel Ankers
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19 #include "fat.h"
20 #include "hotswap.h"
21 #ifdef BOOTLOADER
22 #include "hotswap-target.h"
23 #endif
24 #include "ata-target.h"
25 #include "ata_idle_notify.h"
26 #include "system.h"
27 #include <string.h>
28 #include "thread.h"
29 #include "led.h"
30 #include "disk.h"
31 #include "cpu.h"
32 #include "panic.h"
33 #include "usb.h"
34
35 #define BLOCK_SIZE 512
36 #define SECTOR_SIZE 512
37 #define BLOCKS_PER_BANK 0x7a7800
38
39 #define STATUS_REG (*(volatile unsigned int *)(0x70008204))
40 #define REG_1 (*(volatile unsigned int *)(0x70008208))
41 #define UNKNOWN (*(volatile unsigned int *)(0x70008210))
42 #define BLOCK_SIZE_REG (*(volatile unsigned int *)(0x7000821c))
43 #define BLOCK_COUNT_REG (*(volatile unsigned int *)(0x70008220))
44 #define REG_5 (*(volatile unsigned int *)(0x70008224))
45 #define CMD_REG0 (*(volatile unsigned int *)(0x70008228))
46 #define CMD_REG1 (*(volatile unsigned int *)(0x7000822c))
47 #define CMD_REG2 (*(volatile unsigned int *)(0x70008230))
48 #define RESPONSE_REG (*(volatile unsigned int *)(0x70008234))
49 #define SD_STATE_REG (*(volatile unsigned int *)(0x70008238))
50 #define REG_11 (*(volatile unsigned int *)(0x70008240))
51 #define REG_12 (*(volatile unsigned int *)(0x70008244))
52 #define DATA_REG (*(volatile unsigned int *)(0x70008280))
53
54 /* STATUS_REG bits */
55 #define DATA_DONE (1 << 12)
56 #define CMD_DONE (1 << 13)
57 #define ERROR_BITS (0x3f)
58 #define READY_FOR_DATA (1 << 8)
59 #define FIFO_FULL (1 << 7)
60 #define FIFO_EMPTY (1 << 6)
61
62 #define CMD_OK 0x0 /* Command was successful */
63 #define CMD_ERROR_2 0x2 /* SD did not respond to command (either it doesn't
64 understand the command or is not inserted) */
65
66 /* SD States */
67 #define IDLE 0
68 #define READY 1
69 #define IDENT 2
70 #define STBY 3
71 #define TRAN 4
72 #define DATA 5
73 #define RCV 6
74 #define PRG 7
75 #define DIS 8
76
77 #define FIFO_LEN 16 /* FIFO is 16 words deep */
78
79 /* SD Commands */
80 #define GO_IDLE_STATE 0
81 #define ALL_SEND_CID 2
82 #define SEND_RELATIVE_ADDR 3
83 #define SET_DSR 4
84 #define SWITCH_FUNC 6
85 #define SELECT_CARD 7
86 #define DESELECT_CARD 7
87 #define SEND_IF_COND 8
88 #define SEND_CSD 9
89 #define SEND_CID 10
90 #define STOP_TRANSMISSION 12
91 #define SEND_STATUS 13
92 #define GO_INACTIVE_STATE 15
93 #define SET_BLOCKLEN 16
94 #define READ_SINGLE_BLOCK 17
95 #define READ_MULTIPLE_BLOCK 18
96 #define SEND_NUM_WR_BLOCKS 22
97 #define WRITE_BLOCK 24
98 #define WRITE_MULTIPLE_BLOCK 25
99 #define ERASE_WR_BLK_START 32
100 #define ERASE_WR_BLK_END 33
101 #define ERASE 38
102 #define APP_CMD 55
103
104 #define EC_OK 0
105 #define EC_FAILED 1
106 #define EC_NOCARD 2
107 #define EC_WAIT_STATE_FAILED 3
108 #define EC_CHECK_TIMEOUT_FAILED 4
109 #define EC_POWER_UP 5
110 #define EC_READ_TIMEOUT 6
111 #define EC_WRITE_TIMEOUT 7
112 #define EC_TRAN_SEL_BANK 8
113 #define EC_TRAN_READ_ENTRY 9
114 #define EC_TRAN_READ_EXIT 10
115 #define EC_TRAN_WRITE_ENTRY 11
116 #define EC_TRAN_WRITE_EXIT 12
117 #define EC_FIFO_SEL_BANK_EMPTY 13
118 #define EC_FIFO_SEL_BANK_DONE 14
119 #define EC_FIFO_ENA_BANK_EMPTY 15
120 #define EC_FIFO_READ_FULL 16
121 #define EC_FIFO_WR_EMPTY 17
122 #define EC_FIFO_WR_DONE 18
123 #define EC_COMMAND 19
124 #define NUM_EC 20
125
126 /* Application Specific commands */
127 #define SET_BUS_WIDTH 6
128 #define SD_APP_OP_COND 41
129
130 /** global, exported variables **/
131 #ifdef HAVE_HOTSWAP
132 #define NUM_VOLUMES 2
133 #else
134 #define NUM_VOLUMES 1
135 #endif
136
137 /* for compatibility */
138 int ata_spinup_time = 0;
139
140 long last_disk_activity = -1;
141
142 /** static, private data **/
143 static bool initialized = false;
144
145 static long next_yield = 0;
146 #define MIN_YIELD_PERIOD 1000
147
148 static tSDCardInfo card_info[2];
149 static tSDCardInfo *currcard = NULL; /* current active card */
150
151 struct sd_card_status
152 {
153 int retry;
154 int retry_max;
155 };
156
157 static struct sd_card_status sd_status[NUM_VOLUMES] =
158 {
159 { 0, 1 },
160 #ifdef HAVE_HOTSWAP
161 { 0, 10 }
162 #endif
163 };
164
165 /* Shoot for around 75% usage */
166 static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x1c0)/sizeof(long)];
167 static const char sd_thread_name[] = "ata/sd";
168 static struct mutex sd_mtx SHAREDBSS_ATTR;
169 static struct event_queue sd_queue;
170
171 /* Posted when card plugged status has changed */
172 #define SD_HOTSWAP 1
173 /* Actions taken by sd_thread when card status has changed */
174 enum sd_thread_actions
175 {
176 SDA_NONE = 0x0,
177 SDA_UNMOUNTED = 0x1,
178 SDA_MOUNTED = 0x2
179 };
180
181 /* Private Functions */
182
183 static unsigned int check_time[NUM_EC];
184
185 static inline bool sd_check_timeout(long timeout, int id)
186 {
187 return !TIME_AFTER(USEC_TIMER, check_time[id] + timeout);
188 }
189
190 static bool sd_poll_status(unsigned int trigger, long timeout)
191 {
192 long t = USEC_TIMER;
193
194 while ((STATUS_REG & trigger) == 0)
195 {
196 long time = USEC_TIMER;
197
198 if (TIME_AFTER(time, next_yield))
199 {
200 long ty = USEC_TIMER;
201 yield();
202 timeout += USEC_TIMER - ty;
203 next_yield = ty + MIN_YIELD_PERIOD;
204 }
205
206 if (TIME_AFTER(time, t + timeout))
207 return false;
208 }
209
210 return true;
211 }
212
213 static int sd_command(unsigned int cmd, unsigned long arg1,
214 unsigned int *response, unsigned int type)
215 {
216 int i, words; /* Number of 16 bit words to read from RESPONSE_REG */
217 unsigned int data[9];
218
219 CMD_REG0 = cmd;
220 CMD_REG1 = (unsigned int)((arg1 & 0xffff0000) >> 16);
221 CMD_REG2 = (unsigned int)((arg1 & 0xffff));
222 UNKNOWN = type;
223
224 if (!sd_poll_status(CMD_DONE, 100000))
225 return -EC_COMMAND;
226
227 if ((STATUS_REG & ERROR_BITS) != CMD_OK)
228 /* Error sending command */
229 return -EC_COMMAND - (STATUS_REG & ERROR_BITS)*100;
230
231 if (cmd == GO_IDLE_STATE)
232 return 0; /* no response here */
233
234 words = (type == 2) ? 9 : 3;
235
236 for (i = 0; i < words; i++) /* RESPONSE_REG is read MSB first */
237 data[i] = RESPONSE_REG; /* Read most significant 16-bit word */
238
239 if (response == NULL)
240 {
241 /* response discarded */
242 }
243 else if (type == 2)
244 {
245 /* Response type 2 has the following structure:
246 * [135:135] Start Bit - '0'
247 * [134:134] Transmission bit - '0'
248 * [133:128] Reserved - '111111'
249 * [127:001] CID or CSD register including internal CRC7
250 * [000:000] End Bit - '1'
251 */
252 response[3] = (data[0]<<24) + (data[1]<<8) + (data[2]>>8);
253 response[2] = (data[2]<<24) + (data[3]<<8) + (data[4]>>8);
254 response[1] = (data[4]<<24) + (data[5]<<8) + (data[6]>>8);
255 response[0] = (data[6]<<24) + (data[7]<<8) + (data[8]>>8);
256 }
257 else
258 {
259 /* Response types 1, 1b, 3, 6, 7 have the following structure:
260 * Types 4 and 5 are not supported.
261 *
262 * [47] Start bit - '0'
263 * [46] Transmission bit - '0'
264 * [45:40] R1, R1b, R6, R7: Command index
265 * R3: Reserved - '111111'
266 * [39:8] R1, R1b: Card Status
267 * R3: OCR Register
268 * R6: [31:16] RCA
269 * [15: 0] Card Status Bits 23, 22, 19, 12:0
270 * [23] COM_CRC_ERROR
271 * [22] ILLEGAL_COMMAND
272 * [19] ERROR
273 * [12:9] CURRENT_STATE
274 * [8] READY_FOR_DATA
275 * [7:6]
276 * [5] APP_CMD
277 * [4]
278 * [3] AKE_SEQ_ERROR
279 * [2] Reserved
280 * [1:0] Reserved for test mode
281 * R7: [19:16] Voltage accepted
282 * [15:8] echo-back of check pattern
283 * [7:1] R1, R1b: CRC7
284 * R3: Reserved - '1111111'
285 * [0] End Bit - '1'
286 */
287 response[0] = (data[0]<<24) + (data[1]<<8) + (data[2]>>8);
288 }
289
290 return 0;
291 }
292
293 static int sd_wait_for_state(unsigned int state, int id)
294 {
295 unsigned int response = 0;
296 unsigned int timeout = 0x80000;
297
298 check_time[id] = USEC_TIMER;
299
300 while (1)
301 {
302 int ret = sd_command(SEND_STATUS, currcard->rca, &response, 1);
303 long us;
304
305 if (ret < 0)
306 return ret*100 - id;
307
308 if (((response >> 9) & 0xf) == state)
309 {
310 SD_STATE_REG = state;
311 return 0;
312 }
313
314 if (!sd_check_timeout(timeout, id))
315 return -EC_WAIT_STATE_FAILED*100 - id;
316
317 us = USEC_TIMER;
318 if (TIME_AFTER(us, next_yield))
319 {
320 yield();
321 timeout += USEC_TIMER - us;
322 next_yield = us + MIN_YIELD_PERIOD;
323 }
324 }
325 }
326
327 static inline void copy_read_sectors_fast(unsigned char **buf)
328 {
329 /* Copy one chunk of 16 words using best method for start alignment */
330 switch ( (intptr_t)*buf & 3 )
331 {
332 case 0:
333 asm volatile (
334 "ldmia %[data], { r2-r9 } \r\n"
335 "orr r2, r2, r3, lsl #16 \r\n"
336 "orr r4, r4, r5, lsl #16 \r\n"
337 "orr r6, r6, r7, lsl #16 \r\n"
338 "orr r8, r8, r9, lsl #16 \r\n"
339 "stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
340 "ldmia %[data], { r2-r9 } \r\n"
341 "orr r2, r2, r3, lsl #16 \r\n"
342 "orr r4, r4, r5, lsl #16 \r\n"
343 "orr r6, r6, r7, lsl #16 \r\n"
344 "orr r8, r8, r9, lsl #16 \r\n"
345 "stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
346 : [buf]"+&r"(*buf)
347 : [data]"r"(&DATA_REG)
348 : "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9"
349 );
350 break;
351 case 1:
352 asm volatile (
353 "ldmia %[data], { r2-r9 } \r\n"
354 "orr r3, r2, r3, lsl #16 \r\n"
355 "strb r3, [%[buf]], #1 \r\n"
356 "mov r3, r3, lsr #8 \r\n"
357 "strh r3, [%[buf]], #2 \r\n"
358 "mov r3, r3, lsr #16 \r\n"
359 "orr r3, r3, r4, lsl #8 \r\n"
360 "orr r3, r3, r5, lsl #24 \r\n"
361 "mov r5, r5, lsr #8 \r\n"
362 "orr r5, r5, r6, lsl #8 \r\n"
363 "orr r5, r5, r7, lsl #24 \r\n"
364 "mov r7, r7, lsr #8 \r\n"
365 "orr r7, r7, r8, lsl #8 \r\n"
366 "orr r7, r7, r9, lsl #24 \r\n"
367 "mov r2, r9, lsr #8 \r\n"
368 "stmia %[buf]!, { r3, r5, r7 } \r\n"
369 "ldmia %[data], { r3-r10 } \r\n"
370 "orr r2, r2, r3, lsl #8 \r\n"
371 "orr r2, r2, r4, lsl #24 \r\n"
372 "mov r4, r4, lsr #8 \r\n"
373 "orr r4, r4, r5, lsl #8 \r\n"
374 "orr r4, r4, r6, lsl #24 \r\n"
375 "mov r6, r6, lsr #8 \r\n"
376 "orr r6, r6, r7, lsl #8 \r\n"
377 "orr r6, r6, r8, lsl #24 \r\n"
378 "mov r8, r8, lsr #8 \r\n"
379 "orr r8, r8, r9, lsl #8 \r\n"
380 "orr r8, r8, r10, lsl #24 \r\n"
381 "mov r10, r10, lsr #8 \r\n"
382 "stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
383 "strb r10, [%[buf]], #1 \r\n"
384 : [buf]"+&r"(*buf)
385 : [data]"r"(&DATA_REG)
386 : "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
387 );
388 break;
389 case 2:
390 asm volatile (
391 "ldmia %[data], { r2-r9 } \r\n"
392 "strh r2, [%[buf]], #2 \r\n"
393 "orr r3, r3, r4, lsl #16 \r\n"
394 "orr r5, r5, r6, lsl #16 \r\n"
395 "orr r7, r7, r8, lsl #16 \r\n"
396 "stmia %[buf]!, { r3, r5, r7 } \r\n"
397 "ldmia %[data], { r2-r8, r10 } \r\n"
398 "orr r2, r9, r2, lsl #16 \r\n"
399 "orr r3, r3, r4, lsl #16 \r\n"
400 "orr r5, r5, r6, lsl #16 \r\n"
401 "orr r7, r7, r8, lsl #16 \r\n"
402 "stmia %[buf]!, { r2, r3, r5, r7 } \r\n"
403 "strh r10, [%[buf]], #2 \r\n"
404 : [buf]"+&r"(*buf)
405 : [data]"r"(&DATA_REG)
406 : "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
407 );
408 break;
409 case 3:
410 asm volatile (
411 "ldmia %[data], { r2-r9 } \r\n"
412 "orr r3, r2, r3, lsl #16 \r\n"
413 "strb r3, [%[buf]], #1 \r\n"
414 "mov r3, r3, lsr #8 \r\n"
415 "orr r3, r3, r4, lsl #24 \r\n"
416 "mov r4, r4, lsr #8 \r\n"
417 "orr r5, r4, r5, lsl #8 \r\n"
418 "orr r5, r5, r6, lsl #24 \r\n"
419 "mov r6, r6, lsr #8 \r\n"
420 "orr r7, r6, r7, lsl #8 \r\n"
421 "orr r7, r7, r8, lsl #24 \r\n"
422 "mov r8, r8, lsr #8 \r\n"
423 "orr r2, r8, r9, lsl #8 \r\n"
424 "stmia %[buf]!, { r3, r5, r7 } \r\n"
425 "ldmia %[data], { r3-r10 } \r\n"
426 "orr r2, r2, r3, lsl #24 \r\n"
427 "mov r3, r3, lsr #8 \r\n"
428 "orr r4, r3, r4, lsl #8 \r\n"
429 "orr r4, r4, r5, lsl #24 \r\n"
430 "mov r5, r5, lsr #8 \r\n"
431 "orr r6, r5, r6, lsl #8 \r\n"
432 "orr r6, r6, r7, lsl #24 \r\n"
433 "mov r7, r7, lsr #8 \r\n"
434 "orr r8, r7, r8, lsl #8 \r\n"
435 "orr r8, r8, r9, lsl #24 \r\n"
436 "mov r9, r9, lsr #8 \r\n"
437 "orr r10, r9, r10, lsl #8 \r\n"
438 "stmia %[buf]!, { r2, r4, r6, r8 } \r\n"
439 "strh r10, [%[buf]], #2 \r\n"
440 "mov r10, r10, lsr #16 \r\n"
441 "strb r10, [%[buf]], #1 \r\n"
442 : [buf]"+&r"(*buf)
443 : [data]"r"(&DATA_REG)
444 : "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10"
445 );
446 break;
447 }
448 }
449
450 static inline void copy_read_sectors_slow(unsigned char** buf)
451 {
452 int cnt = FIFO_LEN;
453 int t;
454
455 /* Copy one chunk of 16 words */
456 asm volatile (
457 "1: \r\n"
458 "ldrh %[t], [%[data]] \r\n"
459 "strb %[t], [%[buf]], #1 \r\n"
460 "mov %[t], %[t], lsr #8 \r\n"
461 "strb %[t], [%[buf]], #1 \r\n"
462 "subs %[cnt], %[cnt], #1 \r\n"
463 "bgt 1b \r\n"
464 : [cnt]"+&r"(cnt), [buf]"+&r"(*buf),
465 [t]"=&r"(t)
466 : [data]"r"(&DATA_REG)
467 );
468 }
469
470 /* Writes have to be kept slow for now */
471 static inline void copy_write_sectors(const unsigned char** buf)
472 {
473 int cnt = FIFO_LEN;
474 unsigned t;
475
476 do
477 {
478 t = *(*buf)++;
479 t |= *(*buf)++ << 8;
480 DATA_REG = t;
481 } while (--cnt > 0); /* tail loop is faster */
482 }
483
484 static int sd_select_bank(unsigned char bank)
485 {
486 unsigned char card_data[512];
487 const unsigned char* write_buf;
488 int i, ret;
489
490 memset(card_data, 0, 512);
491
492 ret = sd_wait_for_state(TRAN, EC_TRAN_SEL_BANK);
493 if (ret < 0)
494 return ret;
495
496 BLOCK_SIZE_REG = 512;
497 BLOCK_COUNT_REG = 1;
498
499 ret = sd_command(35, 0, NULL, 0x1c0d); /* CMD35 is vendor specific */
500 if (ret < 0)
501 return ret;
502
503 SD_STATE_REG = PRG;
504
505 card_data[0] = bank;
506
507 /* Write the card data */
508 write_buf = card_data;
509 for (i = 0; i < BLOCK_SIZE/2; i += FIFO_LEN)
510 {
511 /* Wait for the FIFO to empty */
512 if (sd_poll_status(FIFO_EMPTY, 10000))
513 {
514 copy_write_sectors(&write_buf); /* Copy one chunk of 16 words */
515 continue;
516 }
517
518 return -EC_FIFO_SEL_BANK_EMPTY;
519 }
520
521 if (!sd_poll_status(DATA_DONE, 10000))
522 return -EC_FIFO_SEL_BANK_DONE;
523
524 currcard->current_bank = bank;
525
526 return 0;
527 }
528
529 static void sd_card_mux(int card_no)
530 {
531 /* Set the current card mux */
532 #ifdef SANSA_E200
533 if (card_no == 0)
534 {
535 GPO32_VAL |= 0x4;
536
537 GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x7a);
538 GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x7a);
539 GPIO_SET_BITWISE(GPIOD_ENABLE, 0x1f);
540 GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x1f);
541 GPIO_SET_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
542
543 outl((inl(0x70000014) & ~(0x3ffff)) | 0x255aa, 0x70000014);
544 }
545 else
546 {
547 GPO32_VAL &= ~0x4;
548
549 GPIO_CLEAR_BITWISE(GPIOD_ENABLE, 0x1f);
550 GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
551 GPIO_SET_BITWISE(GPIOA_ENABLE, 0x7a);
552 GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x7a);
553 GPIO_SET_BITWISE( GPIOA_OUTPUT_EN, 0x7a);
554
555 outl(inl(0x70000014) & ~(0x3ffff), 0x70000014);
556 }
557 #else /* SANSA_C200 */
558 if (card_no == 0)
559 {
560 GPO32_VAL |= 0x4;
561
562 GPIO_CLEAR_BITWISE(GPIOD_ENABLE, 0x1f);
563 GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
564 GPIO_SET_BITWISE(GPIOA_ENABLE, 0x7a);
565 GPIO_SET_BITWISE(GPIOA_OUTPUT_VAL, 0x7a);
566 GPIO_SET_BITWISE( GPIOA_OUTPUT_EN, 0x7a);
567
568 outl(inl(0x70000014) & ~(0x3ffff), 0x70000014);
569 }
570 else
571 {
572 GPO32_VAL &= ~0x4;
573
574 GPIO_CLEAR_BITWISE(GPIOA_ENABLE, 0x7a);
575 GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x7a);
576 GPIO_SET_BITWISE(GPIOD_ENABLE, 0x1f);
577 GPIO_SET_BITWISE(GPIOD_OUTPUT_VAL, 0x1f);
578 GPIO_SET_BITWISE(GPIOD_OUTPUT_EN, 0x1f);
579
580 outl((inl(0x70000014) & ~(0x3ffff)) | 0x255aa, 0x70000014);
581 }
582 #endif
583 }
584
585 static void sd_init_device(int card_no)
586 {
587 /* SD Protocol registers */
588 #ifdef HAVE_HOTSWAP
589 unsigned int response = 0;
590 #endif
591 unsigned int i;
592 unsigned int c_size;
593 unsigned long c_mult;
594 unsigned char carddata[512];
595 unsigned char *dataptr;
596 int ret;
597
598 /* Enable and initialise controller */
599 REG_1 = 6;
600
601 /* Initialise card data as blank */
602 memset(currcard, 0, sizeof(*currcard));
603
604 /* Switch card mux to card to initialize */
605 sd_card_mux(card_no);
606
607 /* Init NAND */
608 REG_11 |= (1 << 15);
609 REG_12 |= (1 << 15);
610 REG_12 &= ~(3 << 12);
611 REG_12 |= (1 << 13);
612 REG_11 &= ~(3 << 12);
613 REG_11 |= (1 << 13);
614
615 DEV_EN |= DEV_ATA; /* Enable controller */
616 DEV_RS |= DEV_ATA; /* Reset controller */
617 DEV_RS &=~DEV_ATA; /* Clear Reset */
618
619 SD_STATE_REG = TRAN;
620
621 REG_5 = 0xf;
622
623 ret = sd_command(GO_IDLE_STATE, 0, NULL, 256);
624 if (ret < 0)
625 goto card_init_error;
626
627 check_time[EC_POWER_UP] = USEC_TIMER;
628
629 #ifdef HAVE_HOTSWAP
630 /* Check for SDHC:
631 - non-SDHC cards simply ignore SEND_IF_COND (CMD8) and we get error -219,
632 which we can just ignore and assume we're dealing with standard SD.
633 - SDHC cards echo back the argument into the response. This is how we
634 tell if the card is SDHC.
635 */
636 ret = sd_command(SEND_IF_COND,0x1aa, &response,7);
637 if ( (ret < 0) && (ret!=-219) )
638 goto card_init_error;
639 #endif
640
641 while ((currcard->ocr & (1 << 31)) == 0) /* until card is powered up */
642 {
643 ret = sd_command(APP_CMD, currcard->rca, NULL, 1);
644 if (ret < 0)
645 goto card_init_error;
646
647 #ifdef HAVE_HOTSWAP
648 if(response == 0x1aa)
649 {
650 /* SDHC */
651 ret = sd_command(SD_APP_OP_COND, (1<<30)|0x100000,
652 &currcard->ocr, 3);
653 }
654 else
655 #endif /* HAVE_HOTSWAP */
656 {
657 /* SD Standard */
658 ret = sd_command(SD_APP_OP_COND, 0x100000, &currcard->ocr, 3);
659 }
660
661 if (ret < 0)
662 goto card_init_error;
663
664 if (!sd_check_timeout(5000000, EC_POWER_UP))
665 {
666 ret = -EC_POWER_UP;
667 goto card_init_error;
668 }
669 }
670
671 ret = sd_command(ALL_SEND_CID, 0, currcard->cid, 2);
672 if (ret < 0)
673 goto card_init_error;
674
675 ret = sd_command(SEND_RELATIVE_ADDR, 0, &currcard->rca, 1);
676 if (ret < 0)
677 goto card_init_error;
678
679 ret = sd_command(SEND_CSD, currcard->rca, currcard->csd, 2);
680 if (ret < 0)
681 goto card_init_error;
682
683 /* These calculations come from the Sandisk SD card product manual */
684 if( (currcard->csd[3]>>30) == 0)
685 {
686 /* CSD version 1.0 */
687 c_size = ((currcard->csd[2] & 0x3ff) << 2) + (currcard->csd[1]>>30) + 1;
688 c_mult = 4 << ((currcard->csd[1] >> 15) & 7);
689 currcard->max_read_bl_len = 1 << ((currcard->csd[2] >> 16) & 15);
690 currcard->block_size = BLOCK_SIZE; /* Always use 512 byte blocks */
691 currcard->numblocks = c_size * c_mult * (currcard->max_read_bl_len/512);
692 currcard->capacity = currcard->numblocks * currcard->block_size;
693 }
694 #ifdef HAVE_HOTSWAP
695 else if( (currcard->csd[3]>>30) == 1)
696 {
697 /* CSD version 2.0 */
698 c_size = ((currcard->csd[2] & 0x3f) << 16) + (currcard->csd[1]>>16) + 1;
699 currcard->max_read_bl_len = 1 << ((currcard->csd[2] >> 16) & 0xf);
700 currcard->block_size = BLOCK_SIZE; /* Always use 512 byte blocks */
701 currcard->numblocks = c_size << 10;
702 currcard->capacity = currcard->numblocks * currcard->block_size;
703 }
704 #endif /* HAVE_HOTSWAP */
705
706 REG_1 = 0;
707
708 ret = sd_command(SELECT_CARD, currcard->rca, NULL, 129);
709 if (ret < 0)
710 goto card_init_error;
711
712 ret = sd_command(APP_CMD, currcard->rca, NULL, 1);
713 if (ret < 0)
714 goto card_init_error;
715
716 ret = sd_command(SET_BUS_WIDTH, currcard->rca | 2, NULL, 1); /* 4 bit */
717 if (ret < 0)
718 goto card_init_error;
719
720 ret = sd_command(SET_BLOCKLEN, currcard->block_size, NULL, 1);
721 if (ret < 0)
722 goto card_init_error;
723
724 BLOCK_SIZE_REG = currcard->block_size;
725
726 /* If this card is >4GB & not SDHC, then we need to enable bank switching */
727 if( (currcard->numblocks >= BLOCKS_PER_BANK) &&
728 ((currcard->ocr & (1<<30)) == 0) )
729 {
730 SD_STATE_REG = TRAN;
731 BLOCK_COUNT_REG = 1;
732
733 ret = sd_command(SWITCH_FUNC, 0x80ffffef, NULL, 0x1c05);
734 if (ret < 0)
735 goto card_init_error;
736
737 /* Read 512 bytes from the card.
738 The first 512 bits contain the status information
739 TODO: Do something useful with this! */
740 dataptr = carddata;
741 for (i = 0; i < BLOCK_SIZE/2; i += FIFO_LEN)
742 {
743 /* Wait for the FIFO to be full */
744 if (sd_poll_status(FIFO_FULL, 100000))
745 {
746 copy_read_sectors_slow(&dataptr);
747 continue;
748 }
749
750 ret = -EC_FIFO_ENA_BANK_EMPTY;
751 goto card_init_error;
752 }
753 }
754
755 currcard->initialized = 1;
756 return;
757
758 /* Card failed to initialize so disable it */
759 card_init_error:
760 currcard->initialized = ret;
761 }
762
763 /* lock must already be aquired */
764 static void sd_select_device(int card_no)
765 {
766 currcard = &card_info[card_no];
767
768 if (card_no == 0)
769 {
770 /* Main card always gets a chance */
771 sd_status[0].retry = 0;
772 }
773
774 if (currcard->initialized > 0)
775 {
776 /* This card is already initialized - switch to it */
777 sd_card_mux(card_no);
778 return;
779 }
780
781 if (currcard->initialized == 0)
782 {
783 /* Card needs (re)init */
784 sd_init_device(card_no);
785 }
786 }
787
788 /* API Functions */
789
790 void ata_led(bool onoff)
791 {
792 led(onoff);
793 }
794
795 int ata_read_sectors(IF_MV2(int drive,) unsigned long start, int incount,
796 void* inbuf)
797 {
798 #ifndef HAVE_HOTSWAP
799 const int drive = 0;
800 #endif
801 int ret;
802 unsigned char *buf, *buf_end;
803 int bank;
804
805 /* TODO: Add DMA support. */
806
807 mutex_lock(&sd_mtx);
808
809 ata_led(true);
810
811 ata_read_retry:
812 if (drive != 0 && !card_detect_target())
813 {
814 /* no external sd-card inserted */
815 ret = -EC_NOCARD;
816 goto ata_read_error;
817 }
818
819 sd_select_device(drive);
820
821 if (currcard->initialized < 0)
822 {
823 ret = currcard->initialized;
824 goto ata_read_error;
825 }
826
827 last_disk_activity = current_tick;
828
829 /* Only switch banks with non-SDHC cards */
830 if((currcard->ocr & (1<<30))==0)
831 {
832 bank = start / BLOCKS_PER_BANK;
833
834 if (currcard->current_bank != bank)
835 {
836 ret = sd_select_bank(bank);
837 if (ret < 0)
838 goto ata_read_error;
839 }
840
841 start -= bank * BLOCKS_PER_BANK;
842 }
843
844 ret = sd_wait_for_state(TRAN, EC_TRAN_READ_ENTRY);
845 if (ret < 0)
846 goto ata_read_error;
847
848 BLOCK_COUNT_REG = incount;
849
850 #ifdef HAVE_HOTSWAP
851 if(currcard->ocr & (1<<30) )
852 {
853 /* SDHC */
854 ret = sd_command(READ_MULTIPLE_BLOCK, start, NULL, 0x1c25);
855 }
856 else
857 #endif
858 {
859 ret = sd_command(READ_MULTIPLE_BLOCK, start * BLOCK_SIZE, NULL, 0x1c25);
860 }
861 if (ret < 0)
862 goto ata_read_error;
863
864 /* TODO: Don't assume BLOCK_SIZE == SECTOR_SIZE */
865
866 buf_end = (unsigned char *)inbuf + incount * currcard->block_size;
867 for (buf = inbuf; buf < buf_end;)
868 {
869 /* Wait for the FIFO to be full */
870 if (sd_poll_status(FIFO_FULL, 0x80000))
871 {
872 copy_read_sectors_fast(&buf); /* Copy one chunk of 16 words */
873 /* TODO: Switch bank if necessary */
874 continue;
875 }
876
877 ret = -EC_FIFO_READ_FULL;
878 goto ata_read_error;
879 }
880
881 last_disk_activity = current_tick;
882
883 ret = sd_command(STOP_TRANSMISSION, 0, NULL, 1);
884 if (ret < 0)
885 goto ata_read_error;
886
887 ret = sd_wait_for_state(TRAN, EC_TRAN_READ_EXIT);
888 if (ret < 0)
889 goto ata_read_error;
890
891 while (1)
892 {
893 ata_led(false);
894 mutex_unlock(&sd_mtx);
895
896 return ret;
897
898 ata_read_error:
899 if (sd_status[drive].retry < sd_status[drive].retry_max
900 && ret != -EC_NOCARD)
901 {
902 sd_status[drive].retry++;
903 currcard->initialized = 0;
904 goto ata_read_retry;
905 }
906 }
907 }
908
909 int ata_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
910 const void* outbuf)
911 {
912 /* Write support is not finished yet */
913 /* TODO: The standard suggests using ACMD23 prior to writing multiple blocks
914 to improve performance */
915 #ifndef HAVE_HOTSWAP
916 const int drive = 0;
917 #endif
918 int ret;
919 const unsigned char *buf, *buf_end;
920 int bank;
921
922 mutex_lock(&sd_mtx);
923
924 ata_led(true);
925
926 ata_write_retry:
927 if (drive != 0 && !card_detect_target())
928 {
929 /* no external sd-card inserted */
930 ret = -EC_NOCARD;
931 goto ata_write_error;
932 }
933
934 sd_select_device(drive);
935
936 if (currcard->initialized < 0)
937 {
938 ret = currcard->initialized;
939 goto ata_write_error;
940 }
941
942 /* Only switch banks with non-SDHC cards */
943 if((currcard->ocr & (1<<30))==0)
944 {
945 bank = start / BLOCKS_PER_BANK;
946
947 if (currcard->current_bank != bank)
948 {
949 ret = sd_select_bank(bank);
950 if (ret < 0)
951 goto ata_write_error;
952 }
953
954 start -= bank * BLOCKS_PER_BANK;
955 }
956
957 check_time[EC_WRITE_TIMEOUT] = USEC_TIMER;
958
959 ret = sd_wait_for_state(TRAN, EC_TRAN_WRITE_ENTRY);
960 if (ret < 0)
961 goto ata_write_error;
962
963 BLOCK_COUNT_REG = count;
964
965 #ifdef HAVE_HOTSWAP
966 if(currcard->ocr & (1<<30) )
967 {
968 /* SDHC */
969 ret = sd_command(WRITE_MULTIPLE_BLOCK, start, NULL, 0x1c2d);
970 }
971 else
972 #endif
973 {
974 ret = sd_command(WRITE_MULTIPLE_BLOCK, start*BLOCK_SIZE, NULL, 0x1c2d);
975 }
976 if (ret < 0)
977 goto ata_write_error;
978
979 buf_end = outbuf + count * currcard->block_size - 2*FIFO_LEN;
980
981 for (buf = outbuf; buf <= buf_end;)
982 {
983 if (buf == buf_end)
984 {
985 /* Set SD_STATE_REG to PRG for the last buffer fill */
986 SD_STATE_REG = PRG;
987 }
988
989 udelay(2); /* needed here (loop is too fast :-) */
990
991 /* Wait for the FIFO to empty */
992 if (sd_poll_status(FIFO_EMPTY, 0x80000))
993 {
994 copy_write_sectors(&buf); /* Copy one chunk of 16 words */
995 /* TODO: Switch bank if necessary */
996 continue;
997 }
998
999 ret = -EC_FIFO_WR_EMPTY;
1000 goto ata_write_error;
1001 }
1002
1003 last_disk_activity = current_tick;
1004
1005 if (!sd_poll_status(DATA_DONE, 0x80000))
1006 {
1007 ret = -EC_FIFO_WR_DONE;
1008 goto ata_write_error;
1009 }
1010
1011 ret = sd_command(STOP_TRANSMISSION, 0, NULL, 1);
1012 if (ret < 0)
1013 goto ata_write_error;
1014
1015 ret = sd_wait_for_state(TRAN, EC_TRAN_WRITE_EXIT);
1016 if (ret < 0)
1017 goto ata_write_error;
1018
1019 while (1)
1020 {
1021 ata_led(false);
1022 mutex_unlock(&sd_mtx);
1023
1024 return ret;
1025
1026 ata_write_error:
1027 if (sd_status[drive].retry < sd_status[drive].retry_max
1028 && ret != -EC_NOCARD)
1029 {
1030 sd_status[drive].retry++;
1031 currcard->initialized = 0;
1032 goto ata_write_retry;
1033 }
1034 }
1035 }
1036
1037 static void sd_thread(void) __attribute__((noreturn));
1038 static void sd_thread(void)
1039 {
1040 struct queue_event ev;
1041 bool idle_notified = false;
1042
1043 while (1)
1044 {
1045 queue_wait_w_tmo(&sd_queue, &ev, HZ);
1046
1047 switch ( ev.id )
1048 {
1049 #ifdef HAVE_HOTSWAP
1050 case SYS_HOTSWAP_INSERTED:
1051 case SYS_HOTSWAP_EXTRACTED:
1052 fat_lock(); /* lock-out FAT activity first -
1053 prevent deadlocking via disk_mount that
1054 would cause a reverse-order attempt with
1055 another thread */
1056 mutex_lock(&sd_mtx); /* lock-out card activity - direct calls
1057 into driver that bypass the fat cache */
1058
1059 /* We now have exclusive control of fat cache and ata */
1060
1061 disk_unmount(1); /* release "by force", ensure file
1062 descriptors aren't leaked and any busy
1063 ones are invalid if mounting */
1064
1065 /* Force card init for new card, re-init for re-inserted one or
1066 * clear if the last attempt to init failed with an error. */
1067 card_info[1].initialized = 0;
1068 sd_status[1].retry = 0;
1069
1070 if (ev.id == SYS_HOTSWAP_INSERTED)
1071 disk_mount(1);
1072
1073 queue_broadcast(SYS_FS_CHANGED, 0);
1074
1075 /* Access is now safe */
1076 mutex_unlock(&sd_mtx);
1077 fat_unlock();
1078 break;
1079 #endif
1080 case SYS_TIMEOUT:
1081 if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
1082 {
1083 idle_notified = false;
1084 }
1085 else
1086 {
1087 /* never let a timer wrap confuse us */
1088 next_yield = USEC_TIMER;
1089
1090 if (!idle_notified)
1091 {
1092 call_ata_idle_notifys(false);
1093 idle_notified = true;
1094 }
1095 }
1096 break;
1097 case SYS_USB_CONNECTED:
1098 usb_acknowledge(SYS_USB_CONNECTED_ACK);
1099 /* Wait until the USB cable is extracted again */
1100 usb_wait_for_disconnect(&sd_queue);
1101
1102 break;
1103 case SYS_USB_DISCONNECTED:
1104 usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
1105 break;
1106 }
1107 }
1108 }
1109
1110
1111 void ata_spindown(int seconds)
1112 {
1113 (void)seconds;
1114 }
1115
1116 bool ata_disk_is_active(void)
1117 {
1118 return 0;
1119 }
1120
1121 void ata_sleep(void)
1122 {
1123 }
1124
1125 void ata_spin(void)
1126 {
1127 }
1128
1129 /* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
1130 int ata_hard_reset(void)
1131 {
1132 return 0;
1133 }
1134
1135 int ata_soft_reset(void)
1136 {
1137 return 0;
1138 }
1139
1140 void ata_enable(bool on)
1141 {
1142 if(on)
1143 {
1144 DEV_EN |= DEV_ATA; /* Enable controller */
1145 }
1146 else
1147 {
1148 DEV_EN &= ~DEV_ATA; /* Disable controller */
1149 }
1150 }
1151
1152 #ifdef HAVE_HOTSWAP
1153 void card_enable_monitoring_target(bool on)
1154 {
1155 if (on)
1156 {
1157 #ifdef SANSA_E200
1158 GPIO_SET_BITWISE(GPIOA_INT_EN, 0x80);
1159 #elif defined(SANSA_C200)
1160 GPIO_SET_BITWISE(GPIOL_INT_EN, 0x08);
1161 #endif
1162 }
1163 else
1164 {
1165 #ifdef SANSA_E200
1166 GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
1167 #elif defined(SANSA_C200)
1168 GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
1169 #endif
1170 }
1171 }
1172 #endif
1173
1174 int ata_init(void)
1175 {
1176 int ret = 0;
1177
1178 if (!initialized)
1179 mutex_init(&sd_mtx);
1180
1181 mutex_lock(&sd_mtx);
1182
1183 ata_led(false);
1184
1185 if (!initialized)
1186 {
1187 initialized = true;
1188
1189 /* init controller */
1190 outl(inl(0x70000088) & ~(0x4), 0x70000088);
1191 outl(inl(0x7000008c) & ~(0x4), 0x7000008c);
1192 GPO32_ENABLE |= 0x4;
1193
1194 GPIO_SET_BITWISE(GPIOG_ENABLE, (0x3 << 5));
1195 GPIO_SET_BITWISE(GPIOG_OUTPUT_EN, (0x3 << 5));
1196 GPIO_SET_BITWISE(GPIOG_OUTPUT_VAL, (0x3 << 5));
1197
1198 #ifdef HAVE_HOTSWAP
1199 /* enable card detection port - mask interrupt first */
1200 #ifdef SANSA_E200
1201 GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
1202
1203 GPIO_CLEAR_BITWISE(GPIOA_OUTPUT_EN, 0x80);
1204 GPIO_SET_BITWISE(GPIOA_ENABLE, 0x80);
1205 #elif defined SANSA_C200
1206 GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
1207
1208 GPIO_CLEAR_BITWISE(GPIOL_OUTPUT_EN, 0x08);
1209 GPIO_SET_BITWISE(GPIOL_ENABLE, 0x08);
1210 #endif
1211 #endif
1212 sd_select_device(0);
1213
1214 if (currcard->initialized < 0)
1215 ret = currcard->initialized;
1216
1217 queue_init(&sd_queue, true);
1218 create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
1219 sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE)
1220 IF_COP(, CPU));
1221
1222 /* enable interupt for the mSD card */
1223 sleep(HZ/10);
1224 #ifdef HAVE_HOTSWAP
1225 #ifdef SANSA_E200
1226 CPU_INT_EN = HI_MASK;
1227 CPU_HI_INT_EN = GPIO0_MASK;
1228
1229 GPIOA_INT_LEV = (0x80 << 8) | (~GPIOA_INPUT_VAL & 0x80);
1230
1231 GPIOA_INT_CLR = 0x80;
1232 #elif defined SANSA_C200
1233 CPU_INT_EN = HI_MASK;
1234 CPU_HI_INT_EN = GPIO2_MASK;
1235
1236 GPIOL_INT_LEV = (0x08 << 8) | (~GPIOL_INPUT_VAL & 0x08);
1237
1238 GPIOL_INT_CLR = 0x08;
1239 #endif
1240 #endif
1241 }
1242
1243 mutex_unlock(&sd_mtx);
1244
1245 return ret;
1246 }
1247
1248 /* move the sd-card info to mmc struct */
1249 tCardInfo *card_get_info_target(int card_no)
1250 {
1251 int i, temp;
1252 static tCardInfo card;
1253 static const char mantissa[] = { /* *10 */
1254 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 };
1255 static const int exponent[] = { /* use varies */
1256 1,10,100,1000,10000,100000,1000000,10000000,100000000,1000000000 };
1257
1258 card.initialized = card_info[card_no].initialized;
1259 card.ocr = card_info[card_no].ocr;
1260 for(i=0; i<4; i++) card.csd[i] = card_info[card_no].csd[3-i];
1261 for(i=0; i<4; i++) card.cid[i] = card_info[card_no].cid[3-i];
1262 card.numblocks = card_info[card_no].numblocks;
1263 card.blocksize = card_info[card_no].block_size;
1264 card.size = card_info[card_no].capacity < 0xffffffff ?
1265 card_info[card_no].capacity : 0xffffffff;
1266 card.block_exp = card_info[card_no].block_exp;
1267 temp = card_extract_bits(card.csd, 29, 3);
1268 card.speed = mantissa[card_extract_bits(card.csd, 25, 4)]
1269 * exponent[temp > 2 ? 7 : temp + 4];
1270 card.nsac = 100 * card_extract_bits(card.csd, 16, 8);
1271 temp = card_extract_bits(card.csd, 13, 3);
1272 card.tsac = mantissa[card_extract_bits(card.csd, 9, 4)]
1273 * exponent[temp] / 10;
1274 card.cid[0] = htobe32(card.cid[0]); /* ascii chars here */
1275 card.cid[1] = htobe32(card.cid[1]); /* ascii chars here */
1276 temp = *((char*)card.cid+13); /* adjust year<=>month, 1997 <=> 2000 */
1277 *((char*)card.cid+13) = (unsigned char)((temp >> 4) | (temp << 4)) + 3;
1278
1279 return &card;
1280 }
1281
1282 #ifdef HAVE_HOTSWAP
1283 bool card_detect_target(void)
1284 {
1285 #ifdef SANSA_E200
1286 return (GPIOA_INPUT_VAL & 0x80) == 0; /* low active */
1287 #elif defined SANSA_C200
1288 return (GPIOL_INPUT_VAL & 0x08) != 0; /* high active */
1289 #endif
1290 }
1291
1292 static bool sd1_oneshot_callback(struct timeout *tmo)
1293 {
1294 (void)tmo;
1295
1296 /* This is called only if the state was stable for 300ms - check state
1297 * and post appropriate event. */
1298 if (card_detect_target())
1299 queue_broadcast(SYS_HOTSWAP_INSERTED, 0);
1300 else
1301 queue_broadcast(SYS_HOTSWAP_EXTRACTED, 0);
1302
1303 return false;
1304 }
1305
1306 /* called on insertion/removal interrupt */
1307 void microsd_int(void)
1308 {
1309 static struct timeout sd1_oneshot;
1310
1311 #ifdef SANSA_E200
1312 GPIO_CLEAR_BITWISE(GPIOA_INT_EN, 0x80);
1313 GPIOA_INT_LEV = (0x80 << 8) | (~GPIOA_INPUT_VAL & 0x80);
1314 GPIOA_INT_CLR = 0x80;
1315 GPIO_SET_BITWISE(GPIOA_INT_EN, 0x80);
1316
1317 #elif defined SANSA_C200
1318 GPIO_CLEAR_BITWISE(GPIOL_INT_EN, 0x08);
1319 GPIOL_INT_LEV = (0x08 << 8) | (~GPIOL_INPUT_VAL & 0x08);
1320 GPIOL_INT_CLR = 0x08;
1321 GPIO_SET_BITWISE(GPIOL_INT_EN, 0x08);
1322 #endif
1323 timeout_register(&sd1_oneshot, sd1_oneshot_callback, (3*HZ/10), 0);
1324
1325 }
1326 #endif /* HAVE_HOTSWAP */
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