1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright (C) 2006 by Barry Wardell
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
18 ****************************************************************************/
25 /** Initialized in lcd_init_device() **/
26 /* Is the power turned on? */
28 /* Is the display turned on? */
29 static bool display_on
;
30 /* Amount of vertical offset. Used for flip offset correction/detection. */
32 /* Reverse flag. Must be remembered when display is turned off. */
33 static unsigned short disp_control_rev
;
34 /* Contrast setting << 8 */
35 static int lcd_contrast
;
37 static unsigned lcd_yuv_options SHAREDBSS_ATTR
= 0;
39 /* Forward declarations */
40 static void lcd_display_off(void);
42 /* register defines for the Renesas HD66773R */
43 #define R_START_OSC 0x00
44 #define R_DEVICE_CODE_READ 0x00
45 #define R_DRV_OUTPUT_CONTROL 0x01
46 #define R_DRV_AC_CONTROL 0x02
47 #define R_POWER_CONTROL1 0x03
48 #define R_POWER_CONTROL2 0x04
49 #define R_ENTRY_MODE 0x05
50 #define R_COMPARE_REG 0x06
51 #define R_DISP_CONTROL 0x07
52 #define R_FRAME_CYCLE_CONTROL 0x0b
53 #define R_POWER_CONTROL3 0x0c
54 #define R_POWER_CONTROL4 0x0d
55 #define R_POWER_CONTROL5 0x0e
56 #define R_GATE_SCAN_START_POS 0x0f
57 #define R_VERT_SCROLL_CONTROL 0x11
58 #define R_1ST_SCR_DRV_POS 0x14
59 #define R_2ND_SCR_DRV_POS 0x15
60 #define R_HORIZ_RAM_ADDR_POS 0x16
61 #define R_VERT_RAM_ADDR_POS 0x17
62 #define R_RAM_WRITE_DATA_MASK 0x20
63 #define R_RAM_ADDR_SET 0x21
64 #define R_WRITE_DATA_2_GRAM 0x22
65 #define R_RAM_READ_DATA 0x22
66 #define R_GAMMA_FINE_ADJ_POS1 0x30
67 #define R_GAMMA_FINE_ADJ_POS2 0x31
68 #define R_GAMMA_FINE_ADJ_POS3 0x32
69 #define R_GAMMA_GRAD_ADJ_POS 0x33
70 #define R_GAMMA_FINE_ADJ_NEG1 0x34
71 #define R_GAMMA_FINE_ADJ_NEG2 0x35
72 #define R_GAMMA_FINE_ADJ_NEG3 0x36
73 #define R_GAMMA_GRAD_ADJ_NEG 0x37
74 #define R_GAMMA_AMP_ADJ_POS 0x3a
75 #define R_GAMMA_AMP_ADJ_NEG 0x3b
77 static inline void lcd_wait_write(void)
79 while (LCD2_PORT
& LCD2_BUSY_MASK
);
83 static inline void lcd_send_cmd(unsigned v
)
86 LCD2_PORT
= LCD2_CMD_MASK
;
87 LCD2_PORT
= LCD2_CMD_MASK
| v
;
90 /* Send 16-bit data */
91 static inline void lcd_send_data(unsigned v
)
94 LCD2_PORT
= LCD2_DATA_MASK
| (v
>> 8); /* Send MSB first */
95 LCD2_PORT
= LCD2_DATA_MASK
| (v
& 0xff);
98 /* Send 16-bit data byte-swapped. Only needed until we can use block transfer. */
99 static inline void lcd_send_data_swapped(unsigned v
)
102 LCD2_PORT
= LCD2_DATA_MASK
| (v
& 0xff); /* Send LSB first */
103 LCD2_PORT
= LCD2_DATA_MASK
| (v
>> 8);
106 /* Write value to register */
107 static void lcd_write_reg(int reg
, int val
)
113 /*** hardware configuration ***/
115 int lcd_default_contrast(void)
117 return DEFAULT_CONTRAST_SETTING
;
120 void lcd_set_contrast(int val
)
122 /* Clamp val in range 0-14, 16-30 */
130 lcd_contrast
= val
<< 8;
135 /* VCOMG=1, VDV4-0=xxxxx, VCM4-0=11000 */
136 lcd_write_reg(R_POWER_CONTROL5
, 0x2018 | lcd_contrast
);
139 void lcd_set_invert_display(bool yesno
)
141 if (yesno
== (disp_control_rev
== 0x0000))
144 disp_control_rev
= yesno
? 0x0000 : 0x0004;
149 /* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=1, REV=x, D1-0=11 */
150 lcd_write_reg(R_DISP_CONTROL
, 0x0033 | disp_control_rev
);
154 /* turn the display upside down (call lcd_update() afterwards) */
155 void lcd_set_flip(bool yesno
)
157 if (yesno
== (y_offset
!= 0))
160 /* The LCD controller is 132x160 while the LCD itself is 128x160, so we need
161 * to shift the origin by 4 when we flip the LCD */
162 y_offset
= yesno
? 4 : 0;
167 /* SCN4-0=000x0 (G1/G160) */
168 lcd_write_reg(R_GATE_SCAN_START_POS
, yesno
? 0x0002 : 0x0000);
169 /* SM=0, GS=x, SS=x, NL4-0=10011 (G1-G160) */
170 lcd_write_reg(R_DRV_OUTPUT_CONTROL
, yesno
? 0x0213 : 0x0113);
174 void lcd_init_device(void)
177 /* The OF won't boot if this is done in the bootloader - ideally we should
178 tweak the lcd controller speed settings but this will do for now */
179 CLCD_CLOCK_SRC
|= 0xc0000000; /* Set LCD interface clock to PLL */
184 disp_control_rev
= 0x0004;
185 lcd_contrast
= DEFAULT_CONTRAST_SETTING
<< 8;
188 static void lcd_power_on(void)
190 /* Be sure standby bit is clear. */
191 /* BT2-0=000, DC2-0=000, AP2-0=000, SLP=0, STB=0 */
192 lcd_write_reg(R_POWER_CONTROL1
, 0x0000);
194 /** Power ON Sequence **/
195 /* Per datasheet Rev.1.10, Jun.21.2003, p. 99 */
197 lcd_write_reg(R_START_OSC
, 0x0001); /* Start Oscillation */
198 /* 10ms or more for oscillation circuit to stabilize */
200 /* Instruction (1) for power setting; VC2-0, VRH3-0, CAD,
201 VRL3-0, VCM4-0, VDV4-0 */
203 lcd_write_reg(R_POWER_CONTROL3
, 0x0001);
204 /* VRL3-0=0100, PON=0, VRH3-0=0001 */
205 lcd_write_reg(R_POWER_CONTROL4
, 0x0401);
207 lcd_write_reg(R_POWER_CONTROL2
, 0x8000);
208 /* VCOMG=0, VDV4-0=xxxxx (19), VCM4-0=11000 */
209 lcd_write_reg(R_POWER_CONTROL5
, 0x0018 | lcd_contrast
);
210 /* Instruction (2) for power setting; BT2-0, DC2-0, AP2-0 */
211 /* BT2-0=000, DC2-0=001, AP2-0=011, SLP=0, STB=0 */
212 lcd_write_reg(R_POWER_CONTROL1
, 0x002c);
213 /* Instruction (3) for power setting; VCOMG = "1" */
214 /* VCOMG=1, VDV4-0=xxxxx (19), VCM4-0=11000 */
215 lcd_write_reg(R_POWER_CONTROL5
, 0x2018 | lcd_contrast
);
217 /* 40ms or more; time for step-up circuits 1,2 to stabilize */
220 /* Instruction (4) for power setting; PON = "1" */
221 /* VRL3-0=0100, PON=1, VRH3-0=0001 */
222 lcd_write_reg(R_POWER_CONTROL4
, 0x0411);
224 /* 40ms or more; time for step-up circuit 4 to stabilize */
227 /* Instructions for other mode settings (in register order). */
228 /* SM=0, GS=x, SS=0, NL4-0=10011 (G1-G160)*/
229 lcd_write_reg(R_DRV_OUTPUT_CONTROL
, y_offset
? 0x0013 : 0x0113); /* different to X5 */
230 /* FLD1-0=01 (1 field), B/C=1, EOR=1 (C-pat), NW5-0=000000 (1 row) */
231 lcd_write_reg(R_DRV_AC_CONTROL
, 0x0700);
232 /* DIT=0, BGR=1, HWM=0, I/D1-0=10, AM=1, LG2-0=000 */
233 lcd_write_reg(R_ENTRY_MODE
, 0x1028); /* different to X5 */
234 /* CP15-0=0000000000000000 */
235 lcd_write_reg(R_COMPARE_REG
, 0x0000);
236 /* NO1-0=01, SDT1-0=00, EQ1-0=00, DIV1-0=00, RTN3-00000 */
237 lcd_write_reg(R_FRAME_CYCLE_CONTROL
, 0x4000);
238 /* SCN4-0=000x0 (G1/G160) */
239 /* lcd_write_reg(R_GATE_SCAN_START_POS, y_offset ? 0x0000 : 0x0002); */
241 lcd_write_reg(R_VERT_SCROLL_CONTROL
, 0x0000);
242 /* SE17-10(End)=0x9f (159), SS17-10(Start)=0x00 */
243 lcd_write_reg(R_1ST_SCR_DRV_POS
, 0x9f00);
244 /* SE27-20(End)=0x5c (92), SS27-20(Start)=0x00 */
245 lcd_write_reg(R_2ND_SCR_DRV_POS
, 0x5c00);
246 /* HEA7-0=7f, HSA7-0=00 */
247 lcd_write_reg(R_HORIZ_RAM_ADDR_POS
, 0x7f00);
248 /* PKP12-10=0x0, PKP02-00=0x0 */
249 lcd_write_reg(R_GAMMA_FINE_ADJ_POS1
, 0x0003);
250 /* PKP32-30=0x4, PKP22-20=0x0 */
251 lcd_write_reg(R_GAMMA_FINE_ADJ_POS2
, 0x0400);
252 /* PKP52-50=0x4, PKP42-40=0x7 */
253 lcd_write_reg(R_GAMMA_FINE_ADJ_POS3
, 0x0407);
254 /* PRP12-10=0x3, PRP02-00=0x5 */
255 lcd_write_reg(R_GAMMA_GRAD_ADJ_POS
, 0x0305);
256 /* PKN12-10=0x0, PKN02-00=0x3 */
257 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG1
, 0x0003);
258 /* PKN32-30=0x7, PKN22-20=0x4 */
259 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG2
, 0x0704);
260 /* PKN52-50=0x4, PRN42-40=0x7 */
261 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG3
, 0x0407);
262 /* PRN12-10=0x5, PRN02-00=0x3 */
263 lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG
, 0x0503);
264 /* VRP14-10=0x14, VRP03-00=0x09 */
265 lcd_write_reg(R_GAMMA_AMP_ADJ_POS
, 0x1409);
266 /* VRN14-00=0x06, VRN03-00=0x02 */
267 lcd_write_reg(R_GAMMA_AMP_ADJ_NEG
, 0x0602);
269 /* 100ms or more; time for step-up circuits to stabilize */
275 static void lcd_power_off(void)
277 /* Display must be off first */
283 /** Power OFF sequence **/
284 /* Per datasheet Rev.1.10, Jun.21.2003, p. 99 */
286 /* Step-up1 halt setting bit */
287 /* BT2-0=110, DC2-0=001, AP2-0=011, SLP=0, STB=0 */
288 lcd_write_reg(R_POWER_CONTROL1
, 0x062c);
289 /* Step-up3,4 halt setting bit */
290 /* VRL3-0=0100, PON=0, VRH3-0=0001 */
291 lcd_write_reg(R_POWER_CONTROL4
, 0x0401);
292 /* VCOMG=0, VDV4-0=10011, VCM4-0=11000 */
293 lcd_write_reg(R_POWER_CONTROL5
, 0x0018 | lcd_contrast
);
295 /* Wait 100ms or more */
298 /* Step-up2,amp halt setting bit */
299 /* BT2-0=000, DC2-0=000, AP2-0=000, SLP=0, STB=0 */
300 lcd_write_reg(R_POWER_CONTROL1
, 0x0000);
303 static void lcd_display_on(void)
305 /* Be sure power is on first */
309 /** Display ON Sequence **/
310 /* Per datasheet Rev.1.10, Jun.21.2003, p. 97 */
312 /* PT1-0=00, VLE2-1=00, SPT=0, GON=0, DTE=0, REV=0, D1-0=01 */
313 lcd_write_reg(R_DISP_CONTROL
, 0x0001);
315 sleep(HZ
/25); /* Wait 2 frames or more */
317 /* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=0, REV=x, D1-0=01 */
318 lcd_write_reg(R_DISP_CONTROL
, 0x0021 | disp_control_rev
);
319 /* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=0, REV=x, D1-0=11 */
320 lcd_write_reg(R_DISP_CONTROL
, 0x0023 | disp_control_rev
);
322 sleep(HZ
/25); /* Wait 2 frames or more */
324 /* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=1, REV=x, D1-0=11 */
325 lcd_write_reg(R_DISP_CONTROL
, 0x0033 | disp_control_rev
);
330 static void lcd_display_off(void)
334 /** Display OFF sequence **/
335 /* Per datasheet Rev.1.10, Jun.21.2003, p. 97 */
337 /* EQ1-0=00 already */
339 /* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=1, REV=x, D1-0=10 */
340 lcd_write_reg(R_DISP_CONTROL
, 0x0032 | disp_control_rev
);
342 sleep(HZ
/25); /* Wait 2 frames or more */
344 /* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=0, REV=x, D1-0=10 */
345 lcd_write_reg(R_DISP_CONTROL
, 0x0022 | disp_control_rev
);
347 sleep(HZ
/25); /* Wait 2 frames or more */
349 /* PT1-0=00, VLE2-1=00, SPT=0, GON=0, DTE=0, REV=0, D1-0=00 */
350 lcd_write_reg(R_DISP_CONTROL
, 0x0000);
353 void lcd_enable(bool on
)
355 if (on
== display_on
)
361 /* Probably out of sync and we don't wanna pepper the code with
362 lcd_update() calls for this. */
371 bool lcd_enabled(void)
381 /* Set standby mode */
382 /* BT2-0=000, DC2-0=000, AP2-0=000, SLP=0, STB=1 */
383 lcd_write_reg(R_POWER_CONTROL1
, 0x0001);
386 /*** update functions ***/
388 void lcd_yuv_set_options(unsigned options
)
390 lcd_yuv_options
= options
;
393 /* Line write helper function for lcd_yuv_blit. Write two lines of yuv420. */
394 extern void lcd_write_yuv420_lines(unsigned char const * const src
[3],
397 extern void lcd_write_yuv420_lines_odither(unsigned char const * const src
[3],
400 int x_screen
, /* To align dither pattern */
403 /* Performance function to blit a YUV bitmap directly to the LCD */
404 void lcd_blit_yuv(unsigned char * const src
[3],
405 int src_x
, int src_y
, int stride
,
406 int x
, int y
, int width
, int height
)
408 const unsigned char *yuv_src
[3];
409 const unsigned char *ysrc_max
;
419 /* calculate the drawing region */
421 /* The 20GB LCD is actually 128x160 but rotated 90 degrees so the origin
422 * is actually the bottom left and horizontal and vertical are swapped.
423 * Rockbox expects the origin to be the top left so we need to use
424 * 127 - y instead of just y */
426 /* max vert << 8 | start vert */
427 lcd_write_reg(R_VERT_RAM_ADDR_POS
, ((x
+ width
- 1) << 8) | x
);
429 y0
= LCD_HEIGHT
- 1 - y
+ y_offset
;
431 /* DIT=0, BGR=1, HWM=0, I/D1-0=10, AM=0, LG2-0=000 */
432 lcd_write_reg(R_ENTRY_MODE
, 0x1020);
434 yuv_src
[0] = src
[0] + src_y
* stride
+ src_x
;
435 yuv_src
[1] = src
[1] + (src_y
* stride
>> 2) + (src_x
>> 1);
436 yuv_src
[2] = src
[2] + (yuv_src
[1] - src
[1]);
437 ysrc_max
= yuv_src
[0] + height
* stride
;
439 options
= lcd_yuv_options
;
443 /* max horiz << 8 | start horiz */
444 lcd_write_reg(R_HORIZ_RAM_ADDR_POS
, (y0
<< 8) | (y0
- 1));
446 /* position cursor (set AD0-AD15) */
447 /* start vert << 8 | start horiz */
448 lcd_write_reg(R_RAM_ADDR_SET
, (x
<< 8) | y0
);
451 lcd_send_cmd(R_WRITE_DATA_2_GRAM
);
453 if (options
& LCD_YUV_DITHER
)
455 lcd_write_yuv420_lines_odither(yuv_src
, width
, stride
,
461 lcd_write_yuv420_lines(yuv_src
, width
, stride
);
465 yuv_src
[0] += stride
<< 1;
466 yuv_src
[1] += stride
>> 1;
467 yuv_src
[2] += stride
>> 1;
469 while (yuv_src
[0] < ysrc_max
);
471 /* DIT=0, BGR=1, HWM=0, I/D1-0=10, AM=1, LG2-0=000 */
472 lcd_write_reg(R_ENTRY_MODE
, 0x1028);
476 /* Update a fraction of the display. */
477 void lcd_update_rect(int x0
, int y0
, int width
, int height
)
480 unsigned short *addr
;
485 /* calculate the drawing region */
486 y1
= (y0
+ height
) - 1; /* max vert */
487 x1
= (x0
+ width
) - 1; /* max horiz */
492 return; /* nothing left to do, 0 is harmful to lcd_write_data() */
496 /* The 20GB LCD is actually 128x160 but rotated 90 degrees so the origin
497 * is actually the bottom left and horizontal and vertical are swapped.
498 * Rockbox expects the origin to be the top left so we need to use
499 * 127 - y instead of just y */
501 /* max horiz << 8 | start horiz */
502 lcd_send_cmd(R_HORIZ_RAM_ADDR_POS
);
503 lcd_send_data( (((LCD_HEIGHT
-1)-y0
+y_offset
) << 8) | ((LCD_HEIGHT
-1)-y1
+y_offset
) );
505 /* max vert << 8 | start vert */
506 lcd_send_cmd(R_VERT_RAM_ADDR_POS
);
507 lcd_send_data((x1
<< 8) | x0
);
509 /* position cursor (set AD0-AD15) */
510 /* start vert << 8 | start horiz */
511 lcd_send_cmd(R_RAM_ADDR_SET
);
512 lcd_send_data( (x0
<< 8) | ((LCD_HEIGHT
-1)-y0
+y_offset
) );
515 lcd_send_cmd(R_WRITE_DATA_2_GRAM
);
517 addr
= (unsigned short*)&lcd_framebuffer
[y0
][x0
];
522 for (r
= 0; r
< height
; r
++) {
523 /* for each column */
524 for (c
= 0; c
< width
; c
++) {
526 lcd_send_data_swapped(*addr
++);
529 addr
+= LCD_WIDTH
- width
;
533 /* Update the display.
534 This must be called after all other LCD functions that change the display. */
535 void lcd_update(void)
537 lcd_update_rect(0, 0, LCD_WIDTH
, LCD_HEIGHT
);