firmware/drivers/usb/arcotg_dcd.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2007 by Christian Gmeiner
  11  *
  12  * Based on code from the Linux Target Image Builder from Freescale
  13  * available at http://www.bitshrine.org/ and
  14  * http://www.bitshrine.org/gpp/linux-2.6.16-mx31-usb-2.patch
  15  * Adapted for Rockbox in January 2007
  16  * Original file: drivers/usb/gadget/arcotg_udc.c
  17  *
  18  * USB Device Controller Driver
  19  * Driver for ARC OTG USB module in the i.MX31 platform, etc.
  20  *
  21  * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
  22  *
  23  * Based on mpc-udc.h
  24  * Author: Li Yang (leoli@freescale.com)
  25  *         Jiang Bo (Tanya.jiang@freescale.com)
  26  *
  27  * All files in this archive are subject to the GNU General Public License.
  28  * See the file COPYING in the source tree root for full license agreement.
  29  *
  30  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  31  * KIND, either express or implied.
  32  *
  33  ****************************************************************************/
  34
  35 #ifndef _ARCOTG_DCD_H_
  36 #define _ARCOTG_DCD_H_
  37
  38 #include "usbstack/core.h"
  39 #include "arcotg_udc.h"
  40
  41 /*-------------------------------------------------------------------------*/
  42
  43 #define ep_is_in(EP)   (((EP)->desc->bEndpointAddress & USB_DIR_IN)==USB_DIR_IN)
  44
  45 #define EP_DIR_IN       1
  46 #define EP_DIR_OUT      0
  47
  48 /*-------------------------------------------------------------------------*/
  49
  50 /* pipe direction macro from device view */
  51 #define USB_RECV    (0) /* OUT EP */
  52 #define USB_SEND    (1) /* IN EP */
  53
  54 /* Shared Bit Masks for Endpoint Queue Head and Endpoint Transfer Descriptor */
  55 #define  TERMINATE                          (1 << 0)
  56 #define  STATUS_ACTIVE                      (1 << 7)
  57 #define  STATUS_HALTED                      (1 << 6)
  58 #define  STATUS_DATA_BUFF_ERR               (1 << 5)
  59 #define  STATUS_TRANSACTION_ERR             (1 << 4)
  60 #define  INTERRUPT_ON_COMPLETE              (1 << 15)
  61 #define  LENGTH_BIT_POS                     (16)
  62 #define  ADDRESS_MASK                       (0xFFFFFFE0)
  63 #define  ERROR_MASK                         (DTD_STATUS_HALTED | \
  64                                             DTD_STATUS_DATA_BUFF_ERR | \
  65                                             DTD_STATUS_TRANSACTION_ERR)
  66
  67 #define  RESERVED_FIELDS                    ((1 << 0) | (1 << 2) | (1 << 4) | \
  68                                             (1 << 8) | (1 << 9) | (1 << 12)| \
  69                                             (1 << 13)| (1 << 14)| (1 << 31))
  70
  71 /* Endpoint Queue Head Bit Masks */
  72 #define  EP_QUEUE_HEAD_MULT_POS             (30)
  73 #define  EP_QUEUE_HEAD_ZLT_SEL              (0x20000000)
  74 #define  EP_QUEUE_HEAD_MAX_PKT_LEN(ep_info) (((ep_info)>>16)&0x07ff)
  75 #define  EP_QUEUE_HEAD_MULTO                (0x00000C00)
  76 #define  EP_QUEUE_CURRENT_OFFSET_MASK       (0x00000FFF)
  77 #define  EP_QUEUE_FRINDEX_MASK              (0x000007FF)
  78 #define  EP_MAX_LENGTH_TRANSFER             (0x4000)
  79
  80 /*-------------------------------------------------------------------------*/
  81
  82 /* ep name is important, it should obey the convention of ep_match() */
  83 /* even numbered EPs are OUT or setup, odd are IN/INTERRUPT */
  84 static const char* ep_name[] = {
  85     "ep0-control", NULL, /* everyone has ep0 */
  86      /* 7 configurable endpoints */
  87     "ep1out",
  88     "ep1in",
  89     "ep2out",
  90     "ep2in",
  91     "ep3out",
  92     "ep3in",
  93     "ep4out",
  94     "ep4in",
  95     "ep5out",
  96     "ep5in",
  97     "ep6out",
  98     "ep6in",
  99     "ep7out",
 100     "ep7in"
 101 };
 102
 103 /*-------------------------------------------------------------------------*/
 104
 105 /* Endpoint Transfer Descriptor data struct */
 106 struct dtd {
 107     uint32_t next_dtd;       /* Next TD pointer(31-5),
 108                                 T(0) set indicate invalid */
 109     uint32_t dtd_token;      /* Total bytes (30-16), IOC (15),
 110                                 MultO(11-10), STS (7-0)  */
 111     uint32_t buf_ptr0;       /* Buffer pointer Page 0 */
 112     uint32_t buf_ptr1;       /* Buffer pointer Page 1 */
 113     uint32_t buf_ptr2;       /* Buffer pointer Page 2 */
 114     uint32_t buf_ptr3;       /* Buffer pointer Page 3 */
 115     uint32_t buf_ptr4;       /* Buffer pointer Page 4 */
 116     uint32_t res;            /* make it an even 8 words */
 117 } __attribute((packed));
 118
 119 /* Endpoint Queue Head*/
 120 struct dqh {
 121     uint32_t endpt_cap;          /* Mult(31-30) , Zlt(29) , Max Pkt len
 122                                   * and IOS(15) */
 123     uint32_t cur_dtd;            /* Current dTD Pointer(31-5) */
 124     struct dtd dtd_ovrl;         /* Transfer descriptor */
 125     uint32_t setup_buffer[2];    /* Setup data 8 bytes */
 126     uint32_t res2[4];            /* pad out to 64 bytes */
 127 } __attribute((packed));
 128
 129 #define RESPONSE_SIZE 30
 130
 131 /* our controller struct */
 132 struct arcotg_dcd {
 133     struct usb_ctrlrequest local_setup_buff;
 134     struct usb_ep endpoints[USB_MAX_PIPES];
 135     struct usb_response response[RESPONSE_SIZE];
 136     enum usb_device_state usb_state;
 137     enum usb_device_state resume_state;
 138     bool stopped;
 139 };
 140
 141 /*-------------------------------------------------------------------------*/
 142
 143 /* usb_controller functions */
 144 void usb_arcotg_dcd_init(void);
 145 void usb_arcotg_dcd_shutdown(void);
 146 void usb_arcotg_dcd_irq(void);
 147 void usb_arcotg_dcd_start(void);
 148 void usb_arcotg_dcd_stop(void);
 149
 150 /* usb controller ops */
 151 int usb_arcotg_dcd_enable(struct usb_ep* ep,
 152                           struct usb_endpoint_descriptor* desc);
 153 int usb_arcotg_dcd_disable(struct usb_ep* ep);
 154 int usb_arcotg_dcd_set_halt(struct usb_ep* ep, bool halt);
 155 int usb_arcotg_dcd_send(struct usb_ep* ep, struct usb_response* request);
 156 int usb_arcotg_dcd_receive(struct usb_ep* ep, struct usb_response* res);
 157
 158 /* interrupt handlers */
 159 static void setup_received_int(struct usb_ctrlrequest* request);
 160 static void port_change_int(void);
 161 static void dtd_complete(void);
 162 static void reset_int(void);
 163 static void suspend_int(void);
 164 static void resume_int(void);
 165
 166 /* life cycle */
 167 static void qh_init(unsigned char ep_num, unsigned char dir,
 168                     unsigned char ep_type, unsigned int max_pkt_len,
 169                     unsigned int zlt, unsigned char mult);
 170 static void td_init(struct dtd* td, void* buffer, uint32_t todo);
 171 static void ep_setup(unsigned char ep_num, unsigned char dir,
 172                      unsigned char ep_type);
 173
 174 /* helpers for tx/rx */
 175 static int td_enqueue(struct dtd* td, struct dqh* qh, unsigned int mask);
 176 static int td_wait(struct dtd* td, unsigned int mask);
 177 static int usb_ack(struct usb_ctrlrequest * s, int error);
 178
 179 #endif /*_ARCOTG_DCD_H_*/