lib/fenv-except-trapping.c

   1 /* Functions for turning floating-point exceptions into traps (signals).
   2    Copyright (C) 1997-2024 Free Software Foundation, Inc.
   3
   4    This file is free software: you can redistribute it and/or modify
   5    it under the terms of the GNU Lesser General Public License as
   6    published by the Free Software Foundation; either version 2.1 of the
   7    License, or (at your option) any later version.
   8
   9    This file is distributed in the hope that it will be useful,
  10    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12    GNU Lesser General Public License for more details.
  13
  14    You should have received a copy of the GNU Lesser General Public License
  15    along with this program.  If not, see <https://www.gnu.org/licenses/>.  */
  16
  17 /* Based on glibc/sysdeps/<cpu>/{feenablxcpt.c,fedisblxcpt.c,fegetexcept.c}
  18    together with glibc/sysdeps/<cpu>/{fpu_control.h,fenv_private.h,fenv_libc.h}.  */
  19
  20 #include <config.h>
  21
  22 /* Specification.  */
  23 #include <fenv.h>
  24
  25 #include "fenv-private.h"
  26
  27 #if defined __GNUC__ || defined __clang__ || defined _MSC_VER
  28
  29 # if (defined __x86_64__ || defined _M_X64) || (defined __i386 || defined _M_IX86)
  30
  31 int
  32 feenableexcept (int exceptions)
  33 {
  34   exceptions &= FE_ALL_EXCEPT;
  35
  36 #  if defined _MSC_VER
  37
  38   exceptions = exceptions_to_x86hardware (exceptions);
  39
  40   /* Enable the traps only in the SSE unit.  */
  41   unsigned int mxcsr, orig_mxcsr;
  42   _FPU_GETSSECW (orig_mxcsr);
  43   mxcsr = orig_mxcsr & ~(exceptions << 7);
  44   if (mxcsr != orig_mxcsr)
  45     _FPU_SETSSECW (mxcsr);
  46
  47   unsigned int trapbits = 0x3f & ~(orig_mxcsr >> 7);
  48   return x86hardware_to_exceptions (trapbits);
  49
  50 #  else
  51
  52   /* Enable the traps in the 387 unit.  */
  53   unsigned short fctrl, orig_fctrl;
  54   _FPU_GETCW (orig_fctrl);
  55   fctrl = orig_fctrl & ~exceptions;
  56   if (fctrl != orig_fctrl)
  57     _FPU_SETCW (fctrl);
  58
  59   if (CPU_HAS_SSE ())
  60     {
  61       /* Enable the traps in the SSE unit as well.  */
  62       unsigned int mxcsr, orig_mxcsr;
  63       _FPU_GETSSECW (orig_mxcsr);
  64       mxcsr = orig_mxcsr & ~(exceptions << 7);
  65       if (mxcsr != orig_mxcsr)
  66         _FPU_SETSSECW (mxcsr);
  67     }
  68
  69   return FE_ALL_EXCEPT & ~orig_fctrl;
  70
  71 #  endif
  72 }
  73
  74 int
  75 fedisableexcept (int exceptions)
  76 {
  77   exceptions &= FE_ALL_EXCEPT;
  78
  79 #  if defined _MSC_VER
  80
  81   exceptions = exceptions_to_x86hardware (exceptions);
  82
  83   /* Disable the traps only in the SSE unit.  */
  84   unsigned int mxcsr, orig_mxcsr;
  85   _FPU_GETSSECW (orig_mxcsr);
  86   mxcsr = orig_mxcsr | (exceptions << 7);
  87   if (mxcsr != orig_mxcsr)
  88     _FPU_SETSSECW (mxcsr);
  89
  90   unsigned int trapbits = 0x3f & ~(orig_mxcsr >> 7);
  91   return x86hardware_to_exceptions (trapbits);
  92
  93 #  else
  94
  95   /* Disable the traps in the 387 unit.  */
  96   unsigned short fctrl, orig_fctrl;
  97   _FPU_GETCW (orig_fctrl);
  98   fctrl = orig_fctrl | exceptions;
  99   if (fctrl != orig_fctrl)
 100     _FPU_SETCW (fctrl);
 101
 102   if (CPU_HAS_SSE ())
 103     {
 104       /* Disable the traps in the SSE unit as well.  */
 105       unsigned int mxcsr, orig_mxcsr;
 106       _FPU_GETSSECW (orig_mxcsr);
 107       mxcsr = orig_mxcsr | (exceptions << 7);
 108       if (mxcsr != orig_mxcsr)
 109         _FPU_SETSSECW (mxcsr);
 110     }
 111
 112   return FE_ALL_EXCEPT & ~orig_fctrl;
 113
 114 #  endif
 115 }
 116
 117 int
 118 fegetexcept (void)
 119 {
 120 #  if defined _MSC_VER
 121   /* Look at the trap bits in the SSE unit.  */
 122   unsigned int mxcsr;
 123   _FPU_GETSSECW (mxcsr);
 124   unsigned int trapbits = 0x3f & ~(mxcsr >> 7);
 125   return x86hardware_to_exceptions (trapbits);
 126 #  else
 127   /* Look at the trap bits in the 387 unit.  */
 128   unsigned short fctrl;
 129   _FPU_GETCW (fctrl);
 130   return FE_ALL_EXCEPT & ~fctrl;
 131 #  endif
 132 }
 133
 134 # elif defined __aarch64__ /* arm64 */
 135
 136 int
 137 feenableexcept (int exceptions)
 138 {
 139   exceptions &= FE_ALL_EXCEPT;
 140
 141   unsigned long fpcr, orig_fpcr;
 142   _FPU_GETCW (orig_fpcr);
 143   fpcr = orig_fpcr | (exceptions << 8);
 144   if (fpcr != orig_fpcr)
 145     {
 146       _FPU_SETCW (fpcr);
 147       /* Test whether fpcr was actually changed as desired.  */
 148       unsigned long new_fpcr;
 149       _FPU_GETCW (new_fpcr);
 150       if (new_fpcr != fpcr)
 151         return -1;
 152     }
 153
 154   return FE_ALL_EXCEPT & (orig_fpcr >> 8);
 155 }
 156
 157 int
 158 fedisableexcept (int exceptions)
 159 {
 160   exceptions &= FE_ALL_EXCEPT;
 161
 162   unsigned long fpcr, orig_fpcr;
 163   _FPU_GETCW (orig_fpcr);
 164   fpcr = orig_fpcr & ~(exceptions << 8);
 165   if (fpcr != orig_fpcr)
 166     {
 167       _FPU_SETCW (fpcr);
 168       /* Testing whether fpcr was actually changed as desired is not needed
 169          here, since we only cleared some bits.  */
 170     }
 171
 172   return FE_ALL_EXCEPT & (orig_fpcr >> 8);
 173 }
 174
 175 int
 176 fegetexcept (void)
 177 {
 178   unsigned long fpcr;
 179   _FPU_GETCW (fpcr);
 180   return FE_ALL_EXCEPT & (fpcr >> 8);
 181 }
 182
 183 # elif defined __arm__
 184
 185 int
 186 feenableexcept (int exceptions)
 187 {
 188   exceptions &= FE_ALL_EXCEPT;
 189
 190 #  ifdef __SOFTFP__
 191   if (exceptions != 0)
 192     return -1;
 193   return 0;
 194 #  else
 195   unsigned int fpscr, orig_fpscr;
 196   _FPU_GETCW (orig_fpscr);
 197   fpscr = orig_fpscr | (exceptions << 8);
 198   if (fpscr != orig_fpscr)
 199     {
 200       _FPU_SETCW (fpscr);
 201       /* Test whether fpscr was actually changed as desired.  */
 202       unsigned int new_fpscr;
 203       _FPU_GETCW (new_fpscr);
 204       if (new_fpscr != fpscr)
 205         return -1;
 206     }
 207
 208   return FE_ALL_EXCEPT & (orig_fpscr >> 8);
 209 #  endif
 210 }
 211
 212 int
 213 fedisableexcept (int exceptions)
 214 {
 215   exceptions &= FE_ALL_EXCEPT;
 216
 217 #  ifdef __SOFTFP__
 218   return 0;
 219 #  else
 220   unsigned int fpscr, orig_fpscr;
 221   _FPU_GETCW (orig_fpscr);
 222   fpscr = orig_fpscr & ~(exceptions << 8);
 223   if (fpscr != orig_fpscr)
 224     {
 225       _FPU_SETCW (fpscr);
 226       /* Testing whether fpscr was actually changed as desired is not needed
 227          here, since we only cleared some bits.  */
 228     }
 229
 230   return FE_ALL_EXCEPT & (orig_fpscr >> 8);
 231 #  endif
 232 }
 233
 234 int
 235 fegetexcept (void)
 236 {
 237 #  ifdef __SOFTFP__
 238   return 0;
 239 #  else
 240   unsigned int fpscr;
 241   _FPU_GETCW (fpscr);
 242   return FE_ALL_EXCEPT & (fpscr >> 8);
 243 #  endif
 244 }
 245
 246 # elif defined __alpha
 247
 248 int
 249 feenableexcept (int exceptions)
 250 {
 251   exceptions &= FE_ALL_EXCEPT;
 252
 253   unsigned long swcr, orig_swcr;
 254   orig_swcr = __ieee_get_fp_control ();
 255   swcr = orig_swcr | ((unsigned long) exceptions >> 16);
 256   if (swcr != orig_swcr)
 257     __ieee_set_fp_control (swcr);
 258
 259   return FE_ALL_EXCEPT & (orig_swcr << 16);
 260 }
 261
 262 int
 263 fedisableexcept (int exceptions)
 264 {
 265   exceptions &= FE_ALL_EXCEPT;
 266
 267   unsigned long swcr, orig_swcr;
 268   orig_swcr = __ieee_get_fp_control ();
 269   swcr = orig_swcr & ~((unsigned long) exceptions >> 16);
 270   if (swcr != orig_swcr)
 271     __ieee_set_fp_control (swcr);
 272
 273   return FE_ALL_EXCEPT & (orig_swcr << 16);
 274 }
 275
 276 int
 277 fegetexcept (void)
 278 {
 279   unsigned long swcr = __ieee_get_fp_control ();
 280   return FE_ALL_EXCEPT & (swcr << 16);
 281 }
 282
 283 # elif defined __hppa
 284
 285 int
 286 feenableexcept (int exceptions)
 287 {
 288   exceptions &= FE_ALL_EXCEPT;
 289
 290   union { unsigned long long fpreg; unsigned int halfreg[2]; } s;
 291   /* Get the current status word. */
 292   __asm__ __volatile__ ("fstd %%fr0,0(%1)" : "=m" (s.fpreg) : "r" (&s.fpreg) : "%r0");
 293   unsigned int old_halfreg0 = s.halfreg[0];
 294   /* Set all the relevant bits. */
 295   s.halfreg[0] |= (unsigned int) exceptions;
 296   if (s.halfreg[0] != old_halfreg0)
 297     {
 298       /* Store the new status word.  */
 299       __asm__ __volatile__ ("fldd 0(%0),%%fr0" : : "r" (&s.fpreg), "m" (s.fpreg) : "%r0");
 300     }
 301
 302   return FE_ALL_EXCEPT & old_halfreg0;
 303 }
 304
 305 int
 306 fedisableexcept (int exceptions)
 307 {
 308   exceptions &= FE_ALL_EXCEPT;
 309
 310   union { unsigned long long fpreg; unsigned int halfreg[2]; } s;
 311   /* Get the current status word. */
 312   __asm__ __volatile__ ("fstd %%fr0,0(%1)" : "=m" (s.fpreg) : "r" (&s.fpreg) : "%r0");
 313   unsigned int old_halfreg0 = s.halfreg[0];
 314   /* Clear all the relevant bits. */
 315   s.halfreg[0] &= ~ (unsigned int) exceptions;
 316   if (s.halfreg[0] != old_halfreg0)
 317     {
 318       /* Store the new status word.  */
 319       __asm__ __volatile__ ("fldd 0(%0),%%fr0" : : "r" (&s.fpreg), "m" (s.fpreg) : "%r0");
 320     }
 321
 322   return FE_ALL_EXCEPT & old_halfreg0;
 323 }
 324
 325 int
 326 fegetexcept (void)
 327 {
 328   union { unsigned long long fpreg; unsigned int halfreg[2]; } s;
 329   /* Get the current status word. */
 330   __asm__ __volatile__ ("fstd %%fr0,0(%1)" : "=m" (s.fpreg) : "r" (&s.fpreg) : "%r0");
 331
 332   return FE_ALL_EXCEPT & s.halfreg[0];
 333 }
 334
 335 # elif defined __ia64__
 336
 337 int
 338 feenableexcept (int exceptions)
 339 {
 340   exceptions &= FE_ALL_EXCEPT;
 341
 342   unsigned long fpsr, orig_fpsr;
 343   _FPU_GETCW (orig_fpsr);
 344   fpsr = orig_fpsr & ~ (unsigned long) exceptions;
 345   if (fpsr != orig_fpsr)
 346     _FPU_SETCW (fpsr);
 347
 348   return FE_ALL_EXCEPT & ~orig_fpsr;
 349 }
 350
 351 int
 352 fedisableexcept (int exceptions)
 353 {
 354   exceptions &= FE_ALL_EXCEPT;
 355
 356   unsigned long fpsr, orig_fpsr;
 357   _FPU_GETCW (orig_fpsr);
 358   fpsr = orig_fpsr | (unsigned long) exceptions;
 359   if (fpsr != orig_fpsr)
 360     _FPU_SETCW (fpsr);
 361
 362   return FE_ALL_EXCEPT & ~orig_fpsr;
 363 }
 364
 365 int
 366 fegetexcept (void)
 367 {
 368   unsigned long fpsr;
 369   _FPU_GETCW (fpsr);
 370   return FE_ALL_EXCEPT & ~fpsr;
 371 }
 372
 373 # elif defined __m68k__
 374
 375 int
 376 feenableexcept (int exceptions)
 377 {
 378   exceptions &= FE_ALL_EXCEPT;
 379
 380   unsigned int fpcr, orig_fpcr;
 381   _FPU_GETCW (orig_fpcr);
 382   fpcr = orig_fpcr | ((exceptions << 6) | (exceptions & FE_INVALID ? 0xc000 : 0));
 383   if (fpcr != orig_fpcr)
 384     _FPU_SETCW (fpcr);
 385
 386   return FE_ALL_EXCEPT & (orig_fpcr >> 6);
 387 }
 388
 389 int
 390 fedisableexcept (int exceptions)
 391 {
 392   exceptions &= FE_ALL_EXCEPT;
 393
 394   unsigned int fpcr, orig_fpcr;
 395   _FPU_GETCW (orig_fpcr);
 396   fpcr = orig_fpcr & ~ ((exceptions << 6) | (exceptions & FE_INVALID ? 0xc000 : 0));
 397   if (fpcr != orig_fpcr)
 398     _FPU_SETCW (fpcr);
 399
 400   return FE_ALL_EXCEPT & (orig_fpcr >> 6);
 401 }
 402
 403 int
 404 fegetexcept (void)
 405 {
 406   unsigned int fpcr;
 407   _FPU_GETCW (fpcr);
 408   return FE_ALL_EXCEPT & (fpcr >> 6);
 409 }
 410
 411 # elif defined __mips__
 412
 413 int
 414 feenableexcept (int exceptions)
 415 {
 416   exceptions &= FE_ALL_EXCEPT;
 417
 418   unsigned int fcsr, orig_fcsr;
 419   _FPU_GETCW (orig_fcsr);
 420   fcsr = orig_fcsr | (exceptions << 5);
 421   if (fcsr != orig_fcsr)
 422     _FPU_SETCW (fcsr);
 423
 424   return FE_ALL_EXCEPT & (orig_fcsr >> 5);
 425 }
 426
 427 int
 428 fedisableexcept (int exceptions)
 429 {
 430   exceptions &= FE_ALL_EXCEPT;
 431
 432   unsigned int fcsr, orig_fcsr;
 433   _FPU_GETCW (orig_fcsr);
 434   fcsr = orig_fcsr & ~ (exceptions << 5);
 435   if (fcsr != orig_fcsr)
 436     _FPU_SETCW (fcsr);
 437
 438   return FE_ALL_EXCEPT & (orig_fcsr >> 5);
 439 }
 440
 441 int
 442 fegetexcept (void)
 443 {
 444   unsigned int fcsr;
 445   _FPU_GETCW (fcsr);
 446   return FE_ALL_EXCEPT & (fcsr >> 5);
 447 }
 448
 449 # elif defined __loongarch__
 450
 451 int
 452 feenableexcept (int exceptions)
 453 {
 454   exceptions &= FE_ALL_EXCEPT;
 455
 456   unsigned int fcsr, orig_fcsr;
 457   _FPU_GETCW (orig_fcsr);
 458   fcsr = orig_fcsr | (exceptions >> 16);
 459   if (fcsr != orig_fcsr)
 460     _FPU_SETCW (fcsr);
 461
 462   return FE_ALL_EXCEPT & (orig_fcsr << 16);
 463 }
 464
 465 int
 466 fedisableexcept (int exceptions)
 467 {
 468   exceptions &= FE_ALL_EXCEPT;
 469
 470   unsigned int fcsr, orig_fcsr;
 471   _FPU_GETCW (orig_fcsr);
 472   fcsr = orig_fcsr & ~ (exceptions >> 16);
 473   if (fcsr != orig_fcsr)
 474     _FPU_SETCW (fcsr);
 475
 476   return FE_ALL_EXCEPT & (orig_fcsr << 16);
 477 }
 478
 479 int
 480 fegetexcept (void)
 481 {
 482   unsigned int fcsr;
 483   _FPU_GETCW (fcsr);
 484   return FE_ALL_EXCEPT & (fcsr << 16);
 485 }
 486
 487 # elif defined __powerpc__
 488
 489 #  if defined __linux__
 490 #   include <sys/prctl.h>
 491 #  elif defined _AIX
 492 #   include <fptrap.h>
 493 #  endif
 494
 495 int
 496 feenableexcept (int exceptions)
 497 {
 498   exceptions &= FE_ALL_EXCEPT;
 499
 500   union { unsigned long long u; double f; } memenv, orig_memenv;
 501   _FPU_GETCW_AS_DOUBLE (memenv.f);
 502   orig_memenv = memenv;
 503
 504   memenv.u |= ((unsigned int) exceptions >> 22);
 505
 506   if (!(memenv.u == orig_memenv.u))
 507     {
 508       if ((orig_memenv.u & 0x000000f8) == 0 && (memenv.u & 0x000000f8) != 0)
 509         {
 510           /* Put the thread into precise trapping mode.  */
 511 #  if defined __linux__ || defined __NetBSD__
 512           prctl (PR_SET_FPEXC, PR_FP_EXC_PRECISE);
 513 #  elif defined _AIX
 514           /* Documentation: <https://www.ibm.com/docs/en/aix/7.3?topic=f-fp-trap-subroutine>  */
 515           fp_trap (FP_TRAP_SYNC);
 516 #  endif
 517         }
 518
 519       _FPU_SETCW_AS_DOUBLE (memenv.f);
 520     }
 521
 522   return FE_ALL_EXCEPT & ((unsigned int) orig_memenv.u << 22);
 523 }
 524
 525 int
 526 fedisableexcept (int exceptions)
 527 {
 528   exceptions &= FE_ALL_EXCEPT;
 529
 530   union { unsigned long long u; double f; } memenv, orig_memenv;
 531   _FPU_GETCW_AS_DOUBLE (memenv.f);
 532   orig_memenv = memenv;
 533
 534   memenv.u &= ~ ((unsigned int) exceptions >> 22);
 535
 536   if (!(memenv.u == orig_memenv.u))
 537     {
 538       _FPU_SETCW_AS_DOUBLE (memenv.f);
 539
 540       if ((orig_memenv.u & 0x000000f8) != 0 && (memenv.u & 0x000000f8) == 0)
 541         {
 542           /* Put the thread into no-trapping mode.  */
 543 #  if defined __linux__ || defined __NetBSD__
 544           prctl (PR_SET_FPEXC, PR_FP_EXC_DISABLED);
 545 #  elif defined _AIX
 546           /* Documentation: <https://www.ibm.com/docs/en/aix/7.3?topic=f-fp-trap-subroutine>  */
 547           fp_trap (FP_TRAP_OFF);
 548 #  endif
 549         }
 550     }
 551
 552   return FE_ALL_EXCEPT & ((unsigned int) orig_memenv.u << 22);
 553 }
 554
 555 int
 556 fegetexcept (void)
 557 {
 558   union { unsigned long long u; double f; } memenv;
 559   _FPU_GETCW_AS_DOUBLE (memenv.f);
 560
 561   return FE_ALL_EXCEPT & ((unsigned int) memenv.u << 22);
 562 }
 563
 564 # elif defined __riscv
 565
 566 int
 567 feenableexcept (int exceptions)
 568 {
 569   exceptions &= FE_ALL_EXCEPT;
 570
 571   if (exceptions != 0)
 572     return -1;
 573   return 0;
 574 }
 575
 576 int
 577 fedisableexcept (int exceptions)
 578 {
 579   return 0;
 580 }
 581
 582 int
 583 fegetexcept (void)
 584 {
 585   return 0;
 586 }
 587
 588 # elif defined __s390__ || defined __s390x__
 589
 590 int
 591 feenableexcept (int exceptions)
 592 {
 593   exceptions &= FE_ALL_EXCEPT;
 594
 595   unsigned int fpc, orig_fpc;
 596   _FPU_GETCW (orig_fpc);
 597 #  if FE_INEXACT == 8 /* glibc compatible FE_* values */
 598   fpc = orig_fpc | ((unsigned int) exceptions << 24);
 599 #  else /* musl libc compatible FE_* values */
 600   fpc = orig_fpc | ((unsigned int) exceptions << 8);
 601 #  endif
 602   if (fpc != orig_fpc)
 603     _FPU_SETCW (fpc);
 604
 605 #  if FE_INEXACT == 8 /* glibc compatible FE_* values */
 606   return FE_ALL_EXCEPT & (orig_fpc >> 24);
 607 #  else /* musl libc compatible FE_* values */
 608   return FE_ALL_EXCEPT & (orig_fpc >> 8);
 609 #  endif
 610 }
 611
 612 int
 613 fedisableexcept (int exceptions)
 614 {
 615   exceptions &= FE_ALL_EXCEPT;
 616
 617   unsigned int fpc, orig_fpc;
 618   _FPU_GETCW (orig_fpc);
 619 #  if FE_INEXACT == 8 /* glibc compatible FE_* values */
 620   fpc = orig_fpc & ~((unsigned int) exceptions << 24);
 621 #  else /* musl libc compatible FE_* values */
 622   fpc = orig_fpc & ~((unsigned int) exceptions << 8);
 623 #  endif
 624   if (fpc != orig_fpc)
 625     _FPU_SETCW (fpc);
 626
 627 #  if FE_INEXACT == 8 /* glibc compatible FE_* values */
 628   return FE_ALL_EXCEPT & (orig_fpc >> 24);
 629 #  else /* musl libc compatible FE_* values */
 630   return FE_ALL_EXCEPT & (orig_fpc >> 8);
 631 #  endif
 632 }
 633
 634 int
 635 fegetexcept (void)
 636 {
 637   unsigned int fpc;
 638   _FPU_GETCW (fpc);
 639 #  if FE_INEXACT == 8 /* glibc compatible FE_* values */
 640   return FE_ALL_EXCEPT & (fpc >> 24);
 641 #  else /* musl libc compatible FE_* values */
 642   return FE_ALL_EXCEPT & (fpc >> 8);
 643 #  endif
 644 }
 645
 646 # elif defined __sh__
 647
 648 int
 649 feenableexcept (int exceptions)
 650 {
 651   exceptions &= FE_ALL_EXCEPT;
 652
 653   unsigned int fpscr, orig_fpscr;
 654   _FPU_GETCW (orig_fpscr);
 655   fpscr = orig_fpscr | ((unsigned int) exceptions << 5);
 656   if (fpscr != orig_fpscr)
 657     _FPU_SETCW (fpscr);
 658
 659   return FE_ALL_EXCEPT & (orig_fpscr >> 5);
 660 }
 661
 662 int
 663 fedisableexcept (int exceptions)
 664 {
 665   exceptions &= FE_ALL_EXCEPT;
 666
 667   unsigned int fpscr, orig_fpscr;
 668   _FPU_GETCW (orig_fpscr);
 669   fpscr = orig_fpscr & ~ ((unsigned int) exceptions << 5);
 670   if (fpscr != orig_fpscr)
 671     _FPU_SETCW (fpscr);
 672
 673   return FE_ALL_EXCEPT & (orig_fpscr >> 5);
 674 }
 675
 676 int
 677 fegetexcept (void)
 678 {
 679   unsigned int fpscr;
 680   _FPU_GETCW (fpscr);
 681   return FE_ALL_EXCEPT & (fpscr >> 5);
 682 }
 683
 684 # elif defined __sparc
 685
 686 int
 687 feenableexcept (int exceptions)
 688 {
 689   exceptions &= FE_ALL_EXCEPT;
 690
 691   unsigned long fsr, orig_fsr;
 692   _FPU_GETCW (orig_fsr);
 693 #  if FE_INEXACT == 32 /* glibc compatible FE_* values */
 694   fsr = orig_fsr | (exceptions << 18);
 695 #  else /* Solaris compatible FE_* values */
 696   fsr = orig_fsr | (exceptions << 23);
 697 #  endif
 698   if (fsr != orig_fsr)
 699     _FPU_SETCW (fsr);
 700
 701 #  if FE_INEXACT == 32 /* glibc compatible FE_* values */
 702   return FE_ALL_EXCEPT & (orig_fsr >> 18);
 703 #  else /* Solaris compatible FE_* values */
 704   return FE_ALL_EXCEPT & (orig_fsr >> 23);
 705 #  endif
 706 }
 707
 708 int
 709 fedisableexcept (int exceptions)
 710 {
 711   exceptions &= FE_ALL_EXCEPT;
 712
 713   unsigned long fsr, orig_fsr;
 714   _FPU_GETCW (orig_fsr);
 715 #  if FE_INEXACT == 32 /* glibc compatible FE_* values */
 716   fsr = orig_fsr & ~(exceptions << 18);
 717 #  else /* Solaris compatible FE_* values */
 718   fsr = orig_fsr & ~(exceptions << 23);
 719 #  endif
 720   if (fsr != orig_fsr)
 721     _FPU_SETCW (fsr);
 722
 723 #  if FE_INEXACT == 32 /* glibc compatible FE_* values */
 724   return FE_ALL_EXCEPT & (orig_fsr >> 18);
 725 #  else /* Solaris compatible FE_* values */
 726   return FE_ALL_EXCEPT & (orig_fsr >> 23);
 727 #  endif
 728 }
 729
 730 int
 731 fegetexcept (void)
 732 {
 733   unsigned long fsr;
 734   _FPU_GETCW (fsr);
 735 #  if FE_INEXACT == 32 /* glibc compatible FE_* values */
 736   return FE_ALL_EXCEPT & (fsr >> 18);
 737 #  else /* Solaris compatible FE_* values */
 738   return FE_ALL_EXCEPT & (fsr >> 23);
 739 #  endif
 740 }
 741
 742 # else
 743
 744 #  if defined __GNUC__ || defined __clang__
 745 #   warning "Unknown CPU / architecture. Please report your platform and compiler to <bug-gnulib@gnu.org>."
 746 #  endif
 747 #  define NEED_FALLBACK 1
 748
 749 # endif
 750
 751 #else
 752
 753 /* The compiler does not support __asm__ statements or equivalent
 754    intrinsics.  */
 755
 756 # if HAVE_FPSETMASK
 757 /* FreeBSD ≥ 3.1, NetBSD ≥ 1.1, OpenBSD, IRIX, Solaris, Minix ≥ 3.2.  */
 758
 759 /* Get fpgetmask, fpsetmask.  */
 760 #  include <ieeefp.h>
 761
 762 /* The type is called 'fp_except_t' on FreeBSD, but 'fp_except' on
 763    all other systems.  */
 764 #  if !defined __FreeBSD__
 765 #   define fp_except_t fp_except
 766 #  endif
 767
 768 static fp_except_t
 769 exceptions_to_mask (int exceptions)
 770 {
 771   fp_except_t m = 0;
 772   if (exceptions & FE_INVALID)
 773     m |= FP_X_INV;
 774   if (exceptions & FE_DIVBYZERO)
 775     m |= FP_X_DZ;
 776   if (exceptions & FE_OVERFLOW)
 777     m |= FP_X_OFL;
 778   if (exceptions & FE_UNDERFLOW)
 779     m |= FP_X_UFL;
 780   if (exceptions & FE_INEXACT)
 781     m |= FP_X_IMP;
 782   return m;
 783 }
 784
 785 static int
 786 mask_to_exceptions (fp_except_t m)
 787 {
 788   int exceptions = 0;
 789   if (m & FP_X_INV)
 790     exceptions |= FE_INVALID;
 791   if (m & FP_X_DZ)
 792     exceptions |= FE_DIVBYZERO;
 793   if (m & FP_X_OFL)
 794     exceptions |= FE_OVERFLOW;
 795   if (m & FP_X_UFL)
 796     exceptions |= FE_UNDERFLOW;
 797   if (m & FP_X_IMP)
 798     exceptions |= FE_INEXACT;
 799   return exceptions;
 800 }
 801
 802 int
 803 feenableexcept (int exceptions)
 804 {
 805   exceptions &= FE_ALL_EXCEPT;
 806
 807   fp_except_t trapbits = fpgetmask ();
 808   fpsetmask (trapbits | exceptions_to_mask (exceptions));
 809   return mask_to_exceptions (trapbits);
 810 }
 811
 812 int
 813 fedisableexcept (int exceptions)
 814 {
 815   exceptions &= FE_ALL_EXCEPT;
 816
 817   fp_except_t trapbits = fpgetmask ();
 818   fpsetmask (trapbits & ~ exceptions_to_mask (exceptions));
 819   return mask_to_exceptions (trapbits);
 820 }
 821
 822 int
 823 fegetexcept (void)
 824 {
 825   fp_except_t trapbits = fpgetmask ();
 826   return mask_to_exceptions (trapbits);
 827 }
 828
 829 # elif defined _AIX && defined __powerpc__ /* AIX */
 830
 831 #  include <fptrap.h>
 832 /* Documentation:
 833    <https://www.ibm.com/docs/en/aix/7.3?topic=f-fp-any-enable-fp-is-enabled-fp-enable-all-fp-enable-fp-disable-all-fp-disable-subroutine>
 834    <https://www.ibm.com/docs/en/aix/7.3?topic=f-fp-trap-subroutine>  */
 835
 836 /* Convert from an 'int exceptions' to an fptrap_t.  */
 837 #  if 0 /* Unoptimized */
 838 #   define exceptions_to_fptrap(exceptions) \
 839       (  ((exceptions) & FE_INVALID   ? TRP_INVALID     : 0) \
 840        | ((exceptions) & FE_DIVBYZERO ? TRP_DIV_BY_ZERO : 0) \
 841        | ((exceptions) & FE_OVERFLOW  ? TRP_OVERFLOW    : 0) \
 842        | ((exceptions) & FE_UNDERFLOW ? TRP_UNDERFLOW   : 0) \
 843        | ((exceptions) & FE_INEXACT   ? TRP_INEXACT     : 0))
 844 #  else /* Optimized */
 845 #   define exceptions_to_fptrap(exceptions) \
 846       (((unsigned int) (exceptions) & FE_ALL_EXCEPT) >> 22)
 847 #  endif
 848
 849 int
 850 feenableexcept (int exceptions)
 851 {
 852   exceptions &= FE_ALL_EXCEPT;
 853
 854   int prev_enabled = fegetexcept ();
 855   if (exceptions != 0)
 856     {
 857       fp_enable (exceptions_to_fptrap (exceptions));
 858       if (prev_enabled == 0 /* && fegetexcept () != 0 */)
 859         /* Enable precise trapping mode.  */
 860         fp_trap (FP_TRAP_SYNC);
 861     }
 862   return prev_enabled;
 863 }
 864
 865 int
 866 fedisableexcept (int exceptions)
 867 {
 868   exceptions &= FE_ALL_EXCEPT;
 869
 870   int prev_enabled = fegetexcept ();
 871   if (exceptions != 0)
 872     {
 873       fp_disable (exceptions_to_fptrap (exceptions));
 874       if (prev_enabled != 0 && fegetexcept () == 0)
 875         /* Disable precise trapping mode.  */
 876         fp_trap (FP_TRAP_OFF);
 877     }
 878   return prev_enabled;
 879 }
 880
 881 int
 882 fegetexcept (void)
 883 {
 884   return fegetexcept_impl ();
 885 }
 886
 887 # elif HAVE_FESETTRAPENABLE
 888 /* HP-UX, QNX */
 889
 890 int
 891 feenableexcept (int exceptions)
 892 {
 893   exceptions &= FE_ALL_EXCEPT;
 894
 895   int prev_enabled = fegettrapenable ();
 896   if (exceptions != 0)
 897     fesettrapenable (prev_enabled | exceptions);
 898   return prev_enabled;
 899 }
 900
 901 int
 902 fedisableexcept (int exceptions)
 903 {
 904   exceptions &= FE_ALL_EXCEPT;
 905
 906   int prev_enabled = fegettrapenable ();
 907   if (exceptions != 0)
 908     fesettrapenable (prev_enabled & ~exceptions);
 909   return prev_enabled;
 910 }
 911
 912 int
 913 fegetexcept (void)
 914 {
 915   return fegettrapenable ();
 916 }
 917
 918 # else
 919
 920 #  define NEED_FALLBACK 1
 921
 922 # endif
 923
 924 #endif
 925
 926 #if NEED_FALLBACK
 927
 928 /* A dummy fallback.  */
 929
 930 int
 931 feenableexcept (int exceptions)
 932 {
 933   exceptions &= FE_ALL_EXCEPT;
 934   if (exceptions != 0)
 935     return -1;
 936   return 0;
 937 }
 938
 939 int
 940 fedisableexcept (int exceptions)
 941 {
 942   return 0;
 943 }
 944
 945 int
 946 fegetexcept (void)
 947 {
 948   return 0;
 949 }
 950
 951 #endif