sys/dev/netif/bwi/if_bwivar.h

   1 /*
   2  * Copyright (c) 2007 The DragonFly Project.  All rights reserved.
   3  *
   4  * This code is derived from software contributed to The DragonFly Project
   5  * by Sepherosa Ziehau <sepherosa@gmail.com>
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in
  15  *    the documentation and/or other materials provided with the
  16  *    distribution.
  17  * 3. Neither the name of The DragonFly Project nor the names of its
  18  *    contributors may be used to endorse or promote products derived
  19  *    from this software without specific, prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  *
  34  * $DragonFly: src/sys/dev/netif/bwi/if_bwivar.h,v 1.3 2007/09/15 10:53:31 sephe Exp $
  35  */
  36
  37 #ifndef _IF_BWIVAR_H
  38 #define _IF_BWIVAR_H
  39
  40 #define BWI_ALIGN               0x1000
  41 #define BWI_RING_ALIGN          BWI_ALIGN
  42 #define BWI_BUS_SPACE_MAXADDR   0x3fffffff
  43
  44 #define BWI_TX_NRING            6
  45 #define BWI_TXRX_NRING          6
  46 #define BWI_TX_NDESC            128
  47 #define BWI_RX_NDESC            64
  48 #define BWI_TXSTATS_NDESC       64
  49 #define BWI_TX_NSPRDESC         2
  50 #define BWI_TX_DATA_RING        1
  51
  52 /* XXX Onoe/Sample/AMRR probably need different configuration */
  53 #define BWI_SHRETRY             7
  54 #define BWI_LGRETRY             4
  55 #define BWI_SHRETRY_FB          3
  56 #define BWI_LGRETRY_FB          2
  57
  58 #define BWI_NOISE_FLOOR         -95     /* TODO: noise floor calc */
  59 #define BWI_FRAME_MIN_LEN(hdr)  \
  60         ((hdr) + sizeof(struct ieee80211_frame_ack) + IEEE80211_CRC_LEN)
  61
  62 #define CSR_READ_4(sc, reg)             \
  63         bus_space_read_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
  64 #define CSR_READ_2(sc, reg)             \
  65         bus_space_read_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
  66
  67 #define CSR_WRITE_4(sc, reg, val)       \
  68         bus_space_write_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
  69 #define CSR_WRITE_2(sc, reg, val)       \
  70         bus_space_write_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
  71
  72 #define CSR_SETBITS_4(sc, reg, bits)    \
  73         CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) | (bits))
  74 #define CSR_SETBITS_2(sc, reg, bits)    \
  75         CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) | (bits))
  76
  77 #define CSR_FILT_SETBITS_4(sc, reg, filt, bits) \
  78         CSR_WRITE_4((sc), (reg), (CSR_READ_4((sc), (reg)) & (filt)) | (bits))
  79 #define CSR_FILT_SETBITS_2(sc, reg, filt, bits) \
  80         CSR_WRITE_2((sc), (reg), (CSR_READ_2((sc), (reg)) & (filt)) | (bits))
  81
  82 #define CSR_CLRBITS_4(sc, reg, bits)    \
  83         CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) & ~(bits))
  84 #define CSR_CLRBITS_2(sc, reg, bits)    \
  85         CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) & ~(bits))
  86
  87 #define BWI_DEBUG
  88 #ifdef BWI_DEBUG
  89 #define DPRINTF(sc, fmt, ...)   if_printf(&sc->sc_ic.ic_if, fmt, __VA_ARGS__)
  90 #else
  91 #define DPRINTF(sc, fmt, ...)   ((void)0)
  92 #endif
  93
  94 struct bwi_desc32 {
  95         /* Little endian */
  96         uint32_t        ctrl;
  97         uint32_t        addr;   /* BWI_DESC32_A_ */
  98 } __packed;
  99
 100 #define BWI_DESC32_A_FUNC_TXRX          0x1
 101 #define BWI_DESC32_A_FUNC_MASK          __BITS(31, 30)
 102 #define BWI_DESC32_A_ADDR_MASK          __BITS(29, 0)
 103
 104 #define BWI_DESC32_C_BUFLEN_MASK        __BITS(12, 0)
 105 #define BWI_DESC32_C_ADDRHI_MASK        __BITS(17, 16)
 106 #define BWI_DESC32_C_EOR                __BIT(28)
 107 #define BWI_DESC32_C_INTR               __BIT(29)
 108 #define BWI_DESC32_C_FRAME_END          __BIT(30)
 109 #define BWI_DESC32_C_FRAME_START        __BIT(31)
 110
 111 struct bwi_desc64 {
 112         /* Little endian */
 113         uint32_t        ctrl0;
 114         uint32_t        ctrl1;
 115         uint32_t        addr_lo;
 116         uint32_t        addr_hi;
 117 } __packed;
 118
 119 struct bwi_rxbuf_hdr {
 120         /* Little endian */
 121         uint16_t        rxh_buflen;     /* exclude bwi_rxbuf_hdr */
 122         uint8_t         rxh_pad1[2];
 123         uint16_t        rxh_flags1;     /* BWI_RXH_F1_ */
 124         uint8_t         rxh_rssi;
 125         uint8_t         rxh_sq;
 126         uint16_t        rxh_phyinfo;    /* BWI_RXH_PHYINFO_ */
 127         uint16_t        rxh_flags3;     /* BWI_RXH_F3_ */
 128         uint16_t        rxh_flags2;     /* BWI_RXH_F2_ */
 129         uint16_t        rxh_tsf;
 130         uint8_t         rxh_pad3[14];   /* Padded to 30bytes */
 131 } __packed;
 132
 133 #define BWI_RXH_F1_BCM2053_RSSI __BIT(14)
 134 #define BWI_RXH_F1_OFDM         __BIT(0)
 135
 136 #define BWI_RXH_F2_TYPE2FRAME   __BIT(2)
 137
 138 #define BWI_RXH_F3_BCM2050_RSSI __BIT(10)
 139
 140 #define BWI_RXH_PHYINFO_LNAGAIN __BITS(15, 14)
 141
 142 struct bwi_txbuf_hdr {
 143         /* Little endian */
 144         uint32_t        txh_mac_ctrl;   /* BWI_TXH_MAC_C_ */
 145         uint8_t         txh_fc[2];
 146         uint16_t        txh_unknown1;
 147         uint16_t        txh_phy_ctrl;   /* BWI_TXH_PHY_C_ */
 148         uint8_t         txh_ivs[16];
 149         uint8_t         txh_addr1[IEEE80211_ADDR_LEN];
 150         uint16_t        txh_unknown2;
 151         uint8_t         txh_rts_fb_plcp[4];
 152         uint16_t        txh_rts_fb_duration;
 153         uint8_t         txh_fb_plcp[4];
 154         uint16_t        txh_fb_duration;
 155         uint8_t         txh_pad2[2];
 156         uint16_t        txh_id;         /* BWI_TXH_ID_ */
 157         uint16_t        txh_unknown3;
 158         uint8_t         txh_rts_plcp[6];
 159         uint8_t         txh_rts_fc[2];
 160         uint16_t        txh_rts_duration;
 161         uint8_t         txh_rts_ra[IEEE80211_ADDR_LEN];
 162         uint8_t         txh_rts_ta[IEEE80211_ADDR_LEN];
 163         uint8_t         txh_pad3[2];
 164         uint8_t         txh_plcp[6];
 165 } __packed;
 166
 167 #define BWI_TXH_ID_RING_MASK            __BITS(15, 13)
 168 #define BWI_TXH_ID_IDX_MASK             __BITS(12, 0)
 169
 170 #define BWI_TXH_PHY_C_OFDM              __BIT(0)
 171 #define BWI_TXH_PHY_C_SHPREAMBLE        __BIT(4)
 172 #define BWI_TXH_PHY_C_ANTMODE_MASK      __BITS(9, 8)
 173
 174 #define BWI_TXH_MAC_C_ACK               __BIT(0)
 175 #define BWI_TXH_MAC_C_FIRST_FRAG        __BIT(3)
 176 #define BWI_TXH_MAC_C_HWSEQ             __BIT(4)
 177 #define BWI_TXH_MAC_C_FB_OFDM           __BIT(8)
 178
 179 struct bwi_txstats {
 180         /* Little endian */
 181         uint8_t         txs_pad1[4];
 182         uint16_t        txs_id;
 183         uint8_t         txs_flags;
 184         uint8_t         txs_retry_cnt;
 185         uint8_t         txs_pad2[2];
 186         uint16_t        txs_seq;
 187         uint16_t        txs_unknown;
 188         uint8_t         txs_pad3[2];            /* Padded to 16bytes */
 189 } __packed;
 190
 191 struct bwi_ring_data {
 192         uint32_t                rdata_txrx_ctrl;
 193         bus_dmamap_t            rdata_dmap;
 194         bus_addr_t              rdata_paddr;
 195         void                    *rdata_desc;
 196 };
 197
 198 struct bwi_txbuf {
 199         struct mbuf             *tb_mbuf;
 200         bus_dmamap_t            tb_dmap;
 201
 202         struct ieee80211_node   *tb_ni;
 203         int                     tb_rate_idx[2];
 204 };
 205
 206 struct bwi_txbuf_data {
 207         struct bwi_txbuf        tbd_buf[BWI_TX_NDESC];
 208         int                     tbd_used;
 209         int                     tbd_idx;
 210 };
 211
 212 struct bwi_rxbuf {
 213         struct mbuf             *rb_mbuf;
 214         bus_addr_t              rb_paddr;
 215         bus_dmamap_t            rb_dmap;
 216 };
 217
 218 struct bwi_rxbuf_data {
 219         struct bwi_rxbuf        rbd_buf[BWI_RX_NDESC];
 220         bus_dmamap_t            rbd_tmp_dmap;
 221         int                     rbd_idx;
 222 };
 223
 224 struct bwi_txstats_data {
 225         bus_dma_tag_t           stats_ring_dtag;
 226         bus_dmamap_t            stats_ring_dmap;
 227         bus_addr_t              stats_ring_paddr;
 228         void                    *stats_ring;
 229
 230         bus_dma_tag_t           stats_dtag;
 231         bus_dmamap_t            stats_dmap;
 232         bus_addr_t              stats_paddr;
 233         struct bwi_txstats      *stats;
 234
 235         uint32_t                stats_ctrl_base;
 236         int                     stats_idx;
 237 };
 238
 239 struct bwi_fwhdr {
 240         /* Big endian */
 241         uint8_t         fw_type;        /* BWI_FW_T_ */
 242         uint8_t         fw_gen;         /* BWI_FW_GEN */
 243         uint8_t         fw_pad[2];
 244         uint32_t        fw_size;
 245 #define fw_iv_cnt       fw_size
 246 } __packed;
 247
 248 #define BWI_FWHDR_SZ            sizeof(struct bwi_fwhdr)
 249
 250 #define BWI_FW_T_UCODE          'u'
 251 #define BWI_FW_T_PCM            'p'
 252 #define BWI_FW_T_IV             'i'
 253
 254 #define BWI_FW_GEN_1            1
 255
 256 #define BWI_FW_VERSION3         3
 257 #define BWI_FW_VERSION4         4
 258 #define BWI_FW_VERSION3_REVMAX  0x128
 259
 260 #define BWI_FW_PATH             "bwi/v%d/"
 261 #define BWI_FW_UCODE_PATH       BWI_FW_PATH "ucode%d.fw"
 262 #define BWI_FW_PCM_PATH         BWI_FW_PATH "pcm%d.fw"
 263 #define BWI_FW_IV_PATH          BWI_FW_PATH "b0g0initvals%d.fw"
 264 #define BWI_FW_IV_EXT_PATH      BWI_FW_PATH "b0g0bsinitvals%d.fw"
 265
 266 struct bwi_fw_iv {
 267         /* Big endian */
 268         uint16_t                iv_ofs;
 269         union {
 270                 uint32_t        val32;
 271                 uint16_t        val16;
 272         }                       iv_val;
 273 } __packed;
 274
 275 #define BWI_FW_IV_OFS_MASK      __BITS(14, 0)
 276 #define BWI_FW_IV_IS_32BIT      __BIT(15)
 277
 278 enum bwi_clock_mode {
 279         BWI_CLOCK_MODE_SLOW,
 280         BWI_CLOCK_MODE_FAST,
 281         BWI_CLOCK_MODE_DYN
 282 };
 283
 284 struct bwi_regwin {
 285         uint32_t                rw_flags;       /* BWI_REGWIN_F_ */
 286         uint16_t                rw_type;        /* BWI_REGWIN_T_ */
 287         uint8_t                 rw_id;
 288         uint8_t                 rw_rev;
 289 };
 290
 291 #define BWI_REGWIN_F_EXIST      0x1
 292
 293 #define BWI_CREATE_REGWIN(rw, id, type, rev)    \
 294 do {                                            \
 295         (rw)->rw_flags = BWI_REGWIN_F_EXIST;    \
 296         (rw)->rw_type = (type);                 \
 297         (rw)->rw_id = (id);                     \
 298         (rw)->rw_rev = (rev);                   \
 299 } while (0)
 300
 301 #define BWI_REGWIN_EXIST(rw)    ((rw)->rw_flags & BWI_REGWIN_F_EXIST)
 302 #define BWI_GPIO_REGWIN(sc) \
 303         (BWI_REGWIN_EXIST(&(sc)->sc_com_regwin) ? \
 304                 &(sc)->sc_com_regwin : &(sc)->sc_bus_regwin)
 305
 306 struct bwi_mac;
 307
 308 struct bwi_phy {
 309         enum ieee80211_phymode  phy_mode;
 310         int                     phy_rev;
 311         int                     phy_version;
 312
 313         uint32_t                phy_flags;              /* BWI_PHY_F_ */
 314         uint16_t                phy_tbl_ctrl;
 315         uint16_t                phy_tbl_data_lo;
 316         uint16_t                phy_tbl_data_hi;
 317
 318         void                    (*phy_init)(struct bwi_mac *);
 319 };
 320
 321 #define BWI_PHY_F_CALIBRATED    0x1
 322 #define BWI_PHY_F_LINKED        0x2
 323 #define BWI_CLEAR_PHY_FLAGS     (BWI_PHY_F_CALIBRATED)
 324
 325 /* TX power control */
 326 struct bwi_tpctl {
 327         uint16_t                bbp_atten;      /* BBP attenuation: 4bits */
 328         uint16_t                rf_atten;       /* RF attenuation */
 329         uint16_t                tp_ctrl1;       /* ??: 3bits */
 330         uint16_t                tp_ctrl2;       /* ??: 4bits */
 331 };
 332
 333 #define BWI_RF_ATTEN_FACTOR     4
 334 #define BWI_RF_ATTEN_MAX0       9
 335 #define BWI_RF_ATTEN_MAX1       31
 336 #define BWI_BBP_ATTEN_MAX       11
 337 #define BWI_TPCTL1_MAX          7
 338
 339 struct bwi_rf_lo {
 340         int8_t                  ctrl_lo;
 341         int8_t                  ctrl_hi;
 342 };
 343
 344 struct bwi_rf {
 345         uint16_t                rf_type;        /* BWI_RF_T_ */
 346         uint16_t                rf_manu;
 347         int                     rf_rev;
 348
 349         uint32_t                rf_flags;       /* BWI_RF_F_ */
 350
 351 #define BWI_RFLO_MAX            56
 352         struct bwi_rf_lo        rf_lo[BWI_RFLO_MAX];
 353         uint8_t                 rf_lo_used[8];
 354
 355 #define BWI_INVALID_NRSSI       -1000
 356         int16_t                 rf_nrssi[2];    /* Narrow RSSI */
 357         int32_t                 rf_nrssi_slope;
 358
 359 #define BWI_NRSSI_TBLSZ         64
 360         int8_t                  rf_nrssi_table[BWI_NRSSI_TBLSZ];
 361
 362         uint16_t                rf_lo_gain;     /* loopback gain */
 363         uint16_t                rf_rx_gain;     /* TRSW RX gain */
 364
 365         uint16_t                rf_calib;       /* RF calibration value */
 366         u_int                   rf_curchan;     /* current channel */
 367
 368         uint16_t                rf_ctrl_rd;
 369         int                     rf_ctrl_adj;
 370         void                    (*rf_off)(struct bwi_mac *);
 371         void                    (*rf_on)(struct bwi_mac *);
 372
 373         void                    (*rf_set_nrssi_thr)(struct bwi_mac *);
 374         void                    (*rf_calc_nrssi_slope)(struct bwi_mac *);
 375         int                     (*rf_calc_rssi)
 376                                 (struct bwi_mac *,
 377                                  const struct bwi_rxbuf_hdr *);
 378
 379 #define BWI_TSSI_MAX            64
 380         int8_t                  rf_txpower_map0[BWI_TSSI_MAX];
 381                                                 /* Indexed by TSSI */
 382         int                     rf_idle_tssi0;
 383
 384         int8_t                  rf_txpower_map[BWI_TSSI_MAX];
 385         int                     rf_idle_tssi;
 386
 387         int                     rf_base_tssi;
 388
 389         int                     rf_txpower_max; /* dBm */
 390
 391         int                     rf_ant_mode;    /* BWI_ANT_MODE_ */
 392 };
 393
 394 #define BWI_RF_F_INITED         0x1
 395 #define BWI_RF_F_ON             0x2
 396 #define BWI_RF_CLEAR_FLAGS      (BWI_RF_F_INITED)
 397
 398 #define BWI_ANT_MODE_0          0
 399 #define BWI_ANT_MODE_1          1
 400 #define BWI_ANT_MODE_UNKN       2
 401 #define BWI_ANT_MODE_AUTO       3
 402
 403 struct bwi_softc;
 404 struct fw_image;
 405
 406 struct bwi_mac {
 407         struct bwi_regwin       mac_regwin;     /* MUST be first field */
 408 #define mac_rw_flags    mac_regwin.rw_flags
 409 #define mac_type        mac_regwin.rw_type
 410 #define mac_id          mac_regwin.rw_id
 411 #define mac_rev         mac_regwin.rw_rev
 412
 413         struct bwi_softc        *mac_sc;
 414
 415         struct bwi_phy          mac_phy;        /* PHY I/F */
 416         struct bwi_rf           mac_rf;         /* RF I/F */
 417
 418         struct bwi_tpctl        mac_tpctl;      /* TX power control */
 419         uint32_t                mac_flags;      /* BWI_MAC_F_ */
 420
 421         struct fw_image         *mac_ucode;
 422         struct fw_image         *mac_pcm;
 423         struct fw_image         *mac_iv;
 424         struct fw_image         *mac_iv_ext;
 425 };
 426
 427 #define BWI_MAC_F_BSWAP         0x1
 428 #define BWI_MAC_F_TPCTL_INITED  0x2
 429 #define BWI_MAC_F_HAS_TXSTATS   0x4
 430 #define BWI_MAC_F_INITED        0x8
 431 #define BWI_MAC_F_ENABLED       0x10
 432 #define BWI_MAC_F_LOCKED        0x20    /* for debug */
 433 #define BWI_MAC_F_TPCTL_ERROR   0x40
 434
 435 #define BWI_CREATE_MAC(mac, sc, id, rev)        \
 436 do {                                            \
 437         BWI_CREATE_REGWIN(&(mac)->mac_regwin,   \
 438                           (id),                 \
 439                           BWI_REGWIN_T_MAC,     \
 440                           (rev));               \
 441         (mac)->mac_sc = (sc);                   \
 442 } while (0)
 443
 444 #define BWI_MAC_MAX             2
 445
 446 enum bwi_bus_space {
 447         BWI_BUS_SPACE_30BIT = 1,
 448         BWI_BUS_SPACE_32BIT,
 449         BWI_BUS_SPACE_64BIT
 450 };
 451
 452 struct bwi_softc {
 453         struct ieee80211com     sc_ic;
 454         uint32_t                sc_flags;       /* BWI_F_ */
 455         device_t                sc_dev;
 456
 457         uint32_t                sc_cap;         /* BWI_CAP_ */
 458         uint16_t                sc_bbp_id;      /* BWI_BBPID_ */
 459         uint8_t                 sc_bbp_rev;
 460         uint8_t                 sc_bbp_pkg;
 461
 462         uint8_t                 sc_pci_revid;
 463         uint16_t                sc_pci_subvid;
 464         uint16_t                sc_pci_subdid;
 465
 466         uint16_t                sc_card_flags;  /* BWI_CARD_F_ */
 467         uint16_t                sc_pwron_delay;
 468         int                     sc_locale;
 469
 470         int                     sc_irq_rid;
 471         struct resource         *sc_irq_res;
 472         void                    *sc_irq_handle;
 473
 474         int                     sc_mem_rid;
 475         struct resource         *sc_mem_res;
 476         bus_space_tag_t         sc_mem_bt;
 477         bus_space_handle_t      sc_mem_bh;
 478
 479         struct callout          sc_scan_ch;
 480         struct callout          sc_calib_ch;
 481
 482         struct bwi_regwin       *sc_cur_regwin;
 483         struct bwi_regwin       sc_com_regwin;
 484         struct bwi_regwin       sc_bus_regwin;
 485
 486         int                     sc_nmac;
 487         struct bwi_mac          sc_mac[BWI_MAC_MAX];
 488
 489         enum bwi_bus_space      sc_bus_space;
 490         bus_dma_tag_t           sc_parent_dtag;
 491
 492         bus_dma_tag_t           sc_buf_dtag;
 493         struct bwi_txbuf_data   sc_tx_bdata[BWI_TX_NRING];
 494         struct bwi_rxbuf_data   sc_rx_bdata;
 495
 496         bus_dma_tag_t           sc_txring_dtag;
 497         struct bwi_ring_data    sc_tx_rdata[BWI_TX_NRING];
 498         bus_dma_tag_t           sc_rxring_dtag;
 499         struct bwi_ring_data    sc_rx_rdata;
 500
 501         struct bwi_txstats_data *sc_txstats;
 502
 503         int                     sc_tx_timer;
 504
 505         int                     (*sc_newstate)
 506                                 (struct ieee80211com *,
 507                                  enum ieee80211_state, int);
 508
 509         int                     (*sc_init_tx_ring)(struct bwi_softc *, int);
 510         void                    (*sc_free_tx_ring)(struct bwi_softc *, int);
 511
 512         int                     (*sc_init_rx_ring)(struct bwi_softc *);
 513         void                    (*sc_free_rx_ring)(struct bwi_softc *);
 514
 515         int                     (*sc_init_txstats)(struct bwi_softc *);
 516         void                    (*sc_free_txstats)(struct bwi_softc *);
 517
 518         void                    (*sc_setup_rxdesc)
 519                                 (struct bwi_softc *, int, bus_addr_t, int);
 520         void                    (*sc_rxeof)(struct bwi_softc *);
 521
 522         void                    (*sc_setup_txdesc)
 523                                 (struct bwi_softc *, struct bwi_ring_data *,
 524                                  int, bus_addr_t, int);
 525         void                    (*sc_start_tx)
 526                                 (struct bwi_softc *, uint32_t, int);
 527
 528         void                    (*sc_txeof_status)(struct bwi_softc *);
 529
 530         /* Sysctl variables */
 531         int                     sc_fw_version;  /* BWI_FW_VERSION[34] */
 532         int                     sc_dwell_time;  /* milliseconds */
 533 };
 534
 535 #define BWI_F_BUS_INITED        0x1
 536 #define BWI_F_PROMISC           0x2
 537
 538 uint16_t        bwi_read_sprom(struct bwi_softc *, uint16_t);
 539 int             bwi_regwin_switch(struct bwi_softc *, struct bwi_regwin *,
 540                                   struct bwi_regwin **);
 541 int             bwi_regwin_is_enabled(struct bwi_softc *, struct bwi_regwin *);
 542 void            bwi_regwin_enable(struct bwi_softc *, struct bwi_regwin *,
 543                                   uint32_t);
 544 void            bwi_regwin_disable(struct bwi_softc *, struct bwi_regwin *,
 545                                    uint32_t);
 546 int             bwi_bus_init(struct bwi_softc *, struct bwi_mac *);
 547 uint8_t         bwi_rate2plcp(uint8_t); /* XXX belongs to 802.11 */
 548
 549 #define abs(a)  __builtin_abs(a)
 550
 551 #endif  /* !_IF_BWIVAR_H */