sys/dev/netif/bwi/if_bwivar.h

   1 /*
   2  * Copyright (c) 2007 The DragonFly Project.  All rights reserved.
   3  *
   4  * This code is derived from software contributed to The DragonFly Project
   5  * by Sepherosa Ziehau <sepherosa@gmail.com>
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in
  15  *    the documentation and/or other materials provided with the
  16  *    distribution.
  17  * 3. Neither the name of The DragonFly Project nor the names of its
  18  *    contributors may be used to endorse or promote products derived
  19  *    from this software without specific, prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  *
  34  * $DragonFly: src/sys/dev/netif/bwi/if_bwivar.h,v 1.2 2007/09/15 09:59:29 sephe Exp $
  35  */
  36
  37 #ifndef _IF_BWIVAR_H
  38 #define _IF_BWIVAR_H
  39
  40 #define BWI_ALIGN               0x1000
  41 #define BWI_RING_ALIGN          BWI_ALIGN
  42 #define BWI_BUS_SPACE_MAXADDR   0x3fffffff
  43
  44 #define BWI_TX_NRING            6
  45 #define BWI_TXRX_NRING          6
  46 #define BWI_TX_NDESC            128
  47 #define BWI_RX_NDESC            64
  48 #define BWI_TXSTATS_NDESC       64
  49 #define BWI_TX_NSPRDESC         2
  50 #define BWI_TX_DATA_RING        1
  51
  52 /* XXX Onoe/Sample/AMRR probably need different configuration */
  53 #define BWI_SHRETRY             7
  54 #define BWI_LGRETRY             4
  55 #define BWI_SHRETRY_FB          3
  56 #define BWI_LGRETRY_FB          2
  57
  58 #define BWI_NOISE_FLOOR         -95     /* TODO: noise floor calc */
  59
  60 #define CSR_READ_4(sc, reg)             \
  61         bus_space_read_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
  62 #define CSR_READ_2(sc, reg)             \
  63         bus_space_read_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg))
  64
  65 #define CSR_WRITE_4(sc, reg, val)       \
  66         bus_space_write_4((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
  67 #define CSR_WRITE_2(sc, reg, val)       \
  68         bus_space_write_2((sc)->sc_mem_bt, (sc)->sc_mem_bh, (reg), (val))
  69
  70 #define CSR_SETBITS_4(sc, reg, bits)    \
  71         CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) | (bits))
  72 #define CSR_SETBITS_2(sc, reg, bits)    \
  73         CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) | (bits))
  74
  75 #define CSR_FILT_SETBITS_4(sc, reg, filt, bits) \
  76         CSR_WRITE_4((sc), (reg), (CSR_READ_4((sc), (reg)) & (filt)) | (bits))
  77 #define CSR_FILT_SETBITS_2(sc, reg, filt, bits) \
  78         CSR_WRITE_2((sc), (reg), (CSR_READ_2((sc), (reg)) & (filt)) | (bits))
  79
  80 #define CSR_CLRBITS_4(sc, reg, bits)    \
  81         CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) & ~(bits))
  82 #define CSR_CLRBITS_2(sc, reg, bits)    \
  83         CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) & ~(bits))
  84
  85 #define BWI_DEBUG
  86 #ifdef BWI_DEBUG
  87 #define DPRINTF(sc, fmt, ...)   if_printf(&sc->sc_ic.ic_if, fmt, __VA_ARGS__)
  88 #else
  89 #define DPRINTF(sc, fmt, ...)   ((void)0)
  90 #endif
  91
  92 struct bwi_desc32 {
  93         /* Little endian */
  94         uint32_t        ctrl;
  95         uint32_t        addr;   /* BWI_DESC32_A_ */
  96 } __packed;
  97
  98 #define BWI_DESC32_A_FUNC_TXRX          0x1
  99 #define BWI_DESC32_A_FUNC_MASK          __BITS(31, 30)
 100 #define BWI_DESC32_A_ADDR_MASK          __BITS(29, 0)
 101
 102 #define BWI_DESC32_C_BUFLEN_MASK        __BITS(12, 0)
 103 #define BWI_DESC32_C_ADDRHI_MASK        __BITS(17, 16)
 104 #define BWI_DESC32_C_EOR                __BIT(28)
 105 #define BWI_DESC32_C_INTR               __BIT(29)
 106 #define BWI_DESC32_C_FRAME_END          __BIT(30)
 107 #define BWI_DESC32_C_FRAME_START        __BIT(31)
 108
 109 struct bwi_desc64 {
 110         /* Little endian */
 111         uint32_t        ctrl0;
 112         uint32_t        ctrl1;
 113         uint32_t        addr_lo;
 114         uint32_t        addr_hi;
 115 } __packed;
 116
 117 struct bwi_rxbuf_hdr {
 118         /* Little endian */
 119         uint16_t        rxh_buflen;     /* exclude bwi_rxbuf_hdr */
 120         uint8_t         rxh_pad1[2];
 121         uint16_t        rxh_flags1;     /* BWI_RXH_F1_ */
 122         uint8_t         rxh_rssi;
 123         uint8_t         rxh_sq;
 124         uint16_t        rxh_phyinfo;    /* BWI_RXH_PHYINFO_ */
 125         uint16_t        rxh_flags3;     /* BWI_RXH_F3_ */
 126         uint16_t        rxh_flags2;     /* BWI_RXH_F2_ */
 127         uint16_t        rxh_tsf;
 128         uint8_t         rxh_pad3[14];   /* Padded to 30bytes */
 129 } __packed;
 130
 131 #define BWI_RXH_F1_BCM2053_RSSI __BIT(14)
 132 #define BWI_RXH_F1_OFDM         __BIT(0)
 133
 134 #define BWI_RXH_F2_TYPE2FRAME   __BIT(2)
 135
 136 #define BWI_RXH_F3_BCM2050_RSSI __BIT(10)
 137
 138 #define BWI_RXH_PHYINFO_LNAGAIN __BITS(15, 14)
 139
 140 struct bwi_txbuf_hdr {
 141         /* Little endian */
 142         uint32_t        txh_mac_ctrl;   /* BWI_TXH_MAC_C_ */
 143         uint8_t         txh_fc[2];
 144         uint16_t        txh_unknown1;
 145         uint16_t        txh_phy_ctrl;   /* BWI_TXH_PHY_C_ */
 146         uint8_t         txh_ivs[16];
 147         uint8_t         txh_addr1[IEEE80211_ADDR_LEN];
 148         uint16_t        txh_unknown2;
 149         uint8_t         txh_rts_fb_plcp[4];
 150         uint16_t        txh_rts_fb_duration;
 151         uint8_t         txh_fb_plcp[4];
 152         uint16_t        txh_fb_duration;
 153         uint8_t         txh_pad2[2];
 154         uint16_t        txh_id;         /* BWI_TXH_ID_ */
 155         uint16_t        txh_unknown3;
 156         uint8_t         txh_rts_plcp[6];
 157         uint8_t         txh_rts_fc[2];
 158         uint16_t        txh_rts_duration;
 159         uint8_t         txh_rts_ra[IEEE80211_ADDR_LEN];
 160         uint8_t         txh_rts_ta[IEEE80211_ADDR_LEN];
 161         uint8_t         txh_pad3[2];
 162         uint8_t         txh_plcp[6];
 163 } __packed;
 164
 165 #define BWI_TXH_ID_RING_MASK            __BITS(15, 13)
 166 #define BWI_TXH_ID_IDX_MASK             __BITS(12, 0)
 167
 168 #define BWI_TXH_PHY_C_OFDM              __BIT(0)
 169 #define BWI_TXH_PHY_C_SHPREAMBLE        __BIT(4)
 170 #define BWI_TXH_PHY_C_ANTMODE_MASK      __BITS(9, 8)
 171
 172 #define BWI_TXH_MAC_C_ACK               __BIT(0)
 173 #define BWI_TXH_MAC_C_FIRST_FRAG        __BIT(3)
 174 #define BWI_TXH_MAC_C_HWSEQ             __BIT(4)
 175 #define BWI_TXH_MAC_C_FB_OFDM           __BIT(8)
 176
 177 struct bwi_txstats {
 178         /* Little endian */
 179         uint8_t         txs_pad1[4];
 180         uint16_t        txs_id;
 181         uint8_t         txs_flags;
 182         uint8_t         txs_retry_cnt;
 183         uint8_t         txs_pad2[2];
 184         uint16_t        txs_seq;
 185         uint16_t        txs_unknown;
 186         uint8_t         txs_pad3[2];            /* Padded to 16bytes */
 187 } __packed;
 188
 189 struct bwi_ring_data {
 190         uint32_t                rdata_txrx_ctrl;
 191         bus_dmamap_t            rdata_dmap;
 192         bus_addr_t              rdata_paddr;
 193         void                    *rdata_desc;
 194 };
 195
 196 struct bwi_txbuf {
 197         struct mbuf             *tb_mbuf;
 198         bus_dmamap_t            tb_dmap;
 199
 200         struct ieee80211_node   *tb_ni;
 201         int                     tb_rate_idx[2];
 202 };
 203
 204 struct bwi_txbuf_data {
 205         struct bwi_txbuf        tbd_buf[BWI_TX_NDESC];
 206         int                     tbd_used;
 207         int                     tbd_idx;
 208 };
 209
 210 struct bwi_rxbuf {
 211         struct mbuf             *rb_mbuf;
 212         bus_addr_t              rb_paddr;
 213         bus_dmamap_t            rb_dmap;
 214 };
 215
 216 struct bwi_rxbuf_data {
 217         struct bwi_rxbuf        rbd_buf[BWI_RX_NDESC];
 218         bus_dmamap_t            rbd_tmp_dmap;
 219         int                     rbd_idx;
 220 };
 221
 222 struct bwi_txstats_data {
 223         bus_dma_tag_t           stats_ring_dtag;
 224         bus_dmamap_t            stats_ring_dmap;
 225         bus_addr_t              stats_ring_paddr;
 226         void                    *stats_ring;
 227
 228         bus_dma_tag_t           stats_dtag;
 229         bus_dmamap_t            stats_dmap;
 230         bus_addr_t              stats_paddr;
 231         struct bwi_txstats      *stats;
 232
 233         uint32_t                stats_ctrl_base;
 234         int                     stats_idx;
 235 };
 236
 237 struct bwi_fwhdr {
 238         /* Big endian */
 239         uint8_t         fw_type;        /* BWI_FW_T_ */
 240         uint8_t         fw_gen;         /* BWI_FW_GEN */
 241         uint8_t         fw_pad[2];
 242         uint32_t        fw_size;
 243 #define fw_iv_cnt       fw_size
 244 } __packed;
 245
 246 #define BWI_FWHDR_SZ            sizeof(struct bwi_fwhdr)
 247
 248 #define BWI_FW_T_UCODE          'u'
 249 #define BWI_FW_T_PCM            'p'
 250 #define BWI_FW_T_IV             'i'
 251
 252 #define BWI_FW_GEN_1            1
 253
 254 #define BWI_FW_VERSION3         3
 255 #define BWI_FW_VERSION4         4
 256 #define BWI_FW_VERSION3_REVMAX  0x128
 257
 258 #define BWI_FW_PATH             "bwi/v%d/"
 259 #define BWI_FW_UCODE_PATH       BWI_FW_PATH "ucode%d.fw"
 260 #define BWI_FW_PCM_PATH         BWI_FW_PATH "pcm%d.fw"
 261 #define BWI_FW_IV_PATH          BWI_FW_PATH "b0g0initvals%d.fw"
 262 #define BWI_FW_IV_EXT_PATH      BWI_FW_PATH "b0g0bsinitvals%d.fw"
 263
 264 struct bwi_fw_iv {
 265         /* Big endian */
 266         uint16_t                iv_ofs;
 267         union {
 268                 uint32_t        val32;
 269                 uint16_t        val16;
 270         }                       iv_val;
 271 } __packed;
 272
 273 #define BWI_FW_IV_OFS_MASK      __BITS(14, 0)
 274 #define BWI_FW_IV_IS_32BIT      __BIT(15)
 275
 276 enum bwi_clock_mode {
 277         BWI_CLOCK_MODE_SLOW,
 278         BWI_CLOCK_MODE_FAST,
 279         BWI_CLOCK_MODE_DYN
 280 };
 281
 282 struct bwi_regwin {
 283         uint32_t                rw_flags;       /* BWI_REGWIN_F_ */
 284         uint16_t                rw_type;        /* BWI_REGWIN_T_ */
 285         uint8_t                 rw_id;
 286         uint8_t                 rw_rev;
 287 };
 288
 289 #define BWI_REGWIN_F_EXIST      0x1
 290
 291 #define BWI_CREATE_REGWIN(rw, id, type, rev)    \
 292 do {                                            \
 293         (rw)->rw_flags = BWI_REGWIN_F_EXIST;    \
 294         (rw)->rw_type = (type);                 \
 295         (rw)->rw_id = (id);                     \
 296         (rw)->rw_rev = (rev);                   \
 297 } while (0)
 298
 299 #define BWI_REGWIN_EXIST(rw)    ((rw)->rw_flags & BWI_REGWIN_F_EXIST)
 300 #define BWI_GPIO_REGWIN(sc) \
 301         (BWI_REGWIN_EXIST(&(sc)->sc_com_regwin) ? \
 302                 &(sc)->sc_com_regwin : &(sc)->sc_bus_regwin)
 303
 304 struct bwi_mac;
 305
 306 struct bwi_phy {
 307         enum ieee80211_phymode  phy_mode;
 308         int                     phy_rev;
 309         int                     phy_version;
 310
 311         uint32_t                phy_flags;              /* BWI_PHY_F_ */
 312         uint16_t                phy_tbl_ctrl;
 313         uint16_t                phy_tbl_data_lo;
 314         uint16_t                phy_tbl_data_hi;
 315
 316         void                    (*phy_init)(struct bwi_mac *);
 317 };
 318
 319 #define BWI_PHY_F_CALIBRATED    0x1
 320 #define BWI_PHY_F_LINKED        0x2
 321 #define BWI_CLEAR_PHY_FLAGS     (BWI_PHY_F_CALIBRATED)
 322
 323 /* TX power control */
 324 struct bwi_tpctl {
 325         uint16_t                bbp_atten;      /* BBP attenuation: 4bits */
 326         uint16_t                rf_atten;       /* RF attenuation */
 327         uint16_t                tp_ctrl1;       /* ??: 3bits */
 328         uint16_t                tp_ctrl2;       /* ??: 4bits */
 329 };
 330
 331 #define BWI_RF_ATTEN_FACTOR     4
 332 #define BWI_RF_ATTEN_MAX0       9
 333 #define BWI_RF_ATTEN_MAX1       31
 334 #define BWI_BBP_ATTEN_MAX       11
 335 #define BWI_TPCTL1_MAX          7
 336
 337 struct bwi_rf_lo {
 338         int8_t                  ctrl_lo;
 339         int8_t                  ctrl_hi;
 340 };
 341
 342 struct bwi_rf {
 343         uint16_t                rf_type;        /* BWI_RF_T_ */
 344         uint16_t                rf_manu;
 345         int                     rf_rev;
 346
 347         uint32_t                rf_flags;       /* BWI_RF_F_ */
 348
 349 #define BWI_RFLO_MAX            56
 350         struct bwi_rf_lo        rf_lo[BWI_RFLO_MAX];
 351         uint8_t                 rf_lo_used[8];
 352
 353 #define BWI_INVALID_NRSSI       -1000
 354         int16_t                 rf_nrssi[2];    /* Narrow RSSI */
 355         int32_t                 rf_nrssi_slope;
 356
 357 #define BWI_NRSSI_TBLSZ         64
 358         int8_t                  rf_nrssi_table[BWI_NRSSI_TBLSZ];
 359
 360         uint16_t                rf_lo_gain;     /* loopback gain */
 361         uint16_t                rf_rx_gain;     /* TRSW RX gain */
 362
 363         uint16_t                rf_calib;       /* RF calibration value */
 364         u_int                   rf_curchan;     /* current channel */
 365
 366         uint16_t                rf_ctrl_rd;
 367         int                     rf_ctrl_adj;
 368         void                    (*rf_off)(struct bwi_mac *);
 369         void                    (*rf_on)(struct bwi_mac *);
 370
 371         void                    (*rf_set_nrssi_thr)(struct bwi_mac *);
 372         void                    (*rf_calc_nrssi_slope)(struct bwi_mac *);
 373         int                     (*rf_calc_rssi)
 374                                 (struct bwi_mac *,
 375                                  const struct bwi_rxbuf_hdr *);
 376
 377 #define BWI_TSSI_MAX            64
 378         int8_t                  rf_txpower_map0[BWI_TSSI_MAX];
 379                                                 /* Indexed by TSSI */
 380         int                     rf_idle_tssi0;
 381
 382         int8_t                  rf_txpower_map[BWI_TSSI_MAX];
 383         int                     rf_idle_tssi;
 384
 385         int                     rf_base_tssi;
 386
 387         int                     rf_txpower_max; /* dBm */
 388
 389         int                     rf_ant_mode;    /* BWI_ANT_MODE_ */
 390 };
 391
 392 #define BWI_RF_F_INITED         0x1
 393 #define BWI_RF_F_ON             0x2
 394 #define BWI_RF_CLEAR_FLAGS      (BWI_RF_F_INITED)
 395
 396 #define BWI_ANT_MODE_0          0
 397 #define BWI_ANT_MODE_1          1
 398 #define BWI_ANT_MODE_UNKN       2
 399 #define BWI_ANT_MODE_AUTO       3
 400
 401 struct bwi_softc;
 402 struct fw_image;
 403
 404 struct bwi_mac {
 405         struct bwi_regwin       mac_regwin;     /* MUST be first field */
 406 #define mac_rw_flags    mac_regwin.rw_flags
 407 #define mac_type        mac_regwin.rw_type
 408 #define mac_id          mac_regwin.rw_id
 409 #define mac_rev         mac_regwin.rw_rev
 410
 411         struct bwi_softc        *mac_sc;
 412
 413         struct bwi_phy          mac_phy;        /* PHY I/F */
 414         struct bwi_rf           mac_rf;         /* RF I/F */
 415
 416         struct bwi_tpctl        mac_tpctl;      /* TX power control */
 417         uint32_t                mac_flags;      /* BWI_MAC_F_ */
 418
 419         struct fw_image         *mac_ucode;
 420         struct fw_image         *mac_pcm;
 421         struct fw_image         *mac_iv;
 422         struct fw_image         *mac_iv_ext;
 423 };
 424
 425 #define BWI_MAC_F_BSWAP         0x1
 426 #define BWI_MAC_F_TPCTL_INITED  0x2
 427 #define BWI_MAC_F_HAS_TXSTATS   0x4
 428 #define BWI_MAC_F_INITED        0x8
 429 #define BWI_MAC_F_ENABLED       0x10
 430 #define BWI_MAC_F_LOCKED        0x20    /* for debug */
 431 #define BWI_MAC_F_TPCTL_ERROR   0x40
 432
 433 #define BWI_CREATE_MAC(mac, sc, id, rev)        \
 434 do {                                            \
 435         BWI_CREATE_REGWIN(&(mac)->mac_regwin,   \
 436                           (id),                 \
 437                           BWI_REGWIN_T_MAC,     \
 438                           (rev));               \
 439         (mac)->mac_sc = (sc);                   \
 440 } while (0)
 441
 442 #define BWI_MAC_MAX             2
 443
 444 enum bwi_bus_space {
 445         BWI_BUS_SPACE_30BIT = 1,
 446         BWI_BUS_SPACE_32BIT,
 447         BWI_BUS_SPACE_64BIT
 448 };
 449
 450 struct bwi_softc {
 451         struct ieee80211com     sc_ic;
 452         uint32_t                sc_flags;       /* BWI_F_ */
 453         device_t                sc_dev;
 454
 455         uint32_t                sc_cap;         /* BWI_CAP_ */
 456         uint16_t                sc_bbp_id;      /* BWI_BBPID_ */
 457         uint8_t                 sc_bbp_rev;
 458         uint8_t                 sc_bbp_pkg;
 459
 460         uint8_t                 sc_pci_revid;
 461         uint16_t                sc_pci_subvid;
 462         uint16_t                sc_pci_subdid;
 463
 464         uint16_t                sc_card_flags;  /* BWI_CARD_F_ */
 465         uint16_t                sc_pwron_delay;
 466         int                     sc_locale;
 467
 468         int                     sc_irq_rid;
 469         struct resource         *sc_irq_res;
 470         void                    *sc_irq_handle;
 471
 472         int                     sc_mem_rid;
 473         struct resource         *sc_mem_res;
 474         bus_space_tag_t         sc_mem_bt;
 475         bus_space_handle_t      sc_mem_bh;
 476
 477         struct callout          sc_scan_ch;
 478         struct callout          sc_calib_ch;
 479
 480         struct bwi_regwin       *sc_cur_regwin;
 481         struct bwi_regwin       sc_com_regwin;
 482         struct bwi_regwin       sc_bus_regwin;
 483
 484         int                     sc_nmac;
 485         struct bwi_mac          sc_mac[BWI_MAC_MAX];
 486
 487         enum bwi_bus_space      sc_bus_space;
 488         bus_dma_tag_t           sc_parent_dtag;
 489
 490         bus_dma_tag_t           sc_buf_dtag;
 491         struct bwi_txbuf_data   sc_tx_bdata[BWI_TX_NRING];
 492         struct bwi_rxbuf_data   sc_rx_bdata;
 493
 494         bus_dma_tag_t           sc_txring_dtag;
 495         struct bwi_ring_data    sc_tx_rdata[BWI_TX_NRING];
 496         bus_dma_tag_t           sc_rxring_dtag;
 497         struct bwi_ring_data    sc_rx_rdata;
 498
 499         struct bwi_txstats_data *sc_txstats;
 500
 501         int                     sc_tx_timer;
 502
 503         int                     (*sc_newstate)
 504                                 (struct ieee80211com *,
 505                                  enum ieee80211_state, int);
 506
 507         int                     (*sc_init_tx_ring)(struct bwi_softc *, int);
 508         void                    (*sc_free_tx_ring)(struct bwi_softc *, int);
 509
 510         int                     (*sc_init_rx_ring)(struct bwi_softc *);
 511         void                    (*sc_free_rx_ring)(struct bwi_softc *);
 512
 513         int                     (*sc_init_txstats)(struct bwi_softc *);
 514         void                    (*sc_free_txstats)(struct bwi_softc *);
 515
 516         void                    (*sc_setup_rxdesc)
 517                                 (struct bwi_softc *, int, bus_addr_t, int);
 518         void                    (*sc_rxeof)(struct bwi_softc *);
 519
 520         void                    (*sc_setup_txdesc)
 521                                 (struct bwi_softc *, struct bwi_ring_data *,
 522                                  int, bus_addr_t, int);
 523         void                    (*sc_start_tx)
 524                                 (struct bwi_softc *, uint32_t, int);
 525
 526         void                    (*sc_txeof_status)(struct bwi_softc *);
 527
 528         /* Sysctl variables */
 529         int                     sc_fw_version;  /* BWI_FW_VERSION[34] */
 530         int                     sc_dwell_time;  /* milliseconds */
 531 };
 532
 533 #define BWI_F_BUS_INITED        0x1
 534 #define BWI_F_PROMISC           0x2
 535
 536 uint16_t        bwi_read_sprom(struct bwi_softc *, uint16_t);
 537 int             bwi_regwin_switch(struct bwi_softc *, struct bwi_regwin *,
 538                                   struct bwi_regwin **);
 539 int             bwi_regwin_is_enabled(struct bwi_softc *, struct bwi_regwin *);
 540 void            bwi_regwin_enable(struct bwi_softc *, struct bwi_regwin *,
 541                                   uint32_t);
 542 void            bwi_regwin_disable(struct bwi_softc *, struct bwi_regwin *,
 543                                    uint32_t);
 544 int             bwi_bus_init(struct bwi_softc *, struct bwi_mac *);
 545 uint8_t         bwi_rate2plcp(uint8_t); /* XXX belongs to 802.11 */
 546
 547 #define abs(a)  __builtin_abs(a)
 548
 549 #endif  /* !_IF_BWIVAR_H */