2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/hdmi.h>
32 #include <linux/i2c.h>
33 #include <linux/module.h>
35 #include <drm/drm_edid.h>
36 #include <linux/string.h>
38 #include <bus/iicbus/iic.h>
39 #include <bus/iicbus/iiconf.h>
40 #include "iicbus_if.h"
42 #define version_greater(edid, maj, min) \
43 (((edid)->version > (maj)) || \
44 ((edid)->version == (maj) && (edid)->revision > (min)))
46 #define EDID_EST_TIMINGS 16
47 #define EDID_STD_TIMINGS 8
48 #define EDID_DETAILED_TIMINGS 4
51 * EDID blocks out in the wild have a variety of bugs, try to collect
52 * them here (note that userspace may work around broken monitors first,
53 * but fixes should make their way here so that the kernel "just works"
54 * on as many displays as possible).
57 /* First detailed mode wrong, use largest 60Hz mode */
58 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
59 /* Reported 135MHz pixel clock is too high, needs adjustment */
60 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
61 /* Prefer the largest mode at 75 Hz */
62 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
63 /* Detail timing is in cm not mm */
64 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
65 /* Detailed timing descriptors have bogus size values, so just take the
66 * maximum size and use that.
68 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
69 /* Monitor forgot to set the first detailed is preferred bit. */
70 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
71 /* use +hsync +vsync for detailed mode */
72 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
73 /* Force reduced-blanking timings for detailed modes */
74 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
76 #define EDID_QUIRK_FORCE_8BPC (1 << 8)
78 #define EDID_QUIRK_FORCE_12BPC (1 << 9)
80 struct detailed_mode_closure
{
81 struct drm_connector
*connector
;
93 static struct edid_quirk
{
97 } edid_quirk_list
[] = {
99 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60
},
101 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60
},
103 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
105 /* Belinea 10 15 55 */
106 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60
},
107 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60
},
109 /* Envision Peripherals, Inc. EN-7100e */
110 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH
},
111 /* Envision EN2028 */
112 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60
},
114 /* Funai Electronics PM36B */
115 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75
|
116 EDID_QUIRK_DETAILED_IN_CM
},
118 /* LG Philips LCD LP154W01-A5 */
119 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
},
120 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
},
122 /* Philips 107p5 CRT */
123 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
126 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED
},
128 /* Samsung SyncMaster 205BW. Note: irony */
129 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP
},
130 /* Samsung SyncMaster 22[5-6]BW */
131 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60
},
132 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60
},
134 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
135 { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC
},
137 /* ViewSonic VA2026w */
138 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING
},
140 /* Medion MD 30217 PG */
141 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75
},
143 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
144 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC
},
148 * Autogenerated from the DMT spec.
149 * This table is copied from xfree86/modes/xf86EdidModes.c.
151 static const struct drm_display_mode drm_dmt_modes
[] = {
152 /* 0x01 - 640x350@85Hz */
153 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 31500, 640, 672,
154 736, 832, 0, 350, 382, 385, 445, 0,
155 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
156 /* 0x02 - 640x400@85Hz */
157 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 31500, 640, 672,
158 736, 832, 0, 400, 401, 404, 445, 0,
159 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
160 /* 0x03 - 720x400@85Hz */
161 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 35500, 720, 756,
162 828, 936, 0, 400, 401, 404, 446, 0,
163 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
164 /* 0x04 - 640x480@60Hz */
165 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25175, 640, 656,
166 752, 800, 0, 480, 490, 492, 525, 0,
167 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
168 /* 0x05 - 640x480@72Hz */
169 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 664,
170 704, 832, 0, 480, 489, 492, 520, 0,
171 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
172 /* 0x06 - 640x480@75Hz */
173 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 656,
174 720, 840, 0, 480, 481, 484, 500, 0,
175 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
176 /* 0x07 - 640x480@85Hz */
177 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 36000, 640, 696,
178 752, 832, 0, 480, 481, 484, 509, 0,
179 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
180 /* 0x08 - 800x600@56Hz */
181 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 36000, 800, 824,
182 896, 1024, 0, 600, 601, 603, 625, 0,
183 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
184 /* 0x09 - 800x600@60Hz */
185 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 40000, 800, 840,
186 968, 1056, 0, 600, 601, 605, 628, 0,
187 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
188 /* 0x0a - 800x600@72Hz */
189 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 50000, 800, 856,
190 976, 1040, 0, 600, 637, 643, 666, 0,
191 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
192 /* 0x0b - 800x600@75Hz */
193 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 49500, 800, 816,
194 896, 1056, 0, 600, 601, 604, 625, 0,
195 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
196 /* 0x0c - 800x600@85Hz */
197 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 56250, 800, 832,
198 896, 1048, 0, 600, 601, 604, 631, 0,
199 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
200 /* 0x0d - 800x600@120Hz RB */
201 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 73250, 800, 848,
202 880, 960, 0, 600, 603, 607, 636, 0,
203 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
204 /* 0x0e - 848x480@60Hz */
205 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER
, 33750, 848, 864,
206 976, 1088, 0, 480, 486, 494, 517, 0,
207 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
208 /* 0x0f - 1024x768@43Hz, interlace */
209 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER
, 44900, 1024, 1032,
210 1208, 1264, 0, 768, 768, 772, 817, 0,
211 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
212 DRM_MODE_FLAG_INTERLACE
) },
213 /* 0x10 - 1024x768@60Hz */
214 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 65000, 1024, 1048,
215 1184, 1344, 0, 768, 771, 777, 806, 0,
216 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
217 /* 0x11 - 1024x768@70Hz */
218 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 75000, 1024, 1048,
219 1184, 1328, 0, 768, 771, 777, 806, 0,
220 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
221 /* 0x12 - 1024x768@75Hz */
222 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 78750, 1024, 1040,
223 1136, 1312, 0, 768, 769, 772, 800, 0,
224 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
225 /* 0x13 - 1024x768@85Hz */
226 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 94500, 1024, 1072,
227 1168, 1376, 0, 768, 769, 772, 808, 0,
228 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
229 /* 0x14 - 1024x768@120Hz RB */
230 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 115500, 1024, 1072,
231 1104, 1184, 0, 768, 771, 775, 813, 0,
232 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
233 /* 0x15 - 1152x864@75Hz */
234 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER
, 108000, 1152, 1216,
235 1344, 1600, 0, 864, 865, 868, 900, 0,
236 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
237 /* 0x55 - 1280x720@60Hz */
238 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 1390,
239 1430, 1650, 0, 720, 725, 730, 750, 0,
240 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
241 /* 0x16 - 1280x768@60Hz RB */
242 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 68250, 1280, 1328,
243 1360, 1440, 0, 768, 771, 778, 790, 0,
244 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
245 /* 0x17 - 1280x768@60Hz */
246 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 79500, 1280, 1344,
247 1472, 1664, 0, 768, 771, 778, 798, 0,
248 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
249 /* 0x18 - 1280x768@75Hz */
250 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 102250, 1280, 1360,
251 1488, 1696, 0, 768, 771, 778, 805, 0,
252 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
253 /* 0x19 - 1280x768@85Hz */
254 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 117500, 1280, 1360,
255 1496, 1712, 0, 768, 771, 778, 809, 0,
256 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
257 /* 0x1a - 1280x768@120Hz RB */
258 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER
, 140250, 1280, 1328,
259 1360, 1440, 0, 768, 771, 778, 813, 0,
260 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
261 /* 0x1b - 1280x800@60Hz RB */
262 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 71000, 1280, 1328,
263 1360, 1440, 0, 800, 803, 809, 823, 0,
264 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
265 /* 0x1c - 1280x800@60Hz */
266 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 83500, 1280, 1352,
267 1480, 1680, 0, 800, 803, 809, 831, 0,
268 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
269 /* 0x1d - 1280x800@75Hz */
270 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 106500, 1280, 1360,
271 1488, 1696, 0, 800, 803, 809, 838, 0,
272 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
273 /* 0x1e - 1280x800@85Hz */
274 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 122500, 1280, 1360,
275 1496, 1712, 0, 800, 803, 809, 843, 0,
276 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
277 /* 0x1f - 1280x800@120Hz RB */
278 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER
, 146250, 1280, 1328,
279 1360, 1440, 0, 800, 803, 809, 847, 0,
280 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
281 /* 0x20 - 1280x960@60Hz */
282 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1376,
283 1488, 1800, 0, 960, 961, 964, 1000, 0,
284 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
285 /* 0x21 - 1280x960@85Hz */
286 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 148500, 1280, 1344,
287 1504, 1728, 0, 960, 961, 964, 1011, 0,
288 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
289 /* 0x22 - 1280x960@120Hz RB */
290 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER
, 175500, 1280, 1328,
291 1360, 1440, 0, 960, 963, 967, 1017, 0,
292 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
293 /* 0x23 - 1280x1024@60Hz */
294 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 108000, 1280, 1328,
295 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
296 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
297 /* 0x24 - 1280x1024@75Hz */
298 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 135000, 1280, 1296,
299 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
300 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
301 /* 0x25 - 1280x1024@85Hz */
302 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 157500, 1280, 1344,
303 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
304 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
305 /* 0x26 - 1280x1024@120Hz RB */
306 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 187250, 1280, 1328,
307 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
308 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
309 /* 0x27 - 1360x768@60Hz */
310 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER
, 85500, 1360, 1424,
311 1536, 1792, 0, 768, 771, 777, 795, 0,
312 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
313 /* 0x28 - 1360x768@120Hz RB */
314 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER
, 148250, 1360, 1408,
315 1440, 1520, 0, 768, 771, 776, 813, 0,
316 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
317 /* 0x51 - 1366x768@60Hz */
318 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER
, 85500, 1366, 1436,
319 1579, 1792, 0, 768, 771, 774, 798, 0,
320 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
321 /* 0x56 - 1366x768@60Hz */
322 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER
, 72000, 1366, 1380,
323 1436, 1500, 0, 768, 769, 772, 800, 0,
324 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
325 /* 0x29 - 1400x1050@60Hz RB */
326 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 101000, 1400, 1448,
327 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
328 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
329 /* 0x2a - 1400x1050@60Hz */
330 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 121750, 1400, 1488,
331 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
332 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
333 /* 0x2b - 1400x1050@75Hz */
334 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 156000, 1400, 1504,
335 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
336 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
337 /* 0x2c - 1400x1050@85Hz */
338 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 179500, 1400, 1504,
339 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
340 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
341 /* 0x2d - 1400x1050@120Hz RB */
342 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER
, 208000, 1400, 1448,
343 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
344 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
345 /* 0x2e - 1440x900@60Hz RB */
346 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 88750, 1440, 1488,
347 1520, 1600, 0, 900, 903, 909, 926, 0,
348 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
349 /* 0x2f - 1440x900@60Hz */
350 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 106500, 1440, 1520,
351 1672, 1904, 0, 900, 903, 909, 934, 0,
352 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
353 /* 0x30 - 1440x900@75Hz */
354 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 136750, 1440, 1536,
355 1688, 1936, 0, 900, 903, 909, 942, 0,
356 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
357 /* 0x31 - 1440x900@85Hz */
358 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 157000, 1440, 1544,
359 1696, 1952, 0, 900, 903, 909, 948, 0,
360 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
361 /* 0x32 - 1440x900@120Hz RB */
362 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER
, 182750, 1440, 1488,
363 1520, 1600, 0, 900, 903, 909, 953, 0,
364 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
365 /* 0x53 - 1600x900@60Hz */
366 { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER
, 108000, 1600, 1624,
367 1704, 1800, 0, 900, 901, 904, 1000, 0,
368 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
369 /* 0x33 - 1600x1200@60Hz */
370 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 162000, 1600, 1664,
371 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
372 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
373 /* 0x34 - 1600x1200@65Hz */
374 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 175500, 1600, 1664,
375 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
376 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
377 /* 0x35 - 1600x1200@70Hz */
378 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 189000, 1600, 1664,
379 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
380 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
381 /* 0x36 - 1600x1200@75Hz */
382 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 202500, 1600, 1664,
383 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
384 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
385 /* 0x37 - 1600x1200@85Hz */
386 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 229500, 1600, 1664,
387 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
388 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
389 /* 0x38 - 1600x1200@120Hz RB */
390 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER
, 268250, 1600, 1648,
391 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
392 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
393 /* 0x39 - 1680x1050@60Hz RB */
394 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 119000, 1680, 1728,
395 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
396 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
397 /* 0x3a - 1680x1050@60Hz */
398 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 146250, 1680, 1784,
399 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
400 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
401 /* 0x3b - 1680x1050@75Hz */
402 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 187000, 1680, 1800,
403 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
404 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
405 /* 0x3c - 1680x1050@85Hz */
406 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 214750, 1680, 1808,
407 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
408 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
409 /* 0x3d - 1680x1050@120Hz RB */
410 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER
, 245500, 1680, 1728,
411 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
412 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
413 /* 0x3e - 1792x1344@60Hz */
414 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 204750, 1792, 1920,
415 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
416 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
417 /* 0x3f - 1792x1344@75Hz */
418 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 261000, 1792, 1888,
419 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
420 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
421 /* 0x40 - 1792x1344@120Hz RB */
422 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER
, 333250, 1792, 1840,
423 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
424 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
425 /* 0x41 - 1856x1392@60Hz */
426 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 218250, 1856, 1952,
427 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
428 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
429 /* 0x42 - 1856x1392@75Hz */
430 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 288000, 1856, 1984,
431 2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
432 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
433 /* 0x43 - 1856x1392@120Hz RB */
434 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER
, 356500, 1856, 1904,
435 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
436 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
437 /* 0x52 - 1920x1080@60Hz */
438 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2008,
439 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
440 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
441 /* 0x44 - 1920x1200@60Hz RB */
442 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 154000, 1920, 1968,
443 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
444 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
445 /* 0x45 - 1920x1200@60Hz */
446 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 193250, 1920, 2056,
447 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
448 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
449 /* 0x46 - 1920x1200@75Hz */
450 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 245250, 1920, 2056,
451 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
452 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
453 /* 0x47 - 1920x1200@85Hz */
454 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 281250, 1920, 2064,
455 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
456 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
457 /* 0x48 - 1920x1200@120Hz RB */
458 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER
, 317000, 1920, 1968,
459 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
460 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
461 /* 0x49 - 1920x1440@60Hz */
462 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 234000, 1920, 2048,
463 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
464 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
465 /* 0x4a - 1920x1440@75Hz */
466 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 297000, 1920, 2064,
467 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
468 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
469 /* 0x4b - 1920x1440@120Hz RB */
470 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER
, 380500, 1920, 1968,
471 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
472 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
473 /* 0x54 - 2048x1152@60Hz */
474 { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER
, 162000, 2048, 2074,
475 2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
476 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
477 /* 0x4c - 2560x1600@60Hz RB */
478 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 268500, 2560, 2608,
479 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
480 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
481 /* 0x4d - 2560x1600@60Hz */
482 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 348500, 2560, 2752,
483 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
484 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
485 /* 0x4e - 2560x1600@75Hz */
486 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 443250, 2560, 2768,
487 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
488 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
489 /* 0x4f - 2560x1600@85Hz */
490 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 505250, 2560, 2768,
491 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
492 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
493 /* 0x50 - 2560x1600@120Hz RB */
494 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER
, 552750, 2560, 2608,
495 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
496 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
497 /* 0x57 - 4096x2160@60Hz RB */
498 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER
, 556744, 4096, 4104,
499 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
500 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
501 /* 0x58 - 4096x2160@59.94Hz RB */
502 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER
, 556188, 4096, 4104,
503 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
504 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
) },
508 * These more or less come from the DMT spec. The 720x400 modes are
509 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
510 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
511 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
514 * The DMT modes have been fact-checked; the rest are mild guesses.
516 static const struct drm_display_mode edid_est_modes
[] = {
517 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 40000, 800, 840,
518 968, 1056, 0, 600, 601, 605, 628, 0,
519 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@60Hz */
520 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 36000, 800, 824,
521 896, 1024, 0, 600, 601, 603, 625, 0,
522 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@56Hz */
523 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 656,
524 720, 840, 0, 480, 481, 484, 500, 0,
525 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@75Hz */
526 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 31500, 640, 664,
527 704, 832, 0, 480, 489, 491, 520, 0,
528 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@72Hz */
529 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 30240, 640, 704,
530 768, 864, 0, 480, 483, 486, 525, 0,
531 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@67Hz */
532 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25200, 640, 656,
533 752, 800, 0, 480, 490, 492, 525, 0,
534 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 640x480@60Hz */
535 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 35500, 720, 738,
536 846, 900, 0, 400, 421, 423, 449, 0,
537 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 720x400@88Hz */
538 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 28320, 720, 738,
539 846, 900, 0, 400, 412, 414, 449, 0,
540 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 720x400@70Hz */
541 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 135000, 1280, 1296,
542 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
543 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1280x1024@75Hz */
544 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 78800, 1024, 1040,
545 1136, 1312, 0, 768, 769, 772, 800, 0,
546 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1024x768@75Hz */
547 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 75000, 1024, 1048,
548 1184, 1328, 0, 768, 771, 777, 806, 0,
549 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 1024x768@70Hz */
550 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 65000, 1024, 1048,
551 1184, 1344, 0, 768, 771, 777, 806, 0,
552 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 1024x768@60Hz */
553 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER
,44900, 1024, 1032,
554 1208, 1264, 0, 768, 768, 776, 817, 0,
555 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
| DRM_MODE_FLAG_INTERLACE
) }, /* 1024x768@43Hz */
556 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 57284, 832, 864,
557 928, 1152, 0, 624, 625, 628, 667, 0,
558 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
) }, /* 832x624@75Hz */
559 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 49500, 800, 816,
560 896, 1056, 0, 600, 601, 604, 625, 0,
561 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@75Hz */
562 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 50000, 800, 856,
563 976, 1040, 0, 600, 637, 643, 666, 0,
564 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 800x600@72Hz */
565 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER
, 108000, 1152, 1216,
566 1344, 1600, 0, 864, 865, 868, 900, 0,
567 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) }, /* 1152x864@75Hz */
577 static const struct minimode est3_modes
[] = {
585 { 1024, 768, 85, 0 },
586 { 1152, 864, 75, 0 },
588 { 1280, 768, 60, 1 },
589 { 1280, 768, 60, 0 },
590 { 1280, 768, 75, 0 },
591 { 1280, 768, 85, 0 },
592 { 1280, 960, 60, 0 },
593 { 1280, 960, 85, 0 },
594 { 1280, 1024, 60, 0 },
595 { 1280, 1024, 85, 0 },
597 { 1360, 768, 60, 0 },
598 { 1440, 900, 60, 1 },
599 { 1440, 900, 60, 0 },
600 { 1440, 900, 75, 0 },
601 { 1440, 900, 85, 0 },
602 { 1400, 1050, 60, 1 },
603 { 1400, 1050, 60, 0 },
604 { 1400, 1050, 75, 0 },
606 { 1400, 1050, 85, 0 },
607 { 1680, 1050, 60, 1 },
608 { 1680, 1050, 60, 0 },
609 { 1680, 1050, 75, 0 },
610 { 1680, 1050, 85, 0 },
611 { 1600, 1200, 60, 0 },
612 { 1600, 1200, 65, 0 },
613 { 1600, 1200, 70, 0 },
615 { 1600, 1200, 75, 0 },
616 { 1600, 1200, 85, 0 },
617 { 1792, 1344, 60, 0 },
618 { 1792, 1344, 75, 0 },
619 { 1856, 1392, 60, 0 },
620 { 1856, 1392, 75, 0 },
621 { 1920, 1200, 60, 1 },
622 { 1920, 1200, 60, 0 },
624 { 1920, 1200, 75, 0 },
625 { 1920, 1200, 85, 0 },
626 { 1920, 1440, 60, 0 },
627 { 1920, 1440, 75, 0 },
630 static const struct minimode extra_modes
[] = {
631 { 1024, 576, 60, 0 },
632 { 1366, 768, 60, 0 },
633 { 1600, 900, 60, 0 },
634 { 1680, 945, 60, 0 },
635 { 1920, 1080, 60, 0 },
636 { 2048, 1152, 60, 0 },
637 { 2048, 1536, 60, 0 },
641 * Probably taken from CEA-861 spec.
642 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
644 static const struct drm_display_mode edid_cea_modes
[] = {
645 /* 1 - 640x480@60Hz */
646 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 25175, 640, 656,
647 752, 800, 0, 480, 490, 492, 525, 0,
648 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
649 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
650 /* 2 - 720x480@60Hz */
651 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 27000, 720, 736,
652 798, 858, 0, 480, 489, 495, 525, 0,
653 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
654 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
655 /* 3 - 720x480@60Hz */
656 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 27000, 720, 736,
657 798, 858, 0, 480, 489, 495, 525, 0,
658 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
659 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
660 /* 4 - 1280x720@60Hz */
661 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 1390,
662 1430, 1650, 0, 720, 725, 730, 750, 0,
663 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
664 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
665 /* 5 - 1920x1080i@60Hz */
666 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2008,
667 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
668 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
669 DRM_MODE_FLAG_INTERLACE
),
670 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
671 /* 6 - 720(1440)x480i@60Hz */
672 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER
, 13500, 720, 739,
673 801, 858, 0, 480, 488, 494, 525, 0,
674 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
675 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
676 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
677 /* 7 - 720(1440)x480i@60Hz */
678 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER
, 13500, 720, 739,
679 801, 858, 0, 480, 488, 494, 525, 0,
680 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
681 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
682 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
683 /* 8 - 720(1440)x240@60Hz */
684 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER
, 13500, 720, 739,
685 801, 858, 0, 240, 244, 247, 262, 0,
686 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
687 DRM_MODE_FLAG_DBLCLK
),
688 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
689 /* 9 - 720(1440)x240@60Hz */
690 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER
, 13500, 720, 739,
691 801, 858, 0, 240, 244, 247, 262, 0,
692 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
693 DRM_MODE_FLAG_DBLCLK
),
694 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
695 /* 10 - 2880x480i@60Hz */
696 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2956,
697 3204, 3432, 0, 480, 488, 494, 525, 0,
698 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
699 DRM_MODE_FLAG_INTERLACE
),
700 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
701 /* 11 - 2880x480i@60Hz */
702 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2956,
703 3204, 3432, 0, 480, 488, 494, 525, 0,
704 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
705 DRM_MODE_FLAG_INTERLACE
),
706 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
707 /* 12 - 2880x240@60Hz */
708 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2956,
709 3204, 3432, 0, 240, 244, 247, 262, 0,
710 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
711 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
712 /* 13 - 2880x240@60Hz */
713 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2956,
714 3204, 3432, 0, 240, 244, 247, 262, 0,
715 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
716 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
717 /* 14 - 1440x480@60Hz */
718 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1472,
719 1596, 1716, 0, 480, 489, 495, 525, 0,
720 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
721 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
722 /* 15 - 1440x480@60Hz */
723 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1472,
724 1596, 1716, 0, 480, 489, 495, 525, 0,
725 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
726 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
727 /* 16 - 1920x1080@60Hz */
728 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2008,
729 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
730 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
731 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
732 /* 17 - 720x576@50Hz */
733 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 27000, 720, 732,
734 796, 864, 0, 576, 581, 586, 625, 0,
735 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
736 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
737 /* 18 - 720x576@50Hz */
738 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 27000, 720, 732,
739 796, 864, 0, 576, 581, 586, 625, 0,
740 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
741 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
742 /* 19 - 1280x720@50Hz */
743 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 1720,
744 1760, 1980, 0, 720, 725, 730, 750, 0,
745 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
746 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
747 /* 20 - 1920x1080i@50Hz */
748 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2448,
749 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
750 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
751 DRM_MODE_FLAG_INTERLACE
),
752 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
753 /* 21 - 720(1440)x576i@50Hz */
754 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER
, 13500, 720, 732,
755 795, 864, 0, 576, 580, 586, 625, 0,
756 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
757 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
758 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
759 /* 22 - 720(1440)x576i@50Hz */
760 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER
, 13500, 720, 732,
761 795, 864, 0, 576, 580, 586, 625, 0,
762 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
763 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
764 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
765 /* 23 - 720(1440)x288@50Hz */
766 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER
, 13500, 720, 732,
767 795, 864, 0, 288, 290, 293, 312, 0,
768 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
769 DRM_MODE_FLAG_DBLCLK
),
770 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
771 /* 24 - 720(1440)x288@50Hz */
772 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER
, 13500, 720, 732,
773 795, 864, 0, 288, 290, 293, 312, 0,
774 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
775 DRM_MODE_FLAG_DBLCLK
),
776 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
777 /* 25 - 2880x576i@50Hz */
778 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2928,
779 3180, 3456, 0, 576, 580, 586, 625, 0,
780 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
781 DRM_MODE_FLAG_INTERLACE
),
782 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
783 /* 26 - 2880x576i@50Hz */
784 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2928,
785 3180, 3456, 0, 576, 580, 586, 625, 0,
786 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
787 DRM_MODE_FLAG_INTERLACE
),
788 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
789 /* 27 - 2880x288@50Hz */
790 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2928,
791 3180, 3456, 0, 288, 290, 293, 312, 0,
792 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
793 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
794 /* 28 - 2880x288@50Hz */
795 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER
, 54000, 2880, 2928,
796 3180, 3456, 0, 288, 290, 293, 312, 0,
797 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
798 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
799 /* 29 - 1440x576@50Hz */
800 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1464,
801 1592, 1728, 0, 576, 581, 586, 625, 0,
802 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
803 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
804 /* 30 - 1440x576@50Hz */
805 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER
, 54000, 1440, 1464,
806 1592, 1728, 0, 576, 581, 586, 625, 0,
807 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
808 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
809 /* 31 - 1920x1080@50Hz */
810 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2448,
811 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
812 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
813 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
814 /* 32 - 1920x1080@24Hz */
815 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2558,
816 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
817 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
818 .vrefresh
= 24, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
819 /* 33 - 1920x1080@25Hz */
820 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2448,
821 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
822 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
823 .vrefresh
= 25, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
824 /* 34 - 1920x1080@30Hz */
825 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 74250, 1920, 2008,
826 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
827 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
828 .vrefresh
= 30, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
829 /* 35 - 2880x480@60Hz */
830 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER
, 108000, 2880, 2944,
831 3192, 3432, 0, 480, 489, 495, 525, 0,
832 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
833 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
834 /* 36 - 2880x480@60Hz */
835 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER
, 108000, 2880, 2944,
836 3192, 3432, 0, 480, 489, 495, 525, 0,
837 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
838 .vrefresh
= 60, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
839 /* 37 - 2880x576@50Hz */
840 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER
, 108000, 2880, 2928,
841 3184, 3456, 0, 576, 581, 586, 625, 0,
842 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
843 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
844 /* 38 - 2880x576@50Hz */
845 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER
, 108000, 2880, 2928,
846 3184, 3456, 0, 576, 581, 586, 625, 0,
847 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
848 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
849 /* 39 - 1920x1080i@50Hz */
850 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 72000, 1920, 1952,
851 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
852 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_NVSYNC
|
853 DRM_MODE_FLAG_INTERLACE
),
854 .vrefresh
= 50, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
855 /* 40 - 1920x1080i@100Hz */
856 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2448,
857 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
858 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
859 DRM_MODE_FLAG_INTERLACE
),
860 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
861 /* 41 - 1280x720@100Hz */
862 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 148500, 1280, 1720,
863 1760, 1980, 0, 720, 725, 730, 750, 0,
864 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
865 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
866 /* 42 - 720x576@100Hz */
867 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 54000, 720, 732,
868 796, 864, 0, 576, 581, 586, 625, 0,
869 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
870 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
871 /* 43 - 720x576@100Hz */
872 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 54000, 720, 732,
873 796, 864, 0, 576, 581, 586, 625, 0,
874 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
875 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
876 /* 44 - 720(1440)x576i@100Hz */
877 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER
, 27000, 720, 732,
878 795, 864, 0, 576, 580, 586, 625, 0,
879 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
880 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
881 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
882 /* 45 - 720(1440)x576i@100Hz */
883 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER
, 27000, 720, 732,
884 795, 864, 0, 576, 580, 586, 625, 0,
885 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
886 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
887 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
888 /* 46 - 1920x1080i@120Hz */
889 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER
, 148500, 1920, 2008,
890 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
891 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
|
892 DRM_MODE_FLAG_INTERLACE
),
893 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
894 /* 47 - 1280x720@120Hz */
895 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 148500, 1280, 1390,
896 1430, 1650, 0, 720, 725, 730, 750, 0,
897 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
898 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
899 /* 48 - 720x480@120Hz */
900 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 54000, 720, 736,
901 798, 858, 0, 480, 489, 495, 525, 0,
902 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
903 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
904 /* 49 - 720x480@120Hz */
905 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 54000, 720, 736,
906 798, 858, 0, 480, 489, 495, 525, 0,
907 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
908 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
909 /* 50 - 720(1440)x480i@120Hz */
910 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER
, 27000, 720, 739,
911 801, 858, 0, 480, 488, 494, 525, 0,
912 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
913 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
914 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
915 /* 51 - 720(1440)x480i@120Hz */
916 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER
, 27000, 720, 739,
917 801, 858, 0, 480, 488, 494, 525, 0,
918 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
919 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
920 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
921 /* 52 - 720x576@200Hz */
922 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 108000, 720, 732,
923 796, 864, 0, 576, 581, 586, 625, 0,
924 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
925 .vrefresh
= 200, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
926 /* 53 - 720x576@200Hz */
927 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 108000, 720, 732,
928 796, 864, 0, 576, 581, 586, 625, 0,
929 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
930 .vrefresh
= 200, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
931 /* 54 - 720(1440)x576i@200Hz */
932 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER
, 54000, 720, 732,
933 795, 864, 0, 576, 580, 586, 625, 0,
934 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
935 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
936 .vrefresh
= 200, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
937 /* 55 - 720(1440)x576i@200Hz */
938 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER
, 54000, 720, 732,
939 795, 864, 0, 576, 580, 586, 625, 0,
940 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
941 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
942 .vrefresh
= 200, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
943 /* 56 - 720x480@240Hz */
944 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 108000, 720, 736,
945 798, 858, 0, 480, 489, 495, 525, 0,
946 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
947 .vrefresh
= 240, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
948 /* 57 - 720x480@240Hz */
949 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 108000, 720, 736,
950 798, 858, 0, 480, 489, 495, 525, 0,
951 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
),
952 .vrefresh
= 240, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
953 /* 58 - 720(1440)x480i@240 */
954 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER
, 54000, 720, 739,
955 801, 858, 0, 480, 488, 494, 525, 0,
956 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
957 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
958 .vrefresh
= 240, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_4_3
, },
959 /* 59 - 720(1440)x480i@240 */
960 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER
, 54000, 720, 739,
961 801, 858, 0, 480, 488, 494, 525, 0,
962 DRM_MODE_FLAG_NHSYNC
| DRM_MODE_FLAG_NVSYNC
|
963 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_DBLCLK
),
964 .vrefresh
= 240, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
965 /* 60 - 1280x720@24Hz */
966 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 59400, 1280, 3040,
967 3080, 3300, 0, 720, 725, 730, 750, 0,
968 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
969 .vrefresh
= 24, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
970 /* 61 - 1280x720@25Hz */
971 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 3700,
972 3740, 3960, 0, 720, 725, 730, 750, 0,
973 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
974 .vrefresh
= 25, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
975 /* 62 - 1280x720@30Hz */
976 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER
, 74250, 1280, 3040,
977 3080, 3300, 0, 720, 725, 730, 750, 0,
978 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
979 .vrefresh
= 30, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
980 /* 63 - 1920x1080@120Hz */
981 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 297000, 1920, 2008,
982 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
983 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
984 .vrefresh
= 120, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
985 /* 64 - 1920x1080@100Hz */
986 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER
, 297000, 1920, 2448,
987 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
988 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
989 .vrefresh
= 100, .picture_aspect_ratio
= HDMI_PICTURE_ASPECT_16_9
, },
995 static const struct drm_display_mode edid_4k_modes
[] = {
996 /* 1 - 3840x2160@30Hz */
997 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER
, 297000,
998 3840, 4016, 4104, 4400, 0,
999 2160, 2168, 2178, 2250, 0,
1000 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
1002 /* 2 - 3840x2160@25Hz */
1003 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER
, 297000,
1004 3840, 4896, 4984, 5280, 0,
1005 2160, 2168, 2178, 2250, 0,
1006 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
1008 /* 3 - 3840x2160@24Hz */
1009 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER
, 297000,
1010 3840, 5116, 5204, 5500, 0,
1011 2160, 2168, 2178, 2250, 0,
1012 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
1014 /* 4 - 4096x2160@24Hz (SMPTE) */
1015 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER
, 297000,
1016 4096, 5116, 5204, 5500, 0,
1017 2160, 2168, 2178, 2250, 0,
1018 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
),
1022 /*** DDC fetch and block validation ***/
1024 static const u8 edid_header
[] = {
1025 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1029 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1030 * @raw_edid: pointer to raw base EDID block
1032 * Sanity check the header of the base EDID block.
1034 * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1036 int drm_edid_header_is_valid(const u8
*raw_edid
)
1040 for (i
= 0; i
< sizeof(edid_header
); i
++)
1041 if (raw_edid
[i
] == edid_header
[i
])
1046 EXPORT_SYMBOL(drm_edid_header_is_valid
);
1048 static int edid_fixup __read_mostly
= 6;
1049 module_param_named(edid_fixup
, edid_fixup
, int, 0400);
1050 MODULE_PARM_DESC(edid_fixup
,
1051 "Minimum number of valid EDID header bytes (0-8, default 6)");
1053 static int drm_edid_block_checksum(const u8
*raw_edid
)
1057 for (i
= 0; i
< EDID_LENGTH
; i
++)
1058 csum
+= raw_edid
[i
];
1063 static bool drm_edid_is_zero(const u8
*in_edid
, int length
)
1065 if (memchr_inv(in_edid
, 0, length
))
1072 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1073 * @raw_edid: pointer to raw EDID block
1074 * @block: type of block to validate (0 for base, extension otherwise)
1075 * @print_bad_edid: if true, dump bad EDID blocks to the console
1076 * @edid_corrupt: if true, the header or checksum is invalid
1078 * Validate a base or extension EDID block and optionally dump bad blocks to
1081 * Return: True if the block is valid, false otherwise.
1083 bool drm_edid_block_valid(u8
*raw_edid
, int block
, bool print_bad_edid
,
1088 struct edid
*edid
= (struct edid
*)raw_edid
;
1090 if (WARN_ON(!raw_edid
))
1093 if (edid_fixup
> 8 || edid_fixup
< 0)
1097 int score
= drm_edid_header_is_valid(raw_edid
);
1100 *edid_corrupt
= false;
1101 } else if (score
>= edid_fixup
) {
1102 /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1103 * The corrupt flag needs to be set here otherwise, the
1104 * fix-up code here will correct the problem, the
1105 * checksum is correct and the test fails
1108 *edid_corrupt
= true;
1109 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1110 memcpy(raw_edid
, edid_header
, sizeof(edid_header
));
1113 *edid_corrupt
= true;
1118 csum
= drm_edid_block_checksum(raw_edid
);
1120 if (print_bad_edid
) {
1121 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum
);
1125 *edid_corrupt
= true;
1127 /* allow CEA to slide through, switches mangle this */
1128 if (raw_edid
[0] != 0x02)
1132 /* per-block-type checks */
1133 switch (raw_edid
[0]) {
1135 if (edid
->version
!= 1) {
1136 DRM_ERROR("EDID has major version %d, instead of 1\n", edid
->version
);
1140 if (edid
->revision
> 4)
1141 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1151 if (print_bad_edid
) {
1152 if (drm_edid_is_zero(raw_edid
, EDID_LENGTH
)) {
1153 printk(KERN_ERR
"EDID block is all zeroes\n");
1155 printk(KERN_ERR
"Raw EDID:\n");
1156 for (i
= 0; i
< EDID_LENGTH
; ) {
1157 kprintf("%02x", raw_edid
[i
]);
1159 if (i
% 16 == 0 || i
== EDID_LENGTH
)
1161 else if (i
% 8 == 0)
1170 EXPORT_SYMBOL(drm_edid_block_valid
);
1173 * drm_edid_is_valid - sanity check EDID data
1176 * Sanity-check an entire EDID record (including extensions)
1178 * Return: True if the EDID data is valid, false otherwise.
1180 bool drm_edid_is_valid(struct edid
*edid
)
1183 u8
*raw
= (u8
*)edid
;
1188 for (i
= 0; i
<= edid
->extensions
; i
++)
1189 if (!drm_edid_block_valid(raw
+ i
* EDID_LENGTH
, i
, true, NULL
))
1194 EXPORT_SYMBOL(drm_edid_is_valid
);
1196 #define DDC_SEGMENT_ADDR 0x30
1198 * drm_do_probe_ddc_edid() - get EDID information via I2C
1199 * @data: I2C device adapter
1200 * @buf: EDID data buffer to be filled
1201 * @block: 128 byte EDID block to start fetching from
1202 * @len: EDID data buffer length to fetch
1204 * Try to fetch EDID information by calling I2C driver functions.
1206 * Return: 0 on success or -1 on failure.
1209 drm_do_probe_ddc_edid(void *data
, u8
*buf
, unsigned int block
, size_t len
)
1211 struct i2c_adapter
*adapter
= data
;
1212 unsigned char start
= block
* EDID_LENGTH
;
1213 unsigned char segment
= block
>> 1;
1214 unsigned char xfers
= segment
? 3 : 2;
1215 int ret
, retries
= 5;
1218 * The core I2C driver will automatically retry the transfer if the
1219 * adapter reports EAGAIN. However, we find that bit-banging transfers
1220 * are susceptible to errors under a heavily loaded machine and
1221 * generate spurious NAKs and timeouts. Retrying the transfer
1222 * of the individual block a few times seems to overcome this.
1225 struct i2c_msg msgs
[] = {
1227 .slave
= DDC_SEGMENT_ADDR
<< 1,
1232 .slave
= DDC_ADDR
<< 1,
1237 .slave
= DDC_ADDR
<< 1,
1245 * Avoid sending the segment addr to not upset non-compliant
1248 ret
= iicbus_transfer(adapter
, &msgs
[3 - xfers
], xfers
);
1251 DRM_DEBUG_KMS("iicbus_transfer countdown %d error %d\n",
1253 } while (ret
!= 0 && --retries
);
1255 return (ret
== 0 ? 0 : -1);
1259 * drm_do_get_edid - get EDID data using a custom EDID block read function
1260 * @connector: connector we're probing
1261 * @get_edid_block: EDID block read function
1262 * @data: private data passed to the block read function
1264 * When the I2C adapter connected to the DDC bus is hidden behind a device that
1265 * exposes a different interface to read EDID blocks this function can be used
1266 * to get EDID data using a custom block read function.
1268 * As in the general case the DDC bus is accessible by the kernel at the I2C
1269 * level, drivers must make all reasonable efforts to expose it as an I2C
1270 * adapter and use drm_get_edid() instead of abusing this function.
1272 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1274 struct edid
*drm_do_get_edid(struct drm_connector
*connector
,
1275 int (*get_edid_block
)(void *data
, u8
*buf
, unsigned int block
,
1279 int i
, j
= 0, valid_extensions
= 0;
1281 bool print_bad_edid
= !connector
->bad_edid_counter
|| (drm_debug
& DRM_UT_KMS
);
1283 if ((block
= kmalloc(EDID_LENGTH
, M_DRM
, M_WAITOK
)) == NULL
)
1286 /* base block fetch */
1287 for (i
= 0; i
< 4; i
++) {
1288 if (get_edid_block(data
, block
, 0, EDID_LENGTH
))
1290 if (drm_edid_block_valid(block
, 0, print_bad_edid
,
1291 &connector
->edid_corrupt
))
1293 if (i
== 0 && drm_edid_is_zero(block
, EDID_LENGTH
)) {
1294 connector
->null_edid_counter
++;
1301 /* if there's no extensions, we're done */
1302 if (block
[0x7e] == 0)
1303 return (struct edid
*)block
;
1305 new = krealloc(block
, (block
[0x7e] + 1) * EDID_LENGTH
, M_DRM
, M_WAITOK
);
1310 for (j
= 1; j
<= block
[0x7e]; j
++) {
1311 for (i
= 0; i
< 4; i
++) {
1312 if (get_edid_block(data
,
1313 block
+ (valid_extensions
+ 1) * EDID_LENGTH
,
1316 if (drm_edid_block_valid(block
+ (valid_extensions
+ 1)
1325 if (i
== 4 && print_bad_edid
) {
1326 dev_warn(connector
->dev
->dev
,
1327 "%s: Ignoring invalid EDID block %d.\n",
1328 connector
->name
, j
);
1330 connector
->bad_edid_counter
++;
1334 if (valid_extensions
!= block
[0x7e]) {
1335 block
[EDID_LENGTH
-1] += block
[0x7e] - valid_extensions
;
1336 block
[0x7e] = valid_extensions
;
1337 new = krealloc(block
, (valid_extensions
+ 1) * EDID_LENGTH
, M_DRM
, M_WAITOK
);
1343 return (struct edid
*)block
;
1346 if (print_bad_edid
) {
1347 dev_warn(connector
->dev
->dev
, "%s: EDID block %d invalid.\n",
1348 connector
->name
, j
);
1350 connector
->bad_edid_counter
++;
1358 * drm_probe_ddc() - probe DDC presence
1359 * @adapter: I2C adapter to probe
1361 * Return: True on success, false on failure.
1364 drm_probe_ddc(struct i2c_adapter
*adapter
)
1368 return (drm_do_probe_ddc_edid(adapter
, &out
, 0, 1) == 0);
1370 EXPORT_SYMBOL(drm_probe_ddc
);
1373 * drm_get_edid - get EDID data, if available
1374 * @connector: connector we're probing
1375 * @adapter: I2C adapter to use for DDC
1377 * Poke the given I2C channel to grab EDID data if possible. If found,
1378 * attach it to the connector.
1380 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1382 struct edid
*drm_get_edid(struct drm_connector
*connector
,
1383 struct i2c_adapter
*adapter
)
1385 if (!drm_probe_ddc(adapter
))
1388 return drm_do_get_edid(connector
, drm_do_probe_ddc_edid
, adapter
);
1390 EXPORT_SYMBOL(drm_get_edid
);
1393 * drm_edid_duplicate - duplicate an EDID and the extensions
1394 * @edid: EDID to duplicate
1396 * Return: Pointer to duplicated EDID or NULL on allocation failure.
1398 struct edid
*drm_edid_duplicate(const struct edid
*edid
)
1400 return kmemdup(edid
, (edid
->extensions
+ 1) * EDID_LENGTH
, GFP_KERNEL
);
1402 EXPORT_SYMBOL(drm_edid_duplicate
);
1404 /*** EDID parsing ***/
1407 * edid_vendor - match a string against EDID's obfuscated vendor field
1408 * @edid: EDID to match
1409 * @vendor: vendor string
1411 * Returns true if @vendor is in @edid, false otherwise
1413 static bool edid_vendor(struct edid
*edid
, char *vendor
)
1415 char edid_vendor
[3];
1417 edid_vendor
[0] = ((edid
->mfg_id
[0] & 0x7c) >> 2) + '@';
1418 edid_vendor
[1] = (((edid
->mfg_id
[0] & 0x3) << 3) |
1419 ((edid
->mfg_id
[1] & 0xe0) >> 5)) + '@';
1420 edid_vendor
[2] = (edid
->mfg_id
[1] & 0x1f) + '@';
1422 return !strncmp(edid_vendor
, vendor
, 3);
1426 * edid_get_quirks - return quirk flags for a given EDID
1427 * @edid: EDID to process
1429 * This tells subsequent routines what fixes they need to apply.
1431 static u32
edid_get_quirks(struct edid
*edid
)
1433 struct edid_quirk
*quirk
;
1436 for (i
= 0; i
< ARRAY_SIZE(edid_quirk_list
); i
++) {
1437 quirk
= &edid_quirk_list
[i
];
1439 if (edid_vendor(edid
, quirk
->vendor
) &&
1440 (EDID_PRODUCT_ID(edid
) == quirk
->product_id
))
1441 return quirk
->quirks
;
1447 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1448 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1451 * edid_fixup_preferred - set preferred modes based on quirk list
1452 * @connector: has mode list to fix up
1453 * @quirks: quirks list
1455 * Walk the mode list for @connector, clearing the preferred status
1456 * on existing modes and setting it anew for the right mode ala @quirks.
1458 static void edid_fixup_preferred(struct drm_connector
*connector
,
1461 struct drm_display_mode
*t
, *cur_mode
, *preferred_mode
;
1462 int target_refresh
= 0;
1463 int cur_vrefresh
, preferred_vrefresh
;
1465 if (list_empty(&connector
->probed_modes
))
1468 if (quirks
& EDID_QUIRK_PREFER_LARGE_60
)
1469 target_refresh
= 60;
1470 if (quirks
& EDID_QUIRK_PREFER_LARGE_75
)
1471 target_refresh
= 75;
1473 preferred_mode
= list_first_entry(&connector
->probed_modes
,
1474 struct drm_display_mode
, head
);
1476 list_for_each_entry_safe(cur_mode
, t
, &connector
->probed_modes
, head
) {
1477 cur_mode
->type
&= ~DRM_MODE_TYPE_PREFERRED
;
1479 if (cur_mode
== preferred_mode
)
1482 /* Largest mode is preferred */
1483 if (MODE_SIZE(cur_mode
) > MODE_SIZE(preferred_mode
))
1484 preferred_mode
= cur_mode
;
1486 cur_vrefresh
= cur_mode
->vrefresh
?
1487 cur_mode
->vrefresh
: drm_mode_vrefresh(cur_mode
);
1488 preferred_vrefresh
= preferred_mode
->vrefresh
?
1489 preferred_mode
->vrefresh
: drm_mode_vrefresh(preferred_mode
);
1490 /* At a given size, try to get closest to target refresh */
1491 if ((MODE_SIZE(cur_mode
) == MODE_SIZE(preferred_mode
)) &&
1492 MODE_REFRESH_DIFF(cur_vrefresh
, target_refresh
) <
1493 MODE_REFRESH_DIFF(preferred_vrefresh
, target_refresh
)) {
1494 preferred_mode
= cur_mode
;
1498 preferred_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1502 mode_is_rb(const struct drm_display_mode
*mode
)
1504 return (mode
->htotal
- mode
->hdisplay
== 160) &&
1505 (mode
->hsync_end
- mode
->hdisplay
== 80) &&
1506 (mode
->hsync_end
- mode
->hsync_start
== 32) &&
1507 (mode
->vsync_start
- mode
->vdisplay
== 3);
1511 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1512 * @dev: Device to duplicate against
1513 * @hsize: Mode width
1514 * @vsize: Mode height
1515 * @fresh: Mode refresh rate
1516 * @rb: Mode reduced-blanking-ness
1518 * Walk the DMT mode list looking for a match for the given parameters.
1520 * Return: A newly allocated copy of the mode, or NULL if not found.
1522 struct drm_display_mode
*drm_mode_find_dmt(struct drm_device
*dev
,
1523 int hsize
, int vsize
, int fresh
,
1528 for (i
= 0; i
< ARRAY_SIZE(drm_dmt_modes
); i
++) {
1529 const struct drm_display_mode
*ptr
= &drm_dmt_modes
[i
];
1530 if (hsize
!= ptr
->hdisplay
)
1532 if (vsize
!= ptr
->vdisplay
)
1534 if (fresh
!= drm_mode_vrefresh(ptr
))
1536 if (rb
!= mode_is_rb(ptr
))
1539 return drm_mode_duplicate(dev
, ptr
);
1544 EXPORT_SYMBOL(drm_mode_find_dmt
);
1546 typedef void detailed_cb(struct detailed_timing
*timing
, void *closure
);
1549 cea_for_each_detailed_block(u8
*ext
, detailed_cb
*cb
, void *closure
)
1553 u8
*det_base
= ext
+ d
;
1556 for (i
= 0; i
< n
; i
++)
1557 cb((struct detailed_timing
*)(det_base
+ 18 * i
), closure
);
1561 vtb_for_each_detailed_block(u8
*ext
, detailed_cb
*cb
, void *closure
)
1563 unsigned int i
, n
= min((int)ext
[0x02], 6);
1564 u8
*det_base
= ext
+ 5;
1567 return; /* unknown version */
1569 for (i
= 0; i
< n
; i
++)
1570 cb((struct detailed_timing
*)(det_base
+ 18 * i
), closure
);
1574 drm_for_each_detailed_block(u8
*raw_edid
, detailed_cb
*cb
, void *closure
)
1577 struct edid
*edid
= (struct edid
*)raw_edid
;
1582 for (i
= 0; i
< EDID_DETAILED_TIMINGS
; i
++)
1583 cb(&(edid
->detailed_timings
[i
]), closure
);
1585 for (i
= 1; i
<= raw_edid
[0x7e]; i
++) {
1586 u8
*ext
= raw_edid
+ (i
* EDID_LENGTH
);
1589 cea_for_each_detailed_block(ext
, cb
, closure
);
1592 vtb_for_each_detailed_block(ext
, cb
, closure
);
1601 is_rb(struct detailed_timing
*t
, void *data
)
1604 if (r
[3] == EDID_DETAIL_MONITOR_RANGE
)
1606 *(bool *)data
= true;
1609 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1611 drm_monitor_supports_rb(struct edid
*edid
)
1613 if (edid
->revision
>= 4) {
1615 drm_for_each_detailed_block((u8
*)edid
, is_rb
, &ret
);
1619 return ((edid
->input
& DRM_EDID_INPUT_DIGITAL
) != 0);
1623 find_gtf2(struct detailed_timing
*t
, void *data
)
1626 if (r
[3] == EDID_DETAIL_MONITOR_RANGE
&& r
[10] == 0x02)
1630 /* Secondary GTF curve kicks in above some break frequency */
1632 drm_gtf2_hbreak(struct edid
*edid
)
1635 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1636 return r
? (r
[12] * 2) : 0;
1640 drm_gtf2_2c(struct edid
*edid
)
1643 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1644 return r
? r
[13] : 0;
1648 drm_gtf2_m(struct edid
*edid
)
1651 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1652 return r
? (r
[15] << 8) + r
[14] : 0;
1656 drm_gtf2_k(struct edid
*edid
)
1659 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1660 return r
? r
[16] : 0;
1664 drm_gtf2_2j(struct edid
*edid
)
1667 drm_for_each_detailed_block((u8
*)edid
, find_gtf2
, &r
);
1668 return r
? r
[17] : 0;
1672 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1673 * @edid: EDID block to scan
1675 static int standard_timing_level(struct edid
*edid
)
1677 if (edid
->revision
>= 2) {
1678 if (edid
->revision
>= 4 && (edid
->features
& DRM_EDID_FEATURE_DEFAULT_GTF
))
1680 if (drm_gtf2_hbreak(edid
))
1688 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1689 * monitors fill with ascii space (0x20) instead.
1692 bad_std_timing(u8 a
, u8 b
)
1694 return (a
== 0x00 && b
== 0x00) ||
1695 (a
== 0x01 && b
== 0x01) ||
1696 (a
== 0x20 && b
== 0x20);
1700 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1701 * @connector: connector of for the EDID block
1702 * @edid: EDID block to scan
1703 * @t: standard timing params
1705 * Take the standard timing params (in this case width, aspect, and refresh)
1706 * and convert them into a real mode using CVT/GTF/DMT.
1708 static struct drm_display_mode
*
1709 drm_mode_std(struct drm_connector
*connector
, struct edid
*edid
,
1710 struct std_timing
*t
)
1712 struct drm_device
*dev
= connector
->dev
;
1713 struct drm_display_mode
*m
, *mode
= NULL
;
1716 unsigned aspect_ratio
= (t
->vfreq_aspect
& EDID_TIMING_ASPECT_MASK
)
1717 >> EDID_TIMING_ASPECT_SHIFT
;
1718 unsigned vfreq
= (t
->vfreq_aspect
& EDID_TIMING_VFREQ_MASK
)
1719 >> EDID_TIMING_VFREQ_SHIFT
;
1720 int timing_level
= standard_timing_level(edid
);
1722 if (bad_std_timing(t
->hsize
, t
->vfreq_aspect
))
1725 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1726 hsize
= t
->hsize
* 8 + 248;
1727 /* vrefresh_rate = vfreq + 60 */
1728 vrefresh_rate
= vfreq
+ 60;
1729 /* the vdisplay is calculated based on the aspect ratio */
1730 if (aspect_ratio
== 0) {
1731 if (edid
->revision
< 3)
1734 vsize
= (hsize
* 10) / 16;
1735 } else if (aspect_ratio
== 1)
1736 vsize
= (hsize
* 3) / 4;
1737 else if (aspect_ratio
== 2)
1738 vsize
= (hsize
* 4) / 5;
1740 vsize
= (hsize
* 9) / 16;
1742 /* HDTV hack, part 1 */
1743 if (vrefresh_rate
== 60 &&
1744 ((hsize
== 1360 && vsize
== 765) ||
1745 (hsize
== 1368 && vsize
== 769))) {
1751 * If this connector already has a mode for this size and refresh
1752 * rate (because it came from detailed or CVT info), use that
1753 * instead. This way we don't have to guess at interlace or
1756 list_for_each_entry(m
, &connector
->probed_modes
, head
)
1757 if (m
->hdisplay
== hsize
&& m
->vdisplay
== vsize
&&
1758 drm_mode_vrefresh(m
) == vrefresh_rate
)
1761 /* HDTV hack, part 2 */
1762 if (hsize
== 1366 && vsize
== 768 && vrefresh_rate
== 60) {
1763 mode
= drm_cvt_mode(dev
, 1366, 768, vrefresh_rate
, 0, 0,
1765 mode
->hdisplay
= 1366;
1766 mode
->hsync_start
= mode
->hsync_start
- 1;
1767 mode
->hsync_end
= mode
->hsync_end
- 1;
1771 /* check whether it can be found in default mode table */
1772 if (drm_monitor_supports_rb(edid
)) {
1773 mode
= drm_mode_find_dmt(dev
, hsize
, vsize
, vrefresh_rate
,
1778 mode
= drm_mode_find_dmt(dev
, hsize
, vsize
, vrefresh_rate
, false);
1782 /* okay, generate it */
1783 switch (timing_level
) {
1787 mode
= drm_gtf_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0);
1791 * This is potentially wrong if there's ever a monitor with
1792 * more than one ranges section, each claiming a different
1793 * secondary GTF curve. Please don't do that.
1795 mode
= drm_gtf_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0);
1798 if (drm_mode_hsync(mode
) > drm_gtf2_hbreak(edid
)) {
1799 drm_mode_destroy(dev
, mode
);
1800 mode
= drm_gtf_mode_complex(dev
, hsize
, vsize
,
1801 vrefresh_rate
, 0, 0,
1809 mode
= drm_cvt_mode(dev
, hsize
, vsize
, vrefresh_rate
, 0, 0,
1817 * EDID is delightfully ambiguous about how interlaced modes are to be
1818 * encoded. Our internal representation is of frame height, but some
1819 * HDTV detailed timings are encoded as field height.
1821 * The format list here is from CEA, in frame size. Technically we
1822 * should be checking refresh rate too. Whatever.
1825 drm_mode_do_interlace_quirk(struct drm_display_mode
*mode
,
1826 struct detailed_pixel_timing
*pt
)
1829 static const struct {
1831 } cea_interlaced
[] = {
1841 if (!(pt
->misc
& DRM_EDID_PT_INTERLACED
))
1844 for (i
= 0; i
< ARRAY_SIZE(cea_interlaced
); i
++) {
1845 if ((mode
->hdisplay
== cea_interlaced
[i
].w
) &&
1846 (mode
->vdisplay
== cea_interlaced
[i
].h
/ 2)) {
1847 mode
->vdisplay
*= 2;
1848 mode
->vsync_start
*= 2;
1849 mode
->vsync_end
*= 2;
1855 mode
->flags
|= DRM_MODE_FLAG_INTERLACE
;
1859 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1860 * @dev: DRM device (needed to create new mode)
1862 * @timing: EDID detailed timing info
1863 * @quirks: quirks to apply
1865 * An EDID detailed timing block contains enough info for us to create and
1866 * return a new struct drm_display_mode.
1868 static struct drm_display_mode
*drm_mode_detailed(struct drm_device
*dev
,
1870 struct detailed_timing
*timing
,
1873 struct drm_display_mode
*mode
;
1874 struct detailed_pixel_timing
*pt
= &timing
->data
.pixel_data
;
1875 unsigned hactive
= (pt
->hactive_hblank_hi
& 0xf0) << 4 | pt
->hactive_lo
;
1876 unsigned vactive
= (pt
->vactive_vblank_hi
& 0xf0) << 4 | pt
->vactive_lo
;
1877 unsigned hblank
= (pt
->hactive_hblank_hi
& 0xf) << 8 | pt
->hblank_lo
;
1878 unsigned vblank
= (pt
->vactive_vblank_hi
& 0xf) << 8 | pt
->vblank_lo
;
1879 unsigned hsync_offset
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0xc0) << 2 | pt
->hsync_offset_lo
;
1880 unsigned hsync_pulse_width
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0x30) << 4 | pt
->hsync_pulse_width_lo
;
1881 unsigned vsync_offset
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0xc) << 2 | pt
->vsync_offset_pulse_width_lo
>> 4;
1882 unsigned vsync_pulse_width
= (pt
->hsync_vsync_offset_pulse_width_hi
& 0x3) << 4 | (pt
->vsync_offset_pulse_width_lo
& 0xf);
1884 /* ignore tiny modes */
1885 if (hactive
< 64 || vactive
< 64)
1888 if (pt
->misc
& DRM_EDID_PT_STEREO
) {
1889 DRM_DEBUG_KMS("stereo mode not supported\n");
1892 if (!(pt
->misc
& DRM_EDID_PT_SEPARATE_SYNC
)) {
1893 DRM_DEBUG_KMS("composite sync not supported\n");
1896 /* it is incorrect if hsync/vsync width is zero */
1897 if (!hsync_pulse_width
|| !vsync_pulse_width
) {
1898 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1899 "Wrong Hsync/Vsync pulse width\n");
1903 if (quirks
& EDID_QUIRK_FORCE_REDUCED_BLANKING
) {
1904 mode
= drm_cvt_mode(dev
, hactive
, vactive
, 60, true, false, false);
1911 mode
= drm_mode_create(dev
);
1915 if (quirks
& EDID_QUIRK_135_CLOCK_TOO_HIGH
)
1916 timing
->pixel_clock
= cpu_to_le16(1088);
1918 mode
->clock
= le16_to_cpu(timing
->pixel_clock
) * 10;
1920 mode
->hdisplay
= hactive
;
1921 mode
->hsync_start
= mode
->hdisplay
+ hsync_offset
;
1922 mode
->hsync_end
= mode
->hsync_start
+ hsync_pulse_width
;
1923 mode
->htotal
= mode
->hdisplay
+ hblank
;
1925 mode
->vdisplay
= vactive
;
1926 mode
->vsync_start
= mode
->vdisplay
+ vsync_offset
;
1927 mode
->vsync_end
= mode
->vsync_start
+ vsync_pulse_width
;
1928 mode
->vtotal
= mode
->vdisplay
+ vblank
;
1930 /* Some EDIDs have bogus h/vtotal values */
1931 if (mode
->hsync_end
> mode
->htotal
)
1932 mode
->htotal
= mode
->hsync_end
+ 1;
1933 if (mode
->vsync_end
> mode
->vtotal
)
1934 mode
->vtotal
= mode
->vsync_end
+ 1;
1936 drm_mode_do_interlace_quirk(mode
, pt
);
1938 if (quirks
& EDID_QUIRK_DETAILED_SYNC_PP
) {
1939 pt
->misc
|= DRM_EDID_PT_HSYNC_POSITIVE
| DRM_EDID_PT_VSYNC_POSITIVE
;
1942 mode
->flags
|= (pt
->misc
& DRM_EDID_PT_HSYNC_POSITIVE
) ?
1943 DRM_MODE_FLAG_PHSYNC
: DRM_MODE_FLAG_NHSYNC
;
1944 mode
->flags
|= (pt
->misc
& DRM_EDID_PT_VSYNC_POSITIVE
) ?
1945 DRM_MODE_FLAG_PVSYNC
: DRM_MODE_FLAG_NVSYNC
;
1948 mode
->width_mm
= pt
->width_mm_lo
| (pt
->width_height_mm_hi
& 0xf0) << 4;
1949 mode
->height_mm
= pt
->height_mm_lo
| (pt
->width_height_mm_hi
& 0xf) << 8;
1951 if (quirks
& EDID_QUIRK_DETAILED_IN_CM
) {
1952 mode
->width_mm
*= 10;
1953 mode
->height_mm
*= 10;
1956 if (quirks
& EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE
) {
1957 mode
->width_mm
= edid
->width_cm
* 10;
1958 mode
->height_mm
= edid
->height_cm
* 10;
1961 mode
->type
= DRM_MODE_TYPE_DRIVER
;
1962 mode
->vrefresh
= drm_mode_vrefresh(mode
);
1963 drm_mode_set_name(mode
);
1969 mode_in_hsync_range(const struct drm_display_mode
*mode
,
1970 struct edid
*edid
, u8
*t
)
1972 int hsync
, hmin
, hmax
;
1975 if (edid
->revision
>= 4)
1976 hmin
+= ((t
[4] & 0x04) ? 255 : 0);
1978 if (edid
->revision
>= 4)
1979 hmax
+= ((t
[4] & 0x08) ? 255 : 0);
1980 hsync
= drm_mode_hsync(mode
);
1982 return (hsync
<= hmax
&& hsync
>= hmin
);
1986 mode_in_vsync_range(const struct drm_display_mode
*mode
,
1987 struct edid
*edid
, u8
*t
)
1989 int vsync
, vmin
, vmax
;
1992 if (edid
->revision
>= 4)
1993 vmin
+= ((t
[4] & 0x01) ? 255 : 0);
1995 if (edid
->revision
>= 4)
1996 vmax
+= ((t
[4] & 0x02) ? 255 : 0);
1997 vsync
= drm_mode_vrefresh(mode
);
1999 return (vsync
<= vmax
&& vsync
>= vmin
);
2003 range_pixel_clock(struct edid
*edid
, u8
*t
)
2006 if (t
[9] == 0 || t
[9] == 255)
2009 /* 1.4 with CVT support gives us real precision, yay */
2010 if (edid
->revision
>= 4 && t
[10] == 0x04)
2011 return (t
[9] * 10000) - ((t
[12] >> 2) * 250);
2013 /* 1.3 is pathetic, so fuzz up a bit */
2014 return t
[9] * 10000 + 5001;
2018 mode_in_range(const struct drm_display_mode
*mode
, struct edid
*edid
,
2019 struct detailed_timing
*timing
)
2022 u8
*t
= (u8
*)timing
;
2024 if (!mode_in_hsync_range(mode
, edid
, t
))
2027 if (!mode_in_vsync_range(mode
, edid
, t
))
2030 if ((max_clock
= range_pixel_clock(edid
, t
)))
2031 if (mode
->clock
> max_clock
)
2034 /* 1.4 max horizontal check */
2035 if (edid
->revision
>= 4 && t
[10] == 0x04)
2036 if (t
[13] && mode
->hdisplay
> 8 * (t
[13] + (256 * (t
[12]&0x3))))
2039 if (mode_is_rb(mode
) && !drm_monitor_supports_rb(edid
))
2045 static bool valid_inferred_mode(const struct drm_connector
*connector
,
2046 const struct drm_display_mode
*mode
)
2048 struct drm_display_mode
*m
;
2051 list_for_each_entry(m
, &connector
->probed_modes
, head
) {
2052 if (mode
->hdisplay
== m
->hdisplay
&&
2053 mode
->vdisplay
== m
->vdisplay
&&
2054 drm_mode_vrefresh(mode
) == drm_mode_vrefresh(m
))
2055 return false; /* duplicated */
2056 if (mode
->hdisplay
<= m
->hdisplay
&&
2057 mode
->vdisplay
<= m
->vdisplay
)
2064 drm_dmt_modes_for_range(struct drm_connector
*connector
, struct edid
*edid
,
2065 struct detailed_timing
*timing
)
2068 struct drm_display_mode
*newmode
;
2069 struct drm_device
*dev
= connector
->dev
;
2071 for (i
= 0; i
< ARRAY_SIZE(drm_dmt_modes
); i
++) {
2072 if (mode_in_range(drm_dmt_modes
+ i
, edid
, timing
) &&
2073 valid_inferred_mode(connector
, drm_dmt_modes
+ i
)) {
2074 newmode
= drm_mode_duplicate(dev
, &drm_dmt_modes
[i
]);
2076 drm_mode_probed_add(connector
, newmode
);
2085 /* fix up 1366x768 mode from 1368x768;
2086 * GFT/CVT can't express 1366 width which isn't dividable by 8
2088 static void fixup_mode_1366x768(struct drm_display_mode
*mode
)
2090 if (mode
->hdisplay
== 1368 && mode
->vdisplay
== 768) {
2091 mode
->hdisplay
= 1366;
2092 mode
->hsync_start
--;
2094 drm_mode_set_name(mode
);
2099 drm_gtf_modes_for_range(struct drm_connector
*connector
, struct edid
*edid
,
2100 struct detailed_timing
*timing
)
2103 struct drm_display_mode
*newmode
;
2104 struct drm_device
*dev
= connector
->dev
;
2106 for (i
= 0; i
< ARRAY_SIZE(extra_modes
); i
++) {
2107 const struct minimode
*m
= &extra_modes
[i
];
2108 newmode
= drm_gtf_mode(dev
, m
->w
, m
->h
, m
->r
, 0, 0);
2112 fixup_mode_1366x768(newmode
);
2113 if (!mode_in_range(newmode
, edid
, timing
) ||
2114 !valid_inferred_mode(connector
, newmode
)) {
2115 drm_mode_destroy(dev
, newmode
);
2119 drm_mode_probed_add(connector
, newmode
);
2127 drm_cvt_modes_for_range(struct drm_connector
*connector
, struct edid
*edid
,
2128 struct detailed_timing
*timing
)
2131 struct drm_display_mode
*newmode
;
2132 struct drm_device
*dev
= connector
->dev
;
2133 bool rb
= drm_monitor_supports_rb(edid
);
2135 for (i
= 0; i
< ARRAY_SIZE(extra_modes
); i
++) {
2136 const struct minimode
*m
= &extra_modes
[i
];
2137 newmode
= drm_cvt_mode(dev
, m
->w
, m
->h
, m
->r
, rb
, 0, 0);
2141 fixup_mode_1366x768(newmode
);
2142 if (!mode_in_range(newmode
, edid
, timing
) ||
2143 !valid_inferred_mode(connector
, newmode
)) {
2144 drm_mode_destroy(dev
, newmode
);
2148 drm_mode_probed_add(connector
, newmode
);
2156 do_inferred_modes(struct detailed_timing
*timing
, void *c
)
2158 struct detailed_mode_closure
*closure
= c
;
2159 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
2160 struct detailed_data_monitor_range
*range
= &data
->data
.range
;
2162 if (data
->type
!= EDID_DETAIL_MONITOR_RANGE
)
2165 closure
->modes
+= drm_dmt_modes_for_range(closure
->connector
,
2169 if (!version_greater(closure
->edid
, 1, 1))
2170 return; /* GTF not defined yet */
2172 switch (range
->flags
) {
2173 case 0x02: /* secondary gtf, XXX could do more */
2174 case 0x00: /* default gtf */
2175 closure
->modes
+= drm_gtf_modes_for_range(closure
->connector
,
2179 case 0x04: /* cvt, only in 1.4+ */
2180 if (!version_greater(closure
->edid
, 1, 3))
2183 closure
->modes
+= drm_cvt_modes_for_range(closure
->connector
,
2187 case 0x01: /* just the ranges, no formula */
2194 add_inferred_modes(struct drm_connector
*connector
, struct edid
*edid
)
2196 struct detailed_mode_closure closure
= {
2197 .connector
= connector
,
2201 if (version_greater(edid
, 1, 0))
2202 drm_for_each_detailed_block((u8
*)edid
, do_inferred_modes
,
2205 return closure
.modes
;
2209 drm_est3_modes(struct drm_connector
*connector
, struct detailed_timing
*timing
)
2211 int i
, j
, m
, modes
= 0;
2212 struct drm_display_mode
*mode
;
2213 u8
*est
= ((u8
*)timing
) + 5;
2215 for (i
= 0; i
< 6; i
++) {
2216 for (j
= 7; j
>= 0; j
--) {
2217 m
= (i
* 8) + (7 - j
);
2218 if (m
>= ARRAY_SIZE(est3_modes
))
2220 if (est
[i
] & (1 << j
)) {
2221 mode
= drm_mode_find_dmt(connector
->dev
,
2227 drm_mode_probed_add(connector
, mode
);
2238 do_established_modes(struct detailed_timing
*timing
, void *c
)
2240 struct detailed_mode_closure
*closure
= c
;
2241 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
2243 if (data
->type
== EDID_DETAIL_EST_TIMINGS
)
2244 closure
->modes
+= drm_est3_modes(closure
->connector
, timing
);
2248 * add_established_modes - get est. modes from EDID and add them
2249 * @connector: connector to add mode(s) to
2250 * @edid: EDID block to scan
2252 * Each EDID block contains a bitmap of the supported "established modes" list
2253 * (defined above). Tease them out and add them to the global modes list.
2256 add_established_modes(struct drm_connector
*connector
, struct edid
*edid
)
2258 struct drm_device
*dev
= connector
->dev
;
2259 unsigned long est_bits
= edid
->established_timings
.t1
|
2260 (edid
->established_timings
.t2
<< 8) |
2261 ((edid
->established_timings
.mfg_rsvd
& 0x80) << 9);
2263 struct detailed_mode_closure closure
= {
2264 .connector
= connector
,
2268 for (i
= 0; i
<= EDID_EST_TIMINGS
; i
++) {
2269 if (est_bits
& (1<<i
)) {
2270 struct drm_display_mode
*newmode
;
2271 newmode
= drm_mode_duplicate(dev
, &edid_est_modes
[i
]);
2273 drm_mode_probed_add(connector
, newmode
);
2279 if (version_greater(edid
, 1, 0))
2280 drm_for_each_detailed_block((u8
*)edid
,
2281 do_established_modes
, &closure
);
2283 return modes
+ closure
.modes
;
2287 do_standard_modes(struct detailed_timing
*timing
, void *c
)
2289 struct detailed_mode_closure
*closure
= c
;
2290 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
2291 struct drm_connector
*connector
= closure
->connector
;
2292 struct edid
*edid
= closure
->edid
;
2294 if (data
->type
== EDID_DETAIL_STD_MODES
) {
2296 for (i
= 0; i
< 6; i
++) {
2297 struct std_timing
*std
;
2298 struct drm_display_mode
*newmode
;
2300 std
= &data
->data
.timings
[i
];
2301 newmode
= drm_mode_std(connector
, edid
, std
);
2303 drm_mode_probed_add(connector
, newmode
);
2311 * add_standard_modes - get std. modes from EDID and add them
2312 * @connector: connector to add mode(s) to
2313 * @edid: EDID block to scan
2315 * Standard modes can be calculated using the appropriate standard (DMT,
2316 * GTF or CVT. Grab them from @edid and add them to the list.
2319 add_standard_modes(struct drm_connector
*connector
, struct edid
*edid
)
2322 struct detailed_mode_closure closure
= {
2323 .connector
= connector
,
2327 for (i
= 0; i
< EDID_STD_TIMINGS
; i
++) {
2328 struct drm_display_mode
*newmode
;
2330 newmode
= drm_mode_std(connector
, edid
,
2331 &edid
->standard_timings
[i
]);
2333 drm_mode_probed_add(connector
, newmode
);
2338 if (version_greater(edid
, 1, 0))
2339 drm_for_each_detailed_block((u8
*)edid
, do_standard_modes
,
2342 /* XXX should also look for standard codes in VTB blocks */
2344 return modes
+ closure
.modes
;
2347 static int drm_cvt_modes(struct drm_connector
*connector
,
2348 struct detailed_timing
*timing
)
2350 int i
, j
, modes
= 0;
2351 struct drm_display_mode
*newmode
;
2352 struct drm_device
*dev
= connector
->dev
;
2353 struct cvt_timing
*cvt
;
2354 const int rates
[] = { 60, 85, 75, 60, 50 };
2355 const u8 empty
[3] = { 0, 0, 0 };
2357 for (i
= 0; i
< 4; i
++) {
2358 int width
= 0, height
;
2359 cvt
= &(timing
->data
.other_data
.data
.cvt
[i
]);
2361 if (!memcmp(cvt
->code
, empty
, 3))
2364 height
= (cvt
->code
[0] + ((cvt
->code
[1] & 0xf0) << 4) + 1) * 2;
2365 switch (cvt
->code
[1] & 0x0c) {
2367 width
= height
* 4 / 3;
2370 width
= height
* 16 / 9;
2373 width
= height
* 16 / 10;
2376 width
= height
* 15 / 9;
2380 for (j
= 1; j
< 5; j
++) {
2381 if (cvt
->code
[2] & (1 << j
)) {
2382 newmode
= drm_cvt_mode(dev
, width
, height
,
2386 drm_mode_probed_add(connector
, newmode
);
2397 do_cvt_mode(struct detailed_timing
*timing
, void *c
)
2399 struct detailed_mode_closure
*closure
= c
;
2400 struct detailed_non_pixel
*data
= &timing
->data
.other_data
;
2402 if (data
->type
== EDID_DETAIL_CVT_3BYTE
)
2403 closure
->modes
+= drm_cvt_modes(closure
->connector
, timing
);
2407 add_cvt_modes(struct drm_connector
*connector
, struct edid
*edid
)
2409 struct detailed_mode_closure closure
= {
2410 .connector
= connector
,
2414 if (version_greater(edid
, 1, 2))
2415 drm_for_each_detailed_block((u8
*)edid
, do_cvt_mode
, &closure
);
2417 /* XXX should also look for CVT codes in VTB blocks */
2419 return closure
.modes
;
2422 static void fixup_detailed_cea_mode_clock(struct drm_display_mode
*mode
);
2425 do_detailed_mode(struct detailed_timing
*timing
, void *c
)
2427 struct detailed_mode_closure
*closure
= c
;
2428 struct drm_display_mode
*newmode
;
2430 if (timing
->pixel_clock
) {
2431 newmode
= drm_mode_detailed(closure
->connector
->dev
,
2432 closure
->edid
, timing
,
2437 if (closure
->preferred
)
2438 newmode
->type
|= DRM_MODE_TYPE_PREFERRED
;
2441 * Detailed modes are limited to 10kHz pixel clock resolution,
2442 * so fix up anything that looks like CEA/HDMI mode, but the clock
2443 * is just slightly off.
2445 fixup_detailed_cea_mode_clock(newmode
);
2447 drm_mode_probed_add(closure
->connector
, newmode
);
2449 closure
->preferred
= 0;
2454 * add_detailed_modes - Add modes from detailed timings
2455 * @connector: attached connector
2456 * @edid: EDID block to scan
2457 * @quirks: quirks to apply
2460 add_detailed_modes(struct drm_connector
*connector
, struct edid
*edid
,
2463 struct detailed_mode_closure closure
= {
2464 .connector
= connector
,
2470 if (closure
.preferred
&& !version_greater(edid
, 1, 3))
2472 (edid
->features
& DRM_EDID_FEATURE_PREFERRED_TIMING
);
2474 drm_for_each_detailed_block((u8
*)edid
, do_detailed_mode
, &closure
);
2476 return closure
.modes
;
2479 #define AUDIO_BLOCK 0x01
2480 #define VIDEO_BLOCK 0x02
2481 #define VENDOR_BLOCK 0x03
2482 #define SPEAKER_BLOCK 0x04
2483 #define VIDEO_CAPABILITY_BLOCK 0x07
2484 #define EDID_BASIC_AUDIO (1 << 6)
2485 #define EDID_CEA_YCRCB444 (1 << 5)
2486 #define EDID_CEA_YCRCB422 (1 << 4)
2487 #define EDID_CEA_VCDB_QS (1 << 6)
2490 * Search EDID for CEA extension block.
2492 static u8
*drm_find_cea_extension(struct edid
*edid
)
2494 u8
*edid_ext
= NULL
;
2497 /* No EDID or EDID extensions */
2498 if (edid
== NULL
|| edid
->extensions
== 0)
2501 /* Find CEA extension */
2502 for (i
= 0; i
< edid
->extensions
; i
++) {
2503 edid_ext
= (u8
*)edid
+ EDID_LENGTH
* (i
+ 1);
2504 if (edid_ext
[0] == CEA_EXT
)
2508 if (i
== edid
->extensions
)
2515 * Calculate the alternate clock for the CEA mode
2516 * (60Hz vs. 59.94Hz etc.)
2519 cea_mode_alternate_clock(const struct drm_display_mode
*cea_mode
)
2521 unsigned int clock
= cea_mode
->clock
;
2523 if (cea_mode
->vrefresh
% 6 != 0)
2527 * edid_cea_modes contains the 59.94Hz
2528 * variant for 240 and 480 line modes,
2529 * and the 60Hz variant otherwise.
2531 if (cea_mode
->vdisplay
== 240 || cea_mode
->vdisplay
== 480)
2532 clock
= DIV_ROUND_CLOSEST(clock
* 1001, 1000);
2534 clock
= DIV_ROUND_CLOSEST(clock
* 1000, 1001);
2540 * drm_match_cea_mode - look for a CEA mode matching given mode
2541 * @to_match: display mode
2543 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2546 u8
drm_match_cea_mode(const struct drm_display_mode
*to_match
)
2550 if (!to_match
->clock
)
2553 for (mode
= 0; mode
< ARRAY_SIZE(edid_cea_modes
); mode
++) {
2554 const struct drm_display_mode
*cea_mode
= &edid_cea_modes
[mode
];
2555 unsigned int clock1
, clock2
;
2557 /* Check both 60Hz and 59.94Hz */
2558 clock1
= cea_mode
->clock
;
2559 clock2
= cea_mode_alternate_clock(cea_mode
);
2561 if ((KHZ2PICOS(to_match
->clock
) == KHZ2PICOS(clock1
) ||
2562 KHZ2PICOS(to_match
->clock
) == KHZ2PICOS(clock2
)) &&
2563 drm_mode_equal_no_clocks_no_stereo(to_match
, cea_mode
))
2568 EXPORT_SYMBOL(drm_match_cea_mode
);
2571 * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2572 * the input VIC from the CEA mode list
2573 * @video_code: ID given to each of the CEA modes
2575 * Returns picture aspect ratio
2577 enum hdmi_picture_aspect
drm_get_cea_aspect_ratio(const u8 video_code
)
2579 /* return picture aspect ratio for video_code - 1 to access the
2580 * right array element
2582 return edid_cea_modes
[video_code
-1].picture_aspect_ratio
;
2584 EXPORT_SYMBOL(drm_get_cea_aspect_ratio
);
2587 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2590 * It's almost like cea_mode_alternate_clock(), we just need to add an
2591 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2595 hdmi_mode_alternate_clock(const struct drm_display_mode
*hdmi_mode
)
2597 if (hdmi_mode
->vdisplay
== 4096 && hdmi_mode
->hdisplay
== 2160)
2598 return hdmi_mode
->clock
;
2600 return cea_mode_alternate_clock(hdmi_mode
);
2604 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2605 * @to_match: display mode
2607 * An HDMI mode is one defined in the HDMI vendor specific block.
2609 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2611 static u8
drm_match_hdmi_mode(const struct drm_display_mode
*to_match
)
2615 if (!to_match
->clock
)
2618 for (mode
= 0; mode
< ARRAY_SIZE(edid_4k_modes
); mode
++) {
2619 const struct drm_display_mode
*hdmi_mode
= &edid_4k_modes
[mode
];
2620 unsigned int clock1
, clock2
;
2622 /* Make sure to also match alternate clocks */
2623 clock1
= hdmi_mode
->clock
;
2624 clock2
= hdmi_mode_alternate_clock(hdmi_mode
);
2626 if ((KHZ2PICOS(to_match
->clock
) == KHZ2PICOS(clock1
) ||
2627 KHZ2PICOS(to_match
->clock
) == KHZ2PICOS(clock2
)) &&
2628 drm_mode_equal_no_clocks_no_stereo(to_match
, hdmi_mode
))
2635 add_alternate_cea_modes(struct drm_connector
*connector
, struct edid
*edid
)
2637 struct drm_device
*dev
= connector
->dev
;
2638 struct drm_display_mode
*mode
, *tmp
;
2639 LINUX_LIST_HEAD(list
);
2642 /* Don't add CEA modes if the CEA extension block is missing */
2643 if (!drm_find_cea_extension(edid
))
2647 * Go through all probed modes and create a new mode
2648 * with the alternate clock for certain CEA modes.
2650 list_for_each_entry(mode
, &connector
->probed_modes
, head
) {
2651 const struct drm_display_mode
*cea_mode
= NULL
;
2652 struct drm_display_mode
*newmode
;
2653 u8 mode_idx
= drm_match_cea_mode(mode
) - 1;
2654 unsigned int clock1
, clock2
;
2656 if (mode_idx
< ARRAY_SIZE(edid_cea_modes
)) {
2657 cea_mode
= &edid_cea_modes
[mode_idx
];
2658 clock2
= cea_mode_alternate_clock(cea_mode
);
2660 mode_idx
= drm_match_hdmi_mode(mode
) - 1;
2661 if (mode_idx
< ARRAY_SIZE(edid_4k_modes
)) {
2662 cea_mode
= &edid_4k_modes
[mode_idx
];
2663 clock2
= hdmi_mode_alternate_clock(cea_mode
);
2670 clock1
= cea_mode
->clock
;
2672 if (clock1
== clock2
)
2675 if (mode
->clock
!= clock1
&& mode
->clock
!= clock2
)
2678 newmode
= drm_mode_duplicate(dev
, cea_mode
);
2682 /* Carry over the stereo flags */
2683 newmode
->flags
|= mode
->flags
& DRM_MODE_FLAG_3D_MASK
;
2686 * The current mode could be either variant. Make
2687 * sure to pick the "other" clock for the new mode.
2689 if (mode
->clock
!= clock1
)
2690 newmode
->clock
= clock1
;
2692 newmode
->clock
= clock2
;
2694 list_add_tail(&newmode
->head
, &list
);
2697 list_for_each_entry_safe(mode
, tmp
, &list
, head
) {
2698 list_del(&mode
->head
);
2699 drm_mode_probed_add(connector
, mode
);
2706 static struct drm_display_mode
*
2707 drm_display_mode_from_vic_index(struct drm_connector
*connector
,
2708 const u8
*video_db
, u8 video_len
,
2711 struct drm_device
*dev
= connector
->dev
;
2712 struct drm_display_mode
*newmode
;
2715 if (video_db
== NULL
|| video_index
>= video_len
)
2718 /* CEA modes are numbered 1..127 */
2719 cea_mode
= (video_db
[video_index
] & 127) - 1;
2720 if (cea_mode
>= ARRAY_SIZE(edid_cea_modes
))
2723 newmode
= drm_mode_duplicate(dev
, &edid_cea_modes
[cea_mode
]);
2727 newmode
->vrefresh
= 0;
2733 do_cea_modes(struct drm_connector
*connector
, const u8
*db
, u8 len
)
2737 for (i
= 0; i
< len
; i
++) {
2738 struct drm_display_mode
*mode
;
2739 mode
= drm_display_mode_from_vic_index(connector
, db
, len
, i
);
2741 drm_mode_probed_add(connector
, mode
);
2749 struct stereo_mandatory_mode
{
2750 int width
, height
, vrefresh
;
2754 static const struct stereo_mandatory_mode stereo_mandatory_modes
[] = {
2755 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
},
2756 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING
},
2758 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
},
2760 DRM_MODE_FLAG_INTERLACE
| DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
},
2761 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
},
2762 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING
},
2763 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
},
2764 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING
}
2768 stereo_match_mandatory(const struct drm_display_mode
*mode
,
2769 const struct stereo_mandatory_mode
*stereo_mode
)
2771 unsigned int interlaced
= mode
->flags
& DRM_MODE_FLAG_INTERLACE
;
2773 return mode
->hdisplay
== stereo_mode
->width
&&
2774 mode
->vdisplay
== stereo_mode
->height
&&
2775 interlaced
== (stereo_mode
->flags
& DRM_MODE_FLAG_INTERLACE
) &&
2776 drm_mode_vrefresh(mode
) == stereo_mode
->vrefresh
;
2779 static int add_hdmi_mandatory_stereo_modes(struct drm_connector
*connector
)
2781 struct drm_device
*dev
= connector
->dev
;
2782 struct drm_display_mode
*mode
;
2783 struct list_head stereo_modes
;
2786 INIT_LIST_HEAD(&stereo_modes
);
2788 list_for_each_entry(mode
, &connector
->probed_modes
, head
) {
2789 for (i
= 0; i
< ARRAY_SIZE(stereo_mandatory_modes
); i
++) {
2790 const struct stereo_mandatory_mode
*mandatory
;
2791 struct drm_display_mode
*new_mode
;
2793 if (!stereo_match_mandatory(mode
,
2794 &stereo_mandatory_modes
[i
]))
2797 mandatory
= &stereo_mandatory_modes
[i
];
2798 new_mode
= drm_mode_duplicate(dev
, mode
);
2802 new_mode
->flags
|= mandatory
->flags
;
2803 list_add_tail(&new_mode
->head
, &stereo_modes
);
2808 list_splice_tail(&stereo_modes
, &connector
->probed_modes
);
2813 static int add_hdmi_mode(struct drm_connector
*connector
, u8 vic
)
2815 struct drm_device
*dev
= connector
->dev
;
2816 struct drm_display_mode
*newmode
;
2818 vic
--; /* VICs start at 1 */
2819 if (vic
>= ARRAY_SIZE(edid_4k_modes
)) {
2820 DRM_ERROR("Unknown HDMI VIC: %d\n", vic
);
2824 newmode
= drm_mode_duplicate(dev
, &edid_4k_modes
[vic
]);
2828 drm_mode_probed_add(connector
, newmode
);
2833 static int add_3d_struct_modes(struct drm_connector
*connector
, u16 structure
,
2834 const u8
*video_db
, u8 video_len
, u8 video_index
)
2836 struct drm_display_mode
*newmode
;
2839 if (structure
& (1 << 0)) {
2840 newmode
= drm_display_mode_from_vic_index(connector
, video_db
,
2844 newmode
->flags
|= DRM_MODE_FLAG_3D_FRAME_PACKING
;
2845 drm_mode_probed_add(connector
, newmode
);
2849 if (structure
& (1 << 6)) {
2850 newmode
= drm_display_mode_from_vic_index(connector
, video_db
,
2854 newmode
->flags
|= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
;
2855 drm_mode_probed_add(connector
, newmode
);
2859 if (structure
& (1 << 8)) {
2860 newmode
= drm_display_mode_from_vic_index(connector
, video_db
,
2864 newmode
->flags
|= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
;
2865 drm_mode_probed_add(connector
, newmode
);
2874 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
2875 * @connector: connector corresponding to the HDMI sink
2876 * @db: start of the CEA vendor specific block
2877 * @len: length of the CEA block payload, ie. one can access up to db[len]
2879 * Parses the HDMI VSDB looking for modes to add to @connector. This function
2880 * also adds the stereo 3d modes when applicable.
2883 do_hdmi_vsdb_modes(struct drm_connector
*connector
, const u8
*db
, u8 len
,
2884 const u8
*video_db
, u8 video_len
)
2886 int modes
= 0, offset
= 0, i
, multi_present
= 0, multi_len
;
2887 u8 vic_len
, hdmi_3d_len
= 0;
2894 /* no HDMI_Video_Present */
2895 if (!(db
[8] & (1 << 5)))
2898 /* Latency_Fields_Present */
2899 if (db
[8] & (1 << 7))
2902 /* I_Latency_Fields_Present */
2903 if (db
[8] & (1 << 6))
2906 /* the declared length is not long enough for the 2 first bytes
2907 * of additional video format capabilities */
2908 if (len
< (8 + offset
+ 2))
2913 if (db
[8 + offset
] & (1 << 7)) {
2914 modes
+= add_hdmi_mandatory_stereo_modes(connector
);
2916 /* 3D_Multi_present */
2917 multi_present
= (db
[8 + offset
] & 0x60) >> 5;
2921 vic_len
= db
[8 + offset
] >> 5;
2922 hdmi_3d_len
= db
[8 + offset
] & 0x1f;
2924 for (i
= 0; i
< vic_len
&& len
>= (9 + offset
+ i
); i
++) {
2927 vic
= db
[9 + offset
+ i
];
2928 modes
+= add_hdmi_mode(connector
, vic
);
2930 offset
+= 1 + vic_len
;
2932 if (multi_present
== 1)
2934 else if (multi_present
== 2)
2939 if (len
< (8 + offset
+ hdmi_3d_len
- 1))
2942 if (hdmi_3d_len
< multi_len
)
2945 if (multi_present
== 1 || multi_present
== 2) {
2946 /* 3D_Structure_ALL */
2947 structure_all
= (db
[8 + offset
] << 8) | db
[9 + offset
];
2949 /* check if 3D_MASK is present */
2950 if (multi_present
== 2)
2951 mask
= (db
[10 + offset
] << 8) | db
[11 + offset
];
2955 for (i
= 0; i
< 16; i
++) {
2956 if (mask
& (1 << i
))
2957 modes
+= add_3d_struct_modes(connector
,
2964 offset
+= multi_len
;
2966 for (i
= 0; i
< (hdmi_3d_len
- multi_len
); i
++) {
2968 struct drm_display_mode
*newmode
= NULL
;
2969 unsigned int newflag
= 0;
2970 bool detail_present
;
2972 detail_present
= ((db
[8 + offset
+ i
] & 0x0f) > 7);
2974 if (detail_present
&& (i
+ 1 == hdmi_3d_len
- multi_len
))
2977 /* 2D_VIC_order_X */
2978 vic_index
= db
[8 + offset
+ i
] >> 4;
2980 /* 3D_Structure_X */
2981 switch (db
[8 + offset
+ i
] & 0x0f) {
2983 newflag
= DRM_MODE_FLAG_3D_FRAME_PACKING
;
2986 newflag
= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
;
2990 if ((db
[9 + offset
+ i
] >> 4) == 1)
2991 newflag
= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
;
2996 newmode
= drm_display_mode_from_vic_index(connector
,
3002 newmode
->flags
|= newflag
;
3003 drm_mode_probed_add(connector
, newmode
);
3017 cea_db_payload_len(const u8
*db
)
3019 return db
[0] & 0x1f;
3023 cea_db_tag(const u8
*db
)
3029 cea_revision(const u8
*cea
)
3035 cea_db_offsets(const u8
*cea
, int *start
, int *end
)
3037 /* Data block offset in CEA extension block */
3042 if (*end
< 4 || *end
> 127)
3047 static bool cea_db_is_hdmi_vsdb(const u8
*db
)
3051 if (cea_db_tag(db
) != VENDOR_BLOCK
)
3054 if (cea_db_payload_len(db
) < 5)
3057 hdmi_id
= db
[1] | (db
[2] << 8) | (db
[3] << 16);
3059 return hdmi_id
== HDMI_IEEE_OUI
;
3062 #define for_each_cea_db(cea, i, start, end) \
3063 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
3066 add_cea_modes(struct drm_connector
*connector
, struct edid
*edid
)
3068 const u8
*cea
= drm_find_cea_extension(edid
);
3069 const u8
*db
, *hdmi
= NULL
, *video
= NULL
;
3070 u8 dbl
, hdmi_len
, video_len
= 0;
3073 if (cea
&& cea_revision(cea
) >= 3) {
3076 if (cea_db_offsets(cea
, &start
, &end
))
3079 for_each_cea_db(cea
, i
, start
, end
) {
3081 dbl
= cea_db_payload_len(db
);
3083 if (cea_db_tag(db
) == VIDEO_BLOCK
) {
3086 modes
+= do_cea_modes(connector
, video
, dbl
);
3088 else if (cea_db_is_hdmi_vsdb(db
)) {
3096 * We parse the HDMI VSDB after having added the cea modes as we will
3097 * be patching their flags when the sink supports stereo 3D.
3100 modes
+= do_hdmi_vsdb_modes(connector
, hdmi
, hdmi_len
, video
,
3106 static void fixup_detailed_cea_mode_clock(struct drm_display_mode
*mode
)
3108 const struct drm_display_mode
*cea_mode
;
3109 int clock1
, clock2
, clock
;
3113 mode_idx
= drm_match_cea_mode(mode
) - 1;
3114 if (mode_idx
< ARRAY_SIZE(edid_cea_modes
)) {
3116 cea_mode
= &edid_cea_modes
[mode_idx
];
3117 clock1
= cea_mode
->clock
;
3118 clock2
= cea_mode_alternate_clock(cea_mode
);
3120 mode_idx
= drm_match_hdmi_mode(mode
) - 1;
3121 if (mode_idx
< ARRAY_SIZE(edid_4k_modes
)) {
3123 cea_mode
= &edid_4k_modes
[mode_idx
];
3124 clock1
= cea_mode
->clock
;
3125 clock2
= hdmi_mode_alternate_clock(cea_mode
);
3131 /* pick whichever is closest */
3132 if (abs(mode
->clock
- clock1
) < abs(mode
->clock
- clock2
))
3137 if (mode
->clock
== clock
)
3140 DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
3141 type
, mode_idx
+ 1, mode
->clock
, clock
);
3142 mode
->clock
= clock
;
3146 parse_hdmi_vsdb(struct drm_connector
*connector
, const u8
*db
)
3148 u8 len
= cea_db_payload_len(db
);
3151 connector
->eld
[5] |= (db
[6] >> 7) << 1; /* Supports_AI */
3152 connector
->dvi_dual
= db
[6] & 1;
3155 connector
->max_tmds_clock
= db
[7] * 5;
3157 connector
->latency_present
[0] = db
[8] >> 7;
3158 connector
->latency_present
[1] = (db
[8] >> 6) & 1;
3161 connector
->video_latency
[0] = db
[9];
3163 connector
->audio_latency
[0] = db
[10];
3165 connector
->video_latency
[1] = db
[11];
3167 connector
->audio_latency
[1] = db
[12];
3169 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3170 "max TMDS clock %d, "
3171 "latency present %d %d, "
3172 "video latency %d %d, "
3173 "audio latency %d %d\n",
3174 connector
->dvi_dual
,
3175 connector
->max_tmds_clock
,
3176 (int) connector
->latency_present
[0],
3177 (int) connector
->latency_present
[1],
3178 connector
->video_latency
[0],
3179 connector
->video_latency
[1],
3180 connector
->audio_latency
[0],
3181 connector
->audio_latency
[1]);
3185 monitor_name(struct detailed_timing
*t
, void *data
)
3187 if (t
->data
.other_data
.type
== EDID_DETAIL_MONITOR_NAME
)
3188 *(u8
**)data
= t
->data
.other_data
.data
.str
.str
;
3192 * drm_edid_to_eld - build ELD from EDID
3193 * @connector: connector corresponding to the HDMI/DP sink
3194 * @edid: EDID to parse
3196 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3197 * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3200 void drm_edid_to_eld(struct drm_connector
*connector
, struct edid
*edid
)
3202 uint8_t *eld
= connector
->eld
;
3210 memset(eld
, 0, sizeof(connector
->eld
));
3212 cea
= drm_find_cea_extension(edid
);
3214 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3219 drm_for_each_detailed_block((u8
*)edid
, monitor_name
, &name
);
3220 for (mnl
= 0; name
&& mnl
< 13; mnl
++) {
3221 if (name
[mnl
] == 0x0a)
3223 eld
[20 + mnl
] = name
[mnl
];
3225 eld
[4] = (cea
[1] << 5) | mnl
;
3226 DRM_DEBUG_KMS("ELD monitor %s\n", eld
+ 20);
3228 eld
[0] = 2 << 3; /* ELD version: 2 */
3230 eld
[16] = edid
->mfg_id
[0];
3231 eld
[17] = edid
->mfg_id
[1];
3232 eld
[18] = edid
->prod_code
[0];
3233 eld
[19] = edid
->prod_code
[1];
3235 if (cea_revision(cea
) >= 3) {
3238 if (cea_db_offsets(cea
, &start
, &end
)) {
3243 for_each_cea_db(cea
, i
, start
, end
) {
3245 dbl
= cea_db_payload_len(db
);
3247 switch (cea_db_tag(db
)) {
3249 /* Audio Data Block, contains SADs */
3250 sad_count
= dbl
/ 3;
3252 memcpy(eld
+ 20 + mnl
, &db
[1], dbl
);
3255 /* Speaker Allocation Data Block */
3260 /* HDMI Vendor-Specific Data Block */
3261 if (cea_db_is_hdmi_vsdb(db
))
3262 parse_hdmi_vsdb(connector
, db
);
3269 eld
[5] |= sad_count
<< 4;
3270 eld
[2] = (20 + mnl
+ sad_count
* 3 + 3) / 4;
3272 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld
[2], sad_count
);
3274 EXPORT_SYMBOL(drm_edid_to_eld
);
3277 * drm_edid_to_sad - extracts SADs from EDID
3278 * @edid: EDID to parse
3279 * @sads: pointer that will be set to the extracted SADs
3281 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3283 * Note: The returned pointer needs to be freed using kfree().
3285 * Return: The number of found SADs or negative number on error.
3287 int drm_edid_to_sad(struct edid
*edid
, struct cea_sad
**sads
)
3290 int i
, start
, end
, dbl
;
3293 cea
= drm_find_cea_extension(edid
);
3295 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3299 if (cea_revision(cea
) < 3) {
3300 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3304 if (cea_db_offsets(cea
, &start
, &end
)) {
3305 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3309 for_each_cea_db(cea
, i
, start
, end
) {
3312 if (cea_db_tag(db
) == AUDIO_BLOCK
) {
3314 dbl
= cea_db_payload_len(db
);
3316 count
= dbl
/ 3; /* SAD is 3B */
3317 *sads
= kcalloc(count
, sizeof(**sads
), GFP_KERNEL
);
3320 for (j
= 0; j
< count
; j
++) {
3321 u8
*sad
= &db
[1 + j
* 3];
3323 (*sads
)[j
].format
= (sad
[0] & 0x78) >> 3;
3324 (*sads
)[j
].channels
= sad
[0] & 0x7;
3325 (*sads
)[j
].freq
= sad
[1] & 0x7F;
3326 (*sads
)[j
].byte2
= sad
[2];
3334 EXPORT_SYMBOL(drm_edid_to_sad
);
3337 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3338 * @edid: EDID to parse
3339 * @sadb: pointer to the speaker block
3341 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3343 * Note: The returned pointer needs to be freed using kfree().
3345 * Return: The number of found Speaker Allocation Blocks or negative number on
3348 int drm_edid_to_speaker_allocation(struct edid
*edid
, u8
**sadb
)
3351 int i
, start
, end
, dbl
;
3354 cea
= drm_find_cea_extension(edid
);
3356 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3360 if (cea_revision(cea
) < 3) {
3361 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3365 if (cea_db_offsets(cea
, &start
, &end
)) {
3366 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3370 for_each_cea_db(cea
, i
, start
, end
) {
3371 const u8
*db
= &cea
[i
];
3373 if (cea_db_tag(db
) == SPEAKER_BLOCK
) {
3374 dbl
= cea_db_payload_len(db
);
3376 /* Speaker Allocation Data Block */
3378 *sadb
= kmemdup(&db
[1], dbl
, GFP_KERNEL
);
3389 EXPORT_SYMBOL(drm_edid_to_speaker_allocation
);
3392 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3393 * @connector: connector associated with the HDMI/DP sink
3394 * @mode: the display mode
3396 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3397 * the sink doesn't support audio or video.
3399 int drm_av_sync_delay(struct drm_connector
*connector
,
3400 const struct drm_display_mode
*mode
)
3402 int i
= !!(mode
->flags
& DRM_MODE_FLAG_INTERLACE
);
3405 if (!connector
->latency_present
[0])
3407 if (!connector
->latency_present
[1])
3410 a
= connector
->audio_latency
[i
];
3411 v
= connector
->video_latency
[i
];
3414 * HDMI/DP sink doesn't support audio or video?
3416 if (a
== 255 || v
== 255)
3420 * Convert raw EDID values to millisecond.
3421 * Treat unknown latency as 0ms.
3424 a
= min(2 * (a
- 1), 500);
3426 v
= min(2 * (v
- 1), 500);
3428 return max(v
- a
, 0);
3430 EXPORT_SYMBOL(drm_av_sync_delay
);
3433 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3434 * @encoder: the encoder just changed display mode
3436 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3437 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3439 * Return: The connector associated with the first HDMI/DP sink that has ELD
3442 struct drm_connector
*drm_select_eld(struct drm_encoder
*encoder
)
3444 struct drm_connector
*connector
;
3445 struct drm_device
*dev
= encoder
->dev
;
3447 WARN_ON(!mutex_is_locked(&dev
->mode_config
.mutex
));
3448 WARN_ON(!drm_modeset_is_locked(&dev
->mode_config
.connection_mutex
));
3450 drm_for_each_connector(connector
, dev
)
3451 if (connector
->encoder
== encoder
&& connector
->eld
[0])
3456 EXPORT_SYMBOL(drm_select_eld
);
3459 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3460 * @edid: monitor EDID information
3462 * Parse the CEA extension according to CEA-861-B.
3464 * Return: True if the monitor is HDMI, false if not or unknown.
3466 bool drm_detect_hdmi_monitor(struct edid
*edid
)
3470 int start_offset
, end_offset
;
3472 edid_ext
= drm_find_cea_extension(edid
);
3476 if (cea_db_offsets(edid_ext
, &start_offset
, &end_offset
))
3480 * Because HDMI identifier is in Vendor Specific Block,
3481 * search it from all data blocks of CEA extension.
3483 for_each_cea_db(edid_ext
, i
, start_offset
, end_offset
) {
3484 if (cea_db_is_hdmi_vsdb(&edid_ext
[i
]))
3490 EXPORT_SYMBOL(drm_detect_hdmi_monitor
);
3493 * drm_detect_monitor_audio - check monitor audio capability
3494 * @edid: EDID block to scan
3496 * Monitor should have CEA extension block.
3497 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3498 * audio' only. If there is any audio extension block and supported
3499 * audio format, assume at least 'basic audio' support, even if 'basic
3500 * audio' is not defined in EDID.
3502 * Return: True if the monitor supports audio, false otherwise.
3504 bool drm_detect_monitor_audio(struct edid
*edid
)
3508 bool has_audio
= false;
3509 int start_offset
, end_offset
;
3511 edid_ext
= drm_find_cea_extension(edid
);
3515 has_audio
= ((edid_ext
[3] & EDID_BASIC_AUDIO
) != 0);
3518 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3522 if (cea_db_offsets(edid_ext
, &start_offset
, &end_offset
))
3525 for_each_cea_db(edid_ext
, i
, start_offset
, end_offset
) {
3526 if (cea_db_tag(&edid_ext
[i
]) == AUDIO_BLOCK
) {
3528 for (j
= 1; j
< cea_db_payload_len(&edid_ext
[i
]) + 1; j
+= 3)
3529 DRM_DEBUG_KMS("CEA audio format %d\n",
3530 (edid_ext
[i
+ j
] >> 3) & 0xf);
3537 EXPORT_SYMBOL(drm_detect_monitor_audio
);
3540 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3541 * @edid: EDID block to scan
3543 * Check whether the monitor reports the RGB quantization range selection
3544 * as supported. The AVI infoframe can then be used to inform the monitor
3545 * which quantization range (full or limited) is used.
3547 * Return: True if the RGB quantization range is selectable, false otherwise.
3549 bool drm_rgb_quant_range_selectable(struct edid
*edid
)
3554 edid_ext
= drm_find_cea_extension(edid
);
3558 if (cea_db_offsets(edid_ext
, &start
, &end
))
3561 for_each_cea_db(edid_ext
, i
, start
, end
) {
3562 if (cea_db_tag(&edid_ext
[i
]) == VIDEO_CAPABILITY_BLOCK
&&
3563 cea_db_payload_len(&edid_ext
[i
]) == 2) {
3564 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext
[i
+ 2]);
3565 return edid_ext
[i
+ 2] & EDID_CEA_VCDB_QS
;
3571 EXPORT_SYMBOL(drm_rgb_quant_range_selectable
);
3574 * drm_assign_hdmi_deep_color_info - detect whether monitor supports
3575 * hdmi deep color modes and update drm_display_info if so.
3576 * @edid: monitor EDID information
3577 * @info: Updated with maximum supported deep color bpc and color format
3578 * if deep color supported.
3579 * @connector: DRM connector, used only for debug output
3581 * Parse the CEA extension according to CEA-861-B.
3582 * Return true if HDMI deep color supported, false if not or unknown.
3584 static bool drm_assign_hdmi_deep_color_info(struct edid
*edid
,
3585 struct drm_display_info
*info
,
3586 struct drm_connector
*connector
)
3588 u8
*edid_ext
, *hdmi
;
3590 int start_offset
, end_offset
;
3591 unsigned int dc_bpc
= 0;
3593 edid_ext
= drm_find_cea_extension(edid
);
3597 if (cea_db_offsets(edid_ext
, &start_offset
, &end_offset
))
3601 * Because HDMI identifier is in Vendor Specific Block,
3602 * search it from all data blocks of CEA extension.
3604 for_each_cea_db(edid_ext
, i
, start_offset
, end_offset
) {
3605 if (cea_db_is_hdmi_vsdb(&edid_ext
[i
])) {
3606 /* HDMI supports at least 8 bpc */
3609 hdmi
= &edid_ext
[i
];
3610 if (cea_db_payload_len(hdmi
) < 6)
3613 if (hdmi
[6] & DRM_EDID_HDMI_DC_30
) {
3615 info
->edid_hdmi_dc_modes
|= DRM_EDID_HDMI_DC_30
;
3616 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3620 if (hdmi
[6] & DRM_EDID_HDMI_DC_36
) {
3622 info
->edid_hdmi_dc_modes
|= DRM_EDID_HDMI_DC_36
;
3623 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3627 if (hdmi
[6] & DRM_EDID_HDMI_DC_48
) {
3629 info
->edid_hdmi_dc_modes
|= DRM_EDID_HDMI_DC_48
;
3630 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3635 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3636 connector
->name
, dc_bpc
);
3640 * Deep color support mandates RGB444 support for all video
3641 * modes and forbids YCRCB422 support for all video modes per
3644 info
->color_formats
= DRM_COLOR_FORMAT_RGB444
;
3646 /* YCRCB444 is optional according to spec. */
3647 if (hdmi
[6] & DRM_EDID_HDMI_DC_Y444
) {
3648 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB444
;
3649 DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3654 * Spec says that if any deep color mode is supported at all,
3655 * then deep color 36 bit must be supported.
3657 if (!(hdmi
[6] & DRM_EDID_HDMI_DC_36
)) {
3658 DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3665 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3675 * drm_add_display_info - pull display info out if present
3677 * @info: display info (attached to connector)
3678 * @connector: connector whose edid is used to build display info
3680 * Grab any available display info and stuff it into the drm_display_info
3681 * structure that's part of the connector. Useful for tracking bpp and
3684 static void drm_add_display_info(struct edid
*edid
,
3685 struct drm_display_info
*info
,
3686 struct drm_connector
*connector
)
3690 info
->width_mm
= edid
->width_cm
* 10;
3691 info
->height_mm
= edid
->height_cm
* 10;
3693 /* driver figures it out in this case */
3695 info
->color_formats
= 0;
3697 if (edid
->revision
< 3)
3700 if (!(edid
->input
& DRM_EDID_INPUT_DIGITAL
))
3703 /* Get data from CEA blocks if present */
3704 edid_ext
= drm_find_cea_extension(edid
);
3706 info
->cea_rev
= edid_ext
[1];
3708 /* The existence of a CEA block should imply RGB support */
3709 info
->color_formats
= DRM_COLOR_FORMAT_RGB444
;
3710 if (edid_ext
[3] & EDID_CEA_YCRCB444
)
3711 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB444
;
3712 if (edid_ext
[3] & EDID_CEA_YCRCB422
)
3713 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB422
;
3716 /* HDMI deep color modes supported? Assign to info, if so */
3717 drm_assign_hdmi_deep_color_info(edid
, info
, connector
);
3719 /* Only defined for 1.4 with digital displays */
3720 if (edid
->revision
< 4)
3723 switch (edid
->input
& DRM_EDID_DIGITAL_DEPTH_MASK
) {
3724 case DRM_EDID_DIGITAL_DEPTH_6
:
3727 case DRM_EDID_DIGITAL_DEPTH_8
:
3730 case DRM_EDID_DIGITAL_DEPTH_10
:
3733 case DRM_EDID_DIGITAL_DEPTH_12
:
3736 case DRM_EDID_DIGITAL_DEPTH_14
:
3739 case DRM_EDID_DIGITAL_DEPTH_16
:
3742 case DRM_EDID_DIGITAL_DEPTH_UNDEF
:
3748 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3749 connector
->name
, info
->bpc
);
3751 info
->color_formats
|= DRM_COLOR_FORMAT_RGB444
;
3752 if (edid
->features
& DRM_EDID_FEATURE_RGB_YCRCB444
)
3753 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB444
;
3754 if (edid
->features
& DRM_EDID_FEATURE_RGB_YCRCB422
)
3755 info
->color_formats
|= DRM_COLOR_FORMAT_YCRCB422
;
3759 * drm_add_edid_modes - add modes from EDID data, if available
3760 * @connector: connector we're probing
3763 * Add the specified modes to the connector's mode list.
3765 * Return: The number of modes added or 0 if we couldn't find any.
3767 int drm_add_edid_modes(struct drm_connector
*connector
, struct edid
*edid
)
3775 if (!drm_edid_is_valid(edid
)) {
3776 dev_warn(connector
->dev
->dev
, "%s: EDID invalid.\n",
3781 quirks
= edid_get_quirks(edid
);
3784 * EDID spec says modes should be preferred in this order:
3785 * - preferred detailed mode
3786 * - other detailed modes from base block
3787 * - detailed modes from extension blocks
3788 * - CVT 3-byte code modes
3789 * - standard timing codes
3790 * - established timing codes
3791 * - modes inferred from GTF or CVT range information
3793 * We get this pretty much right.
3795 * XXX order for additional mode types in extension blocks?
3797 num_modes
+= add_detailed_modes(connector
, edid
, quirks
);
3798 num_modes
+= add_cvt_modes(connector
, edid
);
3799 num_modes
+= add_standard_modes(connector
, edid
);
3800 num_modes
+= add_established_modes(connector
, edid
);
3801 num_modes
+= add_cea_modes(connector
, edid
);
3802 num_modes
+= add_alternate_cea_modes(connector
, edid
);
3803 if (edid
->features
& DRM_EDID_FEATURE_DEFAULT_GTF
)
3804 num_modes
+= add_inferred_modes(connector
, edid
);
3806 if (quirks
& (EDID_QUIRK_PREFER_LARGE_60
| EDID_QUIRK_PREFER_LARGE_75
))
3807 edid_fixup_preferred(connector
, quirks
);
3809 drm_add_display_info(edid
, &connector
->display_info
, connector
);
3811 if (quirks
& EDID_QUIRK_FORCE_8BPC
)
3812 connector
->display_info
.bpc
= 8;
3814 if (quirks
& EDID_QUIRK_FORCE_12BPC
)
3815 connector
->display_info
.bpc
= 12;
3819 EXPORT_SYMBOL(drm_add_edid_modes
);
3822 * drm_add_modes_noedid - add modes for the connectors without EDID
3823 * @connector: connector we're probing
3824 * @hdisplay: the horizontal display limit
3825 * @vdisplay: the vertical display limit
3827 * Add the specified modes to the connector's mode list. Only when the
3828 * hdisplay/vdisplay is not beyond the given limit, it will be added.
3830 * Return: The number of modes added or 0 if we couldn't find any.
3832 int drm_add_modes_noedid(struct drm_connector
*connector
,
3833 int hdisplay
, int vdisplay
)
3835 int i
, count
, num_modes
= 0;
3836 struct drm_display_mode
*mode
;
3837 struct drm_device
*dev
= connector
->dev
;
3839 count
= ARRAY_SIZE(drm_dmt_modes
);
3845 for (i
= 0; i
< count
; i
++) {
3846 const struct drm_display_mode
*ptr
= &drm_dmt_modes
[i
];
3847 if (hdisplay
&& vdisplay
) {
3849 * Only when two are valid, they will be used to check
3850 * whether the mode should be added to the mode list of
3853 if (ptr
->hdisplay
> hdisplay
||
3854 ptr
->vdisplay
> vdisplay
)
3857 if (drm_mode_vrefresh(ptr
) > 61)
3859 mode
= drm_mode_duplicate(dev
, ptr
);
3861 drm_mode_probed_add(connector
, mode
);
3867 EXPORT_SYMBOL(drm_add_modes_noedid
);
3870 * drm_set_preferred_mode - Sets the preferred mode of a connector
3871 * @connector: connector whose mode list should be processed
3872 * @hpref: horizontal resolution of preferred mode
3873 * @vpref: vertical resolution of preferred mode
3875 * Marks a mode as preferred if it matches the resolution specified by @hpref
3878 void drm_set_preferred_mode(struct drm_connector
*connector
,
3879 int hpref
, int vpref
)
3881 struct drm_display_mode
*mode
;
3883 list_for_each_entry(mode
, &connector
->probed_modes
, head
) {
3884 if (mode
->hdisplay
== hpref
&&
3885 mode
->vdisplay
== vpref
)
3886 mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
3889 EXPORT_SYMBOL(drm_set_preferred_mode
);
3892 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
3893 * data from a DRM display mode
3894 * @frame: HDMI AVI infoframe
3895 * @mode: DRM display mode
3897 * Return: 0 on success or a negative error code on failure.
3900 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe
*frame
,
3901 const struct drm_display_mode
*mode
)
3905 if (!frame
|| !mode
)
3908 err
= hdmi_avi_infoframe_init(frame
);
3912 if (mode
->flags
& DRM_MODE_FLAG_DBLCLK
)
3913 frame
->pixel_repeat
= 1;
3915 frame
->video_code
= drm_match_cea_mode(mode
);
3917 frame
->picture_aspect
= HDMI_PICTURE_ASPECT_NONE
;
3920 * Populate picture aspect ratio from either
3921 * user input (if specified) or from the CEA mode list.
3923 if (mode
->picture_aspect_ratio
== HDMI_PICTURE_ASPECT_4_3
||
3924 mode
->picture_aspect_ratio
== HDMI_PICTURE_ASPECT_16_9
)
3925 frame
->picture_aspect
= mode
->picture_aspect_ratio
;
3926 else if (frame
->video_code
> 0)
3927 frame
->picture_aspect
= drm_get_cea_aspect_ratio(
3930 frame
->active_aspect
= HDMI_ACTIVE_ASPECT_PICTURE
;
3931 frame
->scan_mode
= HDMI_SCAN_MODE_UNDERSCAN
;
3935 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode
);
3937 static enum hdmi_3d_structure
3938 s3d_structure_from_display_mode(const struct drm_display_mode
*mode
)
3940 u32 layout
= mode
->flags
& DRM_MODE_FLAG_3D_MASK
;
3943 case DRM_MODE_FLAG_3D_FRAME_PACKING
:
3944 return HDMI_3D_STRUCTURE_FRAME_PACKING
;
3945 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE
:
3946 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE
;
3947 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE
:
3948 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE
;
3949 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL
:
3950 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL
;
3951 case DRM_MODE_FLAG_3D_L_DEPTH
:
3952 return HDMI_3D_STRUCTURE_L_DEPTH
;
3953 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH
:
3954 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH
;
3955 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM
:
3956 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM
;
3957 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF
:
3958 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF
;
3960 return HDMI_3D_STRUCTURE_INVALID
;
3965 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
3966 * data from a DRM display mode
3967 * @frame: HDMI vendor infoframe
3968 * @mode: DRM display mode
3970 * Note that there's is a need to send HDMI vendor infoframes only when using a
3971 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
3972 * function will return -EINVAL, error that can be safely ignored.
3974 * Return: 0 on success or a negative error code on failure.
3977 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe
*frame
,
3978 const struct drm_display_mode
*mode
)
3984 if (!frame
|| !mode
)
3987 vic
= drm_match_hdmi_mode(mode
);
3988 s3d_flags
= mode
->flags
& DRM_MODE_FLAG_3D_MASK
;
3990 if (!vic
&& !s3d_flags
)
3993 if (vic
&& s3d_flags
)
3996 err
= hdmi_vendor_infoframe_init(frame
);
4003 frame
->s3d_struct
= s3d_structure_from_display_mode(mode
);
4007 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode
);