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AHCI - Misc fixes
[dragonfly.git] / sys / dev / disk / ncr / ncr.c
blobc4b6586922830107194692864fb91b70ae2b7f29
1 /**************************************************************************
2 **
3 ** $FreeBSD: src/sys/pci/ncr.c,v 1.155.2.3 2001/03/05 13:09:10 obrien Exp $
4 **
5 ** Device driver for the NCR 53C8XX PCI-SCSI-Controller Family.
6 **
7 **-------------------------------------------------------------------------
8 **
9 ** Written for 386bsd and FreeBSD by
10 ** Wolfgang Stanglmeier <wolf@cologne.de>
11 ** Stefan Esser <se@mi.Uni-Koeln.de>
12 **
13 **-------------------------------------------------------------------------
14 **
15 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved.
16 **
17 ** Redistribution and use in source and binary forms, with or without
18 ** modification, are permitted provided that the following conditions
19 ** are met:
20 ** 1. Redistributions of source code must retain the above copyright
21 ** notice, this list of conditions and the following disclaimer.
22 ** 2. Redistributions in binary form must reproduce the above copyright
23 ** notice, this list of conditions and the following disclaimer in the
24 ** documentation and/or other materials provided with the distribution.
25 ** 3. The name of the author may not be used to endorse or promote products
26 ** derived from this software without specific prior written permission.
27 **
28 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
29 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
30 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
31 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
32 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
33 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
37 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 **
39 ***************************************************************************
40 */
41
42 #define NCR_DATE "pl30 98/1/1"
43
44 #define NCR_VERSION (2)
45 #define MAX_UNITS (16)
46
47 #define NCR_GETCC_WITHMSG
48
49 #if (defined(__DragonFly__) || defined (__FreeBSD__)) && defined(_KERNEL)
50 #include "opt_ncr.h"
51 #endif
52
53 /*==========================================================
54 **
55 ** Configuration and Debugging
56 **
57 ** May be overwritten in <arch/conf/xxxx>
58 **
59 **==========================================================
60 */
61
62 /*
63 ** SCSI address of this device.
64 ** The boot routines should have set it.
65 ** If not, use this.
66 */
67
68 #ifndef SCSI_NCR_MYADDR
69 #define SCSI_NCR_MYADDR (7)
70 #endif /* SCSI_NCR_MYADDR */
71
72 /*
73 ** The default synchronous period factor
74 ** (0=asynchronous)
75 ** If maximum synchronous frequency is defined, use it instead.
76 */
77
78 #ifndef SCSI_NCR_MAX_SYNC
79
80 #ifndef SCSI_NCR_DFLT_SYNC
81 #define SCSI_NCR_DFLT_SYNC (12)
82 #endif /* SCSI_NCR_DFLT_SYNC */
83
84 #else
85
86 #if SCSI_NCR_MAX_SYNC == 0
87 #define SCSI_NCR_DFLT_SYNC 0
88 #else
89 #define SCSI_NCR_DFLT_SYNC (250000 / SCSI_NCR_MAX_SYNC)
90 #endif
91
92 #endif
93
94 /*
95 ** The minimal asynchronous pre-scaler period (ns)
96 ** Shall be 40.
97 */
98
99 #ifndef SCSI_NCR_MIN_ASYNC
100 #define SCSI_NCR_MIN_ASYNC (40)
101 #endif /* SCSI_NCR_MIN_ASYNC */
102
103 /*
104 ** The maximal bus with (in log2 byte)
105 ** (0=8 bit, 1=16 bit)
106 */
107
108 #ifndef SCSI_NCR_MAX_WIDE
109 #define SCSI_NCR_MAX_WIDE (1)
110 #endif /* SCSI_NCR_MAX_WIDE */
111
112 /*==========================================================
113 **
114 ** Configuration and Debugging
115 **
116 **==========================================================
117 */
118
119 /*
120 ** Number of targets supported by the driver.
121 ** n permits target numbers 0..n-1.
122 ** Default is 7, meaning targets #0..#6.
123 ** #7 .. is myself.
124 */
125
126 #define MAX_TARGET (16)
127
128 /*
129 ** Number of logic units supported by the driver.
130 ** n enables logic unit numbers 0..n-1.
131 ** The common SCSI devices require only
132 ** one lun, so take 1 as the default.
133 */
134
135 #ifndef MAX_LUN
136 #define MAX_LUN (8)
137 #endif /* MAX_LUN */
138
139 /*
140 ** The maximum number of jobs scheduled for starting.
141 ** There should be one slot per target, and one slot
142 ** for each tag of each target in use.
143 */
144
145 #define MAX_START (256)
146
147 /*
148 ** The maximum number of segments a transfer is split into.
149 */
150
151 #define MAX_SCATTER (33)
152
153 /*
154 ** The maximum transfer length (should be >= 64k).
155 ** MUST NOT be greater than (MAX_SCATTER-1) * PAGE_SIZE.
156 */
157
158 #define MAX_SIZE ((MAX_SCATTER-1) * (long) PAGE_SIZE)
159
160 /*
161 ** other
162 */
163
164 #define NCR_SNOOP_TIMEOUT (1000000)
165
166 /*==========================================================
167 **
168 ** Include files
169 **
170 **==========================================================
171 */
172
173 #include <sys/param.h>
174 #include <sys/time.h>
175
176 #ifdef _KERNEL
177 #include <sys/systm.h>
178 #include <sys/malloc.h>
179 #include <sys/buf.h>
180 #include <sys/kernel.h>
181 #include <sys/sysctl.h>
182 #include <sys/bus.h>
183 #include <sys/thread2.h>
184 #include <machine/clock.h>
185 #include <machine/md_var.h>
186 #include <sys/rman.h>
187 #include <vm/vm.h>
188 #include <vm/pmap.h>
189 #include <vm/vm_extern.h>
190 #endif
191
192 #include <bus/pci/pcivar.h>
193 #include <bus/pci/pcireg.h>
194 #include "ncrreg.h"
195
196 #include <bus/cam/cam.h>
197 #include <bus/cam/cam_ccb.h>
198 #include <bus/cam/cam_sim.h>
199 #include <bus/cam/cam_xpt_sim.h>
200 #include <bus/cam/cam_debug.h>
201
202 #include <bus/cam/scsi/scsi_all.h>
203 #include <bus/cam/scsi/scsi_message.h>
204
205 /*==========================================================
206 **
207 ** Debugging tags
208 **
209 **==========================================================
210 */
211
212 #define DEBUG_ALLOC (0x0001)
213 #define DEBUG_PHASE (0x0002)
214 #define DEBUG_POLL (0x0004)
215 #define DEBUG_QUEUE (0x0008)
216 #define DEBUG_RESULT (0x0010)
217 #define DEBUG_SCATTER (0x0020)
218 #define DEBUG_SCRIPT (0x0040)
219 #define DEBUG_TINY (0x0080)
220 #define DEBUG_TIMING (0x0100)
221 #define DEBUG_NEGO (0x0200)
222 #define DEBUG_TAGS (0x0400)
223 #define DEBUG_FREEZE (0x0800)
224 #define DEBUG_RESTART (0x1000)
225
226 /*
227 ** Enable/Disable debug messages.
228 ** Can be changed at runtime too.
229 */
230 #ifdef SCSI_NCR_DEBUG
231 #define DEBUG_FLAGS ncr_debug
232 #else /* SCSI_NCR_DEBUG */
233 #define SCSI_NCR_DEBUG 0
234 #define DEBUG_FLAGS 0
235 #endif /* SCSI_NCR_DEBUG */
236
237
238
239 /*==========================================================
240 **
241 ** assert ()
242 **
243 **==========================================================
244 **
245 ** modified copy from 386bsd:/usr/include/sys/assert.h
246 **
247 **----------------------------------------------------------
248 */
249
250 #ifdef DIAGNOSTIC
251 #define assert(expression) { \
252 if (!(expression)) { \
253 (void)kprintf("assertion \"%s\" failed: " \
254 "file \"%s\", line %d\n", \
255 #expression, __FILE__, __LINE__); \
256 Debugger(""); \
257 } \
258 }
259 #else
260 #define assert(expression) { \
261 if (!(expression)) { \
262 (void)kprintf("assertion \"%s\" failed: " \
263 "file \"%s\", line %d\n", \
264 #expression, __FILE__, __LINE__); \
265 } \
266 }
267 #endif
268
269 /*==========================================================
270 **
271 ** Access to the controller chip.
272 **
273 **==========================================================
274 */
275
276 #define INB(r) bus_space_read_1(np->bst, np->bsh, offsetof(struct ncr_reg, r))
277 #define INW(r) bus_space_read_2(np->bst, np->bsh, offsetof(struct ncr_reg, r))
278 #define INL(r) bus_space_read_4(np->bst, np->bsh, offsetof(struct ncr_reg, r))
279
280 #define OUTB(r, val) bus_space_write_1(np->bst, np->bsh, \
281 offsetof(struct ncr_reg, r), val)
282 #define OUTW(r, val) bus_space_write_2(np->bst, np->bsh, \
283 offsetof(struct ncr_reg, r), val)
284 #define OUTL(r, val) bus_space_write_4(np->bst, np->bsh, \
285 offsetof(struct ncr_reg, r), val)
286 #define OUTL_OFF(o, val) bus_space_write_4(np->bst, np->bsh, o, val)
287
288 #define INB_OFF(o) bus_space_read_1(np->bst, np->bsh, o)
289 #define INW_OFF(o) bus_space_read_2(np->bst, np->bsh, o)
290 #define INL_OFF(o) bus_space_read_4(np->bst, np->bsh, o)
291
292 #define READSCRIPT_OFF(base, off) \
293 (base ? *((volatile u_int32_t *)((volatile char *)base + (off))) : \
294 bus_space_read_4(np->bst2, np->bsh2, off))
295
296 #define WRITESCRIPT_OFF(base, off, val) \
297 do { \
298 if (base) \
299 *((volatile u_int32_t *) \
300 ((volatile char *)base + (off))) = (val); \
301 else \
302 bus_space_write_4(np->bst2, np->bsh2, off, val); \
303 } while (0)
304
305 #define READSCRIPT(r) \
306 READSCRIPT_OFF(np->script, offsetof(struct script, r))
307
308 #define WRITESCRIPT(r, val) \
309 WRITESCRIPT_OFF(np->script, offsetof(struct script, r), val)
310
311 /*
312 ** Set bit field ON, OFF
313 */
314
315 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
316 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
317 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
318 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
319 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
320 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
321
322 /*==========================================================
323 **
324 ** Command control block states.
325 **
326 **==========================================================
327 */
328
329 #define HS_IDLE (0)
330 #define HS_BUSY (1)
331 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
332 #define HS_DISCONNECT (3) /* Disconnected by target */
333
334 #define HS_COMPLETE (4)
335 #define HS_SEL_TIMEOUT (5) /* Selection timeout */
336 #define HS_RESET (6) /* SCSI reset */
337 #define HS_ABORTED (7) /* Transfer aborted */
338 #define HS_TIMEOUT (8) /* Software timeout */
339 #define HS_FAIL (9) /* SCSI or PCI bus errors */
340 #define HS_UNEXPECTED (10) /* Unexpected disconnect */
341 #define HS_STALL (11) /* QUEUE FULL or BUSY */
342
343 #define HS_DONEMASK (0xfc)
344
345 /*==========================================================
346 **
347 ** Software Interrupt Codes
348 **
349 **==========================================================
350 */
351
352 #define SIR_SENSE_RESTART (1)
353 #define SIR_SENSE_FAILED (2)
354 #define SIR_STALL_RESTART (3)
355 #define SIR_STALL_QUEUE (4)
356 #define SIR_NEGO_SYNC (5)
357 #define SIR_NEGO_WIDE (6)
358 #define SIR_NEGO_FAILED (7)
359 #define SIR_NEGO_PROTO (8)
360 #define SIR_REJECT_RECEIVED (9)
361 #define SIR_REJECT_SENT (10)
362 #define SIR_IGN_RESIDUE (11)
363 #define SIR_MISSING_SAVE (12)
364 #define SIR_MAX (12)
365
366 /*==========================================================
367 **
368 ** Extended error codes.
369 ** xerr_status field of struct nccb.
370 **
371 **==========================================================
372 */
373
374 #define XE_OK (0)
375 #define XE_EXTRA_DATA (1) /* unexpected data phase */
376 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */
377
378 /*==========================================================
379 **
380 ** Negotiation status.
381 ** nego_status field of struct nccb.
382 **
383 **==========================================================
384 */
385
386 #define NS_SYNC (1)
387 #define NS_WIDE (2)
388
389 /*==========================================================
390 **
391 ** XXX These are no longer used. Remove once the
392 ** script is updated.
393 ** "Special features" of targets.
394 ** quirks field of struct tcb.
395 ** actualquirks field of struct nccb.
396 **
397 **==========================================================
398 */
399
400 #define QUIRK_AUTOSAVE (0x01)
401 #define QUIRK_NOMSG (0x02)
402 #define QUIRK_NOSYNC (0x10)
403 #define QUIRK_NOWIDE16 (0x20)
404 #define QUIRK_NOTAGS (0x40)
405 #define QUIRK_UPDATE (0x80)
406
407 /*==========================================================
408 **
409 ** Misc.
410 **
411 **==========================================================
412 */
413
414 #define CCB_MAGIC (0xf2691ad2)
415 #define MAX_TAGS (32) /* hard limit */
416
417 /*==========================================================
418 **
419 ** OS dependencies.
420 **
421 **==========================================================
422 */
423
424 #define PRINT_ADDR(ccb) xpt_print_path((ccb)->ccb_h.path)
425
426 /*==========================================================
427 **
428 ** Declaration of structs.
429 **
430 **==========================================================
431 */
432
433 struct tcb;
434 struct lcb;
435 struct nccb;
436 struct ncb;
437 struct script;
438
439 typedef struct ncb * ncb_p;
440 typedef struct tcb * tcb_p;
441 typedef struct lcb * lcb_p;
442 typedef struct nccb * nccb_p;
443
444 struct link {
445 ncrcmd l_cmd;
446 ncrcmd l_paddr;
447 };
448
449 struct usrcmd {
450 u_long target;
451 u_long lun;
452 u_long data;
453 u_long cmd;
454 };
455
456 #define UC_SETSYNC 10
457 #define UC_SETTAGS 11
458 #define UC_SETDEBUG 12
459 #define UC_SETORDER 13
460 #define UC_SETWIDE 14
461 #define UC_SETFLAG 15
462
463 #define UF_TRACE (0x01)
464
465 /*---------------------------------------
466 **
467 ** Timestamps for profiling
468 **
469 **---------------------------------------
470 */
471
472 /* Type of the kernel variable `ticks'. XXX should be declared with the var. */
473 typedef int ticks_t;
474
475 struct tstamp {
476 ticks_t start;
477 ticks_t end;
478 ticks_t select;
479 ticks_t command;
480 ticks_t data;
481 ticks_t status;
482 ticks_t disconnect;
483 };
484
485 /*
486 ** profiling data (per device)
487 */
488
489 struct profile {
490 u_long num_trans;
491 u_long num_bytes;
492 u_long num_disc;
493 u_long num_break;
494 u_long num_int;
495 u_long num_fly;
496 u_long ms_setup;
497 u_long ms_data;
498 u_long ms_disc;
499 u_long ms_post;
500 };
501
502 /*==========================================================
503 **
504 ** Declaration of structs: target control block
505 **
506 **==========================================================
507 */
508
509 #define NCR_TRANS_CUR 0x01 /* Modify current neogtiation status */
510 #define NCR_TRANS_ACTIVE 0x03 /* Assume this is the active target */
511 #define NCR_TRANS_GOAL 0x04 /* Modify negotiation goal */
512 #define NCR_TRANS_USER 0x08 /* Modify user negotiation settings */
513
514 struct ncr_transinfo {
515 u_int8_t width;
516 u_int8_t period;
517 u_int8_t offset;
518 };
519
520 struct ncr_target_tinfo {
521 /* Hardware version of our sync settings */
522 u_int8_t disc_tag;
523 #define NCR_CUR_DISCENB 0x01
524 #define NCR_CUR_TAGENB 0x02
525 #define NCR_USR_DISCENB 0x04
526 #define NCR_USR_TAGENB 0x08
527 u_int8_t sval;
528 struct ncr_transinfo current;
529 struct ncr_transinfo goal;
530 struct ncr_transinfo user;
531 /* Hardware version of our wide settings */
532 u_int8_t wval;
533 };
534
535 struct tcb {
536 /*
537 ** during reselection the ncr jumps to this point
538 ** with SFBR set to the encoded target number
539 ** with bit 7 set.
540 ** if it's not this target, jump to the next.
541 **
542 ** JUMP IF (SFBR != #target#)
543 ** @(next tcb)
544 */
545
546 struct link jump_tcb;
547
548 /*
549 ** load the actual values for the sxfer and the scntl3
550 ** register (sync/wide mode).
551 **
552 ** SCR_COPY (1);
553 ** @(sval field of this tcb)
554 ** @(sxfer register)
555 ** SCR_COPY (1);
556 ** @(wval field of this tcb)
557 ** @(scntl3 register)
558 */
559
560 ncrcmd getscr[6];
561
562 /*
563 ** if next message is "identify"
564 ** then load the message to SFBR,
565 ** else load 0 to SFBR.
566 **
567 ** CALL
568 ** <RESEL_LUN>
569 */
570
571 struct link call_lun;
572
573 /*
574 ** now look for the right lun.
575 **
576 ** JUMP
577 ** @(first nccb of this lun)
578 */
579
580 struct link jump_lcb;
581
582 /*
583 ** pointer to interrupted getcc nccb
584 */
585
586 nccb_p hold_cp;
587
588 /*
589 ** pointer to nccb used for negotiating.
590 ** Avoid to start a nego for all queued commands
591 ** when tagged command queuing is enabled.
592 */
593
594 nccb_p nego_cp;
595
596 /*
597 ** statistical data
598 */
599
600 u_long transfers;
601 u_long bytes;
602
603 /*
604 ** user settable limits for sync transfer
605 ** and tagged commands.
606 */
607
608 struct ncr_target_tinfo tinfo;
609
610 /*
611 ** the lcb's of this tcb
612 */
613
614 lcb_p lp[MAX_LUN];
615 };
616
617 /*==========================================================
618 **
619 ** Declaration of structs: lun control block
620 **
621 **==========================================================
622 */
623
624 struct lcb {
625 /*
626 ** during reselection the ncr jumps to this point
627 ** with SFBR set to the "Identify" message.
628 ** if it's not this lun, jump to the next.
629 **
630 ** JUMP IF (SFBR != #lun#)
631 ** @(next lcb of this target)
632 */
633
634 struct link jump_lcb;
635
636 /*
637 ** if next message is "simple tag",
638 ** then load the tag to SFBR,
639 ** else load 0 to SFBR.
640 **
641 ** CALL
642 ** <RESEL_TAG>
643 */
644
645 struct link call_tag;
646
647 /*
648 ** now look for the right nccb.
649 **
650 ** JUMP
651 ** @(first nccb of this lun)
652 */
653
654 struct link jump_nccb;
655
656 /*
657 ** start of the nccb chain
658 */
659
660 nccb_p next_nccb;
661
662 /*
663 ** Control of tagged queueing
664 */
665
666 u_char reqnccbs;
667 u_char reqlink;
668 u_char actlink;
669 u_char usetags;
670 u_char lasttag;
671 };
672
673 /*==========================================================
674 **
675 ** Declaration of structs: COMMAND control block
676 **
677 **==========================================================
678 **
679 ** This substructure is copied from the nccb to a
680 ** global address after selection (or reselection)
681 ** and copied back before disconnect.
682 **
683 ** These fields are accessible to the script processor.
684 **
685 **----------------------------------------------------------
686 */
687
688 struct head {
689 /*
690 ** Execution of a nccb starts at this point.
691 ** It's a jump to the "SELECT" label
692 ** of the script.
693 **
694 ** After successful selection the script
695 ** processor overwrites it with a jump to
696 ** the IDLE label of the script.
697 */
698
699 struct link launch;
700
701 /*
702 ** Saved data pointer.
703 ** Points to the position in the script
704 ** responsible for the actual transfer
705 ** of data.
706 ** It's written after reception of a
707 ** "SAVE_DATA_POINTER" message.
708 ** The goalpointer points after
709 ** the last transfer command.
710 */
711
712 u_int32_t savep;
713 u_int32_t lastp;
714 u_int32_t goalp;
715
716 /*
717 ** The virtual address of the nccb
718 ** containing this header.
719 */
720
721 nccb_p cp;
722
723 /*
724 ** space for some timestamps to gather
725 ** profiling data about devices and this driver.
726 */
727
728 struct tstamp stamp;
729
730 /*
731 ** status fields.
732 */
733
734 u_char status[8];
735 };
736
737 /*
738 ** The status bytes are used by the host and the script processor.
739 **
740 ** The first four byte are copied to the scratchb register
741 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
742 ** and copied back just after disconnecting.
743 ** Inside the script the XX_REG are used.
744 **
745 ** The last four bytes are used inside the script by "COPY" commands.
746 ** Because source and destination must have the same alignment
747 ** in a longword, the fields HAVE to be at the choosen offsets.
748 ** xerr_st (4) 0 (0x34) scratcha
749 ** sync_st (5) 1 (0x05) sxfer
750 ** wide_st (7) 3 (0x03) scntl3
751 */
752
753 /*
754 ** First four bytes (script)
755 */
756 #define QU_REG scr0
757 #define HS_REG scr1
758 #define HS_PRT nc_scr1
759 #define SS_REG scr2
760 #define PS_REG scr3
761
762 /*
763 ** First four bytes (host)
764 */
765 #define actualquirks phys.header.status[0]
766 #define host_status phys.header.status[1]
767 #define s_status phys.header.status[2]
768 #define parity_status phys.header.status[3]
769
770 /*
771 ** Last four bytes (script)
772 */
773 #define xerr_st header.status[4] /* MUST be ==0 mod 4 */
774 #define sync_st header.status[5] /* MUST be ==1 mod 4 */
775 #define nego_st header.status[6]
776 #define wide_st header.status[7] /* MUST be ==3 mod 4 */
777
778 /*
779 ** Last four bytes (host)
780 */
781 #define xerr_status phys.xerr_st
782 #define sync_status phys.sync_st
783 #define nego_status phys.nego_st
784 #define wide_status phys.wide_st
785
786 /*==========================================================
787 **
788 ** Declaration of structs: Data structure block
789 **
790 **==========================================================
791 **
792 ** During execution of a nccb by the script processor,
793 ** the DSA (data structure address) register points
794 ** to this substructure of the nccb.
795 ** This substructure contains the header with
796 ** the script-processor-changable data and
797 ** data blocks for the indirect move commands.
798 **
799 **----------------------------------------------------------
800 */
801
802 struct dsb {
803
804 /*
805 ** Header.
806 ** Has to be the first entry,
807 ** because it's jumped to by the
808 ** script processor
809 */
810
811 struct head header;
812
813 /*
814 ** Table data for Script
815 */
816
817 struct scr_tblsel select;
818 struct scr_tblmove smsg ;
819 struct scr_tblmove smsg2 ;
820 struct scr_tblmove cmd ;
821 struct scr_tblmove scmd ;
822 struct scr_tblmove sense ;
823 struct scr_tblmove data [MAX_SCATTER];
824 };
825
826 /*==========================================================
827 **
828 ** Declaration of structs: Command control block.
829 **
830 **==========================================================
831 **
832 ** During execution of a nccb by the script processor,
833 ** the DSA (data structure address) register points
834 ** to this substructure of the nccb.
835 ** This substructure contains the header with
836 ** the script-processor-changable data and then
837 ** data blocks for the indirect move commands.
838 **
839 **----------------------------------------------------------
840 */
841
842
843 struct nccb {
844 /*
845 ** This filler ensures that the global header is
846 ** cache line size aligned.
847 */
848 ncrcmd filler[4];
849
850 /*
851 ** during reselection the ncr jumps to this point.
852 ** If a "SIMPLE_TAG" message was received,
853 ** then SFBR is set to the tag.
854 ** else SFBR is set to 0
855 ** If looking for another tag, jump to the next nccb.
856 **
857 ** JUMP IF (SFBR != #TAG#)
858 ** @(next nccb of this lun)
859 */
860
861 struct link jump_nccb;
862
863 /*
864 ** After execution of this call, the return address
865 ** (in the TEMP register) points to the following
866 ** data structure block.
867 ** So copy it to the DSA register, and start
868 ** processing of this data structure.
869 **
870 ** CALL
871 ** <RESEL_TMP>
872 */
873
874 struct link call_tmp;
875
876 /*
877 ** This is the data structure which is
878 ** to be executed by the script processor.
879 */
880
881 struct dsb phys;
882
883 /*
884 ** If a data transfer phase is terminated too early
885 ** (after reception of a message (i.e. DISCONNECT)),
886 ** we have to prepare a mini script to transfer
887 ** the rest of the data.
888 */
889
890 ncrcmd patch[8];
891
892 /*
893 ** The general SCSI driver provides a
894 ** pointer to a control block.
895 */
896
897 union ccb *ccb;
898
899 /*
900 ** We prepare a message to be sent after selection,
901 ** and a second one to be sent after getcc selection.
902 ** Contents are IDENTIFY and SIMPLE_TAG.
903 ** While negotiating sync or wide transfer,
904 ** a SDTM or WDTM message is appended.
905 */
906
907 u_char scsi_smsg [8];
908 u_char scsi_smsg2[8];
909
910 /*
911 ** Lock this nccb.
912 ** Flag is used while looking for a free nccb.
913 */
914
915 u_long magic;
916
917 /*
918 ** Physical address of this instance of nccb
919 */
920
921 u_long p_nccb;
922
923 /*
924 ** Completion time out for this job.
925 ** It's set to time of start + allowed number of seconds.
926 */
927
928 time_t tlimit;
929
930 /*
931 ** All nccbs of one hostadapter are chained.
932 */
933
934 nccb_p link_nccb;
935
936 /*
937 ** All nccbs of one target/lun are chained.
938 */
939
940 nccb_p next_nccb;
941
942 /*
943 ** Sense command
944 */
945
946 u_char sensecmd[6];
947
948 /*
949 ** Tag for this transfer.
950 ** It's patched into jump_nccb.
951 ** If it's not zero, a SIMPLE_TAG
952 ** message is included in smsg.
953 */
954
955 u_char tag;
956 };
957
958 #define CCB_PHYS(cp,lbl) (cp->p_nccb + offsetof(struct nccb, lbl))
959
960 /*==========================================================
961 **
962 ** Declaration of structs: NCR device descriptor
963 **
964 **==========================================================
965 */
966
967 struct ncb {
968 /*
969 ** The global header.
970 ** Accessible to both the host and the
971 ** script-processor.
972 ** We assume it is cache line size aligned.
973 */
974 struct head header;
975
976 int unit;
977
978 /*-----------------------------------------------
979 ** Scripts ..
980 **-----------------------------------------------
981 **
982 ** During reselection the ncr jumps to this point.
983 ** The SFBR register is loaded with the encoded target id.
984 **
985 ** Jump to the first target.
986 **
987 ** JUMP
988 ** @(next tcb)
989 */
990 struct link jump_tcb;
991
992 /*-----------------------------------------------
993 ** Configuration ..
994 **-----------------------------------------------
995 **
996 ** virtual and physical addresses
997 ** of the 53c810 chip.
998 */
999 int reg_rid;
1000 struct resource *reg_res;
1001 bus_space_tag_t bst;
1002 bus_space_handle_t bsh;
1003
1004 int sram_rid;
1005 struct resource *sram_res;
1006 bus_space_tag_t bst2;
1007 bus_space_handle_t bsh2;
1008
1009 struct resource *irq_res;
1010 void *irq_handle;
1011
1012 /*
1013 ** Scripts instance virtual address.
1014 */
1015 struct script *script;
1016 struct scripth *scripth;
1017
1018 /*
1019 ** Scripts instance physical address.
1020 */
1021 u_long p_script;
1022 u_long p_scripth;
1023
1024 /*
1025 ** The SCSI address of the host adapter.
1026 */
1027 u_char myaddr;
1028
1029 /*
1030 ** timing parameters
1031 */
1032 u_char minsync; /* Minimum sync period factor */
1033 u_char maxsync; /* Maximum sync period factor */
1034 u_char maxoffs; /* Max scsi offset */
1035 u_char clock_divn; /* Number of clock divisors */
1036 u_long clock_khz; /* SCSI clock frequency in KHz */
1037 u_long features; /* Chip features map */
1038 u_char multiplier; /* Clock multiplier (1,2,4) */
1039
1040 u_char maxburst; /* log base 2 of dwords burst */
1041
1042 /*
1043 ** BIOS supplied PCI bus options
1044 */
1045 u_char rv_scntl3;
1046 u_char rv_dcntl;
1047 u_char rv_dmode;
1048 u_char rv_ctest3;
1049 u_char rv_ctest4;
1050 u_char rv_ctest5;
1051 u_char rv_gpcntl;
1052 u_char rv_stest2;
1053
1054 /*-----------------------------------------------
1055 ** CAM SIM information for this instance
1056 **-----------------------------------------------
1057 */
1058
1059 struct cam_sim *sim;
1060 struct cam_path *path;
1061
1062 /*-----------------------------------------------
1063 ** Job control
1064 **-----------------------------------------------
1065 **
1066 ** Commands from user
1067 */
1068 struct usrcmd user;
1069
1070 /*
1071 ** Target data
1072 */
1073 struct tcb target[MAX_TARGET];
1074
1075 /*
1076 ** Start queue.
1077 */
1078 u_int32_t squeue [MAX_START];
1079 u_short squeueput;
1080
1081 /*
1082 ** Timeout handler
1083 */
1084 time_t heartbeat;
1085 u_short ticks;
1086 u_short latetime;
1087 time_t lasttime;
1088 struct callout timeout_ch;
1089
1090 /*-----------------------------------------------
1091 ** Debug and profiling
1092 **-----------------------------------------------
1093 **
1094 ** register dump
1095 */
1096 struct ncr_reg regdump;
1097 time_t regtime;
1098
1099 /*
1100 ** Profiling data
1101 */
1102 struct profile profile;
1103 u_long disc_phys;
1104 u_long disc_ref;
1105
1106 /*
1107 ** Head of list of all nccbs for this controller.
1108 */
1109 nccb_p link_nccb;
1110
1111 /*
1112 ** message buffers.
1113 ** Should be longword aligned,
1114 ** because they're written with a
1115 ** COPY script command.
1116 */
1117 u_char msgout[8];
1118 u_char msgin [8];
1119 u_int32_t lastmsg;
1120
1121 /*
1122 ** Buffer for STATUS_IN phase.
1123 */
1124 u_char scratch;
1125
1126 /*
1127 ** controller chip dependent maximal transfer width.
1128 */
1129 u_char maxwide;
1130
1131 #ifdef NCR_IOMAPPED
1132 /*
1133 ** address of the ncr control registers in io space
1134 */
1135 pci_port_t port;
1136 #endif
1137 };
1138
1139 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1140 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1141
1142 /*==========================================================
1143 **
1144 **
1145 ** Script for NCR-Processor.
1146 **
1147 ** Use ncr_script_fill() to create the variable parts.
1148 ** Use ncr_script_copy_and_bind() to make a copy and
1149 ** bind to physical addresses.
1150 **
1151 **
1152 **==========================================================
1153 **
1154 ** We have to know the offsets of all labels before
1155 ** we reach them (for forward jumps).
1156 ** Therefore we declare a struct here.
1157 ** If you make changes inside the script,
1158 ** DONT FORGET TO CHANGE THE LENGTHS HERE!
1159 **
1160 **----------------------------------------------------------
1161 */
1162
1163 /*
1164 ** Script fragments which are loaded into the on-board RAM
1165 ** of 825A, 875 and 895 chips.
1166 */
1167 struct script {
1168 ncrcmd start [ 7];
1169 ncrcmd start0 [ 2];
1170 ncrcmd start1 [ 3];
1171 ncrcmd startpos [ 1];
1172 ncrcmd trysel [ 8];
1173 ncrcmd skip [ 8];
1174 ncrcmd skip2 [ 3];
1175 ncrcmd idle [ 2];
1176 ncrcmd select [ 18];
1177 ncrcmd prepare [ 4];
1178 ncrcmd loadpos [ 14];
1179 ncrcmd prepare2 [ 24];
1180 ncrcmd setmsg [ 5];
1181 ncrcmd clrack [ 2];
1182 ncrcmd dispatch [ 33];
1183 ncrcmd no_data [ 17];
1184 ncrcmd checkatn [ 10];
1185 ncrcmd command [ 15];
1186 ncrcmd status [ 27];
1187 ncrcmd msg_in [ 26];
1188 ncrcmd msg_bad [ 6];
1189 ncrcmd complete [ 13];
1190 ncrcmd cleanup [ 12];
1191 ncrcmd cleanup0 [ 9];
1192 ncrcmd signal [ 12];
1193 ncrcmd save_dp [ 5];
1194 ncrcmd restore_dp [ 5];
1195 ncrcmd disconnect [ 12];
1196 ncrcmd disconnect0 [ 5];
1197 ncrcmd disconnect1 [ 23];
1198 ncrcmd msg_out [ 9];
1199 ncrcmd msg_out_done [ 7];
1200 ncrcmd badgetcc [ 6];
1201 ncrcmd reselect [ 8];
1202 ncrcmd reselect1 [ 8];
1203 ncrcmd reselect2 [ 8];
1204 ncrcmd resel_tmp [ 5];
1205 ncrcmd resel_lun [ 18];
1206 ncrcmd resel_tag [ 24];
1207 ncrcmd data_in [MAX_SCATTER * 4 + 7];
1208 ncrcmd data_out [MAX_SCATTER * 4 + 7];
1209 };
1210
1211 /*
1212 ** Script fragments which stay in main memory for all chips.
1213 */
1214 struct scripth {
1215 ncrcmd tryloop [MAX_START*5+2];
1216 ncrcmd msg_parity [ 6];
1217 ncrcmd msg_reject [ 8];
1218 ncrcmd msg_ign_residue [ 32];
1219 ncrcmd msg_extended [ 18];
1220 ncrcmd msg_ext_2 [ 18];
1221 ncrcmd msg_wdtr [ 27];
1222 ncrcmd msg_ext_3 [ 18];
1223 ncrcmd msg_sdtr [ 27];
1224 ncrcmd msg_out_abort [ 10];
1225 ncrcmd getcc [ 4];
1226 ncrcmd getcc1 [ 5];
1227 #ifdef NCR_GETCC_WITHMSG
1228 ncrcmd getcc2 [ 29];
1229 #else
1230 ncrcmd getcc2 [ 14];
1231 #endif
1232 ncrcmd getcc3 [ 6];
1233 ncrcmd aborttag [ 4];
1234 ncrcmd abort [ 22];
1235 ncrcmd snooptest [ 9];
1236 ncrcmd snoopend [ 2];
1237 };
1238
1239 /*==========================================================
1240 **
1241 **
1242 ** Function headers.
1243 **
1244 **
1245 **==========================================================
1246 */
1247
1248 #ifdef _KERNEL
1249 static nccb_p ncr_alloc_nccb (ncb_p np, u_long target, u_long lun);
1250 static void ncr_complete (ncb_p np, nccb_p cp);
1251 static int ncr_delta (int * from, int * to);
1252 static void ncr_exception (ncb_p np);
1253 static void ncr_free_nccb (ncb_p np, nccb_p cp);
1254 static void ncr_freeze_devq (ncb_p np, struct cam_path *path);
1255 static void ncr_selectclock (ncb_p np, u_char scntl3);
1256 static void ncr_getclock (ncb_p np, u_char multiplier);
1257 static nccb_p ncr_get_nccb (ncb_p np, u_long t,u_long l);
1258 #if 0
1259 static u_int32_t ncr_info (int unit);
1260 #endif
1261 static void ncr_init (ncb_p np, char * msg, u_long code);
1262 static void ncr_intr (void *vnp);
1263 static void ncr_int_ma (ncb_p np, u_char dstat);
1264 static void ncr_int_sir (ncb_p np);
1265 static void ncr_int_sto (ncb_p np);
1266 #if 0
1267 static void ncr_min_phys (struct buf *bp);
1268 #endif
1269 static void ncr_poll (struct cam_sim *sim);
1270 static void ncb_profile (ncb_p np, nccb_p cp);
1271 static void ncr_script_copy_and_bind
1272 (ncb_p np, ncrcmd *src, ncrcmd *dst, int len);
1273 static void ncr_script_fill (struct script * scr, struct scripth *scrh);
1274 static int ncr_scatter (struct dsb* phys, vm_offset_t vaddr,
1275 vm_size_t datalen);
1276 static void ncr_getsync (ncb_p np, u_char sfac, u_char *fakp,
1277 u_char *scntl3p);
1278 static void ncr_setsync (ncb_p np, nccb_p cp,u_char scntl3,u_char sxfer,
1279 u_char period);
1280 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack);
1281 static int ncr_show_msg (u_char * msg);
1282 static int ncr_snooptest (ncb_p np);
1283 static void ncr_action (struct cam_sim *sim, union ccb *ccb);
1284 static void ncr_timeout (void *arg);
1285 static void ncr_wakeup (ncb_p np, u_long code);
1286
1287 static int ncr_probe (device_t dev);
1288 static int ncr_attach (device_t dev);
1289
1290 #endif /* _KERNEL */
1291
1292 /*==========================================================
1293 **
1294 **
1295 ** Global static data.
1296 **
1297 **
1298 **==========================================================
1299 */
1300
1301
1302 /*
1303 * $FreeBSD: src/sys/pci/ncr.c,v 1.155.2.3 2001/03/05 13:09:10 obrien Exp $
1304 */
1305 static const u_long ncr_version = NCR_VERSION * 11
1306 + (u_long) sizeof (struct ncb) * 7
1307 + (u_long) sizeof (struct nccb) * 5
1308 + (u_long) sizeof (struct lcb) * 3
1309 + (u_long) sizeof (struct tcb) * 2;
1310
1311 #ifdef _KERNEL
1312
1313 static int ncr_debug = SCSI_NCR_DEBUG;
1314 SYSCTL_INT(_debug, OID_AUTO, ncr_debug, CTLFLAG_RW, &ncr_debug, 0,
1315 "Driver debug flags");
1316
1317 static int ncr_cache; /* to be aligned _NOT_ static */
1318
1319 /*==========================================================
1320 **
1321 **
1322 ** Global static data: auto configure
1323 **
1324 **
1325 **==========================================================
1326 */
1327
1328 #define NCR_810_ID (0x00011000ul)
1329 #define NCR_815_ID (0x00041000ul)
1330 #define NCR_820_ID (0x00021000ul)
1331 #define NCR_825_ID (0x00031000ul)
1332 #define NCR_860_ID (0x00061000ul)
1333 #define NCR_875_ID (0x000f1000ul)
1334 #define NCR_875_ID2 (0x008f1000ul)
1335 #define NCR_885_ID (0x000d1000ul)
1336 #define NCR_895_ID (0x000c1000ul)
1337 #define NCR_896_ID (0x000b1000ul)
1338 #define NCR_895A_ID (0x00121000ul)
1339 #define NCR_1510D_ID (0x000a1000ul)
1340
1341
1342 static char *ncr_name (ncb_p np)
1343 {
1344 static char name[10];
1345 ksnprintf(name, sizeof(name), "ncr%d", np->unit);
1346 return (name);
1347 }
1348
1349 /*==========================================================
1350 **
1351 **
1352 ** Scripts for NCR-Processor.
1353 **
1354 ** Use ncr_script_bind for binding to physical addresses.
1355 **
1356 **
1357 **==========================================================
1358 **
1359 ** NADDR generates a reference to a field of the controller data.
1360 ** PADDR generates a reference to another part of the script.
1361 ** RADDR generates a reference to a script processor register.
1362 ** FADDR generates a reference to a script processor register
1363 ** with offset.
1364 **
1365 **----------------------------------------------------------
1366 */
1367
1368 #define RELOC_SOFTC 0x40000000
1369 #define RELOC_LABEL 0x50000000
1370 #define RELOC_REGISTER 0x60000000
1371 #define RELOC_KVAR 0x70000000
1372 #define RELOC_LABELH 0x80000000
1373 #define RELOC_MASK 0xf0000000
1374
1375 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
1376 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
1377 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
1378 #define RADDR(label) (RELOC_REGISTER | REG(label))
1379 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
1380 #define KVAR(which) (RELOC_KVAR | (which))
1381
1382 #define KVAR_SECOND (0)
1383 #define KVAR_TICKS (1)
1384 #define KVAR_NCR_CACHE (2)
1385
1386 #define SCRIPT_KVAR_FIRST (0)
1387 #define SCRIPT_KVAR_LAST (3)
1388
1389 /*
1390 * Kernel variables referenced in the scripts.
1391 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
1392 */
1393 static void *script_kvars[] =
1394 { &time_uptime, &ticks, &ncr_cache };
1395
1396 static struct script script0 = {
1397 /*--------------------------< START >-----------------------*/ {
1398 /*
1399 ** Claim to be still alive ...
1400 */
1401 SCR_COPY (sizeof (((struct ncb *)0)->heartbeat)),
1402 KVAR (KVAR_SECOND),
1403 NADDR (heartbeat),
1404 /*
1405 ** Make data structure address invalid.
1406 ** clear SIGP.
1407 */
1408 SCR_LOAD_REG (dsa, 0xff),
1409 0,
1410 SCR_FROM_REG (ctest2),
1411 0,
1412 }/*-------------------------< START0 >----------------------*/,{
1413 /*
1414 ** Hook for interrupted GetConditionCode.
1415 ** Will be patched to ... IFTRUE by
1416 ** the interrupt handler.
1417 */
1418 SCR_INT ^ IFFALSE (0),
1419 SIR_SENSE_RESTART,
1420
1421 }/*-------------------------< START1 >----------------------*/,{
1422 /*
1423 ** Hook for stalled start queue.
1424 ** Will be patched to IFTRUE by the interrupt handler.
1425 */
1426 SCR_INT ^ IFFALSE (0),
1427 SIR_STALL_RESTART,
1428 /*
1429 ** Then jump to a certain point in tryloop.
1430 ** Due to the lack of indirect addressing the code
1431 ** is self modifying here.
1432 */
1433 SCR_JUMP,
1434 }/*-------------------------< STARTPOS >--------------------*/,{
1435 PADDRH(tryloop),
1436
1437 }/*-------------------------< TRYSEL >----------------------*/,{
1438 /*
1439 ** Now:
1440 ** DSA: Address of a Data Structure
1441 ** or Address of the IDLE-Label.
1442 **
1443 ** TEMP: Address of a script, which tries to
1444 ** start the NEXT entry.
1445 **
1446 ** Save the TEMP register into the SCRATCHA register.
1447 ** Then copy the DSA to TEMP and RETURN.
1448 ** This is kind of an indirect jump.
1449 ** (The script processor has NO stack, so the
1450 ** CALL is actually a jump and link, and the
1451 ** RETURN is an indirect jump.)
1452 **
1453 ** If the slot was empty, DSA contains the address
1454 ** of the IDLE part of this script. The processor
1455 ** jumps to IDLE and waits for a reselect.
1456 ** It will wake up and try the same slot again
1457 ** after the SIGP bit becomes set by the host.
1458 **
1459 ** If the slot was not empty, DSA contains
1460 ** the address of the phys-part of a nccb.
1461 ** The processor jumps to this address.
1462 ** phys starts with head,
1463 ** head starts with launch,
1464 ** so actually the processor jumps to
1465 ** the lauch part.
1466 ** If the entry is scheduled for execution,
1467 ** then launch contains a jump to SELECT.
1468 ** If it's not scheduled, it contains a jump to IDLE.
1469 */
1470 SCR_COPY (4),
1471 RADDR (temp),
1472 RADDR (scratcha),
1473 SCR_COPY (4),
1474 RADDR (dsa),
1475 RADDR (temp),
1476 SCR_RETURN,
1477 0
1478
1479 }/*-------------------------< SKIP >------------------------*/,{
1480 /*
1481 ** This entry has been canceled.
1482 ** Next time use the next slot.
1483 */
1484 SCR_COPY (4),
1485 RADDR (scratcha),
1486 PADDR (startpos),
1487 /*
1488 ** patch the launch field.
1489 ** should look like an idle process.
1490 */
1491 SCR_COPY_F (4),
1492 RADDR (dsa),
1493 PADDR (skip2),
1494 SCR_COPY (8),
1495 PADDR (idle),
1496 }/*-------------------------< SKIP2 >-----------------------*/,{
1497 0,
1498 SCR_JUMP,
1499 PADDR(start),
1500 }/*-------------------------< IDLE >------------------------*/,{
1501 /*
1502 ** Nothing to do?
1503 ** Wait for reselect.
1504 */
1505 SCR_JUMP,
1506 PADDR(reselect),
1507
1508 }/*-------------------------< SELECT >----------------------*/,{
1509 /*
1510 ** DSA contains the address of a scheduled
1511 ** data structure.
1512 **
1513 ** SCRATCHA contains the address of the script,
1514 ** which starts the next entry.
1515 **
1516 ** Set Initiator mode.
1517 **
1518 ** (Target mode is left as an exercise for the reader)
1519 */
1520
1521 SCR_CLR (SCR_TRG),
1522 0,
1523 SCR_LOAD_REG (HS_REG, 0xff),
1524 0,
1525
1526 /*
1527 ** And try to select this target.
1528 */
1529 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
1530 PADDR (reselect),
1531
1532 /*
1533 ** Now there are 4 possibilities:
1534 **
1535 ** (1) The ncr looses arbitration.
1536 ** This is ok, because it will try again,
1537 ** when the bus becomes idle.
1538 ** (But beware of the timeout function!)
1539 **
1540 ** (2) The ncr is reselected.
1541 ** Then the script processor takes the jump
1542 ** to the RESELECT label.
1543 **
1544 ** (3) The ncr completes the selection.
1545 ** Then it will execute the next statement.
1546 **
1547 ** (4) There is a selection timeout.
1548 ** Then the ncr should interrupt the host and stop.
1549 ** Unfortunately, it seems to continue execution
1550 ** of the script. But it will fail with an
1551 ** IID-interrupt on the next WHEN.
1552 */
1553
1554 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
1555 0,
1556
1557 /*
1558 ** Send the IDENTIFY and SIMPLE_TAG messages
1559 ** (and the MSG_EXT_SDTR message)
1560 */
1561 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1562 offsetof (struct dsb, smsg),
1563 #ifdef undef /* XXX better fail than try to deal with this ... */
1564 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1565 -16,
1566 #endif
1567 SCR_CLR (SCR_ATN),
1568 0,
1569 SCR_COPY (1),
1570 RADDR (sfbr),
1571 NADDR (lastmsg),
1572 /*
1573 ** Selection complete.
1574 ** Next time use the next slot.
1575 */
1576 SCR_COPY (4),
1577 RADDR (scratcha),
1578 PADDR (startpos),
1579 }/*-------------------------< PREPARE >----------------------*/,{
1580 /*
1581 ** The ncr doesn't have an indirect load
1582 ** or store command. So we have to
1583 ** copy part of the control block to a
1584 ** fixed place, where we can access it.
1585 **
1586 ** We patch the address part of a
1587 ** COPY command with the DSA-register.
1588 */
1589 SCR_COPY_F (4),
1590 RADDR (dsa),
1591 PADDR (loadpos),
1592 /*
1593 ** then we do the actual copy.
1594 */
1595 SCR_COPY (sizeof (struct head)),
1596 /*
1597 ** continued after the next label ...
1598 */
1599
1600 }/*-------------------------< LOADPOS >---------------------*/,{
1601 0,
1602 NADDR (header),
1603 /*
1604 ** Mark this nccb as not scheduled.
1605 */
1606 SCR_COPY (8),
1607 PADDR (idle),
1608 NADDR (header.launch),
1609 /*
1610 ** Set a time stamp for this selection
1611 */
1612 SCR_COPY (sizeof (ticks)),
1613 KVAR (KVAR_TICKS),
1614 NADDR (header.stamp.select),
1615 /*
1616 ** load the savep (saved pointer) into
1617 ** the TEMP register (actual pointer)
1618 */
1619 SCR_COPY (4),
1620 NADDR (header.savep),
1621 RADDR (temp),
1622 /*
1623 ** Initialize the status registers
1624 */
1625 SCR_COPY (4),
1626 NADDR (header.status),
1627 RADDR (scr0),
1628
1629 }/*-------------------------< PREPARE2 >---------------------*/,{
1630 /*
1631 ** Load the synchronous mode register
1632 */
1633 SCR_COPY (1),
1634 NADDR (sync_st),
1635 RADDR (sxfer),
1636 /*
1637 ** Load the wide mode and timing register
1638 */
1639 SCR_COPY (1),
1640 NADDR (wide_st),
1641 RADDR (scntl3),
1642 /*
1643 ** Initialize the msgout buffer with a NOOP message.
1644 */
1645 SCR_LOAD_REG (scratcha, MSG_NOOP),
1646 0,
1647 SCR_COPY (1),
1648 RADDR (scratcha),
1649 NADDR (msgout),
1650 SCR_COPY (1),
1651 RADDR (scratcha),
1652 NADDR (msgin),
1653 /*
1654 ** Message in phase ?
1655 */
1656 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1657 PADDR (dispatch),
1658 /*
1659 ** Extended or reject message ?
1660 */
1661 SCR_FROM_REG (sbdl),
1662 0,
1663 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1664 PADDR (msg_in),
1665 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1666 PADDRH (msg_reject),
1667 /*
1668 ** normal processing
1669 */
1670 SCR_JUMP,
1671 PADDR (dispatch),
1672 }/*-------------------------< SETMSG >----------------------*/,{
1673 SCR_COPY (1),
1674 RADDR (scratcha),
1675 NADDR (msgout),
1676 SCR_SET (SCR_ATN),
1677 0,
1678 }/*-------------------------< CLRACK >----------------------*/,{
1679 /*
1680 ** Terminate possible pending message phase.
1681 */
1682 SCR_CLR (SCR_ACK),
1683 0,
1684
1685 }/*-----------------------< DISPATCH >----------------------*/,{
1686 SCR_FROM_REG (HS_REG),
1687 0,
1688 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
1689 SIR_NEGO_FAILED,
1690 /*
1691 ** remove bogus output signals
1692 */
1693 SCR_REG_REG (socl, SCR_AND, CACK|CATN),
1694 0,
1695 SCR_RETURN ^ IFTRUE (WHEN (SCR_DATA_OUT)),
1696 0,
1697 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_IN)),
1698 0,
1699 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
1700 PADDR (msg_out),
1701 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_IN)),
1702 PADDR (msg_in),
1703 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
1704 PADDR (command),
1705 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
1706 PADDR (status),
1707 /*
1708 ** Discard one illegal phase byte, if required.
1709 */
1710 SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
1711 0,
1712 SCR_COPY (1),
1713 RADDR (scratcha),
1714 NADDR (xerr_st),
1715 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
1716 8,
1717 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
1718 NADDR (scratch),
1719 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
1720 8,
1721 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
1722 NADDR (scratch),
1723 SCR_JUMP,
1724 PADDR (dispatch),
1725
1726 }/*-------------------------< NO_DATA >--------------------*/,{
1727 /*
1728 ** The target wants to tranfer too much data
1729 ** or in the wrong direction.
1730 ** Remember that in extended error.
1731 */
1732 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
1733 0,
1734 SCR_COPY (1),
1735 RADDR (scratcha),
1736 NADDR (xerr_st),
1737 /*
1738 ** Discard one data byte, if required.
1739 */
1740 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1741 8,
1742 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
1743 NADDR (scratch),
1744 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
1745 8,
1746 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
1747 NADDR (scratch),
1748 /*
1749 ** .. and repeat as required.
1750 */
1751 SCR_CALL,
1752 PADDR (dispatch),
1753 SCR_JUMP,
1754 PADDR (no_data),
1755 }/*-------------------------< CHECKATN >--------------------*/,{
1756 /*
1757 ** If AAP (bit 1 of scntl0 register) is set
1758 ** and a parity error is detected,
1759 ** the script processor asserts ATN.
1760 **
1761 ** The target should switch to a MSG_OUT phase
1762 ** to get the message.
1763 */
1764 SCR_FROM_REG (socl),
1765 0,
1766 SCR_JUMP ^ IFFALSE (MASK (CATN, CATN)),
1767 PADDR (dispatch),
1768 /*
1769 ** count it
1770 */
1771 SCR_REG_REG (PS_REG, SCR_ADD, 1),
1772 0,
1773 /*
1774 ** Prepare a MSG_INITIATOR_DET_ERR message
1775 ** (initiator detected error).
1776 ** The target should retry the transfer.
1777 */
1778 SCR_LOAD_REG (scratcha, MSG_INITIATOR_DET_ERR),
1779 0,
1780 SCR_JUMP,
1781 PADDR (setmsg),
1782
1783 }/*-------------------------< COMMAND >--------------------*/,{
1784 /*
1785 ** If this is not a GETCC transfer ...
1786 */
1787 SCR_FROM_REG (SS_REG),
1788 0,
1789 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1790 28,
1791 /*
1792 ** ... set a timestamp ...
1793 */
1794 SCR_COPY (sizeof (ticks)),
1795 KVAR (KVAR_TICKS),
1796 NADDR (header.stamp.command),
1797 /*
1798 ** ... and send the command
1799 */
1800 SCR_MOVE_TBL ^ SCR_COMMAND,
1801 offsetof (struct dsb, cmd),
1802 SCR_JUMP,
1803 PADDR (dispatch),
1804 /*
1805 ** Send the GETCC command
1806 */
1807 /*>>>*/ SCR_MOVE_TBL ^ SCR_COMMAND,
1808 offsetof (struct dsb, scmd),
1809 SCR_JUMP,
1810 PADDR (dispatch),
1811
1812 }/*-------------------------< STATUS >--------------------*/,{
1813 /*
1814 ** set the timestamp.
1815 */
1816 SCR_COPY (sizeof (ticks)),
1817 KVAR (KVAR_TICKS),
1818 NADDR (header.stamp.status),
1819 /*
1820 ** If this is a GETCC transfer,
1821 */
1822 SCR_FROM_REG (SS_REG),
1823 0,
1824 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (SCSI_STATUS_CHECK_COND)),
1825 40,
1826 /*
1827 ** get the status
1828 */
1829 SCR_MOVE_ABS (1) ^ SCR_STATUS,
1830 NADDR (scratch),
1831 /*
1832 ** Save status to scsi_status.
1833 ** Mark as complete.
1834 ** And wait for disconnect.
1835 */
1836 SCR_TO_REG (SS_REG),
1837 0,
1838 SCR_REG_REG (SS_REG, SCR_OR, SCSI_STATUS_SENSE),
1839 0,
1840 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1841 0,
1842 SCR_JUMP,
1843 PADDR (checkatn),
1844 /*
1845 ** If it was no GETCC transfer,
1846 ** save the status to scsi_status.
1847 */
1848 /*>>>*/ SCR_MOVE_ABS (1) ^ SCR_STATUS,
1849 NADDR (scratch),
1850 SCR_TO_REG (SS_REG),
1851 0,
1852 /*
1853 ** if it was no check condition ...
1854 */
1855 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1856 PADDR (checkatn),
1857 /*
1858 ** ... mark as complete.
1859 */
1860 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1861 0,
1862 SCR_JUMP,
1863 PADDR (checkatn),
1864
1865 }/*-------------------------< MSG_IN >--------------------*/,{
1866 /*
1867 ** Get the first byte of the message
1868 ** and save it to SCRATCHA.
1869 **
1870 ** The script processor doesn't negate the
1871 ** ACK signal after this transfer.
1872 */
1873 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1874 NADDR (msgin[0]),
1875 /*
1876 ** Check for message parity error.
1877 */
1878 SCR_TO_REG (scratcha),
1879 0,
1880 SCR_FROM_REG (socl),
1881 0,
1882 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
1883 PADDRH (msg_parity),
1884 SCR_FROM_REG (scratcha),
1885 0,
1886 /*
1887 ** Parity was ok, handle this message.
1888 */
1889 SCR_JUMP ^ IFTRUE (DATA (MSG_CMDCOMPLETE)),
1890 PADDR (complete),
1891 SCR_JUMP ^ IFTRUE (DATA (MSG_SAVEDATAPOINTER)),
1892 PADDR (save_dp),
1893 SCR_JUMP ^ IFTRUE (DATA (MSG_RESTOREPOINTERS)),
1894 PADDR (restore_dp),
1895 SCR_JUMP ^ IFTRUE (DATA (MSG_DISCONNECT)),
1896 PADDR (disconnect),
1897 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1898 PADDRH (msg_extended),
1899 SCR_JUMP ^ IFTRUE (DATA (MSG_NOOP)),
1900 PADDR (clrack),
1901 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1902 PADDRH (msg_reject),
1903 SCR_JUMP ^ IFTRUE (DATA (MSG_IGN_WIDE_RESIDUE)),
1904 PADDRH (msg_ign_residue),
1905 /*
1906 ** Rest of the messages left as
1907 ** an exercise ...
1908 **
1909 ** Unimplemented messages:
1910 ** fall through to MSG_BAD.
1911 */
1912 }/*-------------------------< MSG_BAD >------------------*/,{
1913 /*
1914 ** unimplemented message - reject it.
1915 */
1916 SCR_INT,
1917 SIR_REJECT_SENT,
1918 SCR_LOAD_REG (scratcha, MSG_MESSAGE_REJECT),
1919 0,
1920 SCR_JUMP,
1921 PADDR (setmsg),
1922
1923 }/*-------------------------< COMPLETE >-----------------*/,{
1924 /*
1925 ** Complete message.
1926 **
1927 ** If it's not the get condition code,
1928 ** copy TEMP register to LASTP in header.
1929 */
1930 SCR_FROM_REG (SS_REG),
1931 0,
1932 /*<<<*/ SCR_JUMPR ^ IFTRUE (MASK (SCSI_STATUS_SENSE, SCSI_STATUS_SENSE)),
1933 12,
1934 SCR_COPY (4),
1935 RADDR (temp),
1936 NADDR (header.lastp),
1937 /*>>>*/ /*
1938 ** When we terminate the cycle by clearing ACK,
1939 ** the target may disconnect immediately.
1940 **
1941 ** We don't want to be told of an
1942 ** "unexpected disconnect",
1943 ** so we disable this feature.
1944 */
1945 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1946 0,
1947 /*
1948 ** Terminate cycle ...
1949 */
1950 SCR_CLR (SCR_ACK|SCR_ATN),
1951 0,
1952 /*
1953 ** ... and wait for the disconnect.
1954 */
1955 SCR_WAIT_DISC,
1956 0,
1957 }/*-------------------------< CLEANUP >-------------------*/,{
1958 /*
1959 ** dsa: Pointer to nccb
1960 ** or xxxxxxFF (no nccb)
1961 **
1962 ** HS_REG: Host-Status (<>0!)
1963 */
1964 SCR_FROM_REG (dsa),
1965 0,
1966 SCR_JUMP ^ IFTRUE (DATA (0xff)),
1967 PADDR (signal),
1968 /*
1969 ** dsa is valid.
1970 ** save the status registers
1971 */
1972 SCR_COPY (4),
1973 RADDR (scr0),
1974 NADDR (header.status),
1975 /*
1976 ** and copy back the header to the nccb.
1977 */
1978 SCR_COPY_F (4),
1979 RADDR (dsa),
1980 PADDR (cleanup0),
1981 SCR_COPY (sizeof (struct head)),
1982 NADDR (header),
1983 }/*-------------------------< CLEANUP0 >--------------------*/,{
1984 0,
1985
1986 /*
1987 ** If command resulted in "check condition"
1988 ** status and is not yet completed,
1989 ** try to get the condition code.
1990 */
1991 SCR_FROM_REG (HS_REG),
1992 0,
1993 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
1994 16,
1995 SCR_FROM_REG (SS_REG),
1996 0,
1997 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1998 PADDRH(getcc2),
1999 }/*-------------------------< SIGNAL >----------------------*/,{
2000 /*
2001 ** if status = queue full,
2002 ** reinsert in startqueue and stall queue.
2003 */
2004 /*>>>*/ SCR_FROM_REG (SS_REG),
2005 0,
2006 SCR_INT ^ IFTRUE (DATA (SCSI_STATUS_QUEUE_FULL)),
2007 SIR_STALL_QUEUE,
2008 /*
2009 ** And make the DSA register invalid.
2010 */
2011 SCR_LOAD_REG (dsa, 0xff), /* invalid */
2012 0,
2013 /*
2014 ** if job completed ...
2015 */
2016 SCR_FROM_REG (HS_REG),
2017 0,
2018 /*
2019 ** ... signal completion to the host
2020 */
2021 SCR_INT_FLY ^ IFFALSE (MASK (0, HS_DONEMASK)),
2022 0,
2023 /*
2024 ** Auf zu neuen Schandtaten!
2025 */
2026 SCR_JUMP,
2027 PADDR(start),
2028
2029 }/*-------------------------< SAVE_DP >------------------*/,{
2030 /*
2031 ** SAVE_DP message:
2032 ** Copy TEMP register to SAVEP in header.
2033 */
2034 SCR_COPY (4),
2035 RADDR (temp),
2036 NADDR (header.savep),
2037 SCR_JUMP,
2038 PADDR (clrack),
2039 }/*-------------------------< RESTORE_DP >---------------*/,{
2040 /*
2041 ** RESTORE_DP message:
2042 ** Copy SAVEP in header to TEMP register.
2043 */
2044 SCR_COPY (4),
2045 NADDR (header.savep),
2046 RADDR (temp),
2047 SCR_JUMP,
2048 PADDR (clrack),
2049
2050 }/*-------------------------< DISCONNECT >---------------*/,{
2051 /*
2052 ** If QUIRK_AUTOSAVE is set,
2053 ** do an "save pointer" operation.
2054 */
2055 SCR_FROM_REG (QU_REG),
2056 0,
2057 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)),
2058 12,
2059 /*
2060 ** like SAVE_DP message:
2061 ** Copy TEMP register to SAVEP in header.
2062 */
2063 SCR_COPY (4),
2064 RADDR (temp),
2065 NADDR (header.savep),
2066 /*>>>*/ /*
2067 ** Check if temp==savep or temp==goalp:
2068 ** if not, log a missing save pointer message.
2069 ** In fact, it's a comparison mod 256.
2070 **
2071 ** Hmmm, I hadn't thought that I would be urged to
2072 ** write this kind of ugly self modifying code.
2073 **
2074 ** It's unbelievable, but the ncr53c8xx isn't able
2075 ** to subtract one register from another.
2076 */
2077 SCR_FROM_REG (temp),
2078 0,
2079 /*
2080 ** You are not expected to understand this ..
2081 **
2082 ** CAUTION: only little endian architectures supported! XXX
2083 */
2084 SCR_COPY_F (1),
2085 NADDR (header.savep),
2086 PADDR (disconnect0),
2087 }/*-------------------------< DISCONNECT0 >--------------*/,{
2088 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (1)),
2089 20,
2090 /*
2091 ** neither this
2092 */
2093 SCR_COPY_F (1),
2094 NADDR (header.goalp),
2095 PADDR (disconnect1),
2096 }/*-------------------------< DISCONNECT1 >--------------*/,{
2097 SCR_INT ^ IFFALSE (DATA (1)),
2098 SIR_MISSING_SAVE,
2099 /*>>>*/
2100
2101 /*
2102 ** DISCONNECTing ...
2103 **
2104 ** disable the "unexpected disconnect" feature,
2105 ** and remove the ACK signal.
2106 */
2107 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2108 0,
2109 SCR_CLR (SCR_ACK|SCR_ATN),
2110 0,
2111 /*
2112 ** Wait for the disconnect.
2113 */
2114 SCR_WAIT_DISC,
2115 0,
2116 /*
2117 ** Profiling:
2118 ** Set a time stamp,
2119 ** and count the disconnects.
2120 */
2121 SCR_COPY (sizeof (ticks)),
2122 KVAR (KVAR_TICKS),
2123 NADDR (header.stamp.disconnect),
2124 SCR_COPY (4),
2125 NADDR (disc_phys),
2126 RADDR (temp),
2127 SCR_REG_REG (temp, SCR_ADD, 0x01),
2128 0,
2129 SCR_COPY (4),
2130 RADDR (temp),
2131 NADDR (disc_phys),
2132 /*
2133 ** Status is: DISCONNECTED.
2134 */
2135 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
2136 0,
2137 SCR_JUMP,
2138 PADDR (cleanup),
2139
2140 }/*-------------------------< MSG_OUT >-------------------*/,{
2141 /*
2142 ** The target requests a message.
2143 */
2144 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2145 NADDR (msgout),
2146 SCR_COPY (1),
2147 RADDR (sfbr),
2148 NADDR (lastmsg),
2149 /*
2150 ** If it was no ABORT message ...
2151 */
2152 SCR_JUMP ^ IFTRUE (DATA (MSG_ABORT)),
2153 PADDRH (msg_out_abort),
2154 /*
2155 ** ... wait for the next phase
2156 ** if it's a message out, send it again, ...
2157 */
2158 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2159 PADDR (msg_out),
2160 }/*-------------------------< MSG_OUT_DONE >--------------*/,{
2161 /*
2162 ** ... else clear the message ...
2163 */
2164 SCR_LOAD_REG (scratcha, MSG_NOOP),
2165 0,
2166 SCR_COPY (4),
2167 RADDR (scratcha),
2168 NADDR (msgout),
2169 /*
2170 ** ... and process the next phase
2171 */
2172 SCR_JUMP,
2173 PADDR (dispatch),
2174
2175 }/*------------------------< BADGETCC >---------------------*/,{
2176 /*
2177 ** If SIGP was set, clear it and try again.
2178 */
2179 SCR_FROM_REG (ctest2),
2180 0,
2181 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2182 PADDRH (getcc2),
2183 SCR_INT,
2184 SIR_SENSE_FAILED,
2185 }/*-------------------------< RESELECT >--------------------*/,{
2186 /*
2187 ** This NOP will be patched with LED OFF
2188 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
2189 */
2190 SCR_NO_OP,
2191 0,
2192
2193 /*
2194 ** make the DSA invalid.
2195 */
2196 SCR_LOAD_REG (dsa, 0xff),
2197 0,
2198 SCR_CLR (SCR_TRG),
2199 0,
2200 /*
2201 ** Sleep waiting for a reselection.
2202 ** If SIGP is set, special treatment.
2203 **
2204 ** Zu allem bereit ..
2205 */
2206 SCR_WAIT_RESEL,
2207 PADDR(reselect2),
2208 }/*-------------------------< RESELECT1 >--------------------*/,{
2209 /*
2210 ** This NOP will be patched with LED ON
2211 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2212 */
2213 SCR_NO_OP,
2214 0,
2215 /*
2216 ** ... zu nichts zu gebrauchen ?
2217 **
2218 ** load the target id into the SFBR
2219 ** and jump to the control block.
2220 **
2221 ** Look at the declarations of
2222 ** - struct ncb
2223 ** - struct tcb
2224 ** - struct lcb
2225 ** - struct nccb
2226 ** to understand what's going on.
2227 */
2228 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
2229 0,
2230 SCR_TO_REG (sdid),
2231 0,
2232 SCR_JUMP,
2233 NADDR (jump_tcb),
2234 }/*-------------------------< RESELECT2 >-------------------*/,{
2235 /*
2236 ** This NOP will be patched with LED ON
2237 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2238 */
2239 SCR_NO_OP,
2240 0,
2241 /*
2242 ** If it's not connected :(
2243 ** -> interrupted by SIGP bit.
2244 ** Jump to start.
2245 */
2246 SCR_FROM_REG (ctest2),
2247 0,
2248 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2249 PADDR (start),
2250 SCR_JUMP,
2251 PADDR (reselect),
2252
2253 }/*-------------------------< RESEL_TMP >-------------------*/,{
2254 /*
2255 ** The return address in TEMP
2256 ** is in fact the data structure address,
2257 ** so copy it to the DSA register.
2258 */
2259 SCR_COPY (4),
2260 RADDR (temp),
2261 RADDR (dsa),
2262 SCR_JUMP,
2263 PADDR (prepare),
2264
2265 }/*-------------------------< RESEL_LUN >-------------------*/,{
2266 /*
2267 ** come back to this point
2268 ** to get an IDENTIFY message
2269 ** Wait for a msg_in phase.
2270 */
2271 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2272 48,
2273 /*
2274 ** message phase
2275 ** It's not a sony, it's a trick:
2276 ** read the data without acknowledging it.
2277 */
2278 SCR_FROM_REG (sbdl),
2279 0,
2280 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (MSG_IDENTIFYFLAG, 0x98)),
2281 32,
2282 /*
2283 ** It WAS an Identify message.
2284 ** get it and ack it!
2285 */
2286 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2287 NADDR (msgin),
2288 SCR_CLR (SCR_ACK),
2289 0,
2290 /*
2291 ** Mask out the lun.
2292 */
2293 SCR_REG_REG (sfbr, SCR_AND, 0x07),
2294 0,
2295 SCR_RETURN,
2296 0,
2297 /*
2298 ** No message phase or no IDENTIFY message:
2299 ** return 0.
2300 */
2301 /*>>>*/ SCR_LOAD_SFBR (0),
2302 0,
2303 SCR_RETURN,
2304 0,
2305
2306 }/*-------------------------< RESEL_TAG >-------------------*/,{
2307 /*
2308 ** come back to this point
2309 ** to get a SIMPLE_TAG message
2310 ** Wait for a MSG_IN phase.
2311 */
2312 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2313 64,
2314 /*
2315 ** message phase
2316 ** It's a trick - read the data
2317 ** without acknowledging it.
2318 */
2319 SCR_FROM_REG (sbdl),
2320 0,
2321 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (MSG_SIMPLE_Q_TAG)),
2322 48,
2323 /*
2324 ** It WAS a SIMPLE_TAG message.
2325 ** get it and ack it!
2326 */
2327 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2328 NADDR (msgin),
2329 SCR_CLR (SCR_ACK),
2330 0,
2331 /*
2332 ** Wait for the second byte (the tag)
2333 */
2334 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2335 24,
2336 /*
2337 ** Get it and ack it!
2338 */
2339 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2340 NADDR (msgin),
2341 SCR_CLR (SCR_ACK|SCR_CARRY),
2342 0,
2343 SCR_RETURN,
2344 0,
2345 /*
2346 ** No message phase or no SIMPLE_TAG message
2347 ** or no second byte: return 0.
2348 */
2349 /*>>>*/ SCR_LOAD_SFBR (0),
2350 0,
2351 SCR_SET (SCR_CARRY),
2352 0,
2353 SCR_RETURN,
2354 0,
2355
2356 }/*-------------------------< DATA_IN >--------------------*/,{
2357 /*
2358 ** Because the size depends on the
2359 ** #define MAX_SCATTER parameter,
2360 ** it is filled in at runtime.
2361 **
2362 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2363 ** PADDR (no_data),
2364 ** SCR_COPY (sizeof (ticks)),
2365 ** KVAR (KVAR_TICKS),
2366 ** NADDR (header.stamp.data),
2367 ** SCR_MOVE_TBL ^ SCR_DATA_IN,
2368 ** offsetof (struct dsb, data[ 0]),
2369 **
2370 ** ##===========< i=1; i<MAX_SCATTER >=========
2371 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2372 ** || PADDR (checkatn),
2373 ** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2374 ** || offsetof (struct dsb, data[ i]),
2375 ** ##==========================================
2376 **
2377 ** SCR_CALL,
2378 ** PADDR (checkatn),
2379 ** SCR_JUMP,
2380 ** PADDR (no_data),
2381 */
2382 0
2383 }/*-------------------------< DATA_OUT >-------------------*/,{
2384 /*
2385 ** Because the size depends on the
2386 ** #define MAX_SCATTER parameter,
2387 ** it is filled in at runtime.
2388 **
2389 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2390 ** PADDR (no_data),
2391 ** SCR_COPY (sizeof (ticks)),
2392 ** KVAR (KVAR_TICKS),
2393 ** NADDR (header.stamp.data),
2394 ** SCR_MOVE_TBL ^ SCR_DATA_OUT,
2395 ** offsetof (struct dsb, data[ 0]),
2396 **
2397 ** ##===========< i=1; i<MAX_SCATTER >=========
2398 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2399 ** || PADDR (dispatch),
2400 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2401 ** || offsetof (struct dsb, data[ i]),
2402 ** ##==========================================
2403 **
2404 ** SCR_CALL,
2405 ** PADDR (dispatch),
2406 ** SCR_JUMP,
2407 ** PADDR (no_data),
2408 **
2409 **---------------------------------------------------------
2410 */
2411 (u_long)0
2412
2413 }/*--------------------------------------------------------*/
2414 };
2415
2416
2417 static struct scripth scripth0 = {
2418 /*-------------------------< TRYLOOP >---------------------*/{
2419 /*
2420 ** Load an entry of the start queue into dsa
2421 ** and try to start it by jumping to TRYSEL.
2422 **
2423 ** Because the size depends on the
2424 ** #define MAX_START parameter, it is filled
2425 ** in at runtime.
2426 **
2427 **-----------------------------------------------------------
2428 **
2429 ** ##===========< I=0; i<MAX_START >===========
2430 ** || SCR_COPY (4),
2431 ** || NADDR (squeue[i]),
2432 ** || RADDR (dsa),
2433 ** || SCR_CALL,
2434 ** || PADDR (trysel),
2435 ** ##==========================================
2436 **
2437 ** SCR_JUMP,
2438 ** PADDRH(tryloop),
2439 **
2440 **-----------------------------------------------------------
2441 */
2442 0
2443 }/*-------------------------< MSG_PARITY >---------------*/,{
2444 /*
2445 ** count it
2446 */
2447 SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2448 0,
2449 /*
2450 ** send a "message parity error" message.
2451 */
2452 SCR_LOAD_REG (scratcha, MSG_PARITY_ERROR),
2453 0,
2454 SCR_JUMP,
2455 PADDR (setmsg),
2456 }/*-------------------------< MSG_MESSAGE_REJECT >---------------*/,{
2457 /*
2458 ** If a negotiation was in progress,
2459 ** negotiation failed.
2460 */
2461 SCR_FROM_REG (HS_REG),
2462 0,
2463 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2464 SIR_NEGO_FAILED,
2465 /*
2466 ** else make host log this message
2467 */
2468 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2469 SIR_REJECT_RECEIVED,
2470 SCR_JUMP,
2471 PADDR (clrack),
2472
2473 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2474 /*
2475 ** Terminate cycle
2476 */
2477 SCR_CLR (SCR_ACK),
2478 0,
2479 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2480 PADDR (dispatch),
2481 /*
2482 ** get residue size.
2483 */
2484 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2485 NADDR (msgin[1]),
2486 /*
2487 ** Check for message parity error.
2488 */
2489 SCR_TO_REG (scratcha),
2490 0,
2491 SCR_FROM_REG (socl),
2492 0,
2493 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2494 PADDRH (msg_parity),
2495 SCR_FROM_REG (scratcha),
2496 0,
2497 /*
2498 ** Size is 0 .. ignore message.
2499 */
2500 SCR_JUMP ^ IFTRUE (DATA (0)),
2501 PADDR (clrack),
2502 /*
2503 ** Size is not 1 .. have to interrupt.
2504 */
2505 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (1)),
2506 40,
2507 /*
2508 ** Check for residue byte in swide register
2509 */
2510 SCR_FROM_REG (scntl2),
2511 0,
2512 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2513 16,
2514 /*
2515 ** There IS data in the swide register.
2516 ** Discard it.
2517 */
2518 SCR_REG_REG (scntl2, SCR_OR, WSR),
2519 0,
2520 SCR_JUMP,
2521 PADDR (clrack),
2522 /*
2523 ** Load again the size to the sfbr register.
2524 */
2525 /*>>>*/ SCR_FROM_REG (scratcha),
2526 0,
2527 /*>>>*/ SCR_INT,
2528 SIR_IGN_RESIDUE,
2529 SCR_JUMP,
2530 PADDR (clrack),
2531
2532 }/*-------------------------< MSG_EXTENDED >-------------*/,{
2533 /*
2534 ** Terminate cycle
2535 */
2536 SCR_CLR (SCR_ACK),
2537 0,
2538 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2539 PADDR (dispatch),
2540 /*
2541 ** get length.
2542 */
2543 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2544 NADDR (msgin[1]),
2545 /*
2546 ** Check for message parity error.
2547 */
2548 SCR_TO_REG (scratcha),
2549 0,
2550 SCR_FROM_REG (socl),
2551 0,
2552 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2553 PADDRH (msg_parity),
2554 SCR_FROM_REG (scratcha),
2555 0,
2556 /*
2557 */
2558 SCR_JUMP ^ IFTRUE (DATA (3)),
2559 PADDRH (msg_ext_3),
2560 SCR_JUMP ^ IFFALSE (DATA (2)),
2561 PADDR (msg_bad),
2562 }/*-------------------------< MSG_EXT_2 >----------------*/,{
2563 SCR_CLR (SCR_ACK),
2564 0,
2565 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2566 PADDR (dispatch),
2567 /*
2568 ** get extended message code.
2569 */
2570 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2571 NADDR (msgin[2]),
2572 /*
2573 ** Check for message parity error.
2574 */
2575 SCR_TO_REG (scratcha),
2576 0,
2577 SCR_FROM_REG (socl),
2578 0,
2579 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2580 PADDRH (msg_parity),
2581 SCR_FROM_REG (scratcha),
2582 0,
2583 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_WDTR)),
2584 PADDRH (msg_wdtr),
2585 /*
2586 ** unknown extended message
2587 */
2588 SCR_JUMP,
2589 PADDR (msg_bad)
2590 }/*-------------------------< MSG_WDTR >-----------------*/,{
2591 SCR_CLR (SCR_ACK),
2592 0,
2593 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2594 PADDR (dispatch),
2595 /*
2596 ** get data bus width
2597 */
2598 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2599 NADDR (msgin[3]),
2600 SCR_FROM_REG (socl),
2601 0,
2602 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2603 PADDRH (msg_parity),
2604 /*
2605 ** let the host do the real work.
2606 */
2607 SCR_INT,
2608 SIR_NEGO_WIDE,
2609 /*
2610 ** let the target fetch our answer.
2611 */
2612 SCR_SET (SCR_ATN),
2613 0,
2614 SCR_CLR (SCR_ACK),
2615 0,
2616
2617 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2618 SIR_NEGO_PROTO,
2619 /*
2620 ** Send the MSG_EXT_WDTR
2621 */
2622 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
2623 NADDR (msgout),
2624 SCR_CLR (SCR_ATN),
2625 0,
2626 SCR_COPY (1),
2627 RADDR (sfbr),
2628 NADDR (lastmsg),
2629 SCR_JUMP,
2630 PADDR (msg_out_done),
2631
2632 }/*-------------------------< MSG_EXT_3 >----------------*/,{
2633 SCR_CLR (SCR_ACK),
2634 0,
2635 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2636 PADDR (dispatch),
2637 /*
2638 ** get extended message code.
2639 */
2640 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2641 NADDR (msgin[2]),
2642 /*
2643 ** Check for message parity error.
2644 */
2645 SCR_TO_REG (scratcha),
2646 0,
2647 SCR_FROM_REG (socl),
2648 0,
2649 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2650 PADDRH (msg_parity),
2651 SCR_FROM_REG (scratcha),
2652 0,
2653 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_SDTR)),
2654 PADDRH (msg_sdtr),
2655 /*
2656 ** unknown extended message
2657 */
2658 SCR_JUMP,
2659 PADDR (msg_bad)
2660
2661 }/*-------------------------< MSG_SDTR >-----------------*/,{
2662 SCR_CLR (SCR_ACK),
2663 0,
2664 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2665 PADDR (dispatch),
2666 /*
2667 ** get period and offset
2668 */
2669 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
2670 NADDR (msgin[3]),
2671 SCR_FROM_REG (socl),
2672 0,
2673 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2674 PADDRH (msg_parity),
2675 /*
2676 ** let the host do the real work.
2677 */
2678 SCR_INT,
2679 SIR_NEGO_SYNC,
2680 /*
2681 ** let the target fetch our answer.
2682 */
2683 SCR_SET (SCR_ATN),
2684 0,
2685 SCR_CLR (SCR_ACK),
2686 0,
2687
2688 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2689 SIR_NEGO_PROTO,
2690 /*
2691 ** Send the MSG_EXT_SDTR
2692 */
2693 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
2694 NADDR (msgout),
2695 SCR_CLR (SCR_ATN),
2696 0,
2697 SCR_COPY (1),
2698 RADDR (sfbr),
2699 NADDR (lastmsg),
2700 SCR_JUMP,
2701 PADDR (msg_out_done),
2702
2703 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{
2704 /*
2705 ** After ABORT message,
2706 **
2707 ** expect an immediate disconnect, ...
2708 */
2709 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2710 0,
2711 SCR_CLR (SCR_ACK|SCR_ATN),
2712 0,
2713 SCR_WAIT_DISC,
2714 0,
2715 /*
2716 ** ... and set the status to "ABORTED"
2717 */
2718 SCR_LOAD_REG (HS_REG, HS_ABORTED),
2719 0,
2720 SCR_JUMP,
2721 PADDR (cleanup),
2722
2723 }/*-------------------------< GETCC >-----------------------*/,{
2724 /*
2725 ** The ncr doesn't have an indirect load
2726 ** or store command. So we have to
2727 ** copy part of the control block to a
2728 ** fixed place, where we can modify it.
2729 **
2730 ** We patch the address part of a COPY command
2731 ** with the address of the dsa register ...
2732 */
2733 SCR_COPY_F (4),
2734 RADDR (dsa),
2735 PADDRH (getcc1),
2736 /*
2737 ** ... then we do the actual copy.
2738 */
2739 SCR_COPY (sizeof (struct head)),
2740 }/*-------------------------< GETCC1 >----------------------*/,{
2741 0,
2742 NADDR (header),
2743 /*
2744 ** Initialize the status registers
2745 */
2746 SCR_COPY (4),
2747 NADDR (header.status),
2748 RADDR (scr0),
2749 }/*-------------------------< GETCC2 >----------------------*/,{
2750 /*
2751 ** Get the condition code from a target.
2752 **
2753 ** DSA points to a data structure.
2754 ** Set TEMP to the script location
2755 ** that receives the condition code.
2756 **
2757 ** Because there is no script command
2758 ** to load a longword into a register,
2759 ** we use a CALL command.
2760 */
2761 /*<<<*/ SCR_CALLR,
2762 24,
2763 /*
2764 ** Get the condition code.
2765 */
2766 SCR_MOVE_TBL ^ SCR_DATA_IN,
2767 offsetof (struct dsb, sense),
2768 /*
2769 ** No data phase may follow!
2770 */
2771 SCR_CALL,
2772 PADDR (checkatn),
2773 SCR_JUMP,
2774 PADDR (no_data),
2775 /*>>>*/
2776
2777 /*
2778 ** The CALL jumps to this point.
2779 ** Prepare for a RESTORE_POINTER message.
2780 ** Save the TEMP register into the saved pointer.
2781 */
2782 SCR_COPY (4),
2783 RADDR (temp),
2784 NADDR (header.savep),
2785 /*
2786 ** Load scratcha, because in case of a selection timeout,
2787 ** the host will expect a new value for startpos in
2788 ** the scratcha register.
2789 */
2790 SCR_COPY (4),
2791 PADDR (startpos),
2792 RADDR (scratcha),
2793 #ifdef NCR_GETCC_WITHMSG
2794 /*
2795 ** If QUIRK_NOMSG is set, select without ATN.
2796 ** and don't send a message.
2797 */
2798 SCR_FROM_REG (QU_REG),
2799 0,
2800 SCR_JUMP ^ IFTRUE (MASK (QUIRK_NOMSG, QUIRK_NOMSG)),
2801 PADDRH(getcc3),
2802 /*
2803 ** Then try to connect to the target.
2804 ** If we are reselected, special treatment
2805 ** of the current job is required before
2806 ** accepting the reselection.
2807 */
2808 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2809 PADDR(badgetcc),
2810 /*
2811 ** Send the IDENTIFY message.
2812 ** In case of short transfer, remove ATN.
2813 */
2814 SCR_MOVE_TBL ^ SCR_MSG_OUT,
2815 offsetof (struct dsb, smsg2),
2816 SCR_CLR (SCR_ATN),
2817 0,
2818 /*
2819 ** save the first byte of the message.
2820 */
2821 SCR_COPY (1),
2822 RADDR (sfbr),
2823 NADDR (lastmsg),
2824 SCR_JUMP,
2825 PADDR (prepare2),
2826
2827 #endif
2828 }/*-------------------------< GETCC3 >----------------------*/,{
2829 /*
2830 ** Try to connect to the target.
2831 ** If we are reselected, special treatment
2832 ** of the current job is required before
2833 ** accepting the reselection.
2834 **
2835 ** Silly target won't accept a message.
2836 ** Select without ATN.
2837 */
2838 SCR_SEL_TBL ^ offsetof (struct dsb, select),
2839 PADDR(badgetcc),
2840 /*
2841 ** Force error if selection timeout
2842 */
2843 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
2844 0,
2845 /*
2846 ** don't negotiate.
2847 */
2848 SCR_JUMP,
2849 PADDR (prepare2),
2850 }/*-------------------------< ABORTTAG >-------------------*/,{
2851 /*
2852 ** Abort a bad reselection.
2853 ** Set the message to ABORT vs. ABORT_TAG
2854 */
2855 SCR_LOAD_REG (scratcha, MSG_ABORT_TAG),
2856 0,
2857 SCR_JUMPR ^ IFFALSE (CARRYSET),
2858 8,
2859 }/*-------------------------< ABORT >----------------------*/,{
2860 SCR_LOAD_REG (scratcha, MSG_ABORT),
2861 0,
2862 SCR_COPY (1),
2863 RADDR (scratcha),
2864 NADDR (msgout),
2865 SCR_SET (SCR_ATN),
2866 0,
2867 SCR_CLR (SCR_ACK),
2868 0,
2869 /*
2870 ** and send it.
2871 ** we expect an immediate disconnect
2872 */
2873 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2874 0,
2875 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2876 NADDR (msgout),
2877 SCR_COPY (1),
2878 RADDR (sfbr),
2879 NADDR (lastmsg),
2880 SCR_CLR (SCR_ACK|SCR_ATN),
2881 0,
2882 SCR_WAIT_DISC,
2883 0,
2884 SCR_JUMP,
2885 PADDR (start),
2886 }/*-------------------------< SNOOPTEST >-------------------*/,{
2887 /*
2888 ** Read the variable.
2889 */
2890 SCR_COPY (4),
2891 KVAR (KVAR_NCR_CACHE),
2892 RADDR (scratcha),
2893 /*
2894 ** Write the variable.
2895 */
2896 SCR_COPY (4),
2897 RADDR (temp),
2898 KVAR (KVAR_NCR_CACHE),
2899 /*
2900 ** Read back the variable.
2901 */
2902 SCR_COPY (4),
2903 KVAR (KVAR_NCR_CACHE),
2904 RADDR (temp),
2905 }/*-------------------------< SNOOPEND >-------------------*/,{
2906 /*
2907 ** And stop.
2908 */
2909 SCR_INT,
2910 99,
2911 }/*--------------------------------------------------------*/
2912 };
2913
2914
2915 /*==========================================================
2916 **
2917 **
2918 ** Fill in #define dependent parts of the script
2919 **
2920 **
2921 **==========================================================
2922 */
2923
2924 void ncr_script_fill (struct script * scr, struct scripth * scrh)
2925 {
2926 int i;
2927 ncrcmd *p;
2928
2929 p = scrh->tryloop;
2930 for (i=0; i<MAX_START; i++) {
2931 *p++ =SCR_COPY (4);
2932 *p++ =NADDR (squeue[i]);
2933 *p++ =RADDR (dsa);
2934 *p++ =SCR_CALL;
2935 *p++ =PADDR (trysel);
2936 }
2937 *p++ =SCR_JUMP;
2938 *p++ =PADDRH(tryloop);
2939
2940 assert ((char *)p == (char *)&scrh->tryloop + sizeof (scrh->tryloop));
2941
2942 p = scr->data_in;
2943
2944 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN));
2945 *p++ =PADDR (no_data);
2946 *p++ =SCR_COPY (sizeof (ticks));
2947 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2948 *p++ =NADDR (header.stamp.data);
2949 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2950 *p++ =offsetof (struct dsb, data[ 0]);
2951
2952 for (i=1; i<MAX_SCATTER; i++) {
2953 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
2954 *p++ =PADDR (checkatn);
2955 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2956 *p++ =offsetof (struct dsb, data[i]);
2957 }
2958
2959 *p++ =SCR_CALL;
2960 *p++ =PADDR (checkatn);
2961 *p++ =SCR_JUMP;
2962 *p++ =PADDR (no_data);
2963
2964 assert ((char *)p == (char *)&scr->data_in + sizeof (scr->data_in));
2965
2966 p = scr->data_out;
2967
2968 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT));
2969 *p++ =PADDR (no_data);
2970 *p++ =SCR_COPY (sizeof (ticks));
2971 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2972 *p++ =NADDR (header.stamp.data);
2973 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2974 *p++ =offsetof (struct dsb, data[ 0]);
2975
2976 for (i=1; i<MAX_SCATTER; i++) {
2977 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
2978 *p++ =PADDR (dispatch);
2979 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2980 *p++ =offsetof (struct dsb, data[i]);
2981 }
2982
2983 *p++ =SCR_CALL;
2984 *p++ =PADDR (dispatch);
2985 *p++ =SCR_JUMP;
2986 *p++ =PADDR (no_data);
2987
2988 assert ((char *)p == (char *)&scr->data_out + sizeof (scr->data_out));
2989 }
2990
2991 /*==========================================================
2992 **
2993 **
2994 ** Copy and rebind a script.
2995 **
2996 **
2997 **==========================================================
2998 */
2999
3000 static void ncr_script_copy_and_bind (ncb_p np, ncrcmd *src, ncrcmd *dst, int len)
3001 {
3002 ncrcmd opcode, new, old, tmp1, tmp2;
3003 ncrcmd *start, *end;
3004 int relocs, offset;
3005
3006 start = src;
3007 end = src + len/4;
3008 offset = 0;
3009
3010 while (src < end) {
3011
3012 opcode = *src++;
3013 WRITESCRIPT_OFF(dst, offset, opcode);
3014 offset += 4;
3015
3016 /*
3017 ** If we forget to change the length
3018 ** in struct script, a field will be
3019 ** padded with 0. This is an illegal
3020 ** command.
3021 */
3022
3023 if (opcode == 0) {
3024 kprintf ("%s: ERROR0 IN SCRIPT at %d.\n",
3025 ncr_name(np), (int) (src-start-1));
3026 DELAY (1000000);
3027 }
3028
3029 if (DEBUG_FLAGS & DEBUG_SCRIPT)
3030 kprintf ("%p: <%x>\n",
3031 (src-1), (unsigned)opcode);
3032
3033 /*
3034 ** We don't have to decode ALL commands
3035 */
3036 switch (opcode >> 28) {
3037
3038 case 0xc:
3039 /*
3040 ** COPY has TWO arguments.
3041 */
3042 relocs = 2;
3043 tmp1 = src[0];
3044 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
3045 tmp1 = 0;
3046 tmp2 = src[1];
3047 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
3048 tmp2 = 0;
3049 if ((tmp1 ^ tmp2) & 3) {
3050 kprintf ("%s: ERROR1 IN SCRIPT at %d.\n",
3051 ncr_name(np), (int) (src-start-1));
3052 DELAY (1000000);
3053 }
3054 /*
3055 ** If PREFETCH feature not enabled, remove
3056 ** the NO FLUSH bit if present.
3057 */
3058 if ((opcode & SCR_NO_FLUSH) && !(np->features&FE_PFEN))
3059 WRITESCRIPT_OFF(dst, offset - 4,
3060 (opcode & ~SCR_NO_FLUSH));
3061 break;
3062
3063 case 0x0:
3064 /*
3065 ** MOVE (absolute address)
3066 */
3067 relocs = 1;
3068 break;
3069
3070 case 0x8:
3071 /*
3072 ** JUMP / CALL
3073 ** dont't relocate if relative :-)
3074 */
3075 if (opcode & 0x00800000)
3076 relocs = 0;
3077 else
3078 relocs = 1;
3079 break;
3080
3081 case 0x4:
3082 case 0x5:
3083 case 0x6:
3084 case 0x7:
3085 relocs = 1;
3086 break;
3087
3088 default:
3089 relocs = 0;
3090 break;
3091 }
3092
3093 if (relocs) {
3094 while (relocs--) {
3095 old = *src++;
3096
3097 switch (old & RELOC_MASK) {
3098 case RELOC_REGISTER:
3099 new = (old & ~RELOC_MASK) + rman_get_start(np->reg_res);
3100 break;
3101 case RELOC_LABEL:
3102 new = (old & ~RELOC_MASK) + np->p_script;
3103 break;
3104 case RELOC_LABELH:
3105 new = (old & ~RELOC_MASK) + np->p_scripth;
3106 break;
3107 case RELOC_SOFTC:
3108 new = (old & ~RELOC_MASK) + vtophys(np);
3109 break;
3110 case RELOC_KVAR:
3111 if (((old & ~RELOC_MASK) <
3112 SCRIPT_KVAR_FIRST) ||
3113 ((old & ~RELOC_MASK) >
3114 SCRIPT_KVAR_LAST))
3115 panic("ncr KVAR out of range");
3116 new = vtophys(script_kvars[old &
3117 ~RELOC_MASK]);
3118 break;
3119 case 0:
3120 /* Don't relocate a 0 address. */
3121 if (old == 0) {
3122 new = old;
3123 break;
3124 }
3125 /* fall through */
3126 default:
3127 panic("ncr_script_copy_and_bind: weird relocation %x @ %d", old, (int)(src - start));
3128 break;
3129 }
3130
3131 WRITESCRIPT_OFF(dst, offset, new);
3132 offset += 4;
3133 }
3134 } else {
3135 WRITESCRIPT_OFF(dst, offset, *src++);
3136 offset += 4;
3137 }
3138
3139 }
3140 }
3141
3142 /*==========================================================
3143 **
3144 **
3145 ** Auto configuration.
3146 **
3147 **
3148 **==========================================================
3149 */
3150
3151 #if 0
3152 /*----------------------------------------------------------
3153 **
3154 ** Reduce the transfer length to the max value
3155 ** we can transfer safely.
3156 **
3157 ** Reading a block greater then MAX_SIZE from the
3158 ** raw (character) device exercises a memory leak
3159 ** in the vm subsystem. This is common to ALL devices.
3160 ** We have submitted a description of this bug to
3161 ** <FreeBSD-bugs@freefall.cdrom.com>.
3162 ** It should be fixed in the current release.
3163 **
3164 **----------------------------------------------------------
3165 */
3166
3167 void ncr_min_phys (struct buf *bp)
3168 {
3169 if ((unsigned long)bp->b_bcount > MAX_SIZE) bp->b_bcount = MAX_SIZE;
3170 }
3171
3172 #endif
3173
3174 #if 0
3175 /*----------------------------------------------------------
3176 **
3177 ** Maximal number of outstanding requests per target.
3178 **
3179 **----------------------------------------------------------
3180 */
3181
3182 u_int32_t ncr_info (int unit)
3183 {
3184 return (1); /* may be changed later */
3185 }
3186
3187 #endif
3188
3189 /*----------------------------------------------------------
3190 **
3191 ** NCR chip devices table and chip look up function.
3192 ** Features bit are defined in ncrreg.h. Is it the
3193 ** right place?
3194 **
3195 **----------------------------------------------------------
3196 */
3197 typedef struct {
3198 unsigned long device_id;
3199 unsigned short minrevid;
3200 char *name;
3201 unsigned char maxburst;
3202 unsigned char maxoffs;
3203 unsigned char clock_divn;
3204 unsigned int features;
3205 } ncr_chip;
3206
3207 static ncr_chip ncr_chip_table[] = {
3208 {NCR_810_ID, 0x00, "ncr 53c810 fast10 scsi", 4, 8, 4,
3209 FE_ERL}
3210 ,
3211 {NCR_810_ID, 0x10, "ncr 53c810a fast10 scsi", 4, 8, 4,
3212 FE_ERL|FE_LDSTR|FE_PFEN|FE_BOF}
3213 ,
3214 {NCR_815_ID, 0x00, "ncr 53c815 fast10 scsi", 4, 8, 4,
3215 FE_ERL|FE_BOF}
3216 ,
3217 {NCR_820_ID, 0x00, "ncr 53c820 fast10 wide scsi", 4, 8, 4,
3218 FE_WIDE|FE_ERL}
3219 ,
3220 {NCR_825_ID, 0x00, "ncr 53c825 fast10 wide scsi", 4, 8, 4,
3221 FE_WIDE|FE_ERL|FE_BOF}
3222 ,
3223 {NCR_825_ID, 0x10, "ncr 53c825a fast10 wide scsi", 7, 8, 4,
3224 FE_WIDE|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3225 ,
3226 {NCR_860_ID, 0x00, "ncr 53c860 fast20 scsi", 4, 8, 5,
3227 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_LDSTR|FE_PFEN}
3228 ,
3229 {NCR_875_ID, 0x00, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3230 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3231 ,
3232 {NCR_875_ID, 0x02, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3233 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3234 ,
3235 {NCR_875_ID2, 0x00, "ncr 53c875j fast20 wide scsi", 7, 16, 5,
3236 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3237 ,
3238 {NCR_885_ID, 0x00, "ncr 53c885 fast20 wide scsi", 7, 16, 5,
3239 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3240 ,
3241 {NCR_895_ID, 0x00, "ncr 53c895 fast40 wide scsi", 7, 31, 7,
3242 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3243 ,
3244 {NCR_896_ID, 0x00, "ncr 53c896 fast40 wide scsi", 7, 31, 7,
3245 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3246 ,
3247 {NCR_895A_ID, 0x00, "ncr 53c895a fast40 wide scsi", 7, 31, 7,
3248 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3249 ,
3250 {NCR_1510D_ID, 0x00, "ncr 53c1510d fast40 wide scsi", 7, 31, 7,
3251 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3252 };
3253
3254 static int ncr_chip_lookup(u_long device_id, u_char revision_id)
3255 {
3256 int i, found;
3257
3258 found = -1;
3259 for (i = 0; i < NELEM(ncr_chip_table); i++) {
3260 if (device_id == ncr_chip_table[i].device_id &&
3261 ncr_chip_table[i].minrevid <= revision_id) {
3262 if (found < 0 ||
3263 ncr_chip_table[found].minrevid
3264 < ncr_chip_table[i].minrevid) {
3265 found = i;
3266 }
3267 }
3268 }
3269 return found;
3270 }
3271
3272 /*----------------------------------------------------------
3273 **
3274 ** Probe the hostadapter.
3275 **
3276 **----------------------------------------------------------
3277 */
3278
3279
3280
3281 static int ncr_probe (device_t dev)
3282 {
3283 int i;
3284
3285 i = ncr_chip_lookup(pci_get_devid(dev), pci_get_revid(dev));
3286 if (i >= 0) {
3287 device_set_desc(dev, ncr_chip_table[i].name);
3288 return (-1000); /* Allows to use both ncr and sym */
3289 }
3290
3291 return (ENXIO);
3292 }
3293
3294
3295
3296 /*==========================================================
3297 **
3298 ** NCR chip clock divisor table.
3299 ** Divisors are multiplied by 10,000,000 in order to make
3300 ** calculations more simple.
3301 **
3302 **==========================================================
3303 */
3304
3305 #define _5M 5000000
3306 static u_long div_10M[] =
3307 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3308
3309 /*===============================================================
3310 **
3311 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3312 ** transfers. 32,64,128 are only supported by 875 and 895 chips.
3313 ** We use log base 2 (burst length) as internal code, with
3314 ** value 0 meaning "burst disabled".
3315 **
3316 **===============================================================
3317 */
3318
3319 /*
3320 * Burst length from burst code.
3321 */
3322 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3323
3324 /*
3325 * Burst code from io register bits.
3326 */
3327 #define burst_code(dmode, ctest4, ctest5) \
3328 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
3329
3330 /*
3331 * Set initial io register bits from burst code.
3332 */
3333 static void
3334 ncr_init_burst(ncb_p np, u_char bc)
3335 {
3336 np->rv_ctest4 &= ~0x80;
3337 np->rv_dmode &= ~(0x3 << 6);
3338 np->rv_ctest5 &= ~0x4;
3339
3340 if (!bc) {
3341 np->rv_ctest4 |= 0x80;
3342 }
3343 else {
3344 --bc;
3345 np->rv_dmode |= ((bc & 0x3) << 6);
3346 np->rv_ctest5 |= (bc & 0x4);
3347 }
3348 }
3349
3350 /*==========================================================
3351 **
3352 **
3353 ** Auto configuration: attach and init a host adapter.
3354 **
3355 **
3356 **==========================================================
3357 */
3358
3359
3360 static int
3361 ncr_attach (device_t dev)
3362 {
3363 ncb_p np = (struct ncb*) device_get_softc(dev);
3364 u_char rev = 0;
3365 u_long period;
3366 int i, rid;
3367 u_int8_t usrsync;
3368 u_int8_t usrwide;
3369 struct cam_devq *devq;
3370
3371 /*
3372 ** allocate and initialize structures.
3373 */
3374
3375 np->unit = device_get_unit(dev);
3376
3377 /*
3378 ** Try to map the controller chip to
3379 ** virtual and physical memory.
3380 */
3381
3382 np->reg_rid = 0x14;
3383 np->reg_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &np->reg_rid,
3384 0, ~0, 1, RF_ACTIVE);
3385 if (!np->reg_res) {
3386 device_printf(dev, "could not map memory\n");
3387 return ENXIO;
3388 }
3389
3390 /*
3391 ** Make the controller's registers available.
3392 ** Now the INB INW INL OUTB OUTW OUTL macros
3393 ** can be used safely.
3394 */
3395
3396 np->bst = rman_get_bustag(np->reg_res);
3397 np->bsh = rman_get_bushandle(np->reg_res);
3398
3399
3400 #ifdef NCR_IOMAPPED
3401 /*
3402 ** Try to map the controller chip into iospace.
3403 */
3404
3405 if (!pci_map_port (config_id, 0x10, &np->port))
3406 return;
3407 #endif
3408
3409
3410 /*
3411 ** Save some controller register default values
3412 */
3413
3414 np->rv_scntl3 = INB(nc_scntl3) & 0x77;
3415 np->rv_dmode = INB(nc_dmode) & 0xce;
3416 np->rv_dcntl = INB(nc_dcntl) & 0xa9;
3417 np->rv_ctest3 = INB(nc_ctest3) & 0x01;
3418 np->rv_ctest4 = INB(nc_ctest4) & 0x88;
3419 np->rv_ctest5 = INB(nc_ctest5) & 0x24;
3420 np->rv_gpcntl = INB(nc_gpcntl);
3421 np->rv_stest2 = INB(nc_stest2) & 0x20;
3422
3423 if (bootverbose >= 2) {
3424 kprintf ("\tBIOS values: SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
3425 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
3426 kprintf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
3427 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3428 }
3429
3430 np->rv_dcntl |= NOCOM;
3431
3432 /*
3433 ** Do chip dependent initialization.
3434 */
3435
3436 rev = pci_get_revid(dev);
3437
3438 /*
3439 ** Get chip features from chips table.
3440 */
3441 i = ncr_chip_lookup(pci_get_devid(dev), rev);
3442
3443 if (i >= 0) {
3444 np->maxburst = ncr_chip_table[i].maxburst;
3445 np->maxoffs = ncr_chip_table[i].maxoffs;
3446 np->clock_divn = ncr_chip_table[i].clock_divn;
3447 np->features = ncr_chip_table[i].features;
3448 } else { /* Should'nt happen if probe() is ok */
3449 np->maxburst = 4;
3450 np->maxoffs = 8;
3451 np->clock_divn = 4;
3452 np->features = FE_ERL;
3453 }
3454
3455 np->maxwide = np->features & FE_WIDE ? 1 : 0;
3456 np->clock_khz = np->features & FE_CLK80 ? 80000 : 40000;
3457 if (np->features & FE_QUAD) np->multiplier = 4;
3458 else if (np->features & FE_DBLR) np->multiplier = 2;
3459 else np->multiplier = 1;
3460
3461 /*
3462 ** Get the frequency of the chip's clock.
3463 ** Find the right value for scntl3.
3464 */
3465 if (np->features & (FE_ULTRA|FE_ULTRA2))
3466 ncr_getclock(np, np->multiplier);
3467
3468 #ifdef NCR_TEKRAM_EEPROM
3469 if (bootverbose) {
3470 kprintf ("%s: Tekram EEPROM read %s\n",
3471 ncr_name(np),
3472 read_tekram_eeprom (np, NULL) ?
3473 "succeeded" : "failed");
3474 }
3475 #endif /* NCR_TEKRAM_EEPROM */
3476
3477 /*
3478 * If scntl3 != 0, we assume BIOS is present.
3479 */
3480 if (np->rv_scntl3)
3481 np->features |= FE_BIOS;
3482
3483 /*
3484 * Divisor to be used for async (timer pre-scaler).
3485 */
3486 i = np->clock_divn - 1;
3487 while (i >= 0) {
3488 --i;
3489 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3490 ++i;
3491 break;
3492 }
3493 }
3494 np->rv_scntl3 = i+1;
3495
3496 /*
3497 * Minimum synchronous period factor supported by the chip.
3498 * Btw, 'period' is in tenths of nanoseconds.
3499 */
3500
3501 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3502 if (period <= 250) np->minsync = 10;
3503 else if (period <= 303) np->minsync = 11;
3504 else if (period <= 500) np->minsync = 12;
3505 else np->minsync = (period + 40 - 1) / 40;
3506
3507 /*
3508 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3509 */
3510
3511 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2)))
3512 np->minsync = 25;
3513 else if (np->minsync < 12 && !(np->features & FE_ULTRA2))
3514 np->minsync = 12;
3515
3516 /*
3517 * Maximum synchronous period factor supported by the chip.
3518 */
3519
3520 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3521 np->maxsync = period > 2540 ? 254 : period / 10;
3522
3523 /*
3524 * Now, some features available with Symbios compatible boards.
3525 * LED support through GPIO0 and DIFF support.
3526 */
3527
3528 #ifdef SCSI_NCR_SYMBIOS_COMPAT
3529 if (!(np->rv_gpcntl & 0x01))
3530 np->features |= FE_LED0;
3531 #if 0 /* Not safe enough without NVRAM support or user settable option */
3532 if (!(INB(nc_gpreg) & 0x08))
3533 np->features |= FE_DIFF;
3534 #endif
3535 #endif /* SCSI_NCR_SYMBIOS_COMPAT */
3536
3537 /*
3538 * Prepare initial IO registers settings.
3539 * Trust BIOS only if we believe we have one and if we want to.
3540 */
3541 #ifdef SCSI_NCR_TRUST_BIOS
3542 if (!(np->features & FE_BIOS)) {
3543 #else
3544 if (1) {
3545 #endif
3546 np->rv_dmode = 0;
3547 np->rv_dcntl = NOCOM;
3548 np->rv_ctest3 = 0;
3549 np->rv_ctest4 = MPEE;
3550 np->rv_ctest5 = 0;
3551 np->rv_stest2 = 0;
3552
3553 if (np->features & FE_ERL)
3554 np->rv_dmode |= ERL; /* Enable Read Line */
3555 if (np->features & FE_BOF)
3556 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3557 if (np->features & FE_ERMP)
3558 np->rv_dmode |= ERMP; /* Enable Read Multiple */
3559 if (np->features & FE_CLSE)
3560 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3561 if (np->features & FE_WRIE)
3562 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3563 if (np->features & FE_PFEN)
3564 np->rv_dcntl |= PFEN; /* Prefetch Enable */
3565 if (np->features & FE_DFS)
3566 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3567 if (np->features & FE_DIFF)
3568 np->rv_stest2 |= 0x20; /* Differential mode */
3569 ncr_init_burst(np, np->maxburst); /* Max dwords burst length */
3570 } else {
3571 np->maxburst =
3572 burst_code(np->rv_dmode, np->rv_ctest4, np->rv_ctest5);
3573 }
3574
3575 /*
3576 ** Get on-chip SRAM address, if supported
3577 */
3578 if ((np->features & FE_RAM) && sizeof(struct script) <= 4096) {
3579 np->sram_rid = 0x18;
3580 np->sram_res = bus_alloc_resource(dev, SYS_RES_MEMORY,
3581 &np->sram_rid,
3582 0, ~0, 1, RF_ACTIVE);
3583 }
3584
3585 /*
3586 ** Allocate structure for script relocation.
3587 */
3588 if (np->sram_res != NULL) {
3589 np->script = NULL;
3590 np->p_script = rman_get_start(np->sram_res);
3591 np->bst2 = rman_get_bustag(np->sram_res);
3592 np->bsh2 = rman_get_bushandle(np->sram_res);
3593 } else if (sizeof (struct script) > PAGE_SIZE) {
3594 np->script = (struct script*) kmem_alloc_contig
3595 (round_page(sizeof (struct script)),
3596 0, 0xffffffff, PAGE_SIZE);
3597 } else {
3598 np->script = (struct script *)
3599 kmalloc (sizeof (struct script), M_DEVBUF, M_WAITOK);
3600 }
3601
3602 /* XXX JGibbs - Use contigmalloc */
3603 if (sizeof (struct scripth) > PAGE_SIZE) {
3604 np->scripth = (struct scripth*) kmem_alloc_contig
3605 (round_page(sizeof (struct scripth)),
3606 0, 0xffffffff, PAGE_SIZE);
3607 } else
3608 {
3609 np->scripth = (struct scripth *)
3610 kmalloc (sizeof (struct scripth), M_DEVBUF, M_WAITOK);
3611 }
3612
3613 #ifdef SCSI_NCR_PCI_CONFIG_FIXUP
3614 /*
3615 ** If cache line size is enabled, check PCI config space and
3616 ** try to fix it up if necessary.
3617 */
3618 #ifdef PCIR_CACHELNSZ /* To be sure that new PCI stuff is present */
3619 {
3620 u_char cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
3621 u_short command = pci_read_config(dev, PCIR_COMMAND, 2);
3622
3623 if (!cachelnsz) {
3624 cachelnsz = 8;
3625 kprintf("%s: setting PCI cache line size register to %d.\n",
3626 ncr_name(np), (int)cachelnsz);
3627 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
3628 }
3629
3630 if (!(command & (1<<4))) {
3631 command |= (1<<4);
3632 kprintf("%s: setting PCI command write and invalidate.\n",
3633 ncr_name(np));
3634 pci_write_config(dev, PCIR_COMMAND, command, 2);
3635 }
3636 }
3637 #endif /* PCIR_CACHELNSZ */
3638
3639 #endif /* SCSI_NCR_PCI_CONFIG_FIXUP */
3640
3641 /* Initialize per-target user settings */
3642 usrsync = 0;
3643 if (SCSI_NCR_DFLT_SYNC) {
3644 usrsync = SCSI_NCR_DFLT_SYNC;
3645 if (usrsync > np->maxsync)
3646 usrsync = np->maxsync;
3647 if (usrsync < np->minsync)
3648 usrsync = np->minsync;
3649 }
3650
3651 usrwide = (SCSI_NCR_MAX_WIDE);
3652 if (usrwide > np->maxwide) usrwide=np->maxwide;
3653
3654 for (i=0;i<MAX_TARGET;i++) {
3655 tcb_p tp = &np->target[i];
3656
3657 tp->tinfo.user.period = usrsync;
3658 tp->tinfo.user.offset = usrsync != 0 ? np->maxoffs : 0;
3659 tp->tinfo.user.width = usrwide;
3660 tp->tinfo.disc_tag = NCR_CUR_DISCENB
3661 | NCR_CUR_TAGENB
3662 | NCR_USR_DISCENB
3663 | NCR_USR_TAGENB;
3664 }
3665
3666 /*
3667 ** Bells and whistles ;-)
3668 */
3669 if (bootverbose)
3670 kprintf("%s: minsync=%d, maxsync=%d, maxoffs=%d, %d dwords burst, %s dma fifo\n",
3671 ncr_name(np), np->minsync, np->maxsync, np->maxoffs,
3672 burst_length(np->maxburst),
3673 (np->rv_ctest5 & DFS) ? "large" : "normal");
3674
3675 /*
3676 ** Print some complementary information that can be helpfull.
3677 */
3678 if (bootverbose)
3679 kprintf("%s: %s, %s IRQ driver%s\n",
3680 ncr_name(np),
3681 np->rv_stest2 & 0x20 ? "differential" : "single-ended",
3682 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
3683 np->sram_res ? ", using on-chip SRAM" : "");
3684
3685 /*
3686 ** Patch scripts to physical addresses
3687 */
3688 ncr_script_fill (&script0, &scripth0);
3689
3690 if (np->script)
3691 np->p_script = vtophys(np->script);
3692 np->p_scripth = vtophys(np->scripth);
3693
3694 ncr_script_copy_and_bind (np, (ncrcmd *) &script0,
3695 (ncrcmd *) np->script, sizeof(struct script));
3696
3697 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0,
3698 (ncrcmd *) np->scripth, sizeof(struct scripth));
3699
3700 /*
3701 ** Patch the script for LED support.
3702 */
3703
3704 if (np->features & FE_LED0) {
3705 WRITESCRIPT(reselect[0], SCR_REG_REG(gpreg, SCR_OR, 0x01));
3706 WRITESCRIPT(reselect1[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3707 WRITESCRIPT(reselect2[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3708 }
3709
3710 /*
3711 ** init data structure
3712 */
3713
3714 np->jump_tcb.l_cmd = SCR_JUMP;
3715 np->jump_tcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
3716
3717 /*
3718 ** Get SCSI addr of host adapter (set by bios?).
3719 */
3720
3721 np->myaddr = INB(nc_scid) & 0x07;
3722 if (!np->myaddr) np->myaddr = SCSI_NCR_MYADDR;
3723
3724 #ifdef NCR_DUMP_REG
3725 /*
3726 ** Log the initial register contents
3727 */
3728 {
3729 int reg;
3730 for (reg=0; reg<256; reg+=4) {
3731 if (reg%16==0) kprintf ("reg[%2x]", reg);
3732 kprintf (" %08x", (int)pci_conf_read (config_id, reg));
3733 if (reg%16==12) kprintf ("\n");
3734 }
3735 }
3736 #endif /* NCR_DUMP_REG */
3737
3738 /*
3739 ** Reset chip.
3740 */
3741
3742 OUTB (nc_istat, SRST);
3743 DELAY (1000);
3744 OUTB (nc_istat, 0 );
3745
3746
3747 /*
3748 ** Now check the cache handling of the pci chipset.
3749 */
3750
3751 if (ncr_snooptest (np)) {
3752 kprintf ("CACHE INCORRECTLY CONFIGURED.\n");
3753 return EINVAL;
3754 }
3755
3756 /*
3757 ** Install the interrupt handler.
3758 */
3759
3760 rid = 0;
3761 np->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
3762 RF_SHAREABLE | RF_ACTIVE);
3763 if (np->irq_res == NULL) {
3764 device_printf(dev,
3765 "interruptless mode: reduced performance.\n");
3766 } else {
3767 bus_setup_intr(dev, np->irq_res, 0,
3768 ncr_intr, np, &np->irq_handle, NULL);
3769 }
3770
3771 /*
3772 ** Create the device queue. We only allow MAX_START-1 concurrent
3773 ** transactions so we can be sure to have one element free in our
3774 ** start queue to reset to the idle loop.
3775 */
3776 devq = cam_simq_alloc(MAX_START - 1);
3777 if (devq == NULL)
3778 return ENOMEM;
3779
3780 /*
3781 ** Now tell the generic SCSI layer
3782 ** about our bus.
3783 */
3784 np->sim = cam_sim_alloc(ncr_action, ncr_poll, "ncr", np, np->unit,
3785 &sim_mplock, 1, MAX_TAGS, devq);
3786 cam_simq_release(devq);
3787 if (np->sim == NULL)
3788 return ENOMEM;
3789
3790
3791 if (xpt_bus_register(np->sim, 0) != CAM_SUCCESS) {
3792 cam_sim_free(np->sim);
3793 return ENOMEM;
3794 }
3795
3796 if (xpt_create_path(&np->path, /*periph*/NULL,
3797 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
3798 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3799 xpt_bus_deregister(cam_sim_path(np->sim));
3800 cam_sim_free(np->sim);
3801 return ENOMEM;
3802 }
3803
3804 /*
3805 ** start the timeout daemon
3806 */
3807 callout_init(&np->timeout_ch);
3808 ncr_timeout (np);
3809 np->lasttime=0;
3810
3811 return 0;
3812 }
3813
3814 /*==========================================================
3815 **
3816 **
3817 ** Process pending device interrupts.
3818 **
3819 **
3820 **==========================================================
3821 */
3822
3823 static void
3824 ncr_intr(void *vnp)
3825 {
3826 ncb_p np = vnp;
3827 crit_enter();
3828
3829 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("[");
3830
3831 if (INB(nc_istat) & (INTF|SIP|DIP)) {
3832 /*
3833 ** Repeat until no outstanding ints
3834 */
3835 do {
3836 ncr_exception (np);
3837 } while (INB(nc_istat) & (INTF|SIP|DIP));
3838
3839 np->ticks = 100;
3840 }
3841
3842 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("]\n");
3843
3844 crit_exit();
3845 }
3846
3847 /*==========================================================
3848 **
3849 **
3850 ** Start execution of a SCSI command.
3851 ** This is called from the generic SCSI driver.
3852 **
3853 **
3854 **==========================================================
3855 */
3856
3857 static void
3858 ncr_action (struct cam_sim *sim, union ccb *ccb)
3859 {
3860 ncb_p np;
3861
3862 np = (ncb_p) cam_sim_softc(sim);
3863
3864 switch (ccb->ccb_h.func_code) {
3865 /* Common cases first */
3866 case XPT_SCSI_IO: /* Execute the requested I/O operation */
3867 {
3868 nccb_p cp;
3869 lcb_p lp;
3870 tcb_p tp;
3871 struct ccb_scsiio *csio;
3872 u_int8_t *msgptr;
3873 u_int msglen;
3874 u_int msglen2;
3875 int segments;
3876 u_int8_t nego;
3877 u_int8_t idmsg;
3878 int qidx;
3879
3880 tp = &np->target[ccb->ccb_h.target_id];
3881 csio = &ccb->csio;
3882
3883 crit_enter();
3884
3885 /*
3886 * Last time we need to check if this CCB needs to
3887 * be aborted.
3888 */
3889 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3890 xpt_done(ccb);
3891 crit_exit();
3892 return;
3893 }
3894 ccb->ccb_h.status |= CAM_SIM_QUEUED;
3895
3896 /*---------------------------------------------------
3897 **
3898 ** Assign an nccb / bind ccb
3899 **
3900 **----------------------------------------------------
3901 */
3902 cp = ncr_get_nccb (np, ccb->ccb_h.target_id,
3903 ccb->ccb_h.target_lun);
3904 if (cp == NULL) {
3905 /* XXX JGibbs - Freeze SIMQ */
3906 ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
3907 xpt_done(ccb);
3908 crit_exit();
3909 return;
3910 }
3911
3912 cp->ccb = ccb;
3913
3914 /*---------------------------------------------------
3915 **
3916 ** timestamp
3917 **
3918 **----------------------------------------------------
3919 */
3920 /*
3921 ** XXX JGibbs - Isn't this expensive
3922 ** enough to be conditionalized??
3923 */
3924
3925 bzero (&cp->phys.header.stamp, sizeof (struct tstamp));
3926 cp->phys.header.stamp.start = ticks;
3927
3928 nego = 0;
3929 if (tp->nego_cp == NULL) {
3930
3931 if (tp->tinfo.current.width
3932 != tp->tinfo.goal.width) {
3933 tp->nego_cp = cp;
3934 nego = NS_WIDE;
3935 } else if ((tp->tinfo.current.period
3936 != tp->tinfo.goal.period)
3937 || (tp->tinfo.current.offset
3938 != tp->tinfo.goal.offset)) {
3939 tp->nego_cp = cp;
3940 nego = NS_SYNC;
3941 }
3942 }
3943
3944 /*---------------------------------------------------
3945 **
3946 ** choose a new tag ...
3947 **
3948 **----------------------------------------------------
3949 */
3950 lp = tp->lp[ccb->ccb_h.target_lun];
3951
3952 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
3953 && (ccb->csio.tag_action != CAM_TAG_ACTION_NONE)
3954 && (nego == 0)) {
3955 /*
3956 ** assign a tag to this nccb
3957 */
3958 while (!cp->tag) {
3959 nccb_p cp2 = lp->next_nccb;
3960 lp->lasttag = lp->lasttag % 255 + 1;
3961 while (cp2 && cp2->tag != lp->lasttag)
3962 cp2 = cp2->next_nccb;
3963 if (cp2) continue;
3964 cp->tag=lp->lasttag;
3965 if (DEBUG_FLAGS & DEBUG_TAGS) {
3966 PRINT_ADDR(ccb);
3967 kprintf ("using tag #%d.\n", cp->tag);
3968 }
3969 }
3970 } else {
3971 cp->tag=0;
3972 }
3973
3974 /*----------------------------------------------------
3975 **
3976 ** Build the identify / tag / sdtr message
3977 **
3978 **----------------------------------------------------
3979 */
3980 idmsg = MSG_IDENTIFYFLAG | ccb->ccb_h.target_lun;
3981 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
3982 idmsg |= MSG_IDENTIFY_DISCFLAG;
3983
3984 msgptr = cp->scsi_smsg;
3985 msglen = 0;
3986 msgptr[msglen++] = idmsg;
3987
3988 if (cp->tag) {
3989 msgptr[msglen++] = ccb->csio.tag_action;
3990 msgptr[msglen++] = cp->tag;
3991 }
3992
3993 switch (nego) {
3994 case NS_SYNC:
3995 msgptr[msglen++] = MSG_EXTENDED;
3996 msgptr[msglen++] = MSG_EXT_SDTR_LEN;
3997 msgptr[msglen++] = MSG_EXT_SDTR;
3998 msgptr[msglen++] = tp->tinfo.goal.period;
3999 msgptr[msglen++] = tp->tinfo.goal.offset;
4000 if (DEBUG_FLAGS & DEBUG_NEGO) {
4001 PRINT_ADDR(ccb);
4002 kprintf ("sync msgout: ");
4003 ncr_show_msg (&cp->scsi_smsg [msglen-5]);
4004 kprintf (".\n");
4005 };
4006 break;
4007 case NS_WIDE:
4008 msgptr[msglen++] = MSG_EXTENDED;
4009 msgptr[msglen++] = MSG_EXT_WDTR_LEN;
4010 msgptr[msglen++] = MSG_EXT_WDTR;
4011 msgptr[msglen++] = tp->tinfo.goal.width;
4012 if (DEBUG_FLAGS & DEBUG_NEGO) {
4013 PRINT_ADDR(ccb);
4014 kprintf ("wide msgout: ");
4015 ncr_show_msg (&cp->scsi_smsg [msglen-4]);
4016 kprintf (".\n");
4017 };
4018 break;
4019 }
4020
4021 /*----------------------------------------------------
4022 **
4023 ** Build the identify message for getcc.
4024 **
4025 **----------------------------------------------------
4026 */
4027
4028 cp->scsi_smsg2 [0] = idmsg;
4029 msglen2 = 1;
4030
4031 /*----------------------------------------------------
4032 **
4033 ** Build the data descriptors
4034 **
4035 **----------------------------------------------------
4036 */
4037
4038 /* XXX JGibbs - Handle other types of I/O */
4039 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
4040 segments = ncr_scatter(&cp->phys,
4041 (vm_offset_t)csio->data_ptr,
4042 (vm_size_t)csio->dxfer_len);
4043
4044 if (segments < 0) {
4045 ccb->ccb_h.status = CAM_REQ_TOO_BIG;
4046 ncr_free_nccb(np, cp);
4047 crit_exit();
4048 xpt_done(ccb);
4049 return;
4050 }
4051 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
4052 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_in);
4053 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4054 } else { /* CAM_DIR_OUT */
4055 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_out);
4056 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4057 }
4058 } else {
4059 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, no_data);
4060 cp->phys.header.goalp = cp->phys.header.savep;
4061 }
4062
4063 cp->phys.header.lastp = cp->phys.header.savep;
4064
4065
4066 /*----------------------------------------------------
4067 **
4068 ** fill in nccb
4069 **
4070 **----------------------------------------------------
4071 **
4072 **
4073 ** physical -> virtual backlink
4074 ** Generic SCSI command
4075 */
4076 cp->phys.header.cp = cp;
4077 /*
4078 ** Startqueue
4079 */
4080 cp->phys.header.launch.l_paddr = NCB_SCRIPT_PHYS (np, select);
4081 cp->phys.header.launch.l_cmd = SCR_JUMP;
4082 /*
4083 ** select
4084 */
4085 cp->phys.select.sel_id = ccb->ccb_h.target_id;
4086 cp->phys.select.sel_scntl3 = tp->tinfo.wval;
4087 cp->phys.select.sel_sxfer = tp->tinfo.sval;
4088 /*
4089 ** message
4090 */
4091 cp->phys.smsg.addr = CCB_PHYS (cp, scsi_smsg);
4092 cp->phys.smsg.size = msglen;
4093
4094 cp->phys.smsg2.addr = CCB_PHYS (cp, scsi_smsg2);
4095 cp->phys.smsg2.size = msglen2;
4096 /*
4097 ** command
4098 */
4099 /* XXX JGibbs - Support other command types */
4100 cp->phys.cmd.addr = vtophys (csio->cdb_io.cdb_bytes);
4101 cp->phys.cmd.size = csio->cdb_len;
4102 /*
4103 ** sense command
4104 */
4105 cp->phys.scmd.addr = CCB_PHYS (cp, sensecmd);
4106 cp->phys.scmd.size = 6;
4107 /*
4108 ** patch requested size into sense command
4109 */
4110 cp->sensecmd[0] = 0x03;
4111 cp->sensecmd[1] = ccb->ccb_h.target_lun << 5;
4112 cp->sensecmd[4] = sizeof(struct scsi_sense_data);
4113 cp->sensecmd[4] = csio->sense_len;
4114 /*
4115 ** sense data
4116 */
4117 cp->phys.sense.addr = vtophys (&csio->sense_data);
4118 cp->phys.sense.size = csio->sense_len;
4119 /*
4120 ** status
4121 */
4122 cp->actualquirks = QUIRK_NOMSG;
4123 cp->host_status = nego ? HS_NEGOTIATE : HS_BUSY;
4124 cp->s_status = SCSI_STATUS_ILLEGAL;
4125 cp->parity_status = 0;
4126
4127 cp->xerr_status = XE_OK;
4128 cp->sync_status = tp->tinfo.sval;
4129 cp->nego_status = nego;
4130 cp->wide_status = tp->tinfo.wval;
4131
4132 /*----------------------------------------------------
4133 **
4134 ** Critical region: start this job.
4135 **
4136 **----------------------------------------------------
4137 */
4138
4139 /*
4140 ** reselect pattern and activate this job.
4141 */
4142
4143 cp->jump_nccb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (cp->tag)));
4144 cp->tlimit = time_uptime
4145 + ccb->ccb_h.timeout / 1000 + 2;
4146 cp->magic = CCB_MAGIC;
4147
4148 /*
4149 ** insert into start queue.
4150 */
4151
4152 qidx = np->squeueput + 1;
4153 if (qidx >= MAX_START)
4154 qidx = 0;
4155 np->squeue [qidx ] = NCB_SCRIPT_PHYS (np, idle);
4156 np->squeue [np->squeueput] = CCB_PHYS (cp, phys);
4157 np->squeueput = qidx;
4158
4159 if(DEBUG_FLAGS & DEBUG_QUEUE)
4160 kprintf("%s: queuepos=%d tryoffset=%d.\n",
4161 ncr_name (np), np->squeueput,
4162 (unsigned)(READSCRIPT(startpos[0]) -
4163 (NCB_SCRIPTH_PHYS (np, tryloop))));
4164
4165 /*
4166 ** Script processor may be waiting for reselect.
4167 ** Wake it up.
4168 */
4169 OUTB (nc_istat, SIGP);
4170
4171 /*
4172 ** and reenable interrupts
4173 */
4174 crit_exit();
4175 break;
4176 }
4177 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
4178 case XPT_EN_LUN: /* Enable LUN as a target */
4179 case XPT_TARGET_IO: /* Execute target I/O request */
4180 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
4181 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
4182 case XPT_ABORT: /* Abort the specified CCB */
4183 /* XXX Implement */
4184 ccb->ccb_h.status = CAM_REQ_INVALID;
4185 xpt_done(ccb);
4186 break;
4187 case XPT_SET_TRAN_SETTINGS:
4188 {
4189 struct ccb_trans_settings *cts = &ccb->cts;
4190 tcb_p tp;
4191 u_int update_type;
4192 struct ccb_trans_settings_scsi *scsi =
4193 &cts->proto_specific.scsi;
4194 struct ccb_trans_settings_spi *spi =
4195 &cts->xport_specific.spi;
4196
4197 update_type = 0;
4198 if (cts->type == CTS_TYPE_CURRENT_SETTINGS)
4199 update_type |= NCR_TRANS_GOAL;
4200 if (cts->type == CTS_TYPE_USER_SETTINGS)
4201 update_type |= NCR_TRANS_USER;
4202
4203 crit_enter();
4204 tp = &np->target[ccb->ccb_h.target_id];
4205 /* Tag and disc enables */
4206 if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
4207 if (update_type & NCR_TRANS_GOAL) {
4208 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
4209 tp->tinfo.disc_tag |= NCR_CUR_DISCENB;
4210 else
4211 tp->tinfo.disc_tag &= ~NCR_CUR_DISCENB;
4212 }
4213
4214 if (update_type & NCR_TRANS_USER) {
4215 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
4216 tp->tinfo.disc_tag |= NCR_USR_DISCENB;
4217 else
4218 tp->tinfo.disc_tag &= ~NCR_USR_DISCENB;
4219 }
4220
4221 }
4222
4223 if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
4224 if (update_type & NCR_TRANS_GOAL) {
4225 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
4226 tp->tinfo.disc_tag |= NCR_CUR_TAGENB;
4227 else
4228 tp->tinfo.disc_tag &= ~NCR_CUR_TAGENB;
4229 }
4230
4231 if (update_type & NCR_TRANS_USER) {
4232 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
4233 tp->tinfo.disc_tag |= NCR_USR_TAGENB;
4234 else
4235 tp->tinfo.disc_tag &= ~NCR_USR_TAGENB;
4236 }
4237 }
4238
4239 /* Filter bus width and sync negotiation settings */
4240 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) {
4241 if (spi->bus_width > np->maxwide)
4242 spi->bus_width = np->maxwide;
4243 }
4244
4245 if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
4246 || ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) {
4247 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) {
4248 if (spi->sync_period != 0
4249 && (spi->sync_period < np->minsync))
4250 spi->sync_period = np->minsync;
4251 }
4252 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0) {
4253 if (spi->sync_offset == 0)
4254 spi->sync_period = 0;
4255 if (spi->sync_offset > np->maxoffs)
4256 spi->sync_offset = np->maxoffs;
4257 }
4258 }
4259 if ((update_type & NCR_TRANS_USER) != 0) {
4260 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
4261 tp->tinfo.user.period = spi->sync_period;
4262 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
4263 tp->tinfo.user.offset = spi->sync_offset;
4264 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
4265 tp->tinfo.user.width = spi->bus_width;
4266 }
4267 if ((update_type & NCR_TRANS_GOAL) != 0) {
4268 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
4269 tp->tinfo.goal.period = spi->sync_period;
4270
4271 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
4272 tp->tinfo.goal.offset = spi->sync_offset;
4273
4274 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
4275 tp->tinfo.goal.width = spi->bus_width;
4276 }
4277 crit_exit();
4278 ccb->ccb_h.status = CAM_REQ_CMP;
4279 xpt_done(ccb);
4280 break;
4281 }
4282 case XPT_GET_TRAN_SETTINGS:
4283 /* Get default/user set transfer settings for the target */
4284 {
4285 struct ccb_trans_settings *cts = &ccb->cts;
4286 struct ncr_transinfo *tinfo;
4287 tcb_p tp = &np->target[ccb->ccb_h.target_id];
4288 struct ccb_trans_settings_scsi *scsi =
4289 &cts->proto_specific.scsi;
4290 struct ccb_trans_settings_spi *spi =
4291 &cts->xport_specific.spi;
4292
4293 cts->protocol = PROTO_SCSI;
4294 cts->protocol_version = SCSI_REV_2;
4295 cts->transport = XPORT_SPI;
4296 cts->transport_version = 2;
4297
4298 crit_enter();
4299 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
4300 tinfo = &tp->tinfo.current;
4301 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
4302 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
4303 else
4304 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
4305
4306 if (tp->tinfo.disc_tag & NCR_CUR_TAGENB)
4307 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
4308 else
4309 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
4310 } else {
4311 tinfo = &tp->tinfo.user;
4312 if (tp->tinfo.disc_tag & NCR_USR_DISCENB)
4313 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
4314 else
4315 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
4316
4317 if (tp->tinfo.disc_tag & NCR_USR_TAGENB)
4318 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
4319 else
4320 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
4321 }
4322
4323 spi->sync_period = tinfo->period;
4324 spi->sync_offset = tinfo->offset;
4325 spi->bus_width = tinfo->width;
4326
4327 crit_exit();
4328 spi->valid = CTS_SPI_VALID_SYNC_RATE
4329 | CTS_SPI_VALID_SYNC_OFFSET
4330 | CTS_SPI_VALID_BUS_WIDTH
4331 | CTS_SPI_VALID_DISC;
4332 scsi->valid = CTS_SCSI_VALID_TQ;
4333
4334 ccb->ccb_h.status = CAM_REQ_CMP;
4335 xpt_done(ccb);
4336 break;
4337 }
4338 case XPT_CALC_GEOMETRY:
4339 {
4340 struct ccb_calc_geometry *ccg;
4341 u_int32_t size_mb;
4342 u_int32_t secs_per_cylinder;
4343 int extended;
4344
4345 /* XXX JGibbs - I'm sure the NCR uses a different strategy,
4346 * but it should be able to deal with Adaptec
4347 * geometry too.
4348 */
4349 extended = 1;
4350 ccg = &ccb->ccg;
4351 size_mb = ccg->volume_size
4352 / ((1024L * 1024L) / ccg->block_size);
4353
4354 if (size_mb > 1024 && extended) {
4355 ccg->heads = 255;
4356 ccg->secs_per_track = 63;
4357 } else {
4358 ccg->heads = 64;
4359 ccg->secs_per_track = 32;
4360 }
4361 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
4362 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
4363 ccb->ccb_h.status = CAM_REQ_CMP;
4364 xpt_done(ccb);
4365 break;
4366 }
4367 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
4368 {
4369 OUTB (nc_scntl1, CRST);
4370 ccb->ccb_h.status = CAM_REQ_CMP;
4371 DELAY(10000); /* Wait until our interrupt handler sees it */
4372 xpt_done(ccb);
4373 break;
4374 }
4375 case XPT_TERM_IO: /* Terminate the I/O process */
4376 /* XXX Implement */
4377 ccb->ccb_h.status = CAM_REQ_INVALID;
4378 xpt_done(ccb);
4379 break;
4380 case XPT_PATH_INQ: /* Path routing inquiry */
4381 {
4382 struct ccb_pathinq *cpi = &ccb->cpi;
4383
4384 cpi->version_num = 1; /* XXX??? */
4385 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
4386 if ((np->features & FE_WIDE) != 0)
4387 cpi->hba_inquiry |= PI_WIDE_16;
4388 cpi->target_sprt = 0;
4389 cpi->hba_misc = 0;
4390 cpi->hba_eng_cnt = 0;
4391 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
4392 cpi->max_lun = MAX_LUN - 1;
4393 cpi->initiator_id = np->myaddr;
4394 cpi->bus_id = cam_sim_bus(sim);
4395 cpi->base_transfer_speed = 3300;
4396 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
4397 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
4398 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
4399 cpi->unit_number = cam_sim_unit(sim);
4400 cpi->transport = XPORT_SPI;
4401 cpi->transport_version = 2;
4402 cpi->protocol = PROTO_SCSI;
4403 cpi->protocol_version = SCSI_REV_2;
4404 cpi->ccb_h.status = CAM_REQ_CMP;
4405 xpt_done(ccb);
4406 break;
4407 }
4408 default:
4409 ccb->ccb_h.status = CAM_REQ_INVALID;
4410 xpt_done(ccb);
4411 break;
4412 }
4413 }
4414
4415 /*==========================================================
4416 **
4417 **
4418 ** Complete execution of a SCSI command.
4419 ** Signal completion to the generic SCSI driver.
4420 **
4421 **
4422 **==========================================================
4423 */
4424
4425 void
4426 ncr_complete (ncb_p np, nccb_p cp)
4427 {
4428 union ccb *ccb;
4429 tcb_p tp;
4430
4431 /*
4432 ** Sanity check
4433 */
4434
4435 if (!cp || (cp->magic!=CCB_MAGIC) || !cp->ccb) return;
4436 cp->magic = 1;
4437 cp->tlimit= 0;
4438
4439 /*
4440 ** No Reselect anymore.
4441 */
4442 cp->jump_nccb.l_cmd = (SCR_JUMP);
4443
4444 /*
4445 ** No starting.
4446 */
4447 cp->phys.header.launch.l_paddr= NCB_SCRIPT_PHYS (np, idle);
4448
4449 /*
4450 ** timestamp
4451 */
4452 ncb_profile (np, cp);
4453
4454 if (DEBUG_FLAGS & DEBUG_TINY)
4455 kprintf ("CCB=%x STAT=%x/%x\n", (int)(intptr_t)cp & 0xfff,
4456 cp->host_status,cp->s_status);
4457
4458 ccb = cp->ccb;
4459 cp->ccb = NULL;
4460 tp = &np->target[ccb->ccb_h.target_id];
4461
4462 /*
4463 ** We do not queue more than 1 nccb per target
4464 ** with negotiation at any time. If this nccb was
4465 ** used for negotiation, clear this info in the tcb.
4466 */
4467
4468 if (cp == tp->nego_cp)
4469 tp->nego_cp = NULL;
4470
4471 /*
4472 ** Check for parity errors.
4473 */
4474 /* XXX JGibbs - What about reporting them??? */
4475
4476 if (cp->parity_status) {
4477 PRINT_ADDR(ccb);
4478 kprintf ("%d parity error(s), fallback.\n", cp->parity_status);
4479 /*
4480 ** fallback to asynch transfer.
4481 */
4482 tp->tinfo.goal.period = 0;
4483 tp->tinfo.goal.offset = 0;
4484 }
4485
4486 /*
4487 ** Check for extended errors.
4488 */
4489
4490 if (cp->xerr_status != XE_OK) {
4491 PRINT_ADDR(ccb);
4492 switch (cp->xerr_status) {
4493 case XE_EXTRA_DATA:
4494 kprintf ("extraneous data discarded.\n");
4495 break;
4496 case XE_BAD_PHASE:
4497 kprintf ("illegal scsi phase (4/5).\n");
4498 break;
4499 default:
4500 kprintf ("extended error %d.\n", cp->xerr_status);
4501 break;
4502 }
4503 if (cp->host_status==HS_COMPLETE)
4504 cp->host_status = HS_FAIL;
4505 }
4506
4507 /*
4508 ** Check the status.
4509 */
4510 if (cp->host_status == HS_COMPLETE) {
4511
4512 if (cp->s_status == SCSI_STATUS_OK) {
4513
4514 /*
4515 ** All went well.
4516 */
4517 /* XXX JGibbs - Properly calculate residual */
4518
4519 tp->bytes += ccb->csio.dxfer_len;
4520 tp->transfers ++;
4521
4522 ccb->ccb_h.status = CAM_REQ_CMP;
4523 } else if ((cp->s_status & SCSI_STATUS_SENSE) != 0) {
4524
4525 /*
4526 * XXX Could be TERMIO too. Should record
4527 * original status.
4528 */
4529 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
4530 cp->s_status &= ~SCSI_STATUS_SENSE;
4531 if (cp->s_status == SCSI_STATUS_OK) {
4532 ccb->ccb_h.status =
4533 CAM_AUTOSNS_VALID|CAM_SCSI_STATUS_ERROR;
4534 } else {
4535 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
4536 }
4537 } else {
4538 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
4539 ccb->csio.scsi_status = cp->s_status;
4540 }
4541
4542
4543 } else if (cp->host_status == HS_SEL_TIMEOUT) {
4544
4545 /*
4546 ** Device failed selection
4547 */
4548 ccb->ccb_h.status = CAM_SEL_TIMEOUT;
4549
4550 } else if (cp->host_status == HS_TIMEOUT) {
4551
4552 /*
4553 ** No response
4554 */
4555 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4556 } else if (cp->host_status == HS_STALL) {
4557 ccb->ccb_h.status = CAM_REQUEUE_REQ;
4558 } else {
4559
4560 /*
4561 ** Other protocol messes
4562 */
4563 PRINT_ADDR(ccb);
4564 kprintf ("COMMAND FAILED (%x %x) @%p.\n",
4565 cp->host_status, cp->s_status, cp);
4566
4567 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4568 }
4569
4570 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) {
4571 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
4572 ccb->ccb_h.status |= CAM_DEV_QFRZN;
4573 }
4574
4575 /*
4576 ** Free this nccb
4577 */
4578 ncr_free_nccb (np, cp);
4579
4580 /*
4581 ** signal completion to generic driver.
4582 */
4583 xpt_done (ccb);
4584 }
4585
4586 /*==========================================================
4587 **
4588 **
4589 ** Signal all (or one) control block done.
4590 **
4591 **
4592 **==========================================================
4593 */
4594
4595 void
4596 ncr_wakeup (ncb_p np, u_long code)
4597 {
4598 /*
4599 ** Starting at the default nccb and following
4600 ** the links, complete all jobs with a
4601 ** host_status greater than "disconnect".
4602 **
4603 ** If the "code" parameter is not zero,
4604 ** complete all jobs that are not IDLE.
4605 */
4606
4607 nccb_p cp = np->link_nccb;
4608 while (cp) {
4609 switch (cp->host_status) {
4610
4611 case HS_IDLE:
4612 break;
4613
4614 case HS_DISCONNECT:
4615 if(DEBUG_FLAGS & DEBUG_TINY) kprintf ("D");
4616 /* fall through */
4617
4618 case HS_BUSY:
4619 case HS_NEGOTIATE:
4620 if (!code) break;
4621 cp->host_status = code;
4622
4623 /* fall through */
4624
4625 default:
4626 ncr_complete (np, cp);
4627 break;
4628 }
4629 cp = cp -> link_nccb;
4630 }
4631 }
4632
4633 static void
4634 ncr_freeze_devq (ncb_p np, struct cam_path *path)
4635 {
4636 nccb_p cp;
4637 int i;
4638 int count;
4639 int firstskip;
4640 /*
4641 ** Starting at the first nccb and following
4642 ** the links, complete all jobs that match
4643 ** the passed in path and are in the start queue.
4644 */
4645
4646 cp = np->link_nccb;
4647 count = 0;
4648 firstskip = 0;
4649 while (cp) {
4650 switch (cp->host_status) {
4651
4652 case HS_BUSY:
4653 case HS_NEGOTIATE:
4654 if ((cp->phys.header.launch.l_paddr
4655 == NCB_SCRIPT_PHYS (np, select))
4656 && (xpt_path_comp(path, cp->ccb->ccb_h.path) >= 0)) {
4657
4658 /* Mark for removal from the start queue */
4659 for (i = 1; i < MAX_START; i++) {
4660 int idx;
4661
4662 idx = np->squeueput - i;
4663
4664 if (idx < 0)
4665 idx = MAX_START + idx;
4666 if (np->squeue[idx]
4667 == CCB_PHYS(cp, phys)) {
4668 np->squeue[idx] =
4669 NCB_SCRIPT_PHYS (np, skip);
4670 if (i > firstskip)
4671 firstskip = i;
4672 break;
4673 }
4674 }
4675 cp->host_status=HS_STALL;
4676 ncr_complete (np, cp);
4677 count++;
4678 }
4679 break;
4680 default:
4681 break;
4682 }
4683 cp = cp->link_nccb;
4684 }
4685
4686 if (count > 0) {
4687 int j;
4688 int bidx;
4689
4690 /* Compress the start queue */
4691 j = 0;
4692 bidx = np->squeueput;
4693 i = np->squeueput - firstskip;
4694 if (i < 0)
4695 i = MAX_START + i;
4696 for (;;) {
4697
4698 bidx = i - j;
4699 if (bidx < 0)
4700 bidx = MAX_START + bidx;
4701
4702 if (np->squeue[i] == NCB_SCRIPT_PHYS (np, skip)) {
4703 j++;
4704 } else if (j != 0) {
4705 np->squeue[bidx] = np->squeue[i];
4706 if (np->squeue[bidx]
4707 == NCB_SCRIPT_PHYS(np, idle))
4708 break;
4709 }
4710 i = (i + 1) % MAX_START;
4711 }
4712 np->squeueput = bidx;
4713 }
4714 }
4715
4716 /*==========================================================
4717 **
4718 **
4719 ** Start NCR chip.
4720 **
4721 **
4722 **==========================================================
4723 */
4724
4725 void
4726 ncr_init(ncb_p np, char * msg, u_long code)
4727 {
4728 int i;
4729
4730 /*
4731 ** Reset chip.
4732 */
4733
4734 OUTB (nc_istat, SRST);
4735 DELAY (1000);
4736 OUTB (nc_istat, 0);
4737
4738 /*
4739 ** Message.
4740 */
4741
4742 if (msg) kprintf ("%s: restart (%s).\n", ncr_name (np), msg);
4743
4744 /*
4745 ** Clear Start Queue
4746 */
4747
4748 for (i=0;i<MAX_START;i++)
4749 np -> squeue [i] = NCB_SCRIPT_PHYS (np, idle);
4750
4751 /*
4752 ** Start at first entry.
4753 */
4754
4755 np->squeueput = 0;
4756 WRITESCRIPT(startpos[0], NCB_SCRIPTH_PHYS (np, tryloop));
4757 WRITESCRIPT(start0 [0], SCR_INT ^ IFFALSE (0));
4758
4759 /*
4760 ** Wakeup all pending jobs.
4761 */
4762
4763 ncr_wakeup (np, code);
4764
4765 /*
4766 ** Init chip.
4767 */
4768
4769 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort ... */
4770 OUTB (nc_scntl0, 0xca ); /* full arb., ena parity, par->ATN */
4771 OUTB (nc_scntl1, 0x00 ); /* odd parity, and remove CRST!! */
4772 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
4773 OUTB (nc_scid , RRE|np->myaddr);/* host adapter SCSI address */
4774 OUTW (nc_respid, 1ul<<np->myaddr);/* id to respond to */
4775 OUTB (nc_istat , SIGP ); /* Signal Process */
4776 OUTB (nc_dmode , np->rv_dmode); /* XXX modify burstlen ??? */
4777 OUTB (nc_dcntl , np->rv_dcntl);
4778 OUTB (nc_ctest3, np->rv_ctest3);
4779 OUTB (nc_ctest5, np->rv_ctest5);
4780 OUTB (nc_ctest4, np->rv_ctest4);/* enable master parity checking */
4781 OUTB (nc_stest2, np->rv_stest2|EXT); /* Extended Sreq/Sack filtering */
4782 OUTB (nc_stest3, TE ); /* TolerANT enable */
4783 OUTB (nc_stime0, 0x0b ); /* HTH = disabled, STO = 0.1 sec. */
4784
4785 if (bootverbose >= 2) {
4786 kprintf ("\tACTUAL values:SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
4787 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
4788 kprintf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
4789 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
4790 }
4791
4792 /*
4793 ** Enable GPIO0 pin for writing if LED support.
4794 */
4795
4796 if (np->features & FE_LED0) {
4797 OUTOFFB (nc_gpcntl, 0x01);
4798 }
4799
4800 /*
4801 ** Fill in target structure.
4802 */
4803 for (i=0;i<MAX_TARGET;i++) {
4804 tcb_p tp = &np->target[i];
4805
4806 tp->tinfo.sval = 0;
4807 tp->tinfo.wval = np->rv_scntl3;
4808
4809 tp->tinfo.current.period = 0;
4810 tp->tinfo.current.offset = 0;
4811 tp->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT;
4812 }
4813
4814 /*
4815 ** enable ints
4816 */
4817
4818 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST);
4819 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
4820
4821 /*
4822 ** Start script processor.
4823 */
4824
4825 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
4826
4827 /*
4828 * Notify the XPT of the event
4829 */
4830 if (code == HS_RESET)
4831 xpt_async(AC_BUS_RESET, np->path, NULL);
4832 }
4833
4834 static void
4835 ncr_poll(struct cam_sim *sim)
4836 {
4837 ncr_intr(cam_sim_softc(sim));
4838 }
4839
4840
4841 /*==========================================================
4842 **
4843 ** Get clock factor and sync divisor for a given
4844 ** synchronous factor period.
4845 ** Returns the clock factor (in sxfer) and scntl3
4846 ** synchronous divisor field.
4847 **
4848 **==========================================================
4849 */
4850
4851 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
4852 {
4853 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
4854 int div = np->clock_divn; /* Number of divisors supported */
4855 u_long fak; /* Sync factor in sxfer */
4856 u_long per; /* Period in tenths of ns */
4857 u_long kpc; /* (per * clk) */
4858
4859 /*
4860 ** Compute the synchronous period in tenths of nano-seconds
4861 */
4862 if (sfac <= 10) per = 250;
4863 else if (sfac == 11) per = 303;
4864 else if (sfac == 12) per = 500;
4865 else per = 40 * sfac;
4866
4867 /*
4868 ** Look for the greatest clock divisor that allows an
4869 ** input speed faster than the period.
4870 */
4871 kpc = per * clk;
4872 while (--div >= 0)
4873 if (kpc >= (div_10M[div] * 4)) break;
4874
4875 /*
4876 ** Calculate the lowest clock factor that allows an output
4877 ** speed not faster than the period.
4878 */
4879 fak = (kpc - 1) / div_10M[div] + 1;
4880
4881 #if 0 /* You can #if 1 if you think this optimization is useful */
4882
4883 per = (fak * div_10M[div]) / clk;
4884
4885 /*
4886 ** Why not to try the immediate lower divisor and to choose
4887 ** the one that allows the fastest output speed ?
4888 ** We dont want input speed too much greater than output speed.
4889 */
4890 if (div >= 1 && fak < 6) {
4891 u_long fak2, per2;
4892 fak2 = (kpc - 1) / div_10M[div-1] + 1;
4893 per2 = (fak2 * div_10M[div-1]) / clk;
4894 if (per2 < per && fak2 <= 6) {
4895 fak = fak2;
4896 per = per2;
4897 --div;
4898 }
4899 }
4900 #endif
4901
4902 if (fak < 4) fak = 4; /* Should never happen, too bad ... */
4903
4904 /*
4905 ** Compute and return sync parameters for the ncr
4906 */
4907 *fakp = fak - 4;
4908 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
4909 }
4910
4911 /*==========================================================
4912 **
4913 ** Switch sync mode for current job and its target
4914 **
4915 **==========================================================
4916 */
4917
4918 static void
4919 ncr_setsync(ncb_p np, nccb_p cp, u_char scntl3, u_char sxfer, u_char period)
4920 {
4921 union ccb *ccb;
4922 struct ccb_trans_settings neg;
4923 tcb_p tp;
4924 int div;
4925 u_int target = INB (nc_sdid) & 0x0f;
4926 u_int period_10ns;
4927
4928 assert (cp);
4929 if (!cp) return;
4930
4931 ccb = cp->ccb;
4932 assert (ccb);
4933 if (!ccb) return;
4934 assert (target == ccb->ccb_h.target_id);
4935
4936 tp = &np->target[target];
4937
4938 if (!scntl3 || !(sxfer & 0x1f))
4939 scntl3 = np->rv_scntl3;
4940 scntl3 = (scntl3 & 0xf0) | (tp->tinfo.wval & EWS)
4941 | (np->rv_scntl3 & 0x07);
4942
4943 /*
4944 ** Deduce the value of controller sync period from scntl3.
4945 ** period is in tenths of nano-seconds.
4946 */
4947
4948 div = ((scntl3 >> 4) & 0x7);
4949 if ((sxfer & 0x1f) && div)
4950 period_10ns =
4951 (((sxfer>>5)+4)*div_10M[div-1])/np->clock_khz;
4952 else
4953 period_10ns = 0;
4954
4955 tp->tinfo.goal.period = period;
4956 tp->tinfo.goal.offset = sxfer & 0x1f;
4957 tp->tinfo.current.period = period;
4958 tp->tinfo.current.offset = sxfer & 0x1f;
4959
4960 /*
4961 ** Stop there if sync parameters are unchanged
4962 */
4963 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
4964 tp->tinfo.sval = sxfer;
4965 tp->tinfo.wval = scntl3;
4966
4967 if (sxfer & 0x1f) {
4968 /*
4969 ** Disable extended Sreq/Sack filtering
4970 */
4971 if (period_10ns <= 2000) OUTOFFB (nc_stest2, EXT);
4972 }
4973
4974 /*
4975 ** Tell the SCSI layer about the
4976 ** new transfer parameters.
4977 */
4978 memset(&neg, 0, sizeof (neg));
4979 neg.protocol = PROTO_SCSI;
4980 neg.protocol_version = SCSI_REV_2;
4981 neg.transport = XPORT_SPI;
4982 neg.transport_version = 2;
4983 neg.xport_specific.spi.sync_period = period;
4984 neg.xport_specific.spi.sync_offset = sxfer & 0x1f;
4985 neg.xport_specific.spi.valid = CTS_SPI_VALID_SYNC_RATE
4986 | CTS_SPI_VALID_SYNC_OFFSET;
4987 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path,
4988 /*priority*/1);
4989 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
4990
4991 /*
4992 ** set actual value and sync_status
4993 */
4994 OUTB (nc_sxfer, sxfer);
4995 np->sync_st = sxfer;
4996 OUTB (nc_scntl3, scntl3);
4997 np->wide_st = scntl3;
4998
4999 /*
5000 ** patch ALL nccbs of this target.
5001 */
5002 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
5003 if (!cp->ccb) continue;
5004 if (cp->ccb->ccb_h.target_id != target) continue;
5005 cp->sync_status = sxfer;
5006 cp->wide_status = scntl3;
5007 }
5008 }
5009
5010 /*==========================================================
5011 **
5012 ** Switch wide mode for current job and its target
5013 ** SCSI specs say: a SCSI device that accepts a WDTR
5014 ** message shall reset the synchronous agreement to
5015 ** asynchronous mode.
5016 **
5017 **==========================================================
5018 */
5019
5020 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack)
5021 {
5022 union ccb *ccb;
5023 struct ccb_trans_settings neg;
5024 u_int target = INB (nc_sdid) & 0x0f;
5025 tcb_p tp;
5026 u_char scntl3;
5027 u_char sxfer;
5028
5029 assert (cp);
5030 if (!cp) return;
5031
5032 ccb = cp->ccb;
5033 assert (ccb);
5034 if (!ccb) return;
5035 assert (target == ccb->ccb_h.target_id);
5036
5037 tp = &np->target[target];
5038 tp->tinfo.current.width = wide;
5039 tp->tinfo.goal.width = wide;
5040 tp->tinfo.current.period = 0;
5041 tp->tinfo.current.offset = 0;
5042
5043 scntl3 = (tp->tinfo.wval & (~EWS)) | (wide ? EWS : 0);
5044
5045 sxfer = ack ? 0 : tp->tinfo.sval;
5046
5047 /*
5048 ** Stop there if sync/wide parameters are unchanged
5049 */
5050 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
5051 tp->tinfo.sval = sxfer;
5052 tp->tinfo.wval = scntl3;
5053
5054 /* Tell the SCSI layer about the new transfer params */
5055 memset(&neg, 0, sizeof (neg));
5056 neg.protocol = PROTO_SCSI;
5057 neg.protocol_version = SCSI_REV_2;
5058 neg.transport = XPORT_SPI;
5059 neg.transport_version = 2;
5060 neg.xport_specific.spi.bus_width = (scntl3 & EWS) ?
5061 MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT;
5062 neg.xport_specific.spi.sync_period = 0;
5063 neg.xport_specific.spi.sync_offset = 0;
5064 neg.xport_specific.spi.valid = CTS_SPI_VALID_SYNC_RATE
5065 | CTS_SPI_VALID_SYNC_OFFSET
5066 | CTS_SPI_VALID_BUS_WIDTH;
5067 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path, /*priority*/1);
5068 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
5069
5070 /*
5071 ** set actual value and sync_status
5072 */
5073 OUTB (nc_sxfer, sxfer);
5074 np->sync_st = sxfer;
5075 OUTB (nc_scntl3, scntl3);
5076 np->wide_st = scntl3;
5077
5078 /*
5079 ** patch ALL nccbs of this target.
5080 */
5081 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
5082 if (!cp->ccb) continue;
5083 if (cp->ccb->ccb_h.target_id != target) continue;
5084 cp->sync_status = sxfer;
5085 cp->wide_status = scntl3;
5086 }
5087 }
5088
5089 /*==========================================================
5090 **
5091 **
5092 ** ncr timeout handler.
5093 **
5094 **
5095 **==========================================================
5096 **
5097 ** Misused to keep the driver running when
5098 ** interrupts are not configured correctly.
5099 **
5100 **----------------------------------------------------------
5101 */
5102
5103 static void
5104 ncr_timeout (void *arg)
5105 {
5106 ncb_p np = arg;
5107 time_t thistime = time_uptime;
5108 ticks_t step = np->ticks;
5109 u_long count = 0;
5110 long t;
5111 nccb_p cp;
5112
5113 if (np->lasttime != thistime) {
5114 /*
5115 ** block ncr interrupts
5116 */
5117 crit_enter();
5118 np->lasttime = thistime;
5119
5120 /*----------------------------------------------------
5121 **
5122 ** handle ncr chip timeouts
5123 **
5124 ** Assumption:
5125 ** We have a chance to arbitrate for the
5126 ** SCSI bus at least every 10 seconds.
5127 **
5128 **----------------------------------------------------
5129 */
5130
5131 t = thistime - np->heartbeat;
5132
5133 if (t<2) np->latetime=0; else np->latetime++;
5134
5135 if (np->latetime>2) {
5136 /*
5137 ** If there are no requests, the script
5138 ** processor will sleep on SEL_WAIT_RESEL.
5139 ** But we have to check whether it died.
5140 ** Let's try to wake it up.
5141 */
5142 OUTB (nc_istat, SIGP);
5143 }
5144
5145 /*----------------------------------------------------
5146 **
5147 ** handle nccb timeouts
5148 **
5149 **----------------------------------------------------
5150 */
5151
5152 for (cp=np->link_nccb; cp; cp=cp->link_nccb) {
5153 /*
5154 ** look for timed out nccbs.
5155 */
5156 if (!cp->host_status) continue;
5157 count++;
5158 if (cp->tlimit > thistime) continue;
5159
5160 /*
5161 ** Disable reselect.
5162 ** Remove it from startqueue.
5163 */
5164 cp->jump_nccb.l_cmd = (SCR_JUMP);
5165 if (cp->phys.header.launch.l_paddr ==
5166 NCB_SCRIPT_PHYS (np, select)) {
5167 kprintf ("%s: timeout nccb=%p (skip)\n",
5168 ncr_name (np), cp);
5169 cp->phys.header.launch.l_paddr
5170 = NCB_SCRIPT_PHYS (np, skip);
5171 }
5172
5173 switch (cp->host_status) {
5174
5175 case HS_BUSY:
5176 case HS_NEGOTIATE:
5177 /* fall through */
5178 case HS_DISCONNECT:
5179 cp->host_status=HS_TIMEOUT;
5180 }
5181 cp->tag = 0;
5182
5183 /*
5184 ** wakeup this nccb.
5185 */
5186 ncr_complete (np, cp);
5187 }
5188 crit_exit();
5189 }
5190
5191 callout_reset(&np->timeout_ch, step ? step : 1, ncr_timeout, np);
5192
5193 if (INB(nc_istat) & (INTF|SIP|DIP)) {
5194
5195 /*
5196 ** Process pending interrupts.
5197 */
5198
5199 crit_enter();
5200 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("{");
5201 ncr_exception (np);
5202 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("}");
5203 crit_exit();
5204 }
5205 }
5206
5207 /*==========================================================
5208 **
5209 ** log message for real hard errors
5210 **
5211 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
5212 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
5213 **
5214 ** exception register:
5215 ** ds: dstat
5216 ** si: sist
5217 **
5218 ** SCSI bus lines:
5219 ** so: control lines as driver by NCR.
5220 ** si: control lines as seen by NCR.
5221 ** sd: scsi data lines as seen by NCR.
5222 **
5223 ** wide/fastmode:
5224 ** sxfer: (see the manual)
5225 ** scntl3: (see the manual)
5226 **
5227 ** current script command:
5228 ** dsp: script adress (relative to start of script).
5229 ** dbc: first word of script command.
5230 **
5231 ** First 16 register of the chip:
5232 ** r0..rf
5233 **
5234 **==========================================================
5235 */
5236
5237 static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
5238 {
5239 u_int32_t dsp;
5240 int script_ofs;
5241 int script_size;
5242 char *script_name;
5243 u_char *script_base;
5244 int i;
5245
5246 dsp = INL (nc_dsp);
5247
5248 if (np->p_script < dsp &&
5249 dsp <= np->p_script + sizeof(struct script)) {
5250 script_ofs = dsp - np->p_script;
5251 script_size = sizeof(struct script);
5252 script_base = (u_char *) np->script;
5253 script_name = "script";
5254 }
5255 else if (np->p_scripth < dsp &&
5256 dsp <= np->p_scripth + sizeof(struct scripth)) {
5257 script_ofs = dsp - np->p_scripth;
5258 script_size = sizeof(struct scripth);
5259 script_base = (u_char *) np->scripth;
5260 script_name = "scripth";
5261 } else {
5262 script_ofs = dsp;
5263 script_size = 0;
5264 script_base = NULL;
5265 script_name = "mem";
5266 }
5267
5268 kprintf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
5269 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
5270 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
5271 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
5272 (unsigned)INL (nc_dbc));
5273
5274 if (((script_ofs & 3) == 0) &&
5275 (unsigned)script_ofs < script_size) {
5276 kprintf ("%s: script cmd = %08x\n", ncr_name(np),
5277 (int)READSCRIPT_OFF(script_base, script_ofs));
5278 }
5279
5280 kprintf ("%s: regdump:", ncr_name(np));
5281 for (i=0; i<16;i++)
5282 kprintf (" %02x", (unsigned)INB_OFF(i));
5283 kprintf (".\n");
5284 }
5285
5286 /*==========================================================
5287 **
5288 **
5289 ** ncr chip exception handler.
5290 **
5291 **
5292 **==========================================================
5293 */
5294
5295 void ncr_exception (ncb_p np)
5296 {
5297 u_char istat, dstat;
5298 u_short sist;
5299
5300 /*
5301 ** interrupt on the fly ?
5302 */
5303 while ((istat = INB (nc_istat)) & INTF) {
5304 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("F ");
5305 OUTB (nc_istat, INTF);
5306 np->profile.num_fly++;
5307 ncr_wakeup (np, 0);
5308 }
5309 if (!(istat & (SIP|DIP))) {
5310 return;
5311 }
5312
5313 /*
5314 ** Steinbach's Guideline for Systems Programming:
5315 ** Never test for an error condition you don't know how to handle.
5316 */
5317
5318 sist = (istat & SIP) ? INW (nc_sist) : 0;
5319 dstat = (istat & DIP) ? INB (nc_dstat) : 0;
5320 np->profile.num_int++;
5321
5322 if (DEBUG_FLAGS & DEBUG_TINY)
5323 kprintf ("<%d|%x:%x|%x:%x>",
5324 INB(nc_scr0),
5325 dstat,sist,
5326 (unsigned)INL(nc_dsp),
5327 (unsigned)INL(nc_dbc));
5328 if ((dstat==DFE) && (sist==PAR)) return;
5329
5330 /*==========================================================
5331 **
5332 ** First the normal cases.
5333 **
5334 **==========================================================
5335 */
5336 /*-------------------------------------------
5337 ** SCSI reset
5338 **-------------------------------------------
5339 */
5340
5341 if (sist & RST) {
5342 ncr_init (np, bootverbose ? "scsi reset" : NULL, HS_RESET);
5343 return;
5344 }
5345
5346 /*-------------------------------------------
5347 ** selection timeout
5348 **
5349 ** IID excluded from dstat mask!
5350 ** (chip bug)
5351 **-------------------------------------------
5352 */
5353
5354 if ((sist & STO) &&
5355 !(sist & (GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5356 !(dstat & (MDPE|BF|ABRT|SIR))) {
5357 ncr_int_sto (np);
5358 return;
5359 }
5360
5361 /*-------------------------------------------
5362 ** Phase mismatch.
5363 **-------------------------------------------
5364 */
5365
5366 if ((sist & MA) &&
5367 !(sist & (STO|GEN|HTH|SGE|UDC|RST|PAR)) &&
5368 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5369 ncr_int_ma (np, dstat);
5370 return;
5371 }
5372
5373 /*----------------------------------------
5374 ** move command with length 0
5375 **----------------------------------------
5376 */
5377
5378 if ((dstat & IID) &&
5379 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5380 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5381 ((INL(nc_dbc) & 0xf8000000) == SCR_MOVE_TBL)) {
5382 /*
5383 ** Target wants more data than available.
5384 ** The "no_data" script will do it.
5385 */
5386 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, no_data));
5387 return;
5388 }
5389
5390 /*-------------------------------------------
5391 ** Programmed interrupt
5392 **-------------------------------------------
5393 */
5394
5395 if ((dstat & SIR) &&
5396 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5397 !(dstat & (MDPE|BF|ABRT|IID)) &&
5398 (INB(nc_dsps) <= SIR_MAX)) {
5399 ncr_int_sir (np);
5400 return;
5401 }
5402
5403 /*========================================
5404 ** log message for real hard errors
5405 **========================================
5406 */
5407
5408 ncr_log_hard_error(np, sist, dstat);
5409
5410 /*========================================
5411 ** do the register dump
5412 **========================================
5413 */
5414
5415 if (time_uptime - np->regtime > 10) {
5416 int i;
5417 np->regtime = time_uptime;
5418 for (i=0; i<sizeof(np->regdump); i++)
5419 ((volatile char*)&np->regdump)[i] = INB_OFF(i);
5420 np->regdump.nc_dstat = dstat;
5421 np->regdump.nc_sist = sist;
5422 }
5423
5424
5425 /*----------------------------------------
5426 ** clean up the dma fifo
5427 **----------------------------------------
5428 */
5429
5430 if ( (INB(nc_sstat0) & (ILF|ORF|OLF) ) ||
5431 (INB(nc_sstat1) & (FF3210) ) ||
5432 (INB(nc_sstat2) & (ILF1|ORF1|OLF1)) || /* wide .. */
5433 !(dstat & DFE)) {
5434 kprintf ("%s: have to clear fifos.\n", ncr_name (np));
5435 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5436 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5437 /* clear dma fifo */
5438 }
5439
5440 /*----------------------------------------
5441 ** handshake timeout
5442 **----------------------------------------
5443 */
5444
5445 if (sist & HTH) {
5446 kprintf ("%s: handshake timeout\n", ncr_name(np));
5447 OUTB (nc_scntl1, CRST);
5448 DELAY (1000);
5449 OUTB (nc_scntl1, 0x00);
5450 OUTB (nc_scr0, HS_FAIL);
5451 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5452 return;
5453 }
5454
5455 /*----------------------------------------
5456 ** unexpected disconnect
5457 **----------------------------------------
5458 */
5459
5460 if ((sist & UDC) &&
5461 !(sist & (STO|GEN|HTH|MA|SGE|RST|PAR)) &&
5462 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5463 OUTB (nc_scr0, HS_UNEXPECTED);
5464 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5465 return;
5466 }
5467
5468 /*----------------------------------------
5469 ** cannot disconnect
5470 **----------------------------------------
5471 */
5472
5473 if ((dstat & IID) &&
5474 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5475 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5476 ((INL(nc_dbc) & 0xf8000000) == SCR_WAIT_DISC)) {
5477 /*
5478 ** Unexpected data cycle while waiting for disconnect.
5479 */
5480 if (INB(nc_sstat2) & LDSC) {
5481 /*
5482 ** It's an early reconnect.
5483 ** Let's continue ...
5484 */
5485 OUTB (nc_dcntl, np->rv_dcntl | STD);
5486 /*
5487 ** info message
5488 */
5489 kprintf ("%s: INFO: LDSC while IID.\n",
5490 ncr_name (np));
5491 return;
5492 }
5493 kprintf ("%s: target %d doesn't release the bus.\n",
5494 ncr_name (np), INB (nc_sdid)&0x0f);
5495 /*
5496 ** return without restarting the NCR.
5497 ** timeout will do the real work.
5498 */
5499 return;
5500 }
5501
5502 /*----------------------------------------
5503 ** single step
5504 **----------------------------------------
5505 */
5506
5507 if ((dstat & SSI) &&
5508 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5509 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5510 OUTB (nc_dcntl, np->rv_dcntl | STD);
5511 return;
5512 }
5513
5514 /*
5515 ** @RECOVER@ HTH, SGE, ABRT.
5516 **
5517 ** We should try to recover from these interrupts.
5518 ** They may occur if there are problems with synch transfers, or
5519 ** if targets are switched on or off while the driver is running.
5520 */
5521
5522 if (sist & SGE) {
5523 /* clear scsi offsets */
5524 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5525 }
5526
5527 /*
5528 ** Freeze controller to be able to read the messages.
5529 */
5530
5531 if (DEBUG_FLAGS & DEBUG_FREEZE) {
5532 int i;
5533 unsigned char val;
5534 for (i=0; i<0x60; i++) {
5535 switch (i%16) {
5536
5537 case 0:
5538 kprintf ("%s: reg[%d0]: ",
5539 ncr_name(np),i/16);
5540 break;
5541 case 4:
5542 case 8:
5543 case 12:
5544 kprintf (" ");
5545 break;
5546 }
5547 val = bus_space_read_1(np->bst, np->bsh, i);
5548 kprintf (" %x%x", val/16, val%16);
5549 if (i%16==15) kprintf (".\n");
5550 }
5551
5552 callout_stop(&np->timeout_ch);
5553
5554 kprintf ("%s: halted!\n", ncr_name(np));
5555 /*
5556 ** don't restart controller ...
5557 */
5558 OUTB (nc_istat, SRST);
5559 return;
5560 }
5561
5562 #ifdef NCR_FREEZE
5563 /*
5564 ** Freeze system to be able to read the messages.
5565 */
5566 kprintf ("ncr: fatal error: system halted - press reset to reboot ...");
5567 crit_enter();
5568 for (;;);
5569 #endif
5570
5571 /*
5572 ** sorry, have to kill ALL jobs ...
5573 */
5574
5575 ncr_init (np, "fatal error", HS_FAIL);
5576 }
5577
5578 /*==========================================================
5579 **
5580 ** ncr chip exception handler for selection timeout
5581 **
5582 **==========================================================
5583 **
5584 ** There seems to be a bug in the 53c810.
5585 ** Although a STO-Interrupt is pending,
5586 ** it continues executing script commands.
5587 ** But it will fail and interrupt (IID) on
5588 ** the next instruction where it's looking
5589 ** for a valid phase.
5590 **
5591 **----------------------------------------------------------
5592 */
5593
5594 void ncr_int_sto (ncb_p np)
5595 {
5596 u_long dsa, scratcha, diff;
5597 nccb_p cp;
5598 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("T");
5599
5600 /*
5601 ** look for nccb and set the status.
5602 */
5603
5604 dsa = INL (nc_dsa);
5605 cp = np->link_nccb;
5606 while (cp && (CCB_PHYS (cp, phys) != dsa))
5607 cp = cp->link_nccb;
5608
5609 if (cp) {
5610 cp-> host_status = HS_SEL_TIMEOUT;
5611 ncr_complete (np, cp);
5612 }
5613
5614 /*
5615 ** repair start queue
5616 */
5617
5618 scratcha = INL (nc_scratcha);
5619 diff = scratcha - NCB_SCRIPTH_PHYS (np, tryloop);
5620
5621 /* assert ((diff <= MAX_START * 20) && !(diff % 20));*/
5622
5623 if ((diff <= MAX_START * 20) && !(diff % 20)) {
5624 WRITESCRIPT(startpos[0], scratcha);
5625 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
5626 return;
5627 }
5628 ncr_init (np, "selection timeout", HS_FAIL);
5629 }
5630
5631 /*==========================================================
5632 **
5633 **
5634 ** ncr chip exception handler for phase errors.
5635 **
5636 **
5637 **==========================================================
5638 **
5639 ** We have to construct a new transfer descriptor,
5640 ** to transfer the rest of the current block.
5641 **
5642 **----------------------------------------------------------
5643 */
5644
5645 static void ncr_int_ma (ncb_p np, u_char dstat)
5646 {
5647 u_int32_t dbc;
5648 u_int32_t rest;
5649 u_int32_t dsa;
5650 u_int32_t dsp;
5651 u_int32_t nxtdsp;
5652 volatile void *vdsp_base;
5653 size_t vdsp_off;
5654 u_int32_t oadr, olen;
5655 u_int32_t *tblp, *newcmd;
5656 u_char cmd, sbcl, ss0, ss2, ctest5;
5657 u_short delta;
5658 nccb_p cp;
5659
5660 dsp = INL (nc_dsp);
5661 dsa = INL (nc_dsa);
5662 dbc = INL (nc_dbc);
5663 ss0 = INB (nc_sstat0);
5664 ss2 = INB (nc_sstat2);
5665 sbcl= INB (nc_sbcl);
5666
5667 cmd = dbc >> 24;
5668 rest= dbc & 0xffffff;
5669
5670 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
5671 if (ctest5 & DFS)
5672 delta=(((ctest5<<8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff;
5673 else
5674 delta=(INB (nc_dfifo) - rest) & 0x7f;
5675
5676
5677 /*
5678 ** The data in the dma fifo has not been transfered to
5679 ** the target -> add the amount to the rest
5680 ** and clear the data.
5681 ** Check the sstat2 register in case of wide transfer.
5682 */
5683
5684 if (!(dstat & DFE)) rest += delta;
5685 if (ss0 & OLF) rest++;
5686 if (ss0 & ORF) rest++;
5687 if (INB(nc_scntl3) & EWS) {
5688 if (ss2 & OLF1) rest++;
5689 if (ss2 & ORF1) rest++;
5690 }
5691 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
5692 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5693
5694 /*
5695 ** locate matching cp
5696 */
5697 cp = np->link_nccb;
5698 while (cp && (CCB_PHYS (cp, phys) != dsa))
5699 cp = cp->link_nccb;
5700
5701 if (!cp) {
5702 kprintf ("%s: SCSI phase error fixup: CCB already dequeued (%p)\n",
5703 ncr_name (np), (void *) np->header.cp);
5704 return;
5705 }
5706 if (cp != np->header.cp) {
5707 kprintf ("%s: SCSI phase error fixup: CCB address mismatch "
5708 "(%p != %p) np->nccb = %p\n",
5709 ncr_name (np), (void *)cp, (void *)np->header.cp,
5710 (void *)np->link_nccb);
5711 /* return;*/
5712 }
5713
5714 /*
5715 ** find the interrupted script command,
5716 ** and the address at which to continue.
5717 */
5718
5719 if (dsp == vtophys (&cp->patch[2])) {
5720 vdsp_base = cp;
5721 vdsp_off = offsetof(struct nccb, patch[0]);
5722 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5723 } else if (dsp == vtophys (&cp->patch[6])) {
5724 vdsp_base = cp;
5725 vdsp_off = offsetof(struct nccb, patch[4]);
5726 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5727 } else if (dsp > np->p_script &&
5728 dsp <= np->p_script + sizeof(struct script)) {
5729 vdsp_base = np->script;
5730 vdsp_off = dsp - np->p_script - 8;
5731 nxtdsp = dsp;
5732 } else {
5733 vdsp_base = np->scripth;
5734 vdsp_off = dsp - np->p_scripth - 8;
5735 nxtdsp = dsp;
5736 }
5737
5738 /*
5739 ** log the information
5740 */
5741 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) {
5742 kprintf ("P%x%x ",cmd&7, sbcl&7);
5743 kprintf ("RL=%d D=%d SS0=%x ",
5744 (unsigned) rest, (unsigned) delta, ss0);
5745 }
5746 if (DEBUG_FLAGS & DEBUG_PHASE) {
5747 kprintf ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
5748 cp, np->header.cp,
5749 dsp,
5750 nxtdsp, (volatile char*)vdsp_base+vdsp_off, cmd);
5751 }
5752
5753 /*
5754 ** get old startaddress and old length.
5755 */
5756
5757 oadr = READSCRIPT_OFF(vdsp_base, vdsp_off + 1*4);
5758
5759 if (cmd & 0x10) { /* Table indirect */
5760 tblp = (u_int32_t *) ((char*) &cp->phys + oadr);
5761 olen = tblp[0];
5762 oadr = tblp[1];
5763 } else {
5764 tblp = NULL;
5765 olen = READSCRIPT_OFF(vdsp_base, vdsp_off) & 0xffffff;
5766 }
5767
5768 if (DEBUG_FLAGS & DEBUG_PHASE) {
5769 kprintf ("OCMD=%x\nTBLP=%p OLEN=%lx OADR=%lx\n",
5770 (unsigned) (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24),
5771 (void *) tblp,
5772 (u_long) olen,
5773 (u_long) oadr);
5774 }
5775
5776 /*
5777 ** if old phase not dataphase, leave here.
5778 */
5779
5780 if (cmd != (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24)) {
5781 PRINT_ADDR(cp->ccb);
5782 kprintf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
5783 (unsigned)cmd,
5784 (unsigned)READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24);
5785
5786 return;
5787 }
5788 if (cmd & 0x06) {
5789 PRINT_ADDR(cp->ccb);
5790 kprintf ("phase change %x-%x %d@%08x resid=%d.\n",
5791 cmd&7, sbcl&7, (unsigned)olen,
5792 (unsigned)oadr, (unsigned)rest);
5793
5794 OUTB (nc_dcntl, np->rv_dcntl | STD);
5795 return;
5796 }
5797
5798 /*
5799 ** choose the correct patch area.
5800 ** if savep points to one, choose the other.
5801 */
5802
5803 newcmd = cp->patch;
5804 if (cp->phys.header.savep == vtophys (newcmd)) newcmd+=4;
5805
5806 /*
5807 ** fillin the commands
5808 */
5809
5810 newcmd[0] = ((cmd & 0x0f) << 24) | rest;
5811 newcmd[1] = oadr + olen - rest;
5812 newcmd[2] = SCR_JUMP;
5813 newcmd[3] = nxtdsp;
5814
5815 if (DEBUG_FLAGS & DEBUG_PHASE) {
5816 PRINT_ADDR(cp->ccb);
5817 kprintf ("newcmd[%d] %x %x %x %x.\n",
5818 (int)(newcmd - cp->patch),
5819 (unsigned)newcmd[0],
5820 (unsigned)newcmd[1],
5821 (unsigned)newcmd[2],
5822 (unsigned)newcmd[3]);
5823 }
5824 /*
5825 ** fake the return address (to the patch).
5826 ** and restart script processor at dispatcher.
5827 */
5828 np->profile.num_break++;
5829 OUTL (nc_temp, vtophys (newcmd));
5830 if ((cmd & 7) == 0)
5831 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
5832 else
5833 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, checkatn));
5834 }
5835
5836 /*==========================================================
5837 **
5838 **
5839 ** ncr chip exception handler for programmed interrupts.
5840 **
5841 **
5842 **==========================================================
5843 */
5844
5845 static int ncr_show_msg (u_char * msg)
5846 {
5847 u_char i;
5848 kprintf ("%x",*msg);
5849 if (*msg==MSG_EXTENDED) {
5850 for (i=1;i<8;i++) {
5851 if (i-1>msg[1]) break;
5852 kprintf ("-%x",msg[i]);
5853 }
5854 return (i+1);
5855 } else if ((*msg & 0xf0) == 0x20) {
5856 kprintf ("-%x",msg[1]);
5857 return (2);
5858 }
5859 return (1);
5860 }
5861
5862 void ncr_int_sir (ncb_p np)
5863 {
5864 u_char scntl3;
5865 u_char chg, ofs, per, fak, wide;
5866 u_char num = INB (nc_dsps);
5867 nccb_p cp=NULL;
5868 u_long dsa;
5869 u_int target = INB (nc_sdid) & 0x0f;
5870 tcb_p tp = &np->target[target];
5871 int i;
5872 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("I#%d", num);
5873
5874 switch (num) {
5875 case SIR_SENSE_RESTART:
5876 case SIR_STALL_RESTART:
5877 break;
5878
5879 default:
5880 /*
5881 ** lookup the nccb
5882 */
5883 dsa = INL (nc_dsa);
5884 cp = np->link_nccb;
5885 while (cp && (CCB_PHYS (cp, phys) != dsa))
5886 cp = cp->link_nccb;
5887
5888 assert (cp);
5889 if (!cp)
5890 goto out;
5891 assert (cp == np->header.cp);
5892 if (cp != np->header.cp)
5893 goto out;
5894 }
5895
5896 switch (num) {
5897
5898 /*--------------------------------------------------------------------
5899 **
5900 ** Processing of interrupted getcc selects
5901 **
5902 **--------------------------------------------------------------------
5903 */
5904
5905 case SIR_SENSE_RESTART:
5906 /*------------------------------------------
5907 ** Script processor is idle.
5908 ** Look for interrupted "check cond"
5909 **------------------------------------------
5910 */
5911
5912 if (DEBUG_FLAGS & DEBUG_RESTART)
5913 kprintf ("%s: int#%d",ncr_name (np),num);
5914 cp = (nccb_p) 0;
5915 for (i=0; i<MAX_TARGET; i++) {
5916 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf (" t%d", i);
5917 tp = &np->target[i];
5918 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf ("+");
5919 cp = tp->hold_cp;
5920 if (!cp) continue;
5921 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf ("+");
5922 if ((cp->host_status==HS_BUSY) &&
5923 (cp->s_status==SCSI_STATUS_CHECK_COND))
5924 break;
5925 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf ("- (remove)");
5926 tp->hold_cp = cp = (nccb_p) 0;
5927 }
5928
5929 if (cp) {
5930 if (DEBUG_FLAGS & DEBUG_RESTART)
5931 kprintf ("+ restart job ..\n");
5932 OUTL (nc_dsa, CCB_PHYS (cp, phys));
5933 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, getcc));
5934 return;
5935 }
5936
5937 /*
5938 ** no job, resume normal processing
5939 */
5940 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf (" -- remove trap\n");
5941 WRITESCRIPT(start0[0], SCR_INT ^ IFFALSE (0));
5942 break;
5943
5944 case SIR_SENSE_FAILED:
5945 /*-------------------------------------------
5946 ** While trying to select for
5947 ** getting the condition code,
5948 ** a target reselected us.
5949 **-------------------------------------------
5950 */
5951 if (DEBUG_FLAGS & DEBUG_RESTART) {
5952 PRINT_ADDR(cp->ccb);
5953 kprintf ("in getcc reselect by t%d.\n",
5954 INB(nc_ssid) & 0x0f);
5955 }
5956
5957 /*
5958 ** Mark this job
5959 */
5960 cp->host_status = HS_BUSY;
5961 cp->s_status = SCSI_STATUS_CHECK_COND;
5962 np->target[cp->ccb->ccb_h.target_id].hold_cp = cp;
5963
5964 /*
5965 ** And patch code to restart it.
5966 */
5967 WRITESCRIPT(start0[0], SCR_INT);
5968 break;
5969
5970 /*-----------------------------------------------------------------------------
5971 **
5972 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
5973 **
5974 ** We try to negotiate sync and wide transfer only after
5975 ** a successfull inquire command. We look at byte 7 of the
5976 ** inquire data to determine the capabilities if the target.
5977 **
5978 ** When we try to negotiate, we append the negotiation message
5979 ** to the identify and (maybe) simple tag message.
5980 ** The host status field is set to HS_NEGOTIATE to mark this
5981 ** situation.
5982 **
5983 ** If the target doesn't answer this message immidiately
5984 ** (as required by the standard), the SIR_NEGO_FAIL interrupt
5985 ** will be raised eventually.
5986 ** The handler removes the HS_NEGOTIATE status, and sets the
5987 ** negotiated value to the default (async / nowide).
5988 **
5989 ** If we receive a matching answer immediately, we check it
5990 ** for validity, and set the values.
5991 **
5992 ** If we receive a Reject message immediately, we assume the
5993 ** negotiation has failed, and fall back to standard values.
5994 **
5995 ** If we receive a negotiation message while not in HS_NEGOTIATE
5996 ** state, it's a target initiated negotiation. We prepare a
5997 ** (hopefully) valid answer, set our parameters, and send back
5998 ** this answer to the target.
5999 **
6000 ** If the target doesn't fetch the answer (no message out phase),
6001 ** we assume the negotiation has failed, and fall back to default
6002 ** settings.
6003 **
6004 ** When we set the values, we adjust them in all nccbs belonging
6005 ** to this target, in the controller's register, and in the "phys"
6006 ** field of the controller's struct ncb.
6007 **
6008 ** Possible cases: hs sir msg_in value send goto
6009 ** We try try to negotiate:
6010 ** -> target doesnt't msgin NEG FAIL noop defa. - dispatch
6011 ** -> target rejected our msg NEG FAIL reject defa. - dispatch
6012 ** -> target answered (ok) NEG SYNC sdtr set - clrack
6013 ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad
6014 ** -> target answered (ok) NEG WIDE wdtr set - clrack
6015 ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad
6016 ** -> any other msgin NEG FAIL noop defa. - dispatch
6017 **
6018 ** Target tries to negotiate:
6019 ** -> incoming message --- SYNC sdtr set SDTR -
6020 ** -> incoming message --- WIDE wdtr set WDTR -
6021 ** We sent our answer:
6022 ** -> target doesn't msgout --- PROTO ? defa. - dispatch
6023 **
6024 **-----------------------------------------------------------------------------
6025 */
6026
6027 case SIR_NEGO_FAILED:
6028 /*-------------------------------------------------------
6029 **
6030 ** Negotiation failed.
6031 ** Target doesn't send an answer message,
6032 ** or target rejected our message.
6033 **
6034 ** Remove negotiation request.
6035 **
6036 **-------------------------------------------------------
6037 */
6038 OUTB (HS_PRT, HS_BUSY);
6039
6040 /* fall through */
6041
6042 case SIR_NEGO_PROTO:
6043 /*-------------------------------------------------------
6044 **
6045 ** Negotiation failed.
6046 ** Target doesn't fetch the answer message.
6047 **
6048 **-------------------------------------------------------
6049 */
6050
6051 if (DEBUG_FLAGS & DEBUG_NEGO) {
6052 PRINT_ADDR(cp->ccb);
6053 kprintf ("negotiation failed sir=%x status=%x.\n",
6054 num, cp->nego_status);
6055 }
6056
6057 /*
6058 ** any error in negotiation:
6059 ** fall back to default mode.
6060 */
6061 switch (cp->nego_status) {
6062
6063 case NS_SYNC:
6064 ncr_setsync (np, cp, 0, 0xe0, 0);
6065 break;
6066
6067 case NS_WIDE:
6068 ncr_setwide (np, cp, 0, 0);
6069 break;
6070
6071 }
6072 np->msgin [0] = MSG_NOOP;
6073 np->msgout[0] = MSG_NOOP;
6074 cp->nego_status = 0;
6075 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
6076 break;
6077
6078 case SIR_NEGO_SYNC:
6079 /*
6080 ** Synchronous request message received.
6081 */
6082
6083 if (DEBUG_FLAGS & DEBUG_NEGO) {
6084 PRINT_ADDR(cp->ccb);
6085 kprintf ("sync msgin: ");
6086 (void) ncr_show_msg (np->msgin);
6087 kprintf (".\n");
6088 }
6089
6090 /*
6091 ** get requested values.
6092 */
6093
6094 chg = 0;
6095 per = np->msgin[3];
6096 ofs = np->msgin[4];
6097 if (ofs==0) per=255;
6098
6099 /*
6100 ** check values against driver limits.
6101 */
6102 if (per < np->minsync)
6103 {chg = 1; per = np->minsync;}
6104 if (per < tp->tinfo.user.period)
6105 {chg = 1; per = tp->tinfo.user.period;}
6106 if (ofs > tp->tinfo.user.offset)
6107 {chg = 1; ofs = tp->tinfo.user.offset;}
6108
6109 /*
6110 ** Check against controller limits.
6111 */
6112
6113 fak = 7;
6114 scntl3 = 0;
6115 if (ofs != 0) {
6116 ncr_getsync(np, per, &fak, &scntl3);
6117 if (fak > 7) {
6118 chg = 1;
6119 ofs = 0;
6120 }
6121 }
6122 if (ofs == 0) {
6123 fak = 7;
6124 per = 0;
6125 scntl3 = 0;
6126 }
6127
6128 if (DEBUG_FLAGS & DEBUG_NEGO) {
6129 PRINT_ADDR(cp->ccb);
6130 kprintf ("sync: per=%d scntl3=0x%x ofs=%d fak=%d chg=%d.\n",
6131 per, scntl3, ofs, fak, chg);
6132 }
6133
6134 if (INB (HS_PRT) == HS_NEGOTIATE) {
6135 OUTB (HS_PRT, HS_BUSY);
6136 switch (cp->nego_status) {
6137
6138 case NS_SYNC:
6139 /*
6140 ** This was an answer message
6141 */
6142 if (chg) {
6143 /*
6144 ** Answer wasn't acceptable.
6145 */
6146 ncr_setsync (np, cp, 0, 0xe0, 0);
6147 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6148 } else {
6149 /*
6150 ** Answer is ok.
6151 */
6152 ncr_setsync (np,cp,scntl3,(fak<<5)|ofs, per);
6153 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6154 }
6155 return;
6156
6157 case NS_WIDE:
6158 ncr_setwide (np, cp, 0, 0);
6159 break;
6160 }
6161 }
6162
6163 /*
6164 ** It was a request. Set value and
6165 ** prepare an answer message
6166 */
6167
6168 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs, per);
6169
6170 np->msgout[0] = MSG_EXTENDED;
6171 np->msgout[1] = 3;
6172 np->msgout[2] = MSG_EXT_SDTR;
6173 np->msgout[3] = per;
6174 np->msgout[4] = ofs;
6175
6176 cp->nego_status = NS_SYNC;
6177
6178 if (DEBUG_FLAGS & DEBUG_NEGO) {
6179 PRINT_ADDR(cp->ccb);
6180 kprintf ("sync msgout: ");
6181 (void) ncr_show_msg (np->msgout);
6182 kprintf (".\n");
6183 }
6184
6185 if (!ofs) {
6186 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6187 return;
6188 }
6189 np->msgin [0] = MSG_NOOP;
6190
6191 break;
6192
6193 case SIR_NEGO_WIDE:
6194 /*
6195 ** Wide request message received.
6196 */
6197 if (DEBUG_FLAGS & DEBUG_NEGO) {
6198 PRINT_ADDR(cp->ccb);
6199 kprintf ("wide msgin: ");
6200 (void) ncr_show_msg (np->msgin);
6201 kprintf (".\n");
6202 }
6203
6204 /*
6205 ** get requested values.
6206 */
6207
6208 chg = 0;
6209 wide = np->msgin[3];
6210
6211 /*
6212 ** check values against driver limits.
6213 */
6214
6215 if (wide > tp->tinfo.user.width)
6216 {chg = 1; wide = tp->tinfo.user.width;}
6217
6218 if (DEBUG_FLAGS & DEBUG_NEGO) {
6219 PRINT_ADDR(cp->ccb);
6220 kprintf ("wide: wide=%d chg=%d.\n", wide, chg);
6221 }
6222
6223 if (INB (HS_PRT) == HS_NEGOTIATE) {
6224 OUTB (HS_PRT, HS_BUSY);
6225 switch (cp->nego_status) {
6226
6227 case NS_WIDE:
6228 /*
6229 ** This was an answer message
6230 */
6231 if (chg) {
6232 /*
6233 ** Answer wasn't acceptable.
6234 */
6235 ncr_setwide (np, cp, 0, 1);
6236 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6237 } else {
6238 /*
6239 ** Answer is ok.
6240 */
6241 ncr_setwide (np, cp, wide, 1);
6242 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6243 }
6244 return;
6245
6246 case NS_SYNC:
6247 ncr_setsync (np, cp, 0, 0xe0, 0);
6248 break;
6249 }
6250 }
6251
6252 /*
6253 ** It was a request, set value and
6254 ** prepare an answer message
6255 */
6256
6257 ncr_setwide (np, cp, wide, 1);
6258
6259 np->msgout[0] = MSG_EXTENDED;
6260 np->msgout[1] = 2;
6261 np->msgout[2] = MSG_EXT_WDTR;
6262 np->msgout[3] = wide;
6263
6264 np->msgin [0] = MSG_NOOP;
6265
6266 cp->nego_status = NS_WIDE;
6267
6268 if (DEBUG_FLAGS & DEBUG_NEGO) {
6269 PRINT_ADDR(cp->ccb);
6270 kprintf ("wide msgout: ");
6271 (void) ncr_show_msg (np->msgout);
6272 kprintf (".\n");
6273 }
6274 break;
6275
6276 /*--------------------------------------------------------------------
6277 **
6278 ** Processing of special messages
6279 **
6280 **--------------------------------------------------------------------
6281 */
6282
6283 case SIR_REJECT_RECEIVED:
6284 /*-----------------------------------------------
6285 **
6286 ** We received a MSG_MESSAGE_REJECT message.
6287 **
6288 **-----------------------------------------------
6289 */
6290
6291 PRINT_ADDR(cp->ccb);
6292 kprintf ("MSG_MESSAGE_REJECT received (%x:%x).\n",
6293 (unsigned)np->lastmsg, np->msgout[0]);
6294 break;
6295
6296 case SIR_REJECT_SENT:
6297 /*-----------------------------------------------
6298 **
6299 ** We received an unknown message
6300 **
6301 **-----------------------------------------------
6302 */
6303
6304 PRINT_ADDR(cp->ccb);
6305 kprintf ("MSG_MESSAGE_REJECT sent for ");
6306 (void) ncr_show_msg (np->msgin);
6307 kprintf (".\n");
6308 break;
6309
6310 /*--------------------------------------------------------------------
6311 **
6312 ** Processing of special messages
6313 **
6314 **--------------------------------------------------------------------
6315 */
6316
6317 case SIR_IGN_RESIDUE:
6318 /*-----------------------------------------------
6319 **
6320 ** We received an IGNORE RESIDUE message,
6321 ** which couldn't be handled by the script.
6322 **
6323 **-----------------------------------------------
6324 */
6325
6326 PRINT_ADDR(cp->ccb);
6327 kprintf ("MSG_IGN_WIDE_RESIDUE received, but not yet implemented.\n");
6328 break;
6329
6330 case SIR_MISSING_SAVE:
6331 /*-----------------------------------------------
6332 **
6333 ** We received an DISCONNECT message,
6334 ** but the datapointer wasn't saved before.
6335 **
6336 **-----------------------------------------------
6337 */
6338
6339 PRINT_ADDR(cp->ccb);
6340 kprintf ("MSG_DISCONNECT received, but datapointer not saved:\n"
6341 "\tdata=%x save=%x goal=%x.\n",
6342 (unsigned) INL (nc_temp),
6343 (unsigned) np->header.savep,
6344 (unsigned) np->header.goalp);
6345 break;
6346
6347 /*--------------------------------------------------------------------
6348 **
6349 ** Processing of a "SCSI_STATUS_QUEUE_FULL" status.
6350 **
6351 ** XXX JGibbs - We should do the same thing for BUSY status.
6352 **
6353 ** The current command has been rejected,
6354 ** because there are too many in the command queue.
6355 ** We have started too many commands for that target.
6356 **
6357 **--------------------------------------------------------------------
6358 */
6359 case SIR_STALL_QUEUE:
6360 cp->xerr_status = XE_OK;
6361 cp->host_status = HS_COMPLETE;
6362 cp->s_status = SCSI_STATUS_QUEUE_FULL;
6363 ncr_freeze_devq(np, cp->ccb->ccb_h.path);
6364 ncr_complete(np, cp);
6365
6366 /* FALL THROUGH */
6367
6368 case SIR_STALL_RESTART:
6369 /*-----------------------------------------------
6370 **
6371 ** Enable selecting again,
6372 ** if NO disconnected jobs.
6373 **
6374 **-----------------------------------------------
6375 */
6376 /*
6377 ** Look for a disconnected job.
6378 */
6379 cp = np->link_nccb;
6380 while (cp && cp->host_status != HS_DISCONNECT)
6381 cp = cp->link_nccb;
6382
6383 /*
6384 ** if there is one, ...
6385 */
6386 if (cp) {
6387 /*
6388 ** wait for reselection
6389 */
6390 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, reselect));
6391 return;
6392 }
6393
6394 /*
6395 ** else remove the interrupt.
6396 */
6397
6398 kprintf ("%s: queue empty.\n", ncr_name (np));
6399 WRITESCRIPT(start1[0], SCR_INT ^ IFFALSE (0));
6400 break;
6401 }
6402
6403 out:
6404 OUTB (nc_dcntl, np->rv_dcntl | STD);
6405 }
6406
6407 /*==========================================================
6408 **
6409 **
6410 ** Acquire a control block
6411 **
6412 **
6413 **==========================================================
6414 */
6415
6416 static nccb_p ncr_get_nccb
6417 (ncb_p np, u_long target, u_long lun)
6418 {
6419 lcb_p lp;
6420 nccb_p cp = NULL;
6421
6422 /* Keep our timeout handler out */
6423 crit_enter();
6424
6425 /*
6426 ** Lun structure available ?
6427 */
6428
6429 lp = np->target[target].lp[lun];
6430 if (lp) {
6431 cp = lp->next_nccb;
6432
6433 /*
6434 ** Look for free CCB
6435 */
6436
6437 while (cp && cp->magic) {
6438 cp = cp->next_nccb;
6439 }
6440 }
6441
6442 /*
6443 ** if nothing available, create one.
6444 */
6445
6446 if (cp == NULL)
6447 cp = ncr_alloc_nccb(np, target, lun);
6448
6449 if (cp != NULL) {
6450 if (cp->magic) {
6451 kprintf("%s: Bogus free cp found\n", ncr_name(np));
6452 crit_exit();
6453 return (NULL);
6454 }
6455 cp->magic = 1;
6456 }
6457 crit_exit();
6458 return (cp);
6459 }
6460
6461 /*==========================================================
6462 **
6463 **
6464 ** Release one control block
6465 **
6466 **
6467 **==========================================================
6468 */
6469
6470 void ncr_free_nccb (ncb_p np, nccb_p cp)
6471 {
6472 /*
6473 ** sanity
6474 */
6475
6476 assert (cp != NULL);
6477
6478 cp -> host_status = HS_IDLE;
6479 cp -> magic = 0;
6480 }
6481
6482 /*==========================================================
6483 **
6484 **
6485 ** Allocation of resources for Targets/Luns/Tags.
6486 **
6487 **
6488 **==========================================================
6489 */
6490
6491 static nccb_p
6492 ncr_alloc_nccb (ncb_p np, u_long target, u_long lun)
6493 {
6494 tcb_p tp;
6495 lcb_p lp;
6496 nccb_p cp;
6497
6498 assert (np != NULL);
6499
6500 if (target>=MAX_TARGET) return(NULL);
6501 if (lun >=MAX_LUN ) return(NULL);
6502
6503 tp=&np->target[target];
6504
6505 if (!tp->jump_tcb.l_cmd) {
6506
6507 /*
6508 ** initialize it.
6509 */
6510 tp->jump_tcb.l_cmd = (SCR_JUMP^IFFALSE (DATA (0x80 + target)));
6511 tp->jump_tcb.l_paddr = np->jump_tcb.l_paddr;
6512
6513 tp->getscr[0] =
6514 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6515 tp->getscr[1] = vtophys (&tp->tinfo.sval);
6516 tp->getscr[2] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_sxfer);
6517 tp->getscr[3] =
6518 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6519 tp->getscr[4] = vtophys (&tp->tinfo.wval);
6520 tp->getscr[5] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_scntl3);
6521
6522 assert (((offsetof(struct ncr_reg, nc_sxfer) ^
6523 (offsetof(struct tcb ,tinfo)
6524 + offsetof(struct ncr_target_tinfo, sval))) & 3) == 0);
6525 assert (((offsetof(struct ncr_reg, nc_scntl3) ^
6526 (offsetof(struct tcb, tinfo)
6527 + offsetof(struct ncr_target_tinfo, wval))) &3) == 0);
6528
6529 tp->call_lun.l_cmd = (SCR_CALL);
6530 tp->call_lun.l_paddr = NCB_SCRIPT_PHYS (np, resel_lun);
6531
6532 tp->jump_lcb.l_cmd = (SCR_JUMP);
6533 tp->jump_lcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
6534 np->jump_tcb.l_paddr = vtophys (&tp->jump_tcb);
6535 }
6536
6537 /*
6538 ** Logic unit control block
6539 */
6540 lp = tp->lp[lun];
6541 if (!lp) {
6542 /*
6543 ** Allocate a lcb
6544 */
6545 lp = kmalloc (sizeof (struct lcb), M_DEVBUF, M_WAITOK | M_ZERO);
6546
6547 /*
6548 ** Initialize it
6549 */
6550 lp->jump_lcb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (lun)));
6551 lp->jump_lcb.l_paddr = tp->jump_lcb.l_paddr;
6552
6553 lp->call_tag.l_cmd = (SCR_CALL);
6554 lp->call_tag.l_paddr = NCB_SCRIPT_PHYS (np, resel_tag);
6555
6556 lp->jump_nccb.l_cmd = (SCR_JUMP);
6557 lp->jump_nccb.l_paddr = NCB_SCRIPTH_PHYS (np, aborttag);
6558
6559 lp->actlink = 1;
6560
6561 /*
6562 ** Chain into LUN list
6563 */
6564 tp->jump_lcb.l_paddr = vtophys (&lp->jump_lcb);
6565 tp->lp[lun] = lp;
6566
6567 }
6568
6569 /*
6570 ** Allocate a nccb
6571 */
6572 cp = kmalloc (sizeof (struct nccb), M_DEVBUF, M_WAITOK | M_ZERO);
6573
6574 if (DEBUG_FLAGS & DEBUG_ALLOC) {
6575 kprintf ("new nccb @%p.\n", cp);
6576 }
6577
6578 /*
6579 ** Fill in physical addresses
6580 */
6581
6582 cp->p_nccb = vtophys (cp);
6583
6584 /*
6585 ** Chain into reselect list
6586 */
6587 cp->jump_nccb.l_cmd = SCR_JUMP;
6588 cp->jump_nccb.l_paddr = lp->jump_nccb.l_paddr;
6589 lp->jump_nccb.l_paddr = CCB_PHYS (cp, jump_nccb);
6590 cp->call_tmp.l_cmd = SCR_CALL;
6591 cp->call_tmp.l_paddr = NCB_SCRIPT_PHYS (np, resel_tmp);
6592
6593 /*
6594 ** Chain into wakeup list
6595 */
6596 cp->link_nccb = np->link_nccb;
6597 np->link_nccb = cp;
6598
6599 /*
6600 ** Chain into CCB list
6601 */
6602 cp->next_nccb = lp->next_nccb;
6603 lp->next_nccb = cp;
6604
6605 return (cp);
6606 }
6607
6608 /*==========================================================
6609 **
6610 **
6611 ** Build Scatter Gather Block
6612 **
6613 **
6614 **==========================================================
6615 **
6616 ** The transfer area may be scattered among
6617 ** several non adjacent physical pages.
6618 **
6619 ** We may use MAX_SCATTER blocks.
6620 **
6621 **----------------------------------------------------------
6622 */
6623
6624 static int ncr_scatter
6625 (struct dsb* phys, vm_offset_t vaddr, vm_size_t datalen)
6626 {
6627 u_long paddr, pnext;
6628
6629 u_short segment = 0;
6630 u_long segsize, segaddr;
6631 u_long size, csize = 0;
6632 u_long chunk = MAX_SIZE;
6633 int free;
6634
6635 bzero (&phys->data, sizeof (phys->data));
6636 if (!datalen) return (0);
6637
6638 paddr = vtophys (vaddr);
6639
6640 /*
6641 ** insert extra break points at a distance of chunk.
6642 ** We try to reduce the number of interrupts caused
6643 ** by unexpected phase changes due to disconnects.
6644 ** A typical harddisk may disconnect before ANY block.
6645 ** If we wanted to avoid unexpected phase changes at all
6646 ** we had to use a break point every 512 bytes.
6647 ** Of course the number of scatter/gather blocks is
6648 ** limited.
6649 */
6650
6651 free = MAX_SCATTER - 1;
6652
6653 if (vaddr & PAGE_MASK) free -= datalen / PAGE_SIZE;
6654
6655 if (free>1)
6656 while ((chunk * free >= 2 * datalen) && (chunk>=1024))
6657 chunk /= 2;
6658
6659 if(DEBUG_FLAGS & DEBUG_SCATTER)
6660 kprintf("ncr?:\tscattering virtual=%p size=%d chunk=%d.\n",
6661 (void *) vaddr, (unsigned) datalen, (unsigned) chunk);
6662
6663 /*
6664 ** Build data descriptors.
6665 */
6666 while (datalen && (segment < MAX_SCATTER)) {
6667
6668 /*
6669 ** this segment is empty
6670 */
6671 segsize = 0;
6672 segaddr = paddr;
6673 pnext = paddr;
6674
6675 if (!csize) csize = chunk;
6676
6677 while ((datalen) && (paddr == pnext) && (csize)) {
6678
6679 /*
6680 ** continue this segment
6681 */
6682 pnext = (paddr & (~PAGE_MASK)) + PAGE_SIZE;
6683
6684 /*
6685 ** Compute max size
6686 */
6687
6688 size = pnext - paddr; /* page size */
6689 if (size > datalen) size = datalen; /* data size */
6690 if (size > csize ) size = csize ; /* chunksize */
6691
6692 segsize += size;
6693 vaddr += size;
6694 csize -= size;
6695 datalen -= size;
6696 paddr = vtophys (vaddr);
6697 }
6698
6699 if(DEBUG_FLAGS & DEBUG_SCATTER)
6700 kprintf ("\tseg #%d addr=%x size=%d (rest=%d).\n",
6701 segment,
6702 (unsigned) segaddr,
6703 (unsigned) segsize,
6704 (unsigned) datalen);
6705
6706 phys->data[segment].addr = segaddr;
6707 phys->data[segment].size = segsize;
6708 segment++;
6709 }
6710
6711 if (datalen) {
6712 kprintf("ncr?: scatter/gather failed (residue=%d).\n",
6713 (unsigned) datalen);
6714 return (-1);
6715 }
6716
6717 return (segment);
6718 }
6719
6720 /*==========================================================
6721 **
6722 **
6723 ** Test the pci bus snoop logic :-(
6724 **
6725 ** Has to be called with interrupts disabled.
6726 **
6727 **
6728 **==========================================================
6729 */
6730
6731 #ifndef NCR_IOMAPPED
6732 static int ncr_regtest (struct ncb* np)
6733 {
6734 volatile u_int32_t data;
6735 /*
6736 ** ncr registers may NOT be cached.
6737 ** write 0xffffffff to a read only register area,
6738 ** and try to read it back.
6739 */
6740 data = 0xffffffff;
6741 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
6742 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
6743 #if 1
6744 if (data == 0xffffffff) {
6745 #else
6746 if ((data & 0xe2f0fffd) != 0x02000080) {
6747 #endif
6748 kprintf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6749 (unsigned) data);
6750 return (0x10);
6751 }
6752 return (0);
6753 }
6754 #endif
6755
6756 static int ncr_snooptest (struct ncb* np)
6757 {
6758 u_int32_t ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
6759 int i, err=0;
6760 #ifndef NCR_IOMAPPED
6761 err |= ncr_regtest (np);
6762 if (err) return (err);
6763 #endif
6764 /*
6765 ** init
6766 */
6767 pc = NCB_SCRIPTH_PHYS (np, snooptest);
6768 host_wr = 1;
6769 ncr_wr = 2;
6770 /*
6771 ** Set memory and register.
6772 */
6773 ncr_cache = host_wr;
6774 OUTL (nc_temp, ncr_wr);
6775 /*
6776 ** Start script (exchange values)
6777 */
6778 OUTL (nc_dsp, pc);
6779 /*
6780 ** Wait 'til done (with timeout)
6781 */
6782 for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
6783 if (INB(nc_istat) & (INTF|SIP|DIP))
6784 break;
6785 /*
6786 ** Save termination position.
6787 */
6788 pc = INL (nc_dsp);
6789 /*
6790 ** Read memory and register.
6791 */
6792 host_rd = ncr_cache;
6793 ncr_rd = INL (nc_scratcha);
6794 ncr_bk = INL (nc_temp);
6795 /*
6796 ** Reset ncr chip
6797 */
6798 OUTB (nc_istat, SRST);
6799 DELAY (1000);
6800 OUTB (nc_istat, 0 );
6801 /*
6802 ** check for timeout
6803 */
6804 if (i>=NCR_SNOOP_TIMEOUT) {
6805 kprintf ("CACHE TEST FAILED: timeout.\n");
6806 return (0x20);
6807 }
6808 /*
6809 ** Check termination position.
6810 */
6811 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
6812 kprintf ("CACHE TEST FAILED: script execution failed.\n");
6813 kprintf ("start=%08lx, pc=%08lx, end=%08lx\n",
6814 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
6815 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
6816 return (0x40);
6817 }
6818 /*
6819 ** Show results.
6820 */
6821 if (host_wr != ncr_rd) {
6822 kprintf ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
6823 (int) host_wr, (int) ncr_rd);
6824 err |= 1;
6825 }
6826 if (host_rd != ncr_wr) {
6827 kprintf ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
6828 (int) ncr_wr, (int) host_rd);
6829 err |= 2;
6830 }
6831 if (ncr_bk != ncr_wr) {
6832 kprintf ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
6833 (int) ncr_wr, (int) ncr_bk);
6834 err |= 4;
6835 }
6836 return (err);
6837 }
6838
6839 /*==========================================================
6840 **
6841 **
6842 ** Profiling the drivers and targets performance.
6843 **
6844 **
6845 **==========================================================
6846 */
6847
6848 /*
6849 ** Compute the difference in milliseconds.
6850 **/
6851
6852 static int ncr_delta (int *from, int *to)
6853 {
6854 if (!from) return (-1);
6855 if (!to) return (-2);
6856 return ((to - from) * 1000 / hz);
6857 }
6858
6859 #define PROFILE cp->phys.header.stamp
6860 static void ncb_profile (ncb_p np, nccb_p cp)
6861 {
6862 int co, da, st, en, di, se, post,work,disc;
6863 u_long diff;
6864
6865 PROFILE.end = ticks;
6866
6867 st = ncr_delta (&PROFILE.start,&PROFILE.status);
6868 if (st<0) return; /* status not reached */
6869
6870 da = ncr_delta (&PROFILE.start,&PROFILE.data);
6871 if (da<0) return; /* No data transfer phase */
6872
6873 co = ncr_delta (&PROFILE.start,&PROFILE.command);
6874 if (co<0) return; /* command not executed */
6875
6876 en = ncr_delta (&PROFILE.start,&PROFILE.end),
6877 di = ncr_delta (&PROFILE.start,&PROFILE.disconnect),
6878 se = ncr_delta (&PROFILE.start,&PROFILE.select);
6879 post = en - st;
6880
6881 /*
6882 ** @PROFILE@ Disconnect time invalid if multiple disconnects
6883 */
6884
6885 if (di>=0) disc = se-di; else disc = 0;
6886
6887 work = (st - co) - disc;
6888
6889 diff = (np->disc_phys - np->disc_ref) & 0xff;
6890 np->disc_ref += diff;
6891
6892 np->profile.num_trans += 1;
6893 if (cp->ccb)
6894 np->profile.num_bytes += cp->ccb->csio.dxfer_len;
6895 np->profile.num_disc += diff;
6896 np->profile.ms_setup += co;
6897 np->profile.ms_data += work;
6898 np->profile.ms_disc += disc;
6899 np->profile.ms_post += post;
6900 }
6901 #undef PROFILE
6902
6903 /*==========================================================
6904 **
6905 ** Determine the ncr's clock frequency.
6906 ** This is essential for the negotiation
6907 ** of the synchronous transfer rate.
6908 **
6909 **==========================================================
6910 **
6911 ** Note: we have to return the correct value.
6912 ** THERE IS NO SAVE DEFAULT VALUE.
6913 **
6914 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6915 ** 53C860 and 53C875 rev. 1 support fast20 transfers but
6916 ** do not have a clock doubler and so are provided with a
6917 ** 80 MHz clock. All other fast20 boards incorporate a doubler
6918 ** and so should be delivered with a 40 MHz clock.
6919 ** The future fast40 chips (895/895) use a 40 Mhz base clock
6920 ** and provide a clock quadrupler (160 Mhz). The code below
6921 ** tries to deal as cleverly as possible with all this stuff.
6922 **
6923 **----------------------------------------------------------
6924 */
6925
6926 /*
6927 * Select NCR SCSI clock frequency
6928 */
6929 static void ncr_selectclock(ncb_p np, u_char scntl3)
6930 {
6931 if (np->multiplier < 2) {
6932 OUTB(nc_scntl3, scntl3);
6933 return;
6934 }
6935
6936 if (bootverbose >= 2)
6937 kprintf ("%s: enabling clock multiplier\n", ncr_name(np));
6938
6939 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6940 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
6941 int i = 20;
6942 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6943 DELAY(20);
6944 if (!i)
6945 kprintf("%s: the chip cannot lock the frequency\n", ncr_name(np));
6946 } else /* Wait 20 micro-seconds for doubler */
6947 DELAY(20);
6948 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6949 OUTB(nc_scntl3, scntl3);
6950 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6951 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6952 }
6953
6954 /*
6955 * calculate NCR SCSI clock frequency (in KHz)
6956 */
6957 static unsigned
6958 ncrgetfreq (ncb_p np, int gen)
6959 {
6960 int ms = 0;
6961 /*
6962 * Measure GEN timer delay in order
6963 * to calculate SCSI clock frequency
6964 *
6965 * This code will never execute too
6966 * many loop iterations (if DELAY is
6967 * reasonably correct). It could get
6968 * too low a delay (too high a freq.)
6969 * if the CPU is slow executing the
6970 * loop for some reason (an NMI, for
6971 * example). For this reason we will
6972 * if multiple measurements are to be
6973 * performed trust the higher delay
6974 * (lower frequency returned).
6975 */
6976 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */
6977 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6978 (void) INW (nc_sist); /* clear pending scsi interrupt */
6979 OUTB (nc_dien , 0); /* mask all dma interrupts */
6980 (void) INW (nc_sist); /* another one, just to be sure :) */
6981 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6982 OUTB (nc_stime1, 0); /* disable general purpose timer */
6983 OUTB (nc_stime1, gen); /* set to nominal delay of (1<<gen) * 125us */
6984 while (!(INW(nc_sist) & GEN) && ms++ < 1000)
6985 DELAY(1000); /* count ms */
6986 OUTB (nc_stime1, 0); /* disable general purpose timer */
6987 OUTB (nc_scntl3, 0);
6988 /*
6989 * Set prescaler to divide by whatever "0" means.
6990 * "0" ought to choose divide by 2, but appears
6991 * to set divide by 3.5 mode in my 53c810 ...
6992 */
6993 OUTB (nc_scntl3, 0);
6994
6995 if (bootverbose >= 2)
6996 kprintf ("\tDelay (GEN=%d): %u msec\n", gen, ms);
6997 /*
6998 * adjust for prescaler, and convert into KHz
6999 */
7000 return ms ? ((1 << gen) * 4440) / ms : 0;
7001 }
7002
7003 static void ncr_getclock (ncb_p np, u_char multiplier)
7004 {
7005 unsigned char scntl3;
7006 unsigned char stest1;
7007 scntl3 = INB(nc_scntl3);
7008 stest1 = INB(nc_stest1);
7009
7010 np->multiplier = 1;
7011
7012 if (multiplier > 1) {
7013 np->multiplier = multiplier;
7014 np->clock_khz = 40000 * multiplier;
7015 } else {
7016 if ((scntl3 & 7) == 0) {
7017 unsigned f1, f2;
7018 /* throw away first result */
7019 (void) ncrgetfreq (np, 11);
7020 f1 = ncrgetfreq (np, 11);
7021 f2 = ncrgetfreq (np, 11);
7022
7023 if (bootverbose >= 2)
7024 kprintf ("\tNCR clock is %uKHz, %uKHz\n", f1, f2);
7025 if (f1 > f2) f1 = f2; /* trust lower result */
7026 if (f1 > 45000) {
7027 scntl3 = 5; /* >45Mhz: assume 80MHz */
7028 } else {
7029 scntl3 = 3; /* <45Mhz: assume 40MHz */
7030 }
7031 }
7032 else if ((scntl3 & 7) == 5)
7033 np->clock_khz = 80000; /* Probably a 875 rev. 1 ? */
7034 }
7035 }
7036
7037 /*=========================================================================*/
7038
7039 #ifdef NCR_TEKRAM_EEPROM
7040
7041 struct tekram_eeprom_dev {
7042 u_char devmode;
7043 #define TKR_PARCHK 0x01
7044 #define TKR_TRYSYNC 0x02
7045 #define TKR_ENDISC 0x04
7046 #define TKR_STARTUNIT 0x08
7047 #define TKR_USETAGS 0x10
7048 #define TKR_TRYWIDE 0x20
7049 u_char syncparam; /* max. sync transfer rate (table ?) */
7050 u_char filler1;
7051 u_char filler2;
7052 };
7053
7054
7055 struct tekram_eeprom {
7056 struct tekram_eeprom_dev
7057 dev[16];
7058 u_char adaptid;
7059 u_char adaptmode;
7060 #define TKR_ADPT_GT2DRV 0x01
7061 #define TKR_ADPT_GT1GB 0x02
7062 #define TKR_ADPT_RSTBUS 0x04
7063 #define TKR_ADPT_ACTNEG 0x08
7064 #define TKR_ADPT_NOSEEK 0x10
7065 #define TKR_ADPT_MORLUN 0x20
7066 u_char delay; /* unit ? ( table ??? ) */
7067 u_char tags; /* use 4 times as many ... */
7068 u_char filler[60];
7069 };
7070
7071 static void
7072 tekram_write_bit (ncb_p np, int bit)
7073 {
7074 u_char val = 0x10 + ((bit & 1) << 1);
7075
7076 DELAY(10);
7077 OUTB (nc_gpreg, val);
7078 DELAY(10);
7079 OUTB (nc_gpreg, val | 0x04);
7080 DELAY(10);
7081 OUTB (nc_gpreg, val);
7082 DELAY(10);
7083 }
7084
7085 static int
7086 tekram_read_bit (ncb_p np)
7087 {
7088 OUTB (nc_gpreg, 0x10);
7089 DELAY(10);
7090 OUTB (nc_gpreg, 0x14);
7091 DELAY(10);
7092 return INB (nc_gpreg) & 1;
7093 }
7094
7095 static u_short
7096 read_tekram_eeprom_reg (ncb_p np, int reg)
7097 {
7098 int bit;
7099 u_short result = 0;
7100 int cmd = 0x80 | reg;
7101
7102 OUTB (nc_gpreg, 0x10);
7103
7104 tekram_write_bit (np, 1);
7105 for (bit = 7; bit >= 0; bit--)
7106 {
7107 tekram_write_bit (np, cmd >> bit);
7108 }
7109
7110 for (bit = 0; bit < 16; bit++)
7111 {
7112 result <<= 1;
7113 result |= tekram_read_bit (np);
7114 }
7115
7116 OUTB (nc_gpreg, 0x00);
7117 return result;
7118 }
7119
7120 static int
7121 read_tekram_eeprom(ncb_p np, struct tekram_eeprom *buffer)
7122 {
7123 u_short *p = (u_short *) buffer;
7124 u_short sum = 0;
7125 int i;
7126
7127 if (INB (nc_gpcntl) != 0x09)
7128 {
7129 return 0;
7130 }
7131 for (i = 0; i < 64; i++)
7132 {
7133 u_short val;
7134 if((i&0x0f) == 0) kprintf ("%02x:", i*2);
7135 val = read_tekram_eeprom_reg (np, i);
7136 if (p)
7137 *p++ = val;
7138 sum += val;
7139 if((i&0x01) == 0x00) kprintf (" ");
7140 kprintf ("%02x%02x", val & 0xff, (val >> 8) & 0xff);
7141 if((i&0x0f) == 0x0f) kprintf ("\n");
7142 }
7143 kprintf ("Sum = %04x\n", sum);
7144 return sum == 0x1234;
7145 }
7146 #endif /* NCR_TEKRAM_EEPROM */
7147
7148 static device_method_t ncr_methods[] = {
7149 /* Device interface */
7150 DEVMETHOD(device_probe, ncr_probe),
7151 DEVMETHOD(device_attach, ncr_attach),
7152
7153 DEVMETHOD_END
7154 };
7155
7156 static driver_t ncr_driver = {
7157 "ncr",
7158 ncr_methods,
7159 sizeof(struct ncb),
7160 };
7161
7162 static devclass_t ncr_devclass;
7163
7164 DRIVER_MODULE(if_ncr, pci, ncr_driver, ncr_devclass, NULL, NULL);
7165
7166 /*=========================================================================*/
7167 #endif /* _KERNEL */
DragonFly BSD