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Fix UTIME_OMIT handling
[dragonfly.git] / sys / dev / disk / ncr / ncr.c
blob3977339cd9e7f75d0f91a11a2d9070a8cf353e38
1 /**************************************************************************
2 **
3 ** $FreeBSD: src/sys/pci/ncr.c,v 1.155.2.3 2001/03/05 13:09:10 obrien Exp $
4 **
5 ** Device driver for the NCR 53C8XX PCI-SCSI-Controller Family.
6 **
7 **-------------------------------------------------------------------------
8 **
9 ** Written for 386bsd and FreeBSD by
10 ** Wolfgang Stanglmeier <wolf@cologne.de>
11 ** Stefan Esser <se@mi.Uni-Koeln.de>
12 **
13 **-------------------------------------------------------------------------
14 **
15 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved.
16 **
17 ** Redistribution and use in source and binary forms, with or without
18 ** modification, are permitted provided that the following conditions
19 ** are met:
20 ** 1. Redistributions of source code must retain the above copyright
21 ** notice, this list of conditions and the following disclaimer.
22 ** 2. Redistributions in binary form must reproduce the above copyright
23 ** notice, this list of conditions and the following disclaimer in the
24 ** documentation and/or other materials provided with the distribution.
25 ** 3. The name of the author may not be used to endorse or promote products
26 ** derived from this software without specific prior written permission.
27 **
28 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
29 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
30 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
31 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
32 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
33 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
37 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 **
39 ***************************************************************************
40 */
41
42 #define NCR_DATE "pl30 98/1/1"
43
44 #define NCR_VERSION (2)
45 #define MAX_UNITS (16)
46
47 #define NCR_GETCC_WITHMSG
48
49 #if (defined(__DragonFly__) || defined (__FreeBSD__)) && defined(_KERNEL)
50 #include "opt_ncr.h"
51 #endif
52
53 /*==========================================================
54 **
55 ** Configuration and Debugging
56 **
57 ** May be overwritten in <arch/conf/xxxx>
58 **
59 **==========================================================
60 */
61
62 /*
63 ** SCSI address of this device.
64 ** The boot routines should have set it.
65 ** If not, use this.
66 */
67
68 #ifndef SCSI_NCR_MYADDR
69 #define SCSI_NCR_MYADDR (7)
70 #endif /* SCSI_NCR_MYADDR */
71
72 /*
73 ** The default synchronous period factor
74 ** (0=asynchronous)
75 ** If maximum synchronous frequency is defined, use it instead.
76 */
77
78 #ifndef SCSI_NCR_MAX_SYNC
79
80 #ifndef SCSI_NCR_DFLT_SYNC
81 #define SCSI_NCR_DFLT_SYNC (12)
82 #endif /* SCSI_NCR_DFLT_SYNC */
83
84 #else
85
86 #if SCSI_NCR_MAX_SYNC == 0
87 #define SCSI_NCR_DFLT_SYNC 0
88 #else
89 #define SCSI_NCR_DFLT_SYNC (250000 / SCSI_NCR_MAX_SYNC)
90 #endif
91
92 #endif
93
94 /*
95 ** The minimal asynchronous pre-scaler period (ns)
96 ** Shall be 40.
97 */
98
99 #ifndef SCSI_NCR_MIN_ASYNC
100 #define SCSI_NCR_MIN_ASYNC (40)
101 #endif /* SCSI_NCR_MIN_ASYNC */
102
103 /*
104 ** The maximal bus with (in log2 byte)
105 ** (0=8 bit, 1=16 bit)
106 */
107
108 #ifndef SCSI_NCR_MAX_WIDE
109 #define SCSI_NCR_MAX_WIDE (1)
110 #endif /* SCSI_NCR_MAX_WIDE */
111
112 /*==========================================================
113 **
114 ** Configuration and Debugging
115 **
116 **==========================================================
117 */
118
119 /*
120 ** Number of targets supported by the driver.
121 ** n permits target numbers 0..n-1.
122 ** Default is 7, meaning targets #0..#6.
123 ** #7 .. is myself.
124 */
125
126 #define MAX_TARGET (16)
127
128 /*
129 ** Number of logic units supported by the driver.
130 ** n enables logic unit numbers 0..n-1.
131 ** The common SCSI devices require only
132 ** one lun, so take 1 as the default.
133 */
134
135 #ifndef MAX_LUN
136 #define MAX_LUN (8)
137 #endif /* MAX_LUN */
138
139 /*
140 ** The maximum number of jobs scheduled for starting.
141 ** There should be one slot per target, and one slot
142 ** for each tag of each target in use.
143 */
144
145 #define MAX_START (256)
146
147 /*
148 ** The maximum number of segments a transfer is split into.
149 */
150
151 #define MAX_SCATTER (33)
152
153 /*
154 ** The maximum transfer length (should be >= 64k).
155 ** MUST NOT be greater than (MAX_SCATTER-1) * PAGE_SIZE.
156 */
157
158 #define MAX_SIZE ((MAX_SCATTER-1) * (long) PAGE_SIZE)
159
160 /*
161 ** other
162 */
163
164 #define NCR_SNOOP_TIMEOUT (1000000)
165
166 /*==========================================================
167 **
168 ** Include files
169 **
170 **==========================================================
171 */
172
173 #include <sys/param.h>
174 #include <sys/time.h>
175
176 #ifdef _KERNEL
177 #include <sys/systm.h>
178 #include <sys/malloc.h>
179 #include <sys/buf.h>
180 #include <sys/kernel.h>
181 #include <sys/sysctl.h>
182 #include <sys/bus.h>
183 #include <sys/thread2.h>
184 #include <machine/clock.h>
185 #include <machine/md_var.h>
186 #include <sys/rman.h>
187 #include <vm/vm.h>
188 #include <vm/pmap.h>
189 #include <vm/vm_extern.h>
190 #endif
191
192 #include <bus/pci/pcivar.h>
193 #include <bus/pci/pcireg.h>
194 #include "ncrreg.h"
195
196 #include <bus/cam/cam.h>
197 #include <bus/cam/cam_ccb.h>
198 #include <bus/cam/cam_sim.h>
199 #include <bus/cam/cam_xpt.h>
200 #include <bus/cam/cam_xpt_sim.h>
201 #include <bus/cam/cam_xpt_periph.h>
202 #include <bus/cam/cam_debug.h>
203
204
205 #include <bus/cam/scsi/scsi_all.h>
206 #include <bus/cam/scsi/scsi_message.h>
207
208 /*==========================================================
209 **
210 ** Debugging tags
211 **
212 **==========================================================
213 */
214
215 #define DEBUG_ALLOC (0x0001)
216 #define DEBUG_PHASE (0x0002)
217 #define DEBUG_POLL (0x0004)
218 #define DEBUG_QUEUE (0x0008)
219 #define DEBUG_RESULT (0x0010)
220 #define DEBUG_SCATTER (0x0020)
221 #define DEBUG_SCRIPT (0x0040)
222 #define DEBUG_TINY (0x0080)
223 #define DEBUG_TIMING (0x0100)
224 #define DEBUG_NEGO (0x0200)
225 #define DEBUG_TAGS (0x0400)
226 #define DEBUG_FREEZE (0x0800)
227 #define DEBUG_RESTART (0x1000)
228
229 /*
230 ** Enable/Disable debug messages.
231 ** Can be changed at runtime too.
232 */
233 #ifdef SCSI_NCR_DEBUG
234 #define DEBUG_FLAGS ncr_debug
235 #else /* SCSI_NCR_DEBUG */
236 #define SCSI_NCR_DEBUG 0
237 #define DEBUG_FLAGS 0
238 #endif /* SCSI_NCR_DEBUG */
239
240
241
242 /*==========================================================
243 **
244 ** assert ()
245 **
246 **==========================================================
247 **
248 ** modified copy from 386bsd:/usr/include/sys/assert.h
249 **
250 **----------------------------------------------------------
251 */
252
253 #ifdef DIAGNOSTIC
254 #define assert(expression) { \
255 if (!(expression)) { \
256 (void)kprintf("assertion \"%s\" failed: " \
257 "file \"%s\", line %d\n", \
258 #expression, __FILE__, __LINE__); \
259 Debugger(""); \
260 } \
261 }
262 #else
263 #define assert(expression) { \
264 if (!(expression)) { \
265 (void)kprintf("assertion \"%s\" failed: " \
266 "file \"%s\", line %d\n", \
267 #expression, __FILE__, __LINE__); \
268 } \
269 }
270 #endif
271
272 /*==========================================================
273 **
274 ** Access to the controller chip.
275 **
276 **==========================================================
277 */
278
279 #define INB(r) bus_space_read_1(np->bst, np->bsh, offsetof(struct ncr_reg, r))
280 #define INW(r) bus_space_read_2(np->bst, np->bsh, offsetof(struct ncr_reg, r))
281 #define INL(r) bus_space_read_4(np->bst, np->bsh, offsetof(struct ncr_reg, r))
282
283 #define OUTB(r, val) bus_space_write_1(np->bst, np->bsh, \
284 offsetof(struct ncr_reg, r), val)
285 #define OUTW(r, val) bus_space_write_2(np->bst, np->bsh, \
286 offsetof(struct ncr_reg, r), val)
287 #define OUTL(r, val) bus_space_write_4(np->bst, np->bsh, \
288 offsetof(struct ncr_reg, r), val)
289 #define OUTL_OFF(o, val) bus_space_write_4(np->bst, np->bsh, o, val)
290
291 #define INB_OFF(o) bus_space_read_1(np->bst, np->bsh, o)
292 #define INW_OFF(o) bus_space_read_2(np->bst, np->bsh, o)
293 #define INL_OFF(o) bus_space_read_4(np->bst, np->bsh, o)
294
295 #define READSCRIPT_OFF(base, off) \
296 (base ? *((volatile u_int32_t *)((volatile char *)base + (off))) : \
297 bus_space_read_4(np->bst2, np->bsh2, off))
298
299 #define WRITESCRIPT_OFF(base, off, val) \
300 do { \
301 if (base) \
302 *((volatile u_int32_t *) \
303 ((volatile char *)base + (off))) = (val); \
304 else \
305 bus_space_write_4(np->bst2, np->bsh2, off, val); \
306 } while (0)
307
308 #define READSCRIPT(r) \
309 READSCRIPT_OFF(np->script, offsetof(struct script, r))
310
311 #define WRITESCRIPT(r, val) \
312 WRITESCRIPT_OFF(np->script, offsetof(struct script, r), val)
313
314 /*
315 ** Set bit field ON, OFF
316 */
317
318 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
319 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
320 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
321 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
322 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
323 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
324
325 /*==========================================================
326 **
327 ** Command control block states.
328 **
329 **==========================================================
330 */
331
332 #define HS_IDLE (0)
333 #define HS_BUSY (1)
334 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
335 #define HS_DISCONNECT (3) /* Disconnected by target */
336
337 #define HS_COMPLETE (4)
338 #define HS_SEL_TIMEOUT (5) /* Selection timeout */
339 #define HS_RESET (6) /* SCSI reset */
340 #define HS_ABORTED (7) /* Transfer aborted */
341 #define HS_TIMEOUT (8) /* Software timeout */
342 #define HS_FAIL (9) /* SCSI or PCI bus errors */
343 #define HS_UNEXPECTED (10) /* Unexpected disconnect */
344 #define HS_STALL (11) /* QUEUE FULL or BUSY */
345
346 #define HS_DONEMASK (0xfc)
347
348 /*==========================================================
349 **
350 ** Software Interrupt Codes
351 **
352 **==========================================================
353 */
354
355 #define SIR_SENSE_RESTART (1)
356 #define SIR_SENSE_FAILED (2)
357 #define SIR_STALL_RESTART (3)
358 #define SIR_STALL_QUEUE (4)
359 #define SIR_NEGO_SYNC (5)
360 #define SIR_NEGO_WIDE (6)
361 #define SIR_NEGO_FAILED (7)
362 #define SIR_NEGO_PROTO (8)
363 #define SIR_REJECT_RECEIVED (9)
364 #define SIR_REJECT_SENT (10)
365 #define SIR_IGN_RESIDUE (11)
366 #define SIR_MISSING_SAVE (12)
367 #define SIR_MAX (12)
368
369 /*==========================================================
370 **
371 ** Extended error codes.
372 ** xerr_status field of struct nccb.
373 **
374 **==========================================================
375 */
376
377 #define XE_OK (0)
378 #define XE_EXTRA_DATA (1) /* unexpected data phase */
379 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */
380
381 /*==========================================================
382 **
383 ** Negotiation status.
384 ** nego_status field of struct nccb.
385 **
386 **==========================================================
387 */
388
389 #define NS_SYNC (1)
390 #define NS_WIDE (2)
391
392 /*==========================================================
393 **
394 ** XXX These are no longer used. Remove once the
395 ** script is updated.
396 ** "Special features" of targets.
397 ** quirks field of struct tcb.
398 ** actualquirks field of struct nccb.
399 **
400 **==========================================================
401 */
402
403 #define QUIRK_AUTOSAVE (0x01)
404 #define QUIRK_NOMSG (0x02)
405 #define QUIRK_NOSYNC (0x10)
406 #define QUIRK_NOWIDE16 (0x20)
407 #define QUIRK_NOTAGS (0x40)
408 #define QUIRK_UPDATE (0x80)
409
410 /*==========================================================
411 **
412 ** Misc.
413 **
414 **==========================================================
415 */
416
417 #define CCB_MAGIC (0xf2691ad2)
418 #define MAX_TAGS (32) /* hard limit */
419
420 /*==========================================================
421 **
422 ** OS dependencies.
423 **
424 **==========================================================
425 */
426
427 #define PRINT_ADDR(ccb) xpt_print_path((ccb)->ccb_h.path)
428
429 /*==========================================================
430 **
431 ** Declaration of structs.
432 **
433 **==========================================================
434 */
435
436 struct tcb;
437 struct lcb;
438 struct nccb;
439 struct ncb;
440 struct script;
441
442 typedef struct ncb * ncb_p;
443 typedef struct tcb * tcb_p;
444 typedef struct lcb * lcb_p;
445 typedef struct nccb * nccb_p;
446
447 struct link {
448 ncrcmd l_cmd;
449 ncrcmd l_paddr;
450 };
451
452 struct usrcmd {
453 u_long target;
454 u_long lun;
455 u_long data;
456 u_long cmd;
457 };
458
459 #define UC_SETSYNC 10
460 #define UC_SETTAGS 11
461 #define UC_SETDEBUG 12
462 #define UC_SETORDER 13
463 #define UC_SETWIDE 14
464 #define UC_SETFLAG 15
465
466 #define UF_TRACE (0x01)
467
468 /*---------------------------------------
469 **
470 ** Timestamps for profiling
471 **
472 **---------------------------------------
473 */
474
475 /* Type of the kernel variable `ticks'. XXX should be declared with the var. */
476 typedef int ticks_t;
477
478 struct tstamp {
479 ticks_t start;
480 ticks_t end;
481 ticks_t select;
482 ticks_t command;
483 ticks_t data;
484 ticks_t status;
485 ticks_t disconnect;
486 };
487
488 /*
489 ** profiling data (per device)
490 */
491
492 struct profile {
493 u_long num_trans;
494 u_long num_bytes;
495 u_long num_disc;
496 u_long num_break;
497 u_long num_int;
498 u_long num_fly;
499 u_long ms_setup;
500 u_long ms_data;
501 u_long ms_disc;
502 u_long ms_post;
503 };
504
505 /*==========================================================
506 **
507 ** Declaration of structs: target control block
508 **
509 **==========================================================
510 */
511
512 #define NCR_TRANS_CUR 0x01 /* Modify current neogtiation status */
513 #define NCR_TRANS_ACTIVE 0x03 /* Assume this is the active target */
514 #define NCR_TRANS_GOAL 0x04 /* Modify negotiation goal */
515 #define NCR_TRANS_USER 0x08 /* Modify user negotiation settings */
516
517 struct ncr_transinfo {
518 u_int8_t width;
519 u_int8_t period;
520 u_int8_t offset;
521 };
522
523 struct ncr_target_tinfo {
524 /* Hardware version of our sync settings */
525 u_int8_t disc_tag;
526 #define NCR_CUR_DISCENB 0x01
527 #define NCR_CUR_TAGENB 0x02
528 #define NCR_USR_DISCENB 0x04
529 #define NCR_USR_TAGENB 0x08
530 u_int8_t sval;
531 struct ncr_transinfo current;
532 struct ncr_transinfo goal;
533 struct ncr_transinfo user;
534 /* Hardware version of our wide settings */
535 u_int8_t wval;
536 };
537
538 struct tcb {
539 /*
540 ** during reselection the ncr jumps to this point
541 ** with SFBR set to the encoded target number
542 ** with bit 7 set.
543 ** if it's not this target, jump to the next.
544 **
545 ** JUMP IF (SFBR != #target#)
546 ** @(next tcb)
547 */
548
549 struct link jump_tcb;
550
551 /*
552 ** load the actual values for the sxfer and the scntl3
553 ** register (sync/wide mode).
554 **
555 ** SCR_COPY (1);
556 ** @(sval field of this tcb)
557 ** @(sxfer register)
558 ** SCR_COPY (1);
559 ** @(wval field of this tcb)
560 ** @(scntl3 register)
561 */
562
563 ncrcmd getscr[6];
564
565 /*
566 ** if next message is "identify"
567 ** then load the message to SFBR,
568 ** else load 0 to SFBR.
569 **
570 ** CALL
571 ** <RESEL_LUN>
572 */
573
574 struct link call_lun;
575
576 /*
577 ** now look for the right lun.
578 **
579 ** JUMP
580 ** @(first nccb of this lun)
581 */
582
583 struct link jump_lcb;
584
585 /*
586 ** pointer to interrupted getcc nccb
587 */
588
589 nccb_p hold_cp;
590
591 /*
592 ** pointer to nccb used for negotiating.
593 ** Avoid to start a nego for all queued commands
594 ** when tagged command queuing is enabled.
595 */
596
597 nccb_p nego_cp;
598
599 /*
600 ** statistical data
601 */
602
603 u_long transfers;
604 u_long bytes;
605
606 /*
607 ** user settable limits for sync transfer
608 ** and tagged commands.
609 */
610
611 struct ncr_target_tinfo tinfo;
612
613 /*
614 ** the lcb's of this tcb
615 */
616
617 lcb_p lp[MAX_LUN];
618 };
619
620 /*==========================================================
621 **
622 ** Declaration of structs: lun control block
623 **
624 **==========================================================
625 */
626
627 struct lcb {
628 /*
629 ** during reselection the ncr jumps to this point
630 ** with SFBR set to the "Identify" message.
631 ** if it's not this lun, jump to the next.
632 **
633 ** JUMP IF (SFBR != #lun#)
634 ** @(next lcb of this target)
635 */
636
637 struct link jump_lcb;
638
639 /*
640 ** if next message is "simple tag",
641 ** then load the tag to SFBR,
642 ** else load 0 to SFBR.
643 **
644 ** CALL
645 ** <RESEL_TAG>
646 */
647
648 struct link call_tag;
649
650 /*
651 ** now look for the right nccb.
652 **
653 ** JUMP
654 ** @(first nccb of this lun)
655 */
656
657 struct link jump_nccb;
658
659 /*
660 ** start of the nccb chain
661 */
662
663 nccb_p next_nccb;
664
665 /*
666 ** Control of tagged queueing
667 */
668
669 u_char reqnccbs;
670 u_char reqlink;
671 u_char actlink;
672 u_char usetags;
673 u_char lasttag;
674 };
675
676 /*==========================================================
677 **
678 ** Declaration of structs: COMMAND control block
679 **
680 **==========================================================
681 **
682 ** This substructure is copied from the nccb to a
683 ** global address after selection (or reselection)
684 ** and copied back before disconnect.
685 **
686 ** These fields are accessible to the script processor.
687 **
688 **----------------------------------------------------------
689 */
690
691 struct head {
692 /*
693 ** Execution of a nccb starts at this point.
694 ** It's a jump to the "SELECT" label
695 ** of the script.
696 **
697 ** After successful selection the script
698 ** processor overwrites it with a jump to
699 ** the IDLE label of the script.
700 */
701
702 struct link launch;
703
704 /*
705 ** Saved data pointer.
706 ** Points to the position in the script
707 ** responsible for the actual transfer
708 ** of data.
709 ** It's written after reception of a
710 ** "SAVE_DATA_POINTER" message.
711 ** The goalpointer points after
712 ** the last transfer command.
713 */
714
715 u_int32_t savep;
716 u_int32_t lastp;
717 u_int32_t goalp;
718
719 /*
720 ** The virtual address of the nccb
721 ** containing this header.
722 */
723
724 nccb_p cp;
725
726 /*
727 ** space for some timestamps to gather
728 ** profiling data about devices and this driver.
729 */
730
731 struct tstamp stamp;
732
733 /*
734 ** status fields.
735 */
736
737 u_char status[8];
738 };
739
740 /*
741 ** The status bytes are used by the host and the script processor.
742 **
743 ** The first four byte are copied to the scratchb register
744 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
745 ** and copied back just after disconnecting.
746 ** Inside the script the XX_REG are used.
747 **
748 ** The last four bytes are used inside the script by "COPY" commands.
749 ** Because source and destination must have the same alignment
750 ** in a longword, the fields HAVE to be at the choosen offsets.
751 ** xerr_st (4) 0 (0x34) scratcha
752 ** sync_st (5) 1 (0x05) sxfer
753 ** wide_st (7) 3 (0x03) scntl3
754 */
755
756 /*
757 ** First four bytes (script)
758 */
759 #define QU_REG scr0
760 #define HS_REG scr1
761 #define HS_PRT nc_scr1
762 #define SS_REG scr2
763 #define PS_REG scr3
764
765 /*
766 ** First four bytes (host)
767 */
768 #define actualquirks phys.header.status[0]
769 #define host_status phys.header.status[1]
770 #define s_status phys.header.status[2]
771 #define parity_status phys.header.status[3]
772
773 /*
774 ** Last four bytes (script)
775 */
776 #define xerr_st header.status[4] /* MUST be ==0 mod 4 */
777 #define sync_st header.status[5] /* MUST be ==1 mod 4 */
778 #define nego_st header.status[6]
779 #define wide_st header.status[7] /* MUST be ==3 mod 4 */
780
781 /*
782 ** Last four bytes (host)
783 */
784 #define xerr_status phys.xerr_st
785 #define sync_status phys.sync_st
786 #define nego_status phys.nego_st
787 #define wide_status phys.wide_st
788
789 /*==========================================================
790 **
791 ** Declaration of structs: Data structure block
792 **
793 **==========================================================
794 **
795 ** During execution of a nccb by the script processor,
796 ** the DSA (data structure address) register points
797 ** to this substructure of the nccb.
798 ** This substructure contains the header with
799 ** the script-processor-changable data and
800 ** data blocks for the indirect move commands.
801 **
802 **----------------------------------------------------------
803 */
804
805 struct dsb {
806
807 /*
808 ** Header.
809 ** Has to be the first entry,
810 ** because it's jumped to by the
811 ** script processor
812 */
813
814 struct head header;
815
816 /*
817 ** Table data for Script
818 */
819
820 struct scr_tblsel select;
821 struct scr_tblmove smsg ;
822 struct scr_tblmove smsg2 ;
823 struct scr_tblmove cmd ;
824 struct scr_tblmove scmd ;
825 struct scr_tblmove sense ;
826 struct scr_tblmove data [MAX_SCATTER];
827 };
828
829 /*==========================================================
830 **
831 ** Declaration of structs: Command control block.
832 **
833 **==========================================================
834 **
835 ** During execution of a nccb by the script processor,
836 ** the DSA (data structure address) register points
837 ** to this substructure of the nccb.
838 ** This substructure contains the header with
839 ** the script-processor-changable data and then
840 ** data blocks for the indirect move commands.
841 **
842 **----------------------------------------------------------
843 */
844
845
846 struct nccb {
847 /*
848 ** This filler ensures that the global header is
849 ** cache line size aligned.
850 */
851 ncrcmd filler[4];
852
853 /*
854 ** during reselection the ncr jumps to this point.
855 ** If a "SIMPLE_TAG" message was received,
856 ** then SFBR is set to the tag.
857 ** else SFBR is set to 0
858 ** If looking for another tag, jump to the next nccb.
859 **
860 ** JUMP IF (SFBR != #TAG#)
861 ** @(next nccb of this lun)
862 */
863
864 struct link jump_nccb;
865
866 /*
867 ** After execution of this call, the return address
868 ** (in the TEMP register) points to the following
869 ** data structure block.
870 ** So copy it to the DSA register, and start
871 ** processing of this data structure.
872 **
873 ** CALL
874 ** <RESEL_TMP>
875 */
876
877 struct link call_tmp;
878
879 /*
880 ** This is the data structure which is
881 ** to be executed by the script processor.
882 */
883
884 struct dsb phys;
885
886 /*
887 ** If a data transfer phase is terminated too early
888 ** (after reception of a message (i.e. DISCONNECT)),
889 ** we have to prepare a mini script to transfer
890 ** the rest of the data.
891 */
892
893 ncrcmd patch[8];
894
895 /*
896 ** The general SCSI driver provides a
897 ** pointer to a control block.
898 */
899
900 union ccb *ccb;
901
902 /*
903 ** We prepare a message to be sent after selection,
904 ** and a second one to be sent after getcc selection.
905 ** Contents are IDENTIFY and SIMPLE_TAG.
906 ** While negotiating sync or wide transfer,
907 ** a SDTM or WDTM message is appended.
908 */
909
910 u_char scsi_smsg [8];
911 u_char scsi_smsg2[8];
912
913 /*
914 ** Lock this nccb.
915 ** Flag is used while looking for a free nccb.
916 */
917
918 u_long magic;
919
920 /*
921 ** Physical address of this instance of nccb
922 */
923
924 u_long p_nccb;
925
926 /*
927 ** Completion time out for this job.
928 ** It's set to time of start + allowed number of seconds.
929 */
930
931 time_t tlimit;
932
933 /*
934 ** All nccbs of one hostadapter are chained.
935 */
936
937 nccb_p link_nccb;
938
939 /*
940 ** All nccbs of one target/lun are chained.
941 */
942
943 nccb_p next_nccb;
944
945 /*
946 ** Sense command
947 */
948
949 u_char sensecmd[6];
950
951 /*
952 ** Tag for this transfer.
953 ** It's patched into jump_nccb.
954 ** If it's not zero, a SIMPLE_TAG
955 ** message is included in smsg.
956 */
957
958 u_char tag;
959 };
960
961 #define CCB_PHYS(cp,lbl) (cp->p_nccb + offsetof(struct nccb, lbl))
962
963 /*==========================================================
964 **
965 ** Declaration of structs: NCR device descriptor
966 **
967 **==========================================================
968 */
969
970 struct ncb {
971 /*
972 ** The global header.
973 ** Accessible to both the host and the
974 ** script-processor.
975 ** We assume it is cache line size aligned.
976 */
977 struct head header;
978
979 int unit;
980
981 /*-----------------------------------------------
982 ** Scripts ..
983 **-----------------------------------------------
984 **
985 ** During reselection the ncr jumps to this point.
986 ** The SFBR register is loaded with the encoded target id.
987 **
988 ** Jump to the first target.
989 **
990 ** JUMP
991 ** @(next tcb)
992 */
993 struct link jump_tcb;
994
995 /*-----------------------------------------------
996 ** Configuration ..
997 **-----------------------------------------------
998 **
999 ** virtual and physical addresses
1000 ** of the 53c810 chip.
1001 */
1002 int reg_rid;
1003 struct resource *reg_res;
1004 bus_space_tag_t bst;
1005 bus_space_handle_t bsh;
1006
1007 int sram_rid;
1008 struct resource *sram_res;
1009 bus_space_tag_t bst2;
1010 bus_space_handle_t bsh2;
1011
1012 struct resource *irq_res;
1013 void *irq_handle;
1014
1015 /*
1016 ** Scripts instance virtual address.
1017 */
1018 struct script *script;
1019 struct scripth *scripth;
1020
1021 /*
1022 ** Scripts instance physical address.
1023 */
1024 u_long p_script;
1025 u_long p_scripth;
1026
1027 /*
1028 ** The SCSI address of the host adapter.
1029 */
1030 u_char myaddr;
1031
1032 /*
1033 ** timing parameters
1034 */
1035 u_char minsync; /* Minimum sync period factor */
1036 u_char maxsync; /* Maximum sync period factor */
1037 u_char maxoffs; /* Max scsi offset */
1038 u_char clock_divn; /* Number of clock divisors */
1039 u_long clock_khz; /* SCSI clock frequency in KHz */
1040 u_long features; /* Chip features map */
1041 u_char multiplier; /* Clock multiplier (1,2,4) */
1042
1043 u_char maxburst; /* log base 2 of dwords burst */
1044
1045 /*
1046 ** BIOS supplied PCI bus options
1047 */
1048 u_char rv_scntl3;
1049 u_char rv_dcntl;
1050 u_char rv_dmode;
1051 u_char rv_ctest3;
1052 u_char rv_ctest4;
1053 u_char rv_ctest5;
1054 u_char rv_gpcntl;
1055 u_char rv_stest2;
1056
1057 /*-----------------------------------------------
1058 ** CAM SIM information for this instance
1059 **-----------------------------------------------
1060 */
1061
1062 struct cam_sim *sim;
1063 struct cam_path *path;
1064
1065 /*-----------------------------------------------
1066 ** Job control
1067 **-----------------------------------------------
1068 **
1069 ** Commands from user
1070 */
1071 struct usrcmd user;
1072
1073 /*
1074 ** Target data
1075 */
1076 struct tcb target[MAX_TARGET];
1077
1078 /*
1079 ** Start queue.
1080 */
1081 u_int32_t squeue [MAX_START];
1082 u_short squeueput;
1083
1084 /*
1085 ** Timeout handler
1086 */
1087 time_t heartbeat;
1088 u_short ticks;
1089 u_short latetime;
1090 time_t lasttime;
1091 struct callout timeout_ch;
1092
1093 /*-----------------------------------------------
1094 ** Debug and profiling
1095 **-----------------------------------------------
1096 **
1097 ** register dump
1098 */
1099 struct ncr_reg regdump;
1100 time_t regtime;
1101
1102 /*
1103 ** Profiling data
1104 */
1105 struct profile profile;
1106 u_long disc_phys;
1107 u_long disc_ref;
1108
1109 /*
1110 ** Head of list of all nccbs for this controller.
1111 */
1112 nccb_p link_nccb;
1113
1114 /*
1115 ** message buffers.
1116 ** Should be longword aligned,
1117 ** because they're written with a
1118 ** COPY script command.
1119 */
1120 u_char msgout[8];
1121 u_char msgin [8];
1122 u_int32_t lastmsg;
1123
1124 /*
1125 ** Buffer for STATUS_IN phase.
1126 */
1127 u_char scratch;
1128
1129 /*
1130 ** controller chip dependent maximal transfer width.
1131 */
1132 u_char maxwide;
1133
1134 #ifdef NCR_IOMAPPED
1135 /*
1136 ** address of the ncr control registers in io space
1137 */
1138 pci_port_t port;
1139 #endif
1140 };
1141
1142 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1143 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1144
1145 /*==========================================================
1146 **
1147 **
1148 ** Script for NCR-Processor.
1149 **
1150 ** Use ncr_script_fill() to create the variable parts.
1151 ** Use ncr_script_copy_and_bind() to make a copy and
1152 ** bind to physical addresses.
1153 **
1154 **
1155 **==========================================================
1156 **
1157 ** We have to know the offsets of all labels before
1158 ** we reach them (for forward jumps).
1159 ** Therefore we declare a struct here.
1160 ** If you make changes inside the script,
1161 ** DONT FORGET TO CHANGE THE LENGTHS HERE!
1162 **
1163 **----------------------------------------------------------
1164 */
1165
1166 /*
1167 ** Script fragments which are loaded into the on-board RAM
1168 ** of 825A, 875 and 895 chips.
1169 */
1170 struct script {
1171 ncrcmd start [ 7];
1172 ncrcmd start0 [ 2];
1173 ncrcmd start1 [ 3];
1174 ncrcmd startpos [ 1];
1175 ncrcmd trysel [ 8];
1176 ncrcmd skip [ 8];
1177 ncrcmd skip2 [ 3];
1178 ncrcmd idle [ 2];
1179 ncrcmd select [ 18];
1180 ncrcmd prepare [ 4];
1181 ncrcmd loadpos [ 14];
1182 ncrcmd prepare2 [ 24];
1183 ncrcmd setmsg [ 5];
1184 ncrcmd clrack [ 2];
1185 ncrcmd dispatch [ 33];
1186 ncrcmd no_data [ 17];
1187 ncrcmd checkatn [ 10];
1188 ncrcmd command [ 15];
1189 ncrcmd status [ 27];
1190 ncrcmd msg_in [ 26];
1191 ncrcmd msg_bad [ 6];
1192 ncrcmd complete [ 13];
1193 ncrcmd cleanup [ 12];
1194 ncrcmd cleanup0 [ 9];
1195 ncrcmd signal [ 12];
1196 ncrcmd save_dp [ 5];
1197 ncrcmd restore_dp [ 5];
1198 ncrcmd disconnect [ 12];
1199 ncrcmd disconnect0 [ 5];
1200 ncrcmd disconnect1 [ 23];
1201 ncrcmd msg_out [ 9];
1202 ncrcmd msg_out_done [ 7];
1203 ncrcmd badgetcc [ 6];
1204 ncrcmd reselect [ 8];
1205 ncrcmd reselect1 [ 8];
1206 ncrcmd reselect2 [ 8];
1207 ncrcmd resel_tmp [ 5];
1208 ncrcmd resel_lun [ 18];
1209 ncrcmd resel_tag [ 24];
1210 ncrcmd data_in [MAX_SCATTER * 4 + 7];
1211 ncrcmd data_out [MAX_SCATTER * 4 + 7];
1212 };
1213
1214 /*
1215 ** Script fragments which stay in main memory for all chips.
1216 */
1217 struct scripth {
1218 ncrcmd tryloop [MAX_START*5+2];
1219 ncrcmd msg_parity [ 6];
1220 ncrcmd msg_reject [ 8];
1221 ncrcmd msg_ign_residue [ 32];
1222 ncrcmd msg_extended [ 18];
1223 ncrcmd msg_ext_2 [ 18];
1224 ncrcmd msg_wdtr [ 27];
1225 ncrcmd msg_ext_3 [ 18];
1226 ncrcmd msg_sdtr [ 27];
1227 ncrcmd msg_out_abort [ 10];
1228 ncrcmd getcc [ 4];
1229 ncrcmd getcc1 [ 5];
1230 #ifdef NCR_GETCC_WITHMSG
1231 ncrcmd getcc2 [ 29];
1232 #else
1233 ncrcmd getcc2 [ 14];
1234 #endif
1235 ncrcmd getcc3 [ 6];
1236 ncrcmd aborttag [ 4];
1237 ncrcmd abort [ 22];
1238 ncrcmd snooptest [ 9];
1239 ncrcmd snoopend [ 2];
1240 };
1241
1242 /*==========================================================
1243 **
1244 **
1245 ** Function headers.
1246 **
1247 **
1248 **==========================================================
1249 */
1250
1251 #ifdef _KERNEL
1252 static nccb_p ncr_alloc_nccb (ncb_p np, u_long target, u_long lun);
1253 static void ncr_complete (ncb_p np, nccb_p cp);
1254 static int ncr_delta (int * from, int * to);
1255 static void ncr_exception (ncb_p np);
1256 static void ncr_free_nccb (ncb_p np, nccb_p cp);
1257 static void ncr_freeze_devq (ncb_p np, struct cam_path *path);
1258 static void ncr_selectclock (ncb_p np, u_char scntl3);
1259 static void ncr_getclock (ncb_p np, u_char multiplier);
1260 static nccb_p ncr_get_nccb (ncb_p np, u_long t,u_long l);
1261 #if 0
1262 static u_int32_t ncr_info (int unit);
1263 #endif
1264 static void ncr_init (ncb_p np, char * msg, u_long code);
1265 static void ncr_intr (void *vnp);
1266 static void ncr_int_ma (ncb_p np, u_char dstat);
1267 static void ncr_int_sir (ncb_p np);
1268 static void ncr_int_sto (ncb_p np);
1269 #if 0
1270 static void ncr_min_phys (struct buf *bp);
1271 #endif
1272 static void ncr_poll (struct cam_sim *sim);
1273 static void ncb_profile (ncb_p np, nccb_p cp);
1274 static void ncr_script_copy_and_bind
1275 (ncb_p np, ncrcmd *src, ncrcmd *dst, int len);
1276 static void ncr_script_fill (struct script * scr, struct scripth *scrh);
1277 static int ncr_scatter (struct dsb* phys, vm_offset_t vaddr,
1278 vm_size_t datalen);
1279 static void ncr_getsync (ncb_p np, u_char sfac, u_char *fakp,
1280 u_char *scntl3p);
1281 static void ncr_setsync (ncb_p np, nccb_p cp,u_char scntl3,u_char sxfer,
1282 u_char period);
1283 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack);
1284 static int ncr_show_msg (u_char * msg);
1285 static int ncr_snooptest (ncb_p np);
1286 static void ncr_action (struct cam_sim *sim, union ccb *ccb);
1287 static void ncr_timeout (void *arg);
1288 static void ncr_wakeup (ncb_p np, u_long code);
1289
1290 static int ncr_probe (device_t dev);
1291 static int ncr_attach (device_t dev);
1292
1293 #endif /* _KERNEL */
1294
1295 /*==========================================================
1296 **
1297 **
1298 ** Global static data.
1299 **
1300 **
1301 **==========================================================
1302 */
1303
1304 #ifdef _KERNEL
1305
1306 static int ncr_debug = SCSI_NCR_DEBUG;
1307 SYSCTL_INT(_debug, OID_AUTO, ncr_debug, CTLFLAG_RW, &ncr_debug, 0,
1308 "Driver debug flags");
1309
1310 static int ncr_cache; /* to be aligned _NOT_ static */
1311
1312 /*==========================================================
1313 **
1314 **
1315 ** Global static data: auto configure
1316 **
1317 **
1318 **==========================================================
1319 */
1320
1321 #define NCR_810_ID (0x00011000ul)
1322 #define NCR_815_ID (0x00041000ul)
1323 #define NCR_820_ID (0x00021000ul)
1324 #define NCR_825_ID (0x00031000ul)
1325 #define NCR_860_ID (0x00061000ul)
1326 #define NCR_875_ID (0x000f1000ul)
1327 #define NCR_875_ID2 (0x008f1000ul)
1328 #define NCR_885_ID (0x000d1000ul)
1329 #define NCR_895_ID (0x000c1000ul)
1330 #define NCR_896_ID (0x000b1000ul)
1331 #define NCR_895A_ID (0x00121000ul)
1332 #define NCR_1510D_ID (0x000a1000ul)
1333
1334
1335 static char *ncr_name (ncb_p np)
1336 {
1337 static char name[10];
1338 ksnprintf(name, sizeof(name), "ncr%d", np->unit);
1339 return (name);
1340 }
1341
1342 /*==========================================================
1343 **
1344 **
1345 ** Scripts for NCR-Processor.
1346 **
1347 ** Use ncr_script_bind for binding to physical addresses.
1348 **
1349 **
1350 **==========================================================
1351 **
1352 ** NADDR generates a reference to a field of the controller data.
1353 ** PADDR generates a reference to another part of the script.
1354 ** RADDR generates a reference to a script processor register.
1355 ** FADDR generates a reference to a script processor register
1356 ** with offset.
1357 **
1358 **----------------------------------------------------------
1359 */
1360
1361 #define RELOC_SOFTC 0x40000000
1362 #define RELOC_LABEL 0x50000000
1363 #define RELOC_REGISTER 0x60000000
1364 #define RELOC_KVAR 0x70000000
1365 #define RELOC_LABELH 0x80000000
1366 #define RELOC_MASK 0xf0000000
1367
1368 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
1369 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
1370 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
1371 #define RADDR(label) (RELOC_REGISTER | REG(label))
1372 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
1373 #define KVAR(which) (RELOC_KVAR | (which))
1374
1375 #define KVAR_SECOND (0)
1376 #define KVAR_TICKS (1)
1377 #define KVAR_NCR_CACHE (2)
1378
1379 #define SCRIPT_KVAR_FIRST (0)
1380 #define SCRIPT_KVAR_LAST (3)
1381
1382 /*
1383 * Kernel variables referenced in the scripts.
1384 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
1385 */
1386 static void *script_kvars[] =
1387 { &time_uptime, &ticks, &ncr_cache };
1388
1389 static struct script script0 = {
1390 /*--------------------------< START >-----------------------*/ {
1391 /*
1392 ** Claim to be still alive ...
1393 */
1394 SCR_COPY (sizeof (((struct ncb *)0)->heartbeat)),
1395 KVAR (KVAR_SECOND),
1396 NADDR (heartbeat),
1397 /*
1398 ** Make data structure address invalid.
1399 ** clear SIGP.
1400 */
1401 SCR_LOAD_REG (dsa, 0xff),
1402 0,
1403 SCR_FROM_REG (ctest2),
1404 0,
1405 }/*-------------------------< START0 >----------------------*/,{
1406 /*
1407 ** Hook for interrupted GetConditionCode.
1408 ** Will be patched to ... IFTRUE by
1409 ** the interrupt handler.
1410 */
1411 SCR_INT ^ IFFALSE (0),
1412 SIR_SENSE_RESTART,
1413
1414 }/*-------------------------< START1 >----------------------*/,{
1415 /*
1416 ** Hook for stalled start queue.
1417 ** Will be patched to IFTRUE by the interrupt handler.
1418 */
1419 SCR_INT ^ IFFALSE (0),
1420 SIR_STALL_RESTART,
1421 /*
1422 ** Then jump to a certain point in tryloop.
1423 ** Due to the lack of indirect addressing the code
1424 ** is self modifying here.
1425 */
1426 SCR_JUMP,
1427 }/*-------------------------< STARTPOS >--------------------*/,{
1428 PADDRH(tryloop),
1429
1430 }/*-------------------------< TRYSEL >----------------------*/,{
1431 /*
1432 ** Now:
1433 ** DSA: Address of a Data Structure
1434 ** or Address of the IDLE-Label.
1435 **
1436 ** TEMP: Address of a script, which tries to
1437 ** start the NEXT entry.
1438 **
1439 ** Save the TEMP register into the SCRATCHA register.
1440 ** Then copy the DSA to TEMP and RETURN.
1441 ** This is kind of an indirect jump.
1442 ** (The script processor has NO stack, so the
1443 ** CALL is actually a jump and link, and the
1444 ** RETURN is an indirect jump.)
1445 **
1446 ** If the slot was empty, DSA contains the address
1447 ** of the IDLE part of this script. The processor
1448 ** jumps to IDLE and waits for a reselect.
1449 ** It will wake up and try the same slot again
1450 ** after the SIGP bit becomes set by the host.
1451 **
1452 ** If the slot was not empty, DSA contains
1453 ** the address of the phys-part of a nccb.
1454 ** The processor jumps to this address.
1455 ** phys starts with head,
1456 ** head starts with launch,
1457 ** so actually the processor jumps to
1458 ** the lauch part.
1459 ** If the entry is scheduled for execution,
1460 ** then launch contains a jump to SELECT.
1461 ** If it's not scheduled, it contains a jump to IDLE.
1462 */
1463 SCR_COPY (4),
1464 RADDR (temp),
1465 RADDR (scratcha),
1466 SCR_COPY (4),
1467 RADDR (dsa),
1468 RADDR (temp),
1469 SCR_RETURN,
1470 0
1471
1472 }/*-------------------------< SKIP >------------------------*/,{
1473 /*
1474 ** This entry has been canceled.
1475 ** Next time use the next slot.
1476 */
1477 SCR_COPY (4),
1478 RADDR (scratcha),
1479 PADDR (startpos),
1480 /*
1481 ** patch the launch field.
1482 ** should look like an idle process.
1483 */
1484 SCR_COPY_F (4),
1485 RADDR (dsa),
1486 PADDR (skip2),
1487 SCR_COPY (8),
1488 PADDR (idle),
1489 }/*-------------------------< SKIP2 >-----------------------*/,{
1490 0,
1491 SCR_JUMP,
1492 PADDR(start),
1493 }/*-------------------------< IDLE >------------------------*/,{
1494 /*
1495 ** Nothing to do?
1496 ** Wait for reselect.
1497 */
1498 SCR_JUMP,
1499 PADDR(reselect),
1500
1501 }/*-------------------------< SELECT >----------------------*/,{
1502 /*
1503 ** DSA contains the address of a scheduled
1504 ** data structure.
1505 **
1506 ** SCRATCHA contains the address of the script,
1507 ** which starts the next entry.
1508 **
1509 ** Set Initiator mode.
1510 **
1511 ** (Target mode is left as an exercise for the reader)
1512 */
1513
1514 SCR_CLR (SCR_TRG),
1515 0,
1516 SCR_LOAD_REG (HS_REG, 0xff),
1517 0,
1518
1519 /*
1520 ** And try to select this target.
1521 */
1522 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
1523 PADDR (reselect),
1524
1525 /*
1526 ** Now there are 4 possibilities:
1527 **
1528 ** (1) The ncr looses arbitration.
1529 ** This is ok, because it will try again,
1530 ** when the bus becomes idle.
1531 ** (But beware of the timeout function!)
1532 **
1533 ** (2) The ncr is reselected.
1534 ** Then the script processor takes the jump
1535 ** to the RESELECT label.
1536 **
1537 ** (3) The ncr completes the selection.
1538 ** Then it will execute the next statement.
1539 **
1540 ** (4) There is a selection timeout.
1541 ** Then the ncr should interrupt the host and stop.
1542 ** Unfortunately, it seems to continue execution
1543 ** of the script. But it will fail with an
1544 ** IID-interrupt on the next WHEN.
1545 */
1546
1547 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
1548 0,
1549
1550 /*
1551 ** Send the IDENTIFY and SIMPLE_TAG messages
1552 ** (and the MSG_EXT_SDTR message)
1553 */
1554 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1555 offsetof (struct dsb, smsg),
1556 #ifdef undef /* XXX better fail than try to deal with this ... */
1557 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1558 -16,
1559 #endif
1560 SCR_CLR (SCR_ATN),
1561 0,
1562 SCR_COPY (1),
1563 RADDR (sfbr),
1564 NADDR (lastmsg),
1565 /*
1566 ** Selection complete.
1567 ** Next time use the next slot.
1568 */
1569 SCR_COPY (4),
1570 RADDR (scratcha),
1571 PADDR (startpos),
1572 }/*-------------------------< PREPARE >----------------------*/,{
1573 /*
1574 ** The ncr doesn't have an indirect load
1575 ** or store command. So we have to
1576 ** copy part of the control block to a
1577 ** fixed place, where we can access it.
1578 **
1579 ** We patch the address part of a
1580 ** COPY command with the DSA-register.
1581 */
1582 SCR_COPY_F (4),
1583 RADDR (dsa),
1584 PADDR (loadpos),
1585 /*
1586 ** then we do the actual copy.
1587 */
1588 SCR_COPY (sizeof (struct head)),
1589 /*
1590 ** continued after the next label ...
1591 */
1592
1593 }/*-------------------------< LOADPOS >---------------------*/,{
1594 0,
1595 NADDR (header),
1596 /*
1597 ** Mark this nccb as not scheduled.
1598 */
1599 SCR_COPY (8),
1600 PADDR (idle),
1601 NADDR (header.launch),
1602 /*
1603 ** Set a time stamp for this selection
1604 */
1605 SCR_COPY (sizeof (ticks)),
1606 KVAR (KVAR_TICKS),
1607 NADDR (header.stamp.select),
1608 /*
1609 ** load the savep (saved pointer) into
1610 ** the TEMP register (actual pointer)
1611 */
1612 SCR_COPY (4),
1613 NADDR (header.savep),
1614 RADDR (temp),
1615 /*
1616 ** Initialize the status registers
1617 */
1618 SCR_COPY (4),
1619 NADDR (header.status),
1620 RADDR (scr0),
1621
1622 }/*-------------------------< PREPARE2 >---------------------*/,{
1623 /*
1624 ** Load the synchronous mode register
1625 */
1626 SCR_COPY (1),
1627 NADDR (sync_st),
1628 RADDR (sxfer),
1629 /*
1630 ** Load the wide mode and timing register
1631 */
1632 SCR_COPY (1),
1633 NADDR (wide_st),
1634 RADDR (scntl3),
1635 /*
1636 ** Initialize the msgout buffer with a NOOP message.
1637 */
1638 SCR_LOAD_REG (scratcha, MSG_NOOP),
1639 0,
1640 SCR_COPY (1),
1641 RADDR (scratcha),
1642 NADDR (msgout),
1643 SCR_COPY (1),
1644 RADDR (scratcha),
1645 NADDR (msgin),
1646 /*
1647 ** Message in phase ?
1648 */
1649 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1650 PADDR (dispatch),
1651 /*
1652 ** Extended or reject message ?
1653 */
1654 SCR_FROM_REG (sbdl),
1655 0,
1656 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1657 PADDR (msg_in),
1658 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1659 PADDRH (msg_reject),
1660 /*
1661 ** normal processing
1662 */
1663 SCR_JUMP,
1664 PADDR (dispatch),
1665 }/*-------------------------< SETMSG >----------------------*/,{
1666 SCR_COPY (1),
1667 RADDR (scratcha),
1668 NADDR (msgout),
1669 SCR_SET (SCR_ATN),
1670 0,
1671 }/*-------------------------< CLRACK >----------------------*/,{
1672 /*
1673 ** Terminate possible pending message phase.
1674 */
1675 SCR_CLR (SCR_ACK),
1676 0,
1677
1678 }/*-----------------------< DISPATCH >----------------------*/,{
1679 SCR_FROM_REG (HS_REG),
1680 0,
1681 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
1682 SIR_NEGO_FAILED,
1683 /*
1684 ** remove bogus output signals
1685 */
1686 SCR_REG_REG (socl, SCR_AND, CACK|CATN),
1687 0,
1688 SCR_RETURN ^ IFTRUE (WHEN (SCR_DATA_OUT)),
1689 0,
1690 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_IN)),
1691 0,
1692 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
1693 PADDR (msg_out),
1694 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_IN)),
1695 PADDR (msg_in),
1696 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
1697 PADDR (command),
1698 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
1699 PADDR (status),
1700 /*
1701 ** Discard one illegal phase byte, if required.
1702 */
1703 SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
1704 0,
1705 SCR_COPY (1),
1706 RADDR (scratcha),
1707 NADDR (xerr_st),
1708 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
1709 8,
1710 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
1711 NADDR (scratch),
1712 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
1713 8,
1714 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
1715 NADDR (scratch),
1716 SCR_JUMP,
1717 PADDR (dispatch),
1718
1719 }/*-------------------------< NO_DATA >--------------------*/,{
1720 /*
1721 ** The target wants to tranfer too much data
1722 ** or in the wrong direction.
1723 ** Remember that in extended error.
1724 */
1725 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
1726 0,
1727 SCR_COPY (1),
1728 RADDR (scratcha),
1729 NADDR (xerr_st),
1730 /*
1731 ** Discard one data byte, if required.
1732 */
1733 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1734 8,
1735 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
1736 NADDR (scratch),
1737 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
1738 8,
1739 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
1740 NADDR (scratch),
1741 /*
1742 ** .. and repeat as required.
1743 */
1744 SCR_CALL,
1745 PADDR (dispatch),
1746 SCR_JUMP,
1747 PADDR (no_data),
1748 }/*-------------------------< CHECKATN >--------------------*/,{
1749 /*
1750 ** If AAP (bit 1 of scntl0 register) is set
1751 ** and a parity error is detected,
1752 ** the script processor asserts ATN.
1753 **
1754 ** The target should switch to a MSG_OUT phase
1755 ** to get the message.
1756 */
1757 SCR_FROM_REG (socl),
1758 0,
1759 SCR_JUMP ^ IFFALSE (MASK (CATN, CATN)),
1760 PADDR (dispatch),
1761 /*
1762 ** count it
1763 */
1764 SCR_REG_REG (PS_REG, SCR_ADD, 1),
1765 0,
1766 /*
1767 ** Prepare a MSG_INITIATOR_DET_ERR message
1768 ** (initiator detected error).
1769 ** The target should retry the transfer.
1770 */
1771 SCR_LOAD_REG (scratcha, MSG_INITIATOR_DET_ERR),
1772 0,
1773 SCR_JUMP,
1774 PADDR (setmsg),
1775
1776 }/*-------------------------< COMMAND >--------------------*/,{
1777 /*
1778 ** If this is not a GETCC transfer ...
1779 */
1780 SCR_FROM_REG (SS_REG),
1781 0,
1782 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1783 28,
1784 /*
1785 ** ... set a timestamp ...
1786 */
1787 SCR_COPY (sizeof (ticks)),
1788 KVAR (KVAR_TICKS),
1789 NADDR (header.stamp.command),
1790 /*
1791 ** ... and send the command
1792 */
1793 SCR_MOVE_TBL ^ SCR_COMMAND,
1794 offsetof (struct dsb, cmd),
1795 SCR_JUMP,
1796 PADDR (dispatch),
1797 /*
1798 ** Send the GETCC command
1799 */
1800 /*>>>*/ SCR_MOVE_TBL ^ SCR_COMMAND,
1801 offsetof (struct dsb, scmd),
1802 SCR_JUMP,
1803 PADDR (dispatch),
1804
1805 }/*-------------------------< STATUS >--------------------*/,{
1806 /*
1807 ** set the timestamp.
1808 */
1809 SCR_COPY (sizeof (ticks)),
1810 KVAR (KVAR_TICKS),
1811 NADDR (header.stamp.status),
1812 /*
1813 ** If this is a GETCC transfer,
1814 */
1815 SCR_FROM_REG (SS_REG),
1816 0,
1817 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (SCSI_STATUS_CHECK_COND)),
1818 40,
1819 /*
1820 ** get the status
1821 */
1822 SCR_MOVE_ABS (1) ^ SCR_STATUS,
1823 NADDR (scratch),
1824 /*
1825 ** Save status to scsi_status.
1826 ** Mark as complete.
1827 ** And wait for disconnect.
1828 */
1829 SCR_TO_REG (SS_REG),
1830 0,
1831 SCR_REG_REG (SS_REG, SCR_OR, SCSI_STATUS_SENSE),
1832 0,
1833 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1834 0,
1835 SCR_JUMP,
1836 PADDR (checkatn),
1837 /*
1838 ** If it was no GETCC transfer,
1839 ** save the status to scsi_status.
1840 */
1841 /*>>>*/ SCR_MOVE_ABS (1) ^ SCR_STATUS,
1842 NADDR (scratch),
1843 SCR_TO_REG (SS_REG),
1844 0,
1845 /*
1846 ** if it was no check condition ...
1847 */
1848 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1849 PADDR (checkatn),
1850 /*
1851 ** ... mark as complete.
1852 */
1853 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1854 0,
1855 SCR_JUMP,
1856 PADDR (checkatn),
1857
1858 }/*-------------------------< MSG_IN >--------------------*/,{
1859 /*
1860 ** Get the first byte of the message
1861 ** and save it to SCRATCHA.
1862 **
1863 ** The script processor doesn't negate the
1864 ** ACK signal after this transfer.
1865 */
1866 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1867 NADDR (msgin[0]),
1868 /*
1869 ** Check for message parity error.
1870 */
1871 SCR_TO_REG (scratcha),
1872 0,
1873 SCR_FROM_REG (socl),
1874 0,
1875 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
1876 PADDRH (msg_parity),
1877 SCR_FROM_REG (scratcha),
1878 0,
1879 /*
1880 ** Parity was ok, handle this message.
1881 */
1882 SCR_JUMP ^ IFTRUE (DATA (MSG_CMDCOMPLETE)),
1883 PADDR (complete),
1884 SCR_JUMP ^ IFTRUE (DATA (MSG_SAVEDATAPOINTER)),
1885 PADDR (save_dp),
1886 SCR_JUMP ^ IFTRUE (DATA (MSG_RESTOREPOINTERS)),
1887 PADDR (restore_dp),
1888 SCR_JUMP ^ IFTRUE (DATA (MSG_DISCONNECT)),
1889 PADDR (disconnect),
1890 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1891 PADDRH (msg_extended),
1892 SCR_JUMP ^ IFTRUE (DATA (MSG_NOOP)),
1893 PADDR (clrack),
1894 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1895 PADDRH (msg_reject),
1896 SCR_JUMP ^ IFTRUE (DATA (MSG_IGN_WIDE_RESIDUE)),
1897 PADDRH (msg_ign_residue),
1898 /*
1899 ** Rest of the messages left as
1900 ** an exercise ...
1901 **
1902 ** Unimplemented messages:
1903 ** fall through to MSG_BAD.
1904 */
1905 }/*-------------------------< MSG_BAD >------------------*/,{
1906 /*
1907 ** unimplemented message - reject it.
1908 */
1909 SCR_INT,
1910 SIR_REJECT_SENT,
1911 SCR_LOAD_REG (scratcha, MSG_MESSAGE_REJECT),
1912 0,
1913 SCR_JUMP,
1914 PADDR (setmsg),
1915
1916 }/*-------------------------< COMPLETE >-----------------*/,{
1917 /*
1918 ** Complete message.
1919 **
1920 ** If it's not the get condition code,
1921 ** copy TEMP register to LASTP in header.
1922 */
1923 SCR_FROM_REG (SS_REG),
1924 0,
1925 /*<<<*/ SCR_JUMPR ^ IFTRUE (MASK (SCSI_STATUS_SENSE, SCSI_STATUS_SENSE)),
1926 12,
1927 SCR_COPY (4),
1928 RADDR (temp),
1929 NADDR (header.lastp),
1930 /*>>>*/ /*
1931 ** When we terminate the cycle by clearing ACK,
1932 ** the target may disconnect immediately.
1933 **
1934 ** We don't want to be told of an
1935 ** "unexpected disconnect",
1936 ** so we disable this feature.
1937 */
1938 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1939 0,
1940 /*
1941 ** Terminate cycle ...
1942 */
1943 SCR_CLR (SCR_ACK|SCR_ATN),
1944 0,
1945 /*
1946 ** ... and wait for the disconnect.
1947 */
1948 SCR_WAIT_DISC,
1949 0,
1950 }/*-------------------------< CLEANUP >-------------------*/,{
1951 /*
1952 ** dsa: Pointer to nccb
1953 ** or xxxxxxFF (no nccb)
1954 **
1955 ** HS_REG: Host-Status (<>0!)
1956 */
1957 SCR_FROM_REG (dsa),
1958 0,
1959 SCR_JUMP ^ IFTRUE (DATA (0xff)),
1960 PADDR (signal),
1961 /*
1962 ** dsa is valid.
1963 ** save the status registers
1964 */
1965 SCR_COPY (4),
1966 RADDR (scr0),
1967 NADDR (header.status),
1968 /*
1969 ** and copy back the header to the nccb.
1970 */
1971 SCR_COPY_F (4),
1972 RADDR (dsa),
1973 PADDR (cleanup0),
1974 SCR_COPY (sizeof (struct head)),
1975 NADDR (header),
1976 }/*-------------------------< CLEANUP0 >--------------------*/,{
1977 0,
1978
1979 /*
1980 ** If command resulted in "check condition"
1981 ** status and is not yet completed,
1982 ** try to get the condition code.
1983 */
1984 SCR_FROM_REG (HS_REG),
1985 0,
1986 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
1987 16,
1988 SCR_FROM_REG (SS_REG),
1989 0,
1990 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1991 PADDRH(getcc2),
1992 }/*-------------------------< SIGNAL >----------------------*/,{
1993 /*
1994 ** if status = queue full,
1995 ** reinsert in startqueue and stall queue.
1996 */
1997 /*>>>*/ SCR_FROM_REG (SS_REG),
1998 0,
1999 SCR_INT ^ IFTRUE (DATA (SCSI_STATUS_QUEUE_FULL)),
2000 SIR_STALL_QUEUE,
2001 /*
2002 ** And make the DSA register invalid.
2003 */
2004 SCR_LOAD_REG (dsa, 0xff), /* invalid */
2005 0,
2006 /*
2007 ** if job completed ...
2008 */
2009 SCR_FROM_REG (HS_REG),
2010 0,
2011 /*
2012 ** ... signal completion to the host
2013 */
2014 SCR_INT_FLY ^ IFFALSE (MASK (0, HS_DONEMASK)),
2015 0,
2016 /*
2017 ** Auf zu neuen Schandtaten!
2018 */
2019 SCR_JUMP,
2020 PADDR(start),
2021
2022 }/*-------------------------< SAVE_DP >------------------*/,{
2023 /*
2024 ** SAVE_DP message:
2025 ** Copy TEMP register to SAVEP in header.
2026 */
2027 SCR_COPY (4),
2028 RADDR (temp),
2029 NADDR (header.savep),
2030 SCR_JUMP,
2031 PADDR (clrack),
2032 }/*-------------------------< RESTORE_DP >---------------*/,{
2033 /*
2034 ** RESTORE_DP message:
2035 ** Copy SAVEP in header to TEMP register.
2036 */
2037 SCR_COPY (4),
2038 NADDR (header.savep),
2039 RADDR (temp),
2040 SCR_JUMP,
2041 PADDR (clrack),
2042
2043 }/*-------------------------< DISCONNECT >---------------*/,{
2044 /*
2045 ** If QUIRK_AUTOSAVE is set,
2046 ** do an "save pointer" operation.
2047 */
2048 SCR_FROM_REG (QU_REG),
2049 0,
2050 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)),
2051 12,
2052 /*
2053 ** like SAVE_DP message:
2054 ** Copy TEMP register to SAVEP in header.
2055 */
2056 SCR_COPY (4),
2057 RADDR (temp),
2058 NADDR (header.savep),
2059 /*>>>*/ /*
2060 ** Check if temp==savep or temp==goalp:
2061 ** if not, log a missing save pointer message.
2062 ** In fact, it's a comparison mod 256.
2063 **
2064 ** Hmmm, I hadn't thought that I would be urged to
2065 ** write this kind of ugly self modifying code.
2066 **
2067 ** It's unbelievable, but the ncr53c8xx isn't able
2068 ** to subtract one register from another.
2069 */
2070 SCR_FROM_REG (temp),
2071 0,
2072 /*
2073 ** You are not expected to understand this ..
2074 **
2075 ** CAUTION: only little endian architectures supported! XXX
2076 */
2077 SCR_COPY_F (1),
2078 NADDR (header.savep),
2079 PADDR (disconnect0),
2080 }/*-------------------------< DISCONNECT0 >--------------*/,{
2081 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (1)),
2082 20,
2083 /*
2084 ** neither this
2085 */
2086 SCR_COPY_F (1),
2087 NADDR (header.goalp),
2088 PADDR (disconnect1),
2089 }/*-------------------------< DISCONNECT1 >--------------*/,{
2090 SCR_INT ^ IFFALSE (DATA (1)),
2091 SIR_MISSING_SAVE,
2092 /*>>>*/
2093
2094 /*
2095 ** DISCONNECTing ...
2096 **
2097 ** disable the "unexpected disconnect" feature,
2098 ** and remove the ACK signal.
2099 */
2100 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2101 0,
2102 SCR_CLR (SCR_ACK|SCR_ATN),
2103 0,
2104 /*
2105 ** Wait for the disconnect.
2106 */
2107 SCR_WAIT_DISC,
2108 0,
2109 /*
2110 ** Profiling:
2111 ** Set a time stamp,
2112 ** and count the disconnects.
2113 */
2114 SCR_COPY (sizeof (ticks)),
2115 KVAR (KVAR_TICKS),
2116 NADDR (header.stamp.disconnect),
2117 SCR_COPY (4),
2118 NADDR (disc_phys),
2119 RADDR (temp),
2120 SCR_REG_REG (temp, SCR_ADD, 0x01),
2121 0,
2122 SCR_COPY (4),
2123 RADDR (temp),
2124 NADDR (disc_phys),
2125 /*
2126 ** Status is: DISCONNECTED.
2127 */
2128 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
2129 0,
2130 SCR_JUMP,
2131 PADDR (cleanup),
2132
2133 }/*-------------------------< MSG_OUT >-------------------*/,{
2134 /*
2135 ** The target requests a message.
2136 */
2137 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2138 NADDR (msgout),
2139 SCR_COPY (1),
2140 RADDR (sfbr),
2141 NADDR (lastmsg),
2142 /*
2143 ** If it was no ABORT message ...
2144 */
2145 SCR_JUMP ^ IFTRUE (DATA (MSG_ABORT)),
2146 PADDRH (msg_out_abort),
2147 /*
2148 ** ... wait for the next phase
2149 ** if it's a message out, send it again, ...
2150 */
2151 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2152 PADDR (msg_out),
2153 }/*-------------------------< MSG_OUT_DONE >--------------*/,{
2154 /*
2155 ** ... else clear the message ...
2156 */
2157 SCR_LOAD_REG (scratcha, MSG_NOOP),
2158 0,
2159 SCR_COPY (4),
2160 RADDR (scratcha),
2161 NADDR (msgout),
2162 /*
2163 ** ... and process the next phase
2164 */
2165 SCR_JUMP,
2166 PADDR (dispatch),
2167
2168 }/*------------------------< BADGETCC >---------------------*/,{
2169 /*
2170 ** If SIGP was set, clear it and try again.
2171 */
2172 SCR_FROM_REG (ctest2),
2173 0,
2174 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2175 PADDRH (getcc2),
2176 SCR_INT,
2177 SIR_SENSE_FAILED,
2178 }/*-------------------------< RESELECT >--------------------*/,{
2179 /*
2180 ** This NOP will be patched with LED OFF
2181 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
2182 */
2183 SCR_NO_OP,
2184 0,
2185
2186 /*
2187 ** make the DSA invalid.
2188 */
2189 SCR_LOAD_REG (dsa, 0xff),
2190 0,
2191 SCR_CLR (SCR_TRG),
2192 0,
2193 /*
2194 ** Sleep waiting for a reselection.
2195 ** If SIGP is set, special treatment.
2196 **
2197 ** Zu allem bereit ..
2198 */
2199 SCR_WAIT_RESEL,
2200 PADDR(reselect2),
2201 }/*-------------------------< RESELECT1 >--------------------*/,{
2202 /*
2203 ** This NOP will be patched with LED ON
2204 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2205 */
2206 SCR_NO_OP,
2207 0,
2208 /*
2209 ** ... zu nichts zu gebrauchen ?
2210 **
2211 ** load the target id into the SFBR
2212 ** and jump to the control block.
2213 **
2214 ** Look at the declarations of
2215 ** - struct ncb
2216 ** - struct tcb
2217 ** - struct lcb
2218 ** - struct nccb
2219 ** to understand what's going on.
2220 */
2221 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
2222 0,
2223 SCR_TO_REG (sdid),
2224 0,
2225 SCR_JUMP,
2226 NADDR (jump_tcb),
2227 }/*-------------------------< RESELECT2 >-------------------*/,{
2228 /*
2229 ** This NOP will be patched with LED ON
2230 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2231 */
2232 SCR_NO_OP,
2233 0,
2234 /*
2235 ** If it's not connected :(
2236 ** -> interrupted by SIGP bit.
2237 ** Jump to start.
2238 */
2239 SCR_FROM_REG (ctest2),
2240 0,
2241 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2242 PADDR (start),
2243 SCR_JUMP,
2244 PADDR (reselect),
2245
2246 }/*-------------------------< RESEL_TMP >-------------------*/,{
2247 /*
2248 ** The return address in TEMP
2249 ** is in fact the data structure address,
2250 ** so copy it to the DSA register.
2251 */
2252 SCR_COPY (4),
2253 RADDR (temp),
2254 RADDR (dsa),
2255 SCR_JUMP,
2256 PADDR (prepare),
2257
2258 }/*-------------------------< RESEL_LUN >-------------------*/,{
2259 /*
2260 ** come back to this point
2261 ** to get an IDENTIFY message
2262 ** Wait for a msg_in phase.
2263 */
2264 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2265 48,
2266 /*
2267 ** message phase
2268 ** It's not a sony, it's a trick:
2269 ** read the data without acknowledging it.
2270 */
2271 SCR_FROM_REG (sbdl),
2272 0,
2273 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (MSG_IDENTIFYFLAG, 0x98)),
2274 32,
2275 /*
2276 ** It WAS an Identify message.
2277 ** get it and ack it!
2278 */
2279 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2280 NADDR (msgin),
2281 SCR_CLR (SCR_ACK),
2282 0,
2283 /*
2284 ** Mask out the lun.
2285 */
2286 SCR_REG_REG (sfbr, SCR_AND, 0x07),
2287 0,
2288 SCR_RETURN,
2289 0,
2290 /*
2291 ** No message phase or no IDENTIFY message:
2292 ** return 0.
2293 */
2294 /*>>>*/ SCR_LOAD_SFBR (0),
2295 0,
2296 SCR_RETURN,
2297 0,
2298
2299 }/*-------------------------< RESEL_TAG >-------------------*/,{
2300 /*
2301 ** come back to this point
2302 ** to get a SIMPLE_TAG message
2303 ** Wait for a MSG_IN phase.
2304 */
2305 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2306 64,
2307 /*
2308 ** message phase
2309 ** It's a trick - read the data
2310 ** without acknowledging it.
2311 */
2312 SCR_FROM_REG (sbdl),
2313 0,
2314 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (MSG_SIMPLE_Q_TAG)),
2315 48,
2316 /*
2317 ** It WAS a SIMPLE_TAG message.
2318 ** get it and ack it!
2319 */
2320 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2321 NADDR (msgin),
2322 SCR_CLR (SCR_ACK),
2323 0,
2324 /*
2325 ** Wait for the second byte (the tag)
2326 */
2327 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2328 24,
2329 /*
2330 ** Get it and ack it!
2331 */
2332 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2333 NADDR (msgin),
2334 SCR_CLR (SCR_ACK|SCR_CARRY),
2335 0,
2336 SCR_RETURN,
2337 0,
2338 /*
2339 ** No message phase or no SIMPLE_TAG message
2340 ** or no second byte: return 0.
2341 */
2342 /*>>>*/ SCR_LOAD_SFBR (0),
2343 0,
2344 SCR_SET (SCR_CARRY),
2345 0,
2346 SCR_RETURN,
2347 0,
2348
2349 }/*-------------------------< DATA_IN >--------------------*/,{
2350 /*
2351 ** Because the size depends on the
2352 ** #define MAX_SCATTER parameter,
2353 ** it is filled in at runtime.
2354 **
2355 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2356 ** PADDR (no_data),
2357 ** SCR_COPY (sizeof (ticks)),
2358 ** KVAR (KVAR_TICKS),
2359 ** NADDR (header.stamp.data),
2360 ** SCR_MOVE_TBL ^ SCR_DATA_IN,
2361 ** offsetof (struct dsb, data[ 0]),
2362 **
2363 ** ##===========< i=1; i<MAX_SCATTER >=========
2364 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2365 ** || PADDR (checkatn),
2366 ** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2367 ** || offsetof (struct dsb, data[ i]),
2368 ** ##==========================================
2369 **
2370 ** SCR_CALL,
2371 ** PADDR (checkatn),
2372 ** SCR_JUMP,
2373 ** PADDR (no_data),
2374 */
2375 0
2376 }/*-------------------------< DATA_OUT >-------------------*/,{
2377 /*
2378 ** Because the size depends on the
2379 ** #define MAX_SCATTER parameter,
2380 ** it is filled in at runtime.
2381 **
2382 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2383 ** PADDR (no_data),
2384 ** SCR_COPY (sizeof (ticks)),
2385 ** KVAR (KVAR_TICKS),
2386 ** NADDR (header.stamp.data),
2387 ** SCR_MOVE_TBL ^ SCR_DATA_OUT,
2388 ** offsetof (struct dsb, data[ 0]),
2389 **
2390 ** ##===========< i=1; i<MAX_SCATTER >=========
2391 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2392 ** || PADDR (dispatch),
2393 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2394 ** || offsetof (struct dsb, data[ i]),
2395 ** ##==========================================
2396 **
2397 ** SCR_CALL,
2398 ** PADDR (dispatch),
2399 ** SCR_JUMP,
2400 ** PADDR (no_data),
2401 **
2402 **---------------------------------------------------------
2403 */
2404 (u_long)0
2405
2406 }/*--------------------------------------------------------*/
2407 };
2408
2409
2410 static struct scripth scripth0 = {
2411 /*-------------------------< TRYLOOP >---------------------*/{
2412 /*
2413 ** Load an entry of the start queue into dsa
2414 ** and try to start it by jumping to TRYSEL.
2415 **
2416 ** Because the size depends on the
2417 ** #define MAX_START parameter, it is filled
2418 ** in at runtime.
2419 **
2420 **-----------------------------------------------------------
2421 **
2422 ** ##===========< I=0; i<MAX_START >===========
2423 ** || SCR_COPY (4),
2424 ** || NADDR (squeue[i]),
2425 ** || RADDR (dsa),
2426 ** || SCR_CALL,
2427 ** || PADDR (trysel),
2428 ** ##==========================================
2429 **
2430 ** SCR_JUMP,
2431 ** PADDRH(tryloop),
2432 **
2433 **-----------------------------------------------------------
2434 */
2435 0
2436 }/*-------------------------< MSG_PARITY >---------------*/,{
2437 /*
2438 ** count it
2439 */
2440 SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2441 0,
2442 /*
2443 ** send a "message parity error" message.
2444 */
2445 SCR_LOAD_REG (scratcha, MSG_PARITY_ERROR),
2446 0,
2447 SCR_JUMP,
2448 PADDR (setmsg),
2449 }/*-------------------------< MSG_MESSAGE_REJECT >---------------*/,{
2450 /*
2451 ** If a negotiation was in progress,
2452 ** negotiation failed.
2453 */
2454 SCR_FROM_REG (HS_REG),
2455 0,
2456 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2457 SIR_NEGO_FAILED,
2458 /*
2459 ** else make host log this message
2460 */
2461 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2462 SIR_REJECT_RECEIVED,
2463 SCR_JUMP,
2464 PADDR (clrack),
2465
2466 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2467 /*
2468 ** Terminate cycle
2469 */
2470 SCR_CLR (SCR_ACK),
2471 0,
2472 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2473 PADDR (dispatch),
2474 /*
2475 ** get residue size.
2476 */
2477 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2478 NADDR (msgin[1]),
2479 /*
2480 ** Check for message parity error.
2481 */
2482 SCR_TO_REG (scratcha),
2483 0,
2484 SCR_FROM_REG (socl),
2485 0,
2486 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2487 PADDRH (msg_parity),
2488 SCR_FROM_REG (scratcha),
2489 0,
2490 /*
2491 ** Size is 0 .. ignore message.
2492 */
2493 SCR_JUMP ^ IFTRUE (DATA (0)),
2494 PADDR (clrack),
2495 /*
2496 ** Size is not 1 .. have to interrupt.
2497 */
2498 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (1)),
2499 40,
2500 /*
2501 ** Check for residue byte in swide register
2502 */
2503 SCR_FROM_REG (scntl2),
2504 0,
2505 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2506 16,
2507 /*
2508 ** There IS data in the swide register.
2509 ** Discard it.
2510 */
2511 SCR_REG_REG (scntl2, SCR_OR, WSR),
2512 0,
2513 SCR_JUMP,
2514 PADDR (clrack),
2515 /*
2516 ** Load again the size to the sfbr register.
2517 */
2518 /*>>>*/ SCR_FROM_REG (scratcha),
2519 0,
2520 /*>>>*/ SCR_INT,
2521 SIR_IGN_RESIDUE,
2522 SCR_JUMP,
2523 PADDR (clrack),
2524
2525 }/*-------------------------< MSG_EXTENDED >-------------*/,{
2526 /*
2527 ** Terminate cycle
2528 */
2529 SCR_CLR (SCR_ACK),
2530 0,
2531 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2532 PADDR (dispatch),
2533 /*
2534 ** get length.
2535 */
2536 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2537 NADDR (msgin[1]),
2538 /*
2539 ** Check for message parity error.
2540 */
2541 SCR_TO_REG (scratcha),
2542 0,
2543 SCR_FROM_REG (socl),
2544 0,
2545 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2546 PADDRH (msg_parity),
2547 SCR_FROM_REG (scratcha),
2548 0,
2549 /*
2550 */
2551 SCR_JUMP ^ IFTRUE (DATA (3)),
2552 PADDRH (msg_ext_3),
2553 SCR_JUMP ^ IFFALSE (DATA (2)),
2554 PADDR (msg_bad),
2555 }/*-------------------------< MSG_EXT_2 >----------------*/,{
2556 SCR_CLR (SCR_ACK),
2557 0,
2558 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2559 PADDR (dispatch),
2560 /*
2561 ** get extended message code.
2562 */
2563 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2564 NADDR (msgin[2]),
2565 /*
2566 ** Check for message parity error.
2567 */
2568 SCR_TO_REG (scratcha),
2569 0,
2570 SCR_FROM_REG (socl),
2571 0,
2572 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2573 PADDRH (msg_parity),
2574 SCR_FROM_REG (scratcha),
2575 0,
2576 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_WDTR)),
2577 PADDRH (msg_wdtr),
2578 /*
2579 ** unknown extended message
2580 */
2581 SCR_JUMP,
2582 PADDR (msg_bad)
2583 }/*-------------------------< MSG_WDTR >-----------------*/,{
2584 SCR_CLR (SCR_ACK),
2585 0,
2586 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2587 PADDR (dispatch),
2588 /*
2589 ** get data bus width
2590 */
2591 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2592 NADDR (msgin[3]),
2593 SCR_FROM_REG (socl),
2594 0,
2595 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2596 PADDRH (msg_parity),
2597 /*
2598 ** let the host do the real work.
2599 */
2600 SCR_INT,
2601 SIR_NEGO_WIDE,
2602 /*
2603 ** let the target fetch our answer.
2604 */
2605 SCR_SET (SCR_ATN),
2606 0,
2607 SCR_CLR (SCR_ACK),
2608 0,
2609
2610 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2611 SIR_NEGO_PROTO,
2612 /*
2613 ** Send the MSG_EXT_WDTR
2614 */
2615 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
2616 NADDR (msgout),
2617 SCR_CLR (SCR_ATN),
2618 0,
2619 SCR_COPY (1),
2620 RADDR (sfbr),
2621 NADDR (lastmsg),
2622 SCR_JUMP,
2623 PADDR (msg_out_done),
2624
2625 }/*-------------------------< MSG_EXT_3 >----------------*/,{
2626 SCR_CLR (SCR_ACK),
2627 0,
2628 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2629 PADDR (dispatch),
2630 /*
2631 ** get extended message code.
2632 */
2633 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2634 NADDR (msgin[2]),
2635 /*
2636 ** Check for message parity error.
2637 */
2638 SCR_TO_REG (scratcha),
2639 0,
2640 SCR_FROM_REG (socl),
2641 0,
2642 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2643 PADDRH (msg_parity),
2644 SCR_FROM_REG (scratcha),
2645 0,
2646 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_SDTR)),
2647 PADDRH (msg_sdtr),
2648 /*
2649 ** unknown extended message
2650 */
2651 SCR_JUMP,
2652 PADDR (msg_bad)
2653
2654 }/*-------------------------< MSG_SDTR >-----------------*/,{
2655 SCR_CLR (SCR_ACK),
2656 0,
2657 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2658 PADDR (dispatch),
2659 /*
2660 ** get period and offset
2661 */
2662 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
2663 NADDR (msgin[3]),
2664 SCR_FROM_REG (socl),
2665 0,
2666 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2667 PADDRH (msg_parity),
2668 /*
2669 ** let the host do the real work.
2670 */
2671 SCR_INT,
2672 SIR_NEGO_SYNC,
2673 /*
2674 ** let the target fetch our answer.
2675 */
2676 SCR_SET (SCR_ATN),
2677 0,
2678 SCR_CLR (SCR_ACK),
2679 0,
2680
2681 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2682 SIR_NEGO_PROTO,
2683 /*
2684 ** Send the MSG_EXT_SDTR
2685 */
2686 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
2687 NADDR (msgout),
2688 SCR_CLR (SCR_ATN),
2689 0,
2690 SCR_COPY (1),
2691 RADDR (sfbr),
2692 NADDR (lastmsg),
2693 SCR_JUMP,
2694 PADDR (msg_out_done),
2695
2696 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{
2697 /*
2698 ** After ABORT message,
2699 **
2700 ** expect an immediate disconnect, ...
2701 */
2702 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2703 0,
2704 SCR_CLR (SCR_ACK|SCR_ATN),
2705 0,
2706 SCR_WAIT_DISC,
2707 0,
2708 /*
2709 ** ... and set the status to "ABORTED"
2710 */
2711 SCR_LOAD_REG (HS_REG, HS_ABORTED),
2712 0,
2713 SCR_JUMP,
2714 PADDR (cleanup),
2715
2716 }/*-------------------------< GETCC >-----------------------*/,{
2717 /*
2718 ** The ncr doesn't have an indirect load
2719 ** or store command. So we have to
2720 ** copy part of the control block to a
2721 ** fixed place, where we can modify it.
2722 **
2723 ** We patch the address part of a COPY command
2724 ** with the address of the dsa register ...
2725 */
2726 SCR_COPY_F (4),
2727 RADDR (dsa),
2728 PADDRH (getcc1),
2729 /*
2730 ** ... then we do the actual copy.
2731 */
2732 SCR_COPY (sizeof (struct head)),
2733 }/*-------------------------< GETCC1 >----------------------*/,{
2734 0,
2735 NADDR (header),
2736 /*
2737 ** Initialize the status registers
2738 */
2739 SCR_COPY (4),
2740 NADDR (header.status),
2741 RADDR (scr0),
2742 }/*-------------------------< GETCC2 >----------------------*/,{
2743 /*
2744 ** Get the condition code from a target.
2745 **
2746 ** DSA points to a data structure.
2747 ** Set TEMP to the script location
2748 ** that receives the condition code.
2749 **
2750 ** Because there is no script command
2751 ** to load a longword into a register,
2752 ** we use a CALL command.
2753 */
2754 /*<<<*/ SCR_CALLR,
2755 24,
2756 /*
2757 ** Get the condition code.
2758 */
2759 SCR_MOVE_TBL ^ SCR_DATA_IN,
2760 offsetof (struct dsb, sense),
2761 /*
2762 ** No data phase may follow!
2763 */
2764 SCR_CALL,
2765 PADDR (checkatn),
2766 SCR_JUMP,
2767 PADDR (no_data),
2768 /*>>>*/
2769
2770 /*
2771 ** The CALL jumps to this point.
2772 ** Prepare for a RESTORE_POINTER message.
2773 ** Save the TEMP register into the saved pointer.
2774 */
2775 SCR_COPY (4),
2776 RADDR (temp),
2777 NADDR (header.savep),
2778 /*
2779 ** Load scratcha, because in case of a selection timeout,
2780 ** the host will expect a new value for startpos in
2781 ** the scratcha register.
2782 */
2783 SCR_COPY (4),
2784 PADDR (startpos),
2785 RADDR (scratcha),
2786 #ifdef NCR_GETCC_WITHMSG
2787 /*
2788 ** If QUIRK_NOMSG is set, select without ATN.
2789 ** and don't send a message.
2790 */
2791 SCR_FROM_REG (QU_REG),
2792 0,
2793 SCR_JUMP ^ IFTRUE (MASK (QUIRK_NOMSG, QUIRK_NOMSG)),
2794 PADDRH(getcc3),
2795 /*
2796 ** Then try to connect to the target.
2797 ** If we are reselected, special treatment
2798 ** of the current job is required before
2799 ** accepting the reselection.
2800 */
2801 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2802 PADDR(badgetcc),
2803 /*
2804 ** Send the IDENTIFY message.
2805 ** In case of short transfer, remove ATN.
2806 */
2807 SCR_MOVE_TBL ^ SCR_MSG_OUT,
2808 offsetof (struct dsb, smsg2),
2809 SCR_CLR (SCR_ATN),
2810 0,
2811 /*
2812 ** save the first byte of the message.
2813 */
2814 SCR_COPY (1),
2815 RADDR (sfbr),
2816 NADDR (lastmsg),
2817 SCR_JUMP,
2818 PADDR (prepare2),
2819
2820 #endif
2821 }/*-------------------------< GETCC3 >----------------------*/,{
2822 /*
2823 ** Try to connect to the target.
2824 ** If we are reselected, special treatment
2825 ** of the current job is required before
2826 ** accepting the reselection.
2827 **
2828 ** Silly target won't accept a message.
2829 ** Select without ATN.
2830 */
2831 SCR_SEL_TBL ^ offsetof (struct dsb, select),
2832 PADDR(badgetcc),
2833 /*
2834 ** Force error if selection timeout
2835 */
2836 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
2837 0,
2838 /*
2839 ** don't negotiate.
2840 */
2841 SCR_JUMP,
2842 PADDR (prepare2),
2843 }/*-------------------------< ABORTTAG >-------------------*/,{
2844 /*
2845 ** Abort a bad reselection.
2846 ** Set the message to ABORT vs. ABORT_TAG
2847 */
2848 SCR_LOAD_REG (scratcha, MSG_ABORT_TAG),
2849 0,
2850 SCR_JUMPR ^ IFFALSE (CARRYSET),
2851 8,
2852 }/*-------------------------< ABORT >----------------------*/,{
2853 SCR_LOAD_REG (scratcha, MSG_ABORT),
2854 0,
2855 SCR_COPY (1),
2856 RADDR (scratcha),
2857 NADDR (msgout),
2858 SCR_SET (SCR_ATN),
2859 0,
2860 SCR_CLR (SCR_ACK),
2861 0,
2862 /*
2863 ** and send it.
2864 ** we expect an immediate disconnect
2865 */
2866 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2867 0,
2868 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2869 NADDR (msgout),
2870 SCR_COPY (1),
2871 RADDR (sfbr),
2872 NADDR (lastmsg),
2873 SCR_CLR (SCR_ACK|SCR_ATN),
2874 0,
2875 SCR_WAIT_DISC,
2876 0,
2877 SCR_JUMP,
2878 PADDR (start),
2879 }/*-------------------------< SNOOPTEST >-------------------*/,{
2880 /*
2881 ** Read the variable.
2882 */
2883 SCR_COPY (4),
2884 KVAR (KVAR_NCR_CACHE),
2885 RADDR (scratcha),
2886 /*
2887 ** Write the variable.
2888 */
2889 SCR_COPY (4),
2890 RADDR (temp),
2891 KVAR (KVAR_NCR_CACHE),
2892 /*
2893 ** Read back the variable.
2894 */
2895 SCR_COPY (4),
2896 KVAR (KVAR_NCR_CACHE),
2897 RADDR (temp),
2898 }/*-------------------------< SNOOPEND >-------------------*/,{
2899 /*
2900 ** And stop.
2901 */
2902 SCR_INT,
2903 99,
2904 }/*--------------------------------------------------------*/
2905 };
2906
2907
2908 /*==========================================================
2909 **
2910 **
2911 ** Fill in #define dependent parts of the script
2912 **
2913 **
2914 **==========================================================
2915 */
2916
2917 static void
2918 ncr_script_fill (struct script * scr, struct scripth * scrh)
2919 {
2920 int i;
2921 ncrcmd *p;
2922
2923 p = scrh->tryloop;
2924 for (i=0; i<MAX_START; i++) {
2925 *p++ =SCR_COPY (4);
2926 *p++ =NADDR (squeue[i]);
2927 *p++ =RADDR (dsa);
2928 *p++ =SCR_CALL;
2929 *p++ =PADDR (trysel);
2930 }
2931 *p++ =SCR_JUMP;
2932 *p++ =PADDRH(tryloop);
2933
2934 assert ((char *)p == (char *)&scrh->tryloop + sizeof (scrh->tryloop));
2935
2936 p = scr->data_in;
2937
2938 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN));
2939 *p++ =PADDR (no_data);
2940 *p++ =SCR_COPY (sizeof (ticks));
2941 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2942 *p++ =NADDR (header.stamp.data);
2943 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2944 *p++ =offsetof (struct dsb, data[ 0]);
2945
2946 for (i=1; i<MAX_SCATTER; i++) {
2947 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
2948 *p++ =PADDR (checkatn);
2949 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2950 *p++ =offsetof (struct dsb, data[i]);
2951 }
2952
2953 *p++ =SCR_CALL;
2954 *p++ =PADDR (checkatn);
2955 *p++ =SCR_JUMP;
2956 *p++ =PADDR (no_data);
2957
2958 assert ((char *)p == (char *)&scr->data_in + sizeof (scr->data_in));
2959
2960 p = scr->data_out;
2961
2962 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT));
2963 *p++ =PADDR (no_data);
2964 *p++ =SCR_COPY (sizeof (ticks));
2965 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2966 *p++ =NADDR (header.stamp.data);
2967 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2968 *p++ =offsetof (struct dsb, data[ 0]);
2969
2970 for (i=1; i<MAX_SCATTER; i++) {
2971 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
2972 *p++ =PADDR (dispatch);
2973 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2974 *p++ =offsetof (struct dsb, data[i]);
2975 }
2976
2977 *p++ =SCR_CALL;
2978 *p++ =PADDR (dispatch);
2979 *p++ =SCR_JUMP;
2980 *p++ =PADDR (no_data);
2981
2982 assert ((char *)p == (char *)&scr->data_out + sizeof (scr->data_out));
2983 }
2984
2985 /*==========================================================
2986 **
2987 **
2988 ** Copy and rebind a script.
2989 **
2990 **
2991 **==========================================================
2992 */
2993
2994 static void ncr_script_copy_and_bind (ncb_p np, ncrcmd *src, ncrcmd *dst, int len)
2995 {
2996 ncrcmd opcode, new, old, tmp1, tmp2;
2997 ncrcmd *start, *end;
2998 int relocs, offset;
2999
3000 start = src;
3001 end = src + len/4;
3002 offset = 0;
3003
3004 while (src < end) {
3005
3006 opcode = *src++;
3007 WRITESCRIPT_OFF(dst, offset, opcode);
3008 offset += 4;
3009
3010 /*
3011 ** If we forget to change the length
3012 ** in struct script, a field will be
3013 ** padded with 0. This is an illegal
3014 ** command.
3015 */
3016
3017 if (opcode == 0) {
3018 kprintf ("%s: ERROR0 IN SCRIPT at %d.\n",
3019 ncr_name(np), (int) (src-start-1));
3020 DELAY (1000000);
3021 }
3022
3023 if (DEBUG_FLAGS & DEBUG_SCRIPT)
3024 kprintf ("%p: <%x>\n",
3025 (src-1), (unsigned)opcode);
3026
3027 /*
3028 ** We don't have to decode ALL commands
3029 */
3030 switch (opcode >> 28) {
3031
3032 case 0xc:
3033 /*
3034 ** COPY has TWO arguments.
3035 */
3036 relocs = 2;
3037 tmp1 = src[0];
3038 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
3039 tmp1 = 0;
3040 tmp2 = src[1];
3041 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
3042 tmp2 = 0;
3043 if ((tmp1 ^ tmp2) & 3) {
3044 kprintf ("%s: ERROR1 IN SCRIPT at %d.\n",
3045 ncr_name(np), (int) (src-start-1));
3046 DELAY (1000000);
3047 }
3048 /*
3049 ** If PREFETCH feature not enabled, remove
3050 ** the NO FLUSH bit if present.
3051 */
3052 if ((opcode & SCR_NO_FLUSH) && !(np->features&FE_PFEN))
3053 WRITESCRIPT_OFF(dst, offset - 4,
3054 (opcode & ~SCR_NO_FLUSH));
3055 break;
3056
3057 case 0x0:
3058 /*
3059 ** MOVE (absolute address)
3060 */
3061 relocs = 1;
3062 break;
3063
3064 case 0x8:
3065 /*
3066 ** JUMP / CALL
3067 ** dont't relocate if relative :-)
3068 */
3069 if (opcode & 0x00800000)
3070 relocs = 0;
3071 else
3072 relocs = 1;
3073 break;
3074
3075 case 0x4:
3076 case 0x5:
3077 case 0x6:
3078 case 0x7:
3079 relocs = 1;
3080 break;
3081
3082 default:
3083 relocs = 0;
3084 break;
3085 }
3086
3087 if (relocs) {
3088 while (relocs--) {
3089 old = *src++;
3090
3091 switch (old & RELOC_MASK) {
3092 case RELOC_REGISTER:
3093 new = (old & ~RELOC_MASK) + rman_get_start(np->reg_res);
3094 break;
3095 case RELOC_LABEL:
3096 new = (old & ~RELOC_MASK) + np->p_script;
3097 break;
3098 case RELOC_LABELH:
3099 new = (old & ~RELOC_MASK) + np->p_scripth;
3100 break;
3101 case RELOC_SOFTC:
3102 new = (old & ~RELOC_MASK) + vtophys(np);
3103 break;
3104 case RELOC_KVAR:
3105 if (((old & ~RELOC_MASK) <
3106 SCRIPT_KVAR_FIRST) ||
3107 ((old & ~RELOC_MASK) >
3108 SCRIPT_KVAR_LAST))
3109 panic("ncr KVAR out of range");
3110 new = vtophys(script_kvars[old &
3111 ~RELOC_MASK]);
3112 break;
3113 case 0:
3114 /* Don't relocate a 0 address. */
3115 if (old == 0) {
3116 new = old;
3117 break;
3118 }
3119 /* fall through */
3120 default:
3121 panic("ncr_script_copy_and_bind: weird relocation %x @ %d", old, (int)(src - start));
3122 break;
3123 }
3124
3125 WRITESCRIPT_OFF(dst, offset, new);
3126 offset += 4;
3127 }
3128 } else {
3129 WRITESCRIPT_OFF(dst, offset, *src++);
3130 offset += 4;
3131 }
3132
3133 }
3134 }
3135
3136 /*==========================================================
3137 **
3138 **
3139 ** Auto configuration.
3140 **
3141 **
3142 **==========================================================
3143 */
3144
3145 #if 0
3146 /*----------------------------------------------------------
3147 **
3148 ** Reduce the transfer length to the max value
3149 ** we can transfer safely.
3150 **
3151 ** Reading a block greater then MAX_SIZE from the
3152 ** raw (character) device exercises a memory leak
3153 ** in the vm subsystem. This is common to ALL devices.
3154 ** We have submitted a description of this bug to
3155 ** <FreeBSD-bugs@freefall.cdrom.com>.
3156 ** It should be fixed in the current release.
3157 **
3158 **----------------------------------------------------------
3159 */
3160
3161 void ncr_min_phys (struct buf *bp)
3162 {
3163 if ((unsigned long)bp->b_bcount > MAX_SIZE) bp->b_bcount = MAX_SIZE;
3164 }
3165
3166 #endif
3167
3168 #if 0
3169 /*----------------------------------------------------------
3170 **
3171 ** Maximal number of outstanding requests per target.
3172 **
3173 **----------------------------------------------------------
3174 */
3175
3176 u_int32_t ncr_info (int unit)
3177 {
3178 return (1); /* may be changed later */
3179 }
3180
3181 #endif
3182
3183 /*----------------------------------------------------------
3184 **
3185 ** NCR chip devices table and chip look up function.
3186 ** Features bit are defined in ncrreg.h. Is it the
3187 ** right place?
3188 **
3189 **----------------------------------------------------------
3190 */
3191 typedef struct {
3192 unsigned long device_id;
3193 unsigned short minrevid;
3194 char *name;
3195 unsigned char maxburst;
3196 unsigned char maxoffs;
3197 unsigned char clock_divn;
3198 unsigned int features;
3199 } ncr_chip;
3200
3201 static ncr_chip ncr_chip_table[] = {
3202 {NCR_810_ID, 0x00, "ncr 53c810 fast10 scsi", 4, 8, 4,
3203 FE_ERL}
3204 ,
3205 {NCR_810_ID, 0x10, "ncr 53c810a fast10 scsi", 4, 8, 4,
3206 FE_ERL|FE_LDSTR|FE_PFEN|FE_BOF}
3207 ,
3208 {NCR_815_ID, 0x00, "ncr 53c815 fast10 scsi", 4, 8, 4,
3209 FE_ERL|FE_BOF}
3210 ,
3211 {NCR_820_ID, 0x00, "ncr 53c820 fast10 wide scsi", 4, 8, 4,
3212 FE_WIDE|FE_ERL}
3213 ,
3214 {NCR_825_ID, 0x00, "ncr 53c825 fast10 wide scsi", 4, 8, 4,
3215 FE_WIDE|FE_ERL|FE_BOF}
3216 ,
3217 {NCR_825_ID, 0x10, "ncr 53c825a fast10 wide scsi", 7, 8, 4,
3218 FE_WIDE|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3219 ,
3220 {NCR_860_ID, 0x00, "ncr 53c860 fast20 scsi", 4, 8, 5,
3221 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_LDSTR|FE_PFEN}
3222 ,
3223 {NCR_875_ID, 0x00, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3224 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3225 ,
3226 {NCR_875_ID, 0x02, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3227 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3228 ,
3229 {NCR_875_ID2, 0x00, "ncr 53c875j fast20 wide scsi", 7, 16, 5,
3230 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3231 ,
3232 {NCR_885_ID, 0x00, "ncr 53c885 fast20 wide scsi", 7, 16, 5,
3233 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3234 ,
3235 {NCR_895_ID, 0x00, "ncr 53c895 fast40 wide scsi", 7, 31, 7,
3236 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3237 ,
3238 {NCR_896_ID, 0x00, "ncr 53c896 fast40 wide scsi", 7, 31, 7,
3239 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3240 ,
3241 {NCR_895A_ID, 0x00, "ncr 53c895a fast40 wide scsi", 7, 31, 7,
3242 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3243 ,
3244 {NCR_1510D_ID, 0x00, "ncr 53c1510d fast40 wide scsi", 7, 31, 7,
3245 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3246 };
3247
3248 static int ncr_chip_lookup(u_long device_id, u_char revision_id)
3249 {
3250 int i, found;
3251
3252 found = -1;
3253 for (i = 0; i < NELEM(ncr_chip_table); i++) {
3254 if (device_id == ncr_chip_table[i].device_id &&
3255 ncr_chip_table[i].minrevid <= revision_id) {
3256 if (found < 0 ||
3257 ncr_chip_table[found].minrevid
3258 < ncr_chip_table[i].minrevid) {
3259 found = i;
3260 }
3261 }
3262 }
3263 return found;
3264 }
3265
3266 /*----------------------------------------------------------
3267 **
3268 ** Probe the hostadapter.
3269 **
3270 **----------------------------------------------------------
3271 */
3272
3273
3274
3275 static int ncr_probe (device_t dev)
3276 {
3277 int i;
3278
3279 i = ncr_chip_lookup(pci_get_devid(dev), pci_get_revid(dev));
3280 if (i >= 0) {
3281 device_set_desc(dev, ncr_chip_table[i].name);
3282 return (-1000); /* Allows to use both ncr and sym */
3283 }
3284
3285 return (ENXIO);
3286 }
3287
3288
3289
3290 /*==========================================================
3291 **
3292 ** NCR chip clock divisor table.
3293 ** Divisors are multiplied by 10,000,000 in order to make
3294 ** calculations more simple.
3295 **
3296 **==========================================================
3297 */
3298
3299 #define _5M 5000000
3300 static u_long div_10M[] =
3301 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3302
3303 /*===============================================================
3304 **
3305 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3306 ** transfers. 32,64,128 are only supported by 875 and 895 chips.
3307 ** We use log base 2 (burst length) as internal code, with
3308 ** value 0 meaning "burst disabled".
3309 **
3310 **===============================================================
3311 */
3312
3313 /*
3314 * Burst length from burst code.
3315 */
3316 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3317
3318 /*
3319 * Burst code from io register bits.
3320 */
3321 #define burst_code(dmode, ctest4, ctest5) \
3322 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
3323
3324 /*
3325 * Set initial io register bits from burst code.
3326 */
3327 static void
3328 ncr_init_burst(ncb_p np, u_char bc)
3329 {
3330 np->rv_ctest4 &= ~0x80;
3331 np->rv_dmode &= ~(0x3 << 6);
3332 np->rv_ctest5 &= ~0x4;
3333
3334 if (!bc) {
3335 np->rv_ctest4 |= 0x80;
3336 }
3337 else {
3338 --bc;
3339 np->rv_dmode |= ((bc & 0x3) << 6);
3340 np->rv_ctest5 |= (bc & 0x4);
3341 }
3342 }
3343
3344 /*==========================================================
3345 **
3346 **
3347 ** Auto configuration: attach and init a host adapter.
3348 **
3349 **
3350 **==========================================================
3351 */
3352
3353
3354 static int
3355 ncr_attach (device_t dev)
3356 {
3357 ncb_p np = (struct ncb*) device_get_softc(dev);
3358 u_char rev = 0;
3359 u_long period;
3360 int i, rid;
3361 u_int8_t usrsync;
3362 u_int8_t usrwide;
3363 struct cam_devq *devq;
3364
3365 /*
3366 ** allocate and initialize structures.
3367 */
3368
3369 np->unit = device_get_unit(dev);
3370
3371 /*
3372 ** Try to map the controller chip to
3373 ** virtual and physical memory.
3374 */
3375
3376 np->reg_rid = 0x14;
3377 np->reg_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &np->reg_rid,
3378 0, ~0, 1, RF_ACTIVE);
3379 if (!np->reg_res) {
3380 device_printf(dev, "could not map memory\n");
3381 return ENXIO;
3382 }
3383
3384 /*
3385 ** Make the controller's registers available.
3386 ** Now the INB INW INL OUTB OUTW OUTL macros
3387 ** can be used safely.
3388 */
3389
3390 np->bst = rman_get_bustag(np->reg_res);
3391 np->bsh = rman_get_bushandle(np->reg_res);
3392
3393
3394 #ifdef NCR_IOMAPPED
3395 /*
3396 ** Try to map the controller chip into iospace.
3397 */
3398
3399 if (!pci_map_port (config_id, 0x10, &np->port))
3400 return;
3401 #endif
3402
3403
3404 /*
3405 ** Save some controller register default values
3406 */
3407
3408 np->rv_scntl3 = INB(nc_scntl3) & 0x77;
3409 np->rv_dmode = INB(nc_dmode) & 0xce;
3410 np->rv_dcntl = INB(nc_dcntl) & 0xa9;
3411 np->rv_ctest3 = INB(nc_ctest3) & 0x01;
3412 np->rv_ctest4 = INB(nc_ctest4) & 0x88;
3413 np->rv_ctest5 = INB(nc_ctest5) & 0x24;
3414 np->rv_gpcntl = INB(nc_gpcntl);
3415 np->rv_stest2 = INB(nc_stest2) & 0x20;
3416
3417 if (bootverbose >= 2) {
3418 kprintf ("\tBIOS values: SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
3419 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
3420 kprintf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
3421 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3422 }
3423
3424 np->rv_dcntl |= NOCOM;
3425
3426 /*
3427 ** Do chip dependent initialization.
3428 */
3429
3430 rev = pci_get_revid(dev);
3431
3432 /*
3433 ** Get chip features from chips table.
3434 */
3435 i = ncr_chip_lookup(pci_get_devid(dev), rev);
3436
3437 if (i >= 0) {
3438 np->maxburst = ncr_chip_table[i].maxburst;
3439 np->maxoffs = ncr_chip_table[i].maxoffs;
3440 np->clock_divn = ncr_chip_table[i].clock_divn;
3441 np->features = ncr_chip_table[i].features;
3442 } else { /* Should'nt happen if probe() is ok */
3443 np->maxburst = 4;
3444 np->maxoffs = 8;
3445 np->clock_divn = 4;
3446 np->features = FE_ERL;
3447 }
3448
3449 np->maxwide = np->features & FE_WIDE ? 1 : 0;
3450 np->clock_khz = np->features & FE_CLK80 ? 80000 : 40000;
3451 if (np->features & FE_QUAD) np->multiplier = 4;
3452 else if (np->features & FE_DBLR) np->multiplier = 2;
3453 else np->multiplier = 1;
3454
3455 /*
3456 ** Get the frequency of the chip's clock.
3457 ** Find the right value for scntl3.
3458 */
3459 if (np->features & (FE_ULTRA|FE_ULTRA2))
3460 ncr_getclock(np, np->multiplier);
3461
3462 #ifdef NCR_TEKRAM_EEPROM
3463 if (bootverbose) {
3464 kprintf ("%s: Tekram EEPROM read %s\n",
3465 ncr_name(np),
3466 read_tekram_eeprom (np, NULL) ?
3467 "succeeded" : "failed");
3468 }
3469 #endif /* NCR_TEKRAM_EEPROM */
3470
3471 /*
3472 * If scntl3 != 0, we assume BIOS is present.
3473 */
3474 if (np->rv_scntl3)
3475 np->features |= FE_BIOS;
3476
3477 /*
3478 * Divisor to be used for async (timer pre-scaler).
3479 */
3480 i = np->clock_divn - 1;
3481 while (i >= 0) {
3482 --i;
3483 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3484 ++i;
3485 break;
3486 }
3487 }
3488 np->rv_scntl3 = i+1;
3489
3490 /*
3491 * Minimum synchronous period factor supported by the chip.
3492 * Btw, 'period' is in tenths of nanoseconds.
3493 */
3494
3495 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3496 if (period <= 250) np->minsync = 10;
3497 else if (period <= 303) np->minsync = 11;
3498 else if (period <= 500) np->minsync = 12;
3499 else np->minsync = (period + 40 - 1) / 40;
3500
3501 /*
3502 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3503 */
3504
3505 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2)))
3506 np->minsync = 25;
3507 else if (np->minsync < 12 && !(np->features & FE_ULTRA2))
3508 np->minsync = 12;
3509
3510 /*
3511 * Maximum synchronous period factor supported by the chip.
3512 */
3513
3514 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3515 np->maxsync = period > 2540 ? 254 : period / 10;
3516
3517 /*
3518 * Now, some features available with Symbios compatible boards.
3519 * LED support through GPIO0 and DIFF support.
3520 */
3521
3522 #ifdef SCSI_NCR_SYMBIOS_COMPAT
3523 if (!(np->rv_gpcntl & 0x01))
3524 np->features |= FE_LED0;
3525 #if 0 /* Not safe enough without NVRAM support or user settable option */
3526 if (!(INB(nc_gpreg) & 0x08))
3527 np->features |= FE_DIFF;
3528 #endif
3529 #endif /* SCSI_NCR_SYMBIOS_COMPAT */
3530
3531 /*
3532 * Prepare initial IO registers settings.
3533 * Trust BIOS only if we believe we have one and if we want to.
3534 */
3535 #ifdef SCSI_NCR_TRUST_BIOS
3536 if (!(np->features & FE_BIOS)) {
3537 #else
3538 if (1) {
3539 #endif
3540 np->rv_dmode = 0;
3541 np->rv_dcntl = NOCOM;
3542 np->rv_ctest3 = 0;
3543 np->rv_ctest4 = MPEE;
3544 np->rv_ctest5 = 0;
3545 np->rv_stest2 = 0;
3546
3547 if (np->features & FE_ERL)
3548 np->rv_dmode |= ERL; /* Enable Read Line */
3549 if (np->features & FE_BOF)
3550 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3551 if (np->features & FE_ERMP)
3552 np->rv_dmode |= ERMP; /* Enable Read Multiple */
3553 if (np->features & FE_CLSE)
3554 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3555 if (np->features & FE_WRIE)
3556 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3557 if (np->features & FE_PFEN)
3558 np->rv_dcntl |= PFEN; /* Prefetch Enable */
3559 if (np->features & FE_DFS)
3560 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3561 if (np->features & FE_DIFF)
3562 np->rv_stest2 |= 0x20; /* Differential mode */
3563 ncr_init_burst(np, np->maxburst); /* Max dwords burst length */
3564 } else {
3565 np->maxburst =
3566 burst_code(np->rv_dmode, np->rv_ctest4, np->rv_ctest5);
3567 }
3568
3569 /*
3570 ** Get on-chip SRAM address, if supported
3571 */
3572 if ((np->features & FE_RAM) && sizeof(struct script) <= 4096) {
3573 np->sram_rid = 0x18;
3574 np->sram_res = bus_alloc_resource(dev, SYS_RES_MEMORY,
3575 &np->sram_rid,
3576 0, ~0, 1, RF_ACTIVE);
3577 }
3578
3579 /*
3580 ** Allocate structure for script relocation.
3581 */
3582 if (np->sram_res != NULL) {
3583 np->script = NULL;
3584 np->p_script = rman_get_start(np->sram_res);
3585 np->bst2 = rman_get_bustag(np->sram_res);
3586 np->bsh2 = rman_get_bushandle(np->sram_res);
3587 } else if (sizeof (struct script) > PAGE_SIZE) {
3588 np->script = (struct script*) kmem_alloc_contig
3589 (round_page(sizeof (struct script)),
3590 0, 0xffffffff, PAGE_SIZE);
3591 } else {
3592 np->script = (struct script *)
3593 kmalloc (sizeof (struct script), M_DEVBUF, M_WAITOK);
3594 }
3595
3596 /* XXX JGibbs - Use contigmalloc */
3597 if (sizeof (struct scripth) > PAGE_SIZE) {
3598 np->scripth = (struct scripth*) kmem_alloc_contig
3599 (round_page(sizeof (struct scripth)),
3600 0, 0xffffffff, PAGE_SIZE);
3601 } else
3602 {
3603 np->scripth = (struct scripth *)
3604 kmalloc (sizeof (struct scripth), M_DEVBUF, M_WAITOK);
3605 }
3606
3607 #ifdef SCSI_NCR_PCI_CONFIG_FIXUP
3608 /*
3609 ** If cache line size is enabled, check PCI config space and
3610 ** try to fix it up if necessary.
3611 */
3612 #ifdef PCIR_CACHELNSZ /* To be sure that new PCI stuff is present */
3613 {
3614 u_char cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
3615 u_short command = pci_read_config(dev, PCIR_COMMAND, 2);
3616
3617 if (!cachelnsz) {
3618 cachelnsz = 8;
3619 kprintf("%s: setting PCI cache line size register to %d.\n",
3620 ncr_name(np), (int)cachelnsz);
3621 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
3622 }
3623
3624 if (!(command & (1<<4))) {
3625 command |= (1<<4);
3626 kprintf("%s: setting PCI command write and invalidate.\n",
3627 ncr_name(np));
3628 pci_write_config(dev, PCIR_COMMAND, command, 2);
3629 }
3630 }
3631 #endif /* PCIR_CACHELNSZ */
3632
3633 #endif /* SCSI_NCR_PCI_CONFIG_FIXUP */
3634
3635 /* Initialize per-target user settings */
3636 usrsync = 0;
3637 if (SCSI_NCR_DFLT_SYNC) {
3638 usrsync = SCSI_NCR_DFLT_SYNC;
3639 if (usrsync > np->maxsync)
3640 usrsync = np->maxsync;
3641 if (usrsync < np->minsync)
3642 usrsync = np->minsync;
3643 }
3644
3645 usrwide = (SCSI_NCR_MAX_WIDE);
3646 if (usrwide > np->maxwide) usrwide=np->maxwide;
3647
3648 for (i=0;i<MAX_TARGET;i++) {
3649 tcb_p tp = &np->target[i];
3650
3651 tp->tinfo.user.period = usrsync;
3652 tp->tinfo.user.offset = usrsync != 0 ? np->maxoffs : 0;
3653 tp->tinfo.user.width = usrwide;
3654 tp->tinfo.disc_tag = NCR_CUR_DISCENB
3655 | NCR_CUR_TAGENB
3656 | NCR_USR_DISCENB
3657 | NCR_USR_TAGENB;
3658 }
3659
3660 /*
3661 ** Bells and whistles ;-)
3662 */
3663 if (bootverbose)
3664 kprintf("%s: minsync=%d, maxsync=%d, maxoffs=%d, %d dwords burst, %s dma fifo\n",
3665 ncr_name(np), np->minsync, np->maxsync, np->maxoffs,
3666 burst_length(np->maxburst),
3667 (np->rv_ctest5 & DFS) ? "large" : "normal");
3668
3669 /*
3670 ** Print some complementary information that can be helpfull.
3671 */
3672 if (bootverbose)
3673 kprintf("%s: %s, %s IRQ driver%s\n",
3674 ncr_name(np),
3675 np->rv_stest2 & 0x20 ? "differential" : "single-ended",
3676 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
3677 np->sram_res ? ", using on-chip SRAM" : "");
3678
3679 /*
3680 ** Patch scripts to physical addresses
3681 */
3682 ncr_script_fill (&script0, &scripth0);
3683
3684 if (np->script)
3685 np->p_script = vtophys(np->script);
3686 np->p_scripth = vtophys(np->scripth);
3687
3688 ncr_script_copy_and_bind (np, (ncrcmd *) &script0,
3689 (ncrcmd *) np->script, sizeof(struct script));
3690
3691 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0,
3692 (ncrcmd *) np->scripth, sizeof(struct scripth));
3693
3694 /*
3695 ** Patch the script for LED support.
3696 */
3697
3698 if (np->features & FE_LED0) {
3699 WRITESCRIPT(reselect[0], SCR_REG_REG(gpreg, SCR_OR, 0x01));
3700 WRITESCRIPT(reselect1[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3701 WRITESCRIPT(reselect2[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3702 }
3703
3704 /*
3705 ** init data structure
3706 */
3707
3708 np->jump_tcb.l_cmd = SCR_JUMP;
3709 np->jump_tcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
3710
3711 /*
3712 ** Get SCSI addr of host adapter (set by bios?).
3713 */
3714
3715 np->myaddr = INB(nc_scid) & 0x07;
3716 if (!np->myaddr) np->myaddr = SCSI_NCR_MYADDR;
3717
3718 #ifdef NCR_DUMP_REG
3719 /*
3720 ** Log the initial register contents
3721 */
3722 {
3723 int reg;
3724 for (reg=0; reg<256; reg+=4) {
3725 if (reg%16==0) kprintf ("reg[%2x]", reg);
3726 kprintf (" %08x", (int)pci_conf_read (config_id, reg));
3727 if (reg%16==12) kprintf ("\n");
3728 }
3729 }
3730 #endif /* NCR_DUMP_REG */
3731
3732 /*
3733 ** Reset chip.
3734 */
3735
3736 OUTB (nc_istat, SRST);
3737 DELAY (1000);
3738 OUTB (nc_istat, 0 );
3739
3740
3741 /*
3742 ** Now check the cache handling of the pci chipset.
3743 */
3744
3745 if (ncr_snooptest (np)) {
3746 kprintf ("CACHE INCORRECTLY CONFIGURED.\n");
3747 return EINVAL;
3748 }
3749
3750 /*
3751 ** Install the interrupt handler.
3752 */
3753
3754 rid = 0;
3755 np->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
3756 RF_SHAREABLE | RF_ACTIVE);
3757 if (np->irq_res == NULL) {
3758 device_printf(dev,
3759 "interruptless mode: reduced performance.\n");
3760 } else {
3761 bus_setup_intr(dev, np->irq_res, 0,
3762 ncr_intr, np, &np->irq_handle, NULL);
3763 }
3764
3765 /*
3766 ** Create the device queue. We only allow MAX_START-1 concurrent
3767 ** transactions so we can be sure to have one element free in our
3768 ** start queue to reset to the idle loop.
3769 */
3770 devq = cam_simq_alloc(MAX_START - 1);
3771 if (devq == NULL)
3772 return ENOMEM;
3773
3774 /*
3775 ** Now tell the generic SCSI layer
3776 ** about our bus.
3777 */
3778 np->sim = cam_sim_alloc(ncr_action, ncr_poll, "ncr", np, np->unit,
3779 &sim_mplock, 1, MAX_TAGS, devq);
3780 cam_simq_release(devq);
3781 if (np->sim == NULL)
3782 return ENOMEM;
3783
3784
3785 if (xpt_bus_register(np->sim, 0) != CAM_SUCCESS) {
3786 cam_sim_free(np->sim);
3787 return ENOMEM;
3788 }
3789
3790 if (xpt_create_path(&np->path, /*periph*/NULL,
3791 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
3792 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3793 xpt_bus_deregister(cam_sim_path(np->sim));
3794 cam_sim_free(np->sim);
3795 return ENOMEM;
3796 }
3797
3798 /*
3799 ** start the timeout daemon
3800 */
3801 callout_init(&np->timeout_ch);
3802 ncr_timeout (np);
3803 np->lasttime=0;
3804
3805 return 0;
3806 }
3807
3808 /*==========================================================
3809 **
3810 **
3811 ** Process pending device interrupts.
3812 **
3813 **
3814 **==========================================================
3815 */
3816
3817 static void
3818 ncr_intr(void *vnp)
3819 {
3820 ncb_p np = vnp;
3821 crit_enter();
3822
3823 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("[");
3824
3825 if (INB(nc_istat) & (INTF|SIP|DIP)) {
3826 /*
3827 ** Repeat until no outstanding ints
3828 */
3829 do {
3830 ncr_exception (np);
3831 } while (INB(nc_istat) & (INTF|SIP|DIP));
3832
3833 np->ticks = 100;
3834 }
3835
3836 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("]\n");
3837
3838 crit_exit();
3839 }
3840
3841 /*==========================================================
3842 **
3843 **
3844 ** Start execution of a SCSI command.
3845 ** This is called from the generic SCSI driver.
3846 **
3847 **
3848 **==========================================================
3849 */
3850
3851 static void
3852 ncr_action (struct cam_sim *sim, union ccb *ccb)
3853 {
3854 ncb_p np;
3855
3856 np = (ncb_p) cam_sim_softc(sim);
3857
3858 switch (ccb->ccb_h.func_code) {
3859 /* Common cases first */
3860 case XPT_SCSI_IO: /* Execute the requested I/O operation */
3861 {
3862 nccb_p cp;
3863 lcb_p lp;
3864 tcb_p tp;
3865 struct ccb_scsiio *csio;
3866 u_int8_t *msgptr;
3867 u_int msglen;
3868 u_int msglen2;
3869 int segments;
3870 u_int8_t nego;
3871 u_int8_t idmsg;
3872 int qidx;
3873
3874 tp = &np->target[ccb->ccb_h.target_id];
3875 csio = &ccb->csio;
3876
3877 crit_enter();
3878
3879 /*
3880 * Last time we need to check if this CCB needs to
3881 * be aborted.
3882 */
3883 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3884 xpt_done(ccb);
3885 crit_exit();
3886 return;
3887 }
3888 ccb->ccb_h.status |= CAM_SIM_QUEUED;
3889
3890 /*---------------------------------------------------
3891 **
3892 ** Assign an nccb / bind ccb
3893 **
3894 **----------------------------------------------------
3895 */
3896 cp = ncr_get_nccb (np, ccb->ccb_h.target_id,
3897 ccb->ccb_h.target_lun);
3898 if (cp == NULL) {
3899 /* XXX JGibbs - Freeze SIMQ */
3900 ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
3901 xpt_done(ccb);
3902 crit_exit();
3903 return;
3904 }
3905
3906 cp->ccb = ccb;
3907
3908 /*---------------------------------------------------
3909 **
3910 ** timestamp
3911 **
3912 **----------------------------------------------------
3913 */
3914 /*
3915 ** XXX JGibbs - Isn't this expensive
3916 ** enough to be conditionalized??
3917 */
3918
3919 bzero (&cp->phys.header.stamp, sizeof (struct tstamp));
3920 cp->phys.header.stamp.start = ticks;
3921
3922 nego = 0;
3923 if (tp->nego_cp == NULL) {
3924
3925 if (tp->tinfo.current.width
3926 != tp->tinfo.goal.width) {
3927 tp->nego_cp = cp;
3928 nego = NS_WIDE;
3929 } else if ((tp->tinfo.current.period
3930 != tp->tinfo.goal.period)
3931 || (tp->tinfo.current.offset
3932 != tp->tinfo.goal.offset)) {
3933 tp->nego_cp = cp;
3934 nego = NS_SYNC;
3935 }
3936 }
3937
3938 /*---------------------------------------------------
3939 **
3940 ** choose a new tag ...
3941 **
3942 **----------------------------------------------------
3943 */
3944 lp = tp->lp[ccb->ccb_h.target_lun];
3945
3946 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
3947 && (ccb->csio.tag_action != CAM_TAG_ACTION_NONE)
3948 && (nego == 0)) {
3949 /*
3950 ** assign a tag to this nccb
3951 */
3952 while (!cp->tag) {
3953 nccb_p cp2 = lp->next_nccb;
3954 lp->lasttag = lp->lasttag % 255 + 1;
3955 while (cp2 && cp2->tag != lp->lasttag)
3956 cp2 = cp2->next_nccb;
3957 if (cp2) continue;
3958 cp->tag=lp->lasttag;
3959 if (DEBUG_FLAGS & DEBUG_TAGS) {
3960 PRINT_ADDR(ccb);
3961 kprintf ("using tag #%d.\n", cp->tag);
3962 }
3963 }
3964 } else {
3965 cp->tag=0;
3966 }
3967
3968 /*----------------------------------------------------
3969 **
3970 ** Build the identify / tag / sdtr message
3971 **
3972 **----------------------------------------------------
3973 */
3974 idmsg = MSG_IDENTIFYFLAG | ccb->ccb_h.target_lun;
3975 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
3976 idmsg |= MSG_IDENTIFY_DISCFLAG;
3977
3978 msgptr = cp->scsi_smsg;
3979 msglen = 0;
3980 msgptr[msglen++] = idmsg;
3981
3982 if (cp->tag) {
3983 msgptr[msglen++] = ccb->csio.tag_action;
3984 msgptr[msglen++] = cp->tag;
3985 }
3986
3987 switch (nego) {
3988 case NS_SYNC:
3989 msgptr[msglen++] = MSG_EXTENDED;
3990 msgptr[msglen++] = MSG_EXT_SDTR_LEN;
3991 msgptr[msglen++] = MSG_EXT_SDTR;
3992 msgptr[msglen++] = tp->tinfo.goal.period;
3993 msgptr[msglen++] = tp->tinfo.goal.offset;
3994 if (DEBUG_FLAGS & DEBUG_NEGO) {
3995 PRINT_ADDR(ccb);
3996 kprintf ("sync msgout: ");
3997 ncr_show_msg (&cp->scsi_smsg [msglen-5]);
3998 kprintf (".\n");
3999 };
4000 break;
4001 case NS_WIDE:
4002 msgptr[msglen++] = MSG_EXTENDED;
4003 msgptr[msglen++] = MSG_EXT_WDTR_LEN;
4004 msgptr[msglen++] = MSG_EXT_WDTR;
4005 msgptr[msglen++] = tp->tinfo.goal.width;
4006 if (DEBUG_FLAGS & DEBUG_NEGO) {
4007 PRINT_ADDR(ccb);
4008 kprintf ("wide msgout: ");
4009 ncr_show_msg (&cp->scsi_smsg [msglen-4]);
4010 kprintf (".\n");
4011 };
4012 break;
4013 }
4014
4015 /*----------------------------------------------------
4016 **
4017 ** Build the identify message for getcc.
4018 **
4019 **----------------------------------------------------
4020 */
4021
4022 cp->scsi_smsg2 [0] = idmsg;
4023 msglen2 = 1;
4024
4025 /*----------------------------------------------------
4026 **
4027 ** Build the data descriptors
4028 **
4029 **----------------------------------------------------
4030 */
4031
4032 /* XXX JGibbs - Handle other types of I/O */
4033 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
4034 segments = ncr_scatter(&cp->phys,
4035 (vm_offset_t)csio->data_ptr,
4036 (vm_size_t)csio->dxfer_len);
4037
4038 if (segments < 0) {
4039 ccb->ccb_h.status = CAM_REQ_TOO_BIG;
4040 ncr_free_nccb(np, cp);
4041 crit_exit();
4042 xpt_done(ccb);
4043 return;
4044 }
4045 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
4046 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_in);
4047 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4048 } else { /* CAM_DIR_OUT */
4049 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_out);
4050 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4051 }
4052 } else {
4053 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, no_data);
4054 cp->phys.header.goalp = cp->phys.header.savep;
4055 }
4056
4057 cp->phys.header.lastp = cp->phys.header.savep;
4058
4059
4060 /*----------------------------------------------------
4061 **
4062 ** fill in nccb
4063 **
4064 **----------------------------------------------------
4065 **
4066 **
4067 ** physical -> virtual backlink
4068 ** Generic SCSI command
4069 */
4070 cp->phys.header.cp = cp;
4071 /*
4072 ** Startqueue
4073 */
4074 cp->phys.header.launch.l_paddr = NCB_SCRIPT_PHYS (np, select);
4075 cp->phys.header.launch.l_cmd = SCR_JUMP;
4076 /*
4077 ** select
4078 */
4079 cp->phys.select.sel_id = ccb->ccb_h.target_id;
4080 cp->phys.select.sel_scntl3 = tp->tinfo.wval;
4081 cp->phys.select.sel_sxfer = tp->tinfo.sval;
4082 /*
4083 ** message
4084 */
4085 cp->phys.smsg.addr = CCB_PHYS (cp, scsi_smsg);
4086 cp->phys.smsg.size = msglen;
4087
4088 cp->phys.smsg2.addr = CCB_PHYS (cp, scsi_smsg2);
4089 cp->phys.smsg2.size = msglen2;
4090 /*
4091 ** command
4092 */
4093 /* XXX JGibbs - Support other command types */
4094 cp->phys.cmd.addr = vtophys (csio->cdb_io.cdb_bytes);
4095 cp->phys.cmd.size = csio->cdb_len;
4096 /*
4097 ** sense command
4098 */
4099 cp->phys.scmd.addr = CCB_PHYS (cp, sensecmd);
4100 cp->phys.scmd.size = 6;
4101 /*
4102 ** patch requested size into sense command
4103 */
4104 cp->sensecmd[0] = 0x03;
4105 cp->sensecmd[1] = ccb->ccb_h.target_lun << 5;
4106 cp->sensecmd[4] = csio->sense_len;
4107 /*
4108 ** sense data
4109 */
4110 cp->phys.sense.addr = vtophys (&csio->sense_data);
4111 cp->phys.sense.size = csio->sense_len;
4112 /*
4113 ** status
4114 */
4115 cp->actualquirks = QUIRK_NOMSG;
4116 cp->host_status = nego ? HS_NEGOTIATE : HS_BUSY;
4117 cp->s_status = SCSI_STATUS_ILLEGAL;
4118 cp->parity_status = 0;
4119
4120 cp->xerr_status = XE_OK;
4121 cp->sync_status = tp->tinfo.sval;
4122 cp->nego_status = nego;
4123 cp->wide_status = tp->tinfo.wval;
4124
4125 /*----------------------------------------------------
4126 **
4127 ** Critical region: start this job.
4128 **
4129 **----------------------------------------------------
4130 */
4131
4132 /*
4133 ** reselect pattern and activate this job.
4134 */
4135
4136 cp->jump_nccb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (cp->tag)));
4137 cp->tlimit = time_uptime
4138 + ccb->ccb_h.timeout / 1000 + 2;
4139 cp->magic = CCB_MAGIC;
4140
4141 /*
4142 ** insert into start queue.
4143 */
4144
4145 qidx = np->squeueput + 1;
4146 if (qidx >= MAX_START)
4147 qidx = 0;
4148 np->squeue [qidx ] = NCB_SCRIPT_PHYS (np, idle);
4149 np->squeue [np->squeueput] = CCB_PHYS (cp, phys);
4150 np->squeueput = qidx;
4151
4152 if(DEBUG_FLAGS & DEBUG_QUEUE)
4153 kprintf("%s: queuepos=%d tryoffset=%d.\n",
4154 ncr_name (np), np->squeueput,
4155 (unsigned)(READSCRIPT(startpos[0]) -
4156 (NCB_SCRIPTH_PHYS (np, tryloop))));
4157
4158 /*
4159 ** Script processor may be waiting for reselect.
4160 ** Wake it up.
4161 */
4162 OUTB (nc_istat, SIGP);
4163
4164 /*
4165 ** and reenable interrupts
4166 */
4167 crit_exit();
4168 break;
4169 }
4170 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
4171 case XPT_EN_LUN: /* Enable LUN as a target */
4172 case XPT_TARGET_IO: /* Execute target I/O request */
4173 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
4174 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
4175 case XPT_ABORT: /* Abort the specified CCB */
4176 /* XXX Implement */
4177 ccb->ccb_h.status = CAM_REQ_INVALID;
4178 xpt_done(ccb);
4179 break;
4180 case XPT_SET_TRAN_SETTINGS:
4181 {
4182 struct ccb_trans_settings *cts = &ccb->cts;
4183 tcb_p tp;
4184 u_int update_type;
4185 struct ccb_trans_settings_scsi *scsi =
4186 &cts->proto_specific.scsi;
4187 struct ccb_trans_settings_spi *spi =
4188 &cts->xport_specific.spi;
4189
4190 update_type = 0;
4191 if (cts->type == CTS_TYPE_CURRENT_SETTINGS)
4192 update_type |= NCR_TRANS_GOAL;
4193 if (cts->type == CTS_TYPE_USER_SETTINGS)
4194 update_type |= NCR_TRANS_USER;
4195
4196 crit_enter();
4197 tp = &np->target[ccb->ccb_h.target_id];
4198 /* Tag and disc enables */
4199 if ((spi->valid & CTS_SPI_VALID_DISC) != 0) {
4200 if (update_type & NCR_TRANS_GOAL) {
4201 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
4202 tp->tinfo.disc_tag |= NCR_CUR_DISCENB;
4203 else
4204 tp->tinfo.disc_tag &= ~NCR_CUR_DISCENB;
4205 }
4206
4207 if (update_type & NCR_TRANS_USER) {
4208 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
4209 tp->tinfo.disc_tag |= NCR_USR_DISCENB;
4210 else
4211 tp->tinfo.disc_tag &= ~NCR_USR_DISCENB;
4212 }
4213
4214 }
4215
4216 if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
4217 if (update_type & NCR_TRANS_GOAL) {
4218 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
4219 tp->tinfo.disc_tag |= NCR_CUR_TAGENB;
4220 else
4221 tp->tinfo.disc_tag &= ~NCR_CUR_TAGENB;
4222 }
4223
4224 if (update_type & NCR_TRANS_USER) {
4225 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
4226 tp->tinfo.disc_tag |= NCR_USR_TAGENB;
4227 else
4228 tp->tinfo.disc_tag &= ~NCR_USR_TAGENB;
4229 }
4230 }
4231
4232 /* Filter bus width and sync negotiation settings */
4233 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) {
4234 if (spi->bus_width > np->maxwide)
4235 spi->bus_width = np->maxwide;
4236 }
4237
4238 if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
4239 || ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) {
4240 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) {
4241 if (spi->sync_period != 0
4242 && (spi->sync_period < np->minsync))
4243 spi->sync_period = np->minsync;
4244 }
4245 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0) {
4246 if (spi->sync_offset == 0)
4247 spi->sync_period = 0;
4248 if (spi->sync_offset > np->maxoffs)
4249 spi->sync_offset = np->maxoffs;
4250 }
4251 }
4252 if ((update_type & NCR_TRANS_USER) != 0) {
4253 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
4254 tp->tinfo.user.period = spi->sync_period;
4255 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
4256 tp->tinfo.user.offset = spi->sync_offset;
4257 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
4258 tp->tinfo.user.width = spi->bus_width;
4259 }
4260 if ((update_type & NCR_TRANS_GOAL) != 0) {
4261 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
4262 tp->tinfo.goal.period = spi->sync_period;
4263
4264 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
4265 tp->tinfo.goal.offset = spi->sync_offset;
4266
4267 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
4268 tp->tinfo.goal.width = spi->bus_width;
4269 }
4270 crit_exit();
4271 ccb->ccb_h.status = CAM_REQ_CMP;
4272 xpt_done(ccb);
4273 break;
4274 }
4275 case XPT_GET_TRAN_SETTINGS:
4276 /* Get default/user set transfer settings for the target */
4277 {
4278 struct ccb_trans_settings *cts = &ccb->cts;
4279 struct ncr_transinfo *tinfo;
4280 tcb_p tp = &np->target[ccb->ccb_h.target_id];
4281 struct ccb_trans_settings_scsi *scsi =
4282 &cts->proto_specific.scsi;
4283 struct ccb_trans_settings_spi *spi =
4284 &cts->xport_specific.spi;
4285
4286 cts->protocol = PROTO_SCSI;
4287 cts->protocol_version = SCSI_REV_2;
4288 cts->transport = XPORT_SPI;
4289 cts->transport_version = 2;
4290
4291 crit_enter();
4292 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
4293 tinfo = &tp->tinfo.current;
4294 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
4295 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
4296 else
4297 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
4298
4299 if (tp->tinfo.disc_tag & NCR_CUR_TAGENB)
4300 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
4301 else
4302 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
4303 } else {
4304 tinfo = &tp->tinfo.user;
4305 if (tp->tinfo.disc_tag & NCR_USR_DISCENB)
4306 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
4307 else
4308 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
4309
4310 if (tp->tinfo.disc_tag & NCR_USR_TAGENB)
4311 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
4312 else
4313 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
4314 }
4315
4316 spi->sync_period = tinfo->period;
4317 spi->sync_offset = tinfo->offset;
4318 spi->bus_width = tinfo->width;
4319
4320 crit_exit();
4321 spi->valid = CTS_SPI_VALID_SYNC_RATE
4322 | CTS_SPI_VALID_SYNC_OFFSET
4323 | CTS_SPI_VALID_BUS_WIDTH
4324 | CTS_SPI_VALID_DISC;
4325 scsi->valid = CTS_SCSI_VALID_TQ;
4326
4327 ccb->ccb_h.status = CAM_REQ_CMP;
4328 xpt_done(ccb);
4329 break;
4330 }
4331 case XPT_CALC_GEOMETRY:
4332 {
4333 struct ccb_calc_geometry *ccg;
4334 u_int32_t size_mb;
4335 u_int32_t secs_per_cylinder;
4336 int extended;
4337
4338 /* XXX JGibbs - I'm sure the NCR uses a different strategy,
4339 * but it should be able to deal with Adaptec
4340 * geometry too.
4341 */
4342 extended = 1;
4343 ccg = &ccb->ccg;
4344 size_mb = ccg->volume_size
4345 / ((1024L * 1024L) / ccg->block_size);
4346
4347 if (size_mb > 1024 && extended) {
4348 ccg->heads = 255;
4349 ccg->secs_per_track = 63;
4350 } else {
4351 ccg->heads = 64;
4352 ccg->secs_per_track = 32;
4353 }
4354 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
4355 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
4356 ccb->ccb_h.status = CAM_REQ_CMP;
4357 xpt_done(ccb);
4358 break;
4359 }
4360 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
4361 {
4362 OUTB (nc_scntl1, CRST);
4363 ccb->ccb_h.status = CAM_REQ_CMP;
4364 DELAY(10000); /* Wait until our interrupt handler sees it */
4365 xpt_done(ccb);
4366 break;
4367 }
4368 case XPT_TERM_IO: /* Terminate the I/O process */
4369 /* XXX Implement */
4370 ccb->ccb_h.status = CAM_REQ_INVALID;
4371 xpt_done(ccb);
4372 break;
4373 case XPT_PATH_INQ: /* Path routing inquiry */
4374 {
4375 struct ccb_pathinq *cpi = &ccb->cpi;
4376
4377 cpi->version_num = 1; /* XXX??? */
4378 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
4379 if ((np->features & FE_WIDE) != 0)
4380 cpi->hba_inquiry |= PI_WIDE_16;
4381 cpi->target_sprt = 0;
4382 cpi->hba_misc = 0;
4383 cpi->hba_eng_cnt = 0;
4384 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
4385 cpi->max_lun = MAX_LUN - 1;
4386 cpi->initiator_id = np->myaddr;
4387 cpi->bus_id = cam_sim_bus(sim);
4388 cpi->base_transfer_speed = 3300;
4389 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
4390 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
4391 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
4392 cpi->unit_number = cam_sim_unit(sim);
4393 cpi->transport = XPORT_SPI;
4394 cpi->transport_version = 2;
4395 cpi->protocol = PROTO_SCSI;
4396 cpi->protocol_version = SCSI_REV_2;
4397 cpi->ccb_h.status = CAM_REQ_CMP;
4398 xpt_done(ccb);
4399 break;
4400 }
4401 default:
4402 ccb->ccb_h.status = CAM_REQ_INVALID;
4403 xpt_done(ccb);
4404 break;
4405 }
4406 }
4407
4408 /*==========================================================
4409 **
4410 **
4411 ** Complete execution of a SCSI command.
4412 ** Signal completion to the generic SCSI driver.
4413 **
4414 **
4415 **==========================================================
4416 */
4417
4418 static void
4419 ncr_complete (ncb_p np, nccb_p cp)
4420 {
4421 union ccb *ccb;
4422 tcb_p tp;
4423
4424 /*
4425 ** Sanity check
4426 */
4427
4428 if (!cp || (cp->magic!=CCB_MAGIC) || !cp->ccb) return;
4429 cp->magic = 1;
4430 cp->tlimit= 0;
4431
4432 /*
4433 ** No Reselect anymore.
4434 */
4435 cp->jump_nccb.l_cmd = (SCR_JUMP);
4436
4437 /*
4438 ** No starting.
4439 */
4440 cp->phys.header.launch.l_paddr= NCB_SCRIPT_PHYS (np, idle);
4441
4442 /*
4443 ** timestamp
4444 */
4445 ncb_profile (np, cp);
4446
4447 if (DEBUG_FLAGS & DEBUG_TINY)
4448 kprintf ("CCB=%x STAT=%x/%x\n", (int)(intptr_t)cp & 0xfff,
4449 cp->host_status,cp->s_status);
4450
4451 ccb = cp->ccb;
4452 cp->ccb = NULL;
4453 tp = &np->target[ccb->ccb_h.target_id];
4454
4455 /*
4456 ** We do not queue more than 1 nccb per target
4457 ** with negotiation at any time. If this nccb was
4458 ** used for negotiation, clear this info in the tcb.
4459 */
4460
4461 if (cp == tp->nego_cp)
4462 tp->nego_cp = NULL;
4463
4464 /*
4465 ** Check for parity errors.
4466 */
4467 /* XXX JGibbs - What about reporting them??? */
4468
4469 if (cp->parity_status) {
4470 PRINT_ADDR(ccb);
4471 kprintf ("%d parity error(s), fallback.\n", cp->parity_status);
4472 /*
4473 ** fallback to asynch transfer.
4474 */
4475 tp->tinfo.goal.period = 0;
4476 tp->tinfo.goal.offset = 0;
4477 }
4478
4479 /*
4480 ** Check for extended errors.
4481 */
4482
4483 if (cp->xerr_status != XE_OK) {
4484 PRINT_ADDR(ccb);
4485 switch (cp->xerr_status) {
4486 case XE_EXTRA_DATA:
4487 kprintf ("extraneous data discarded.\n");
4488 break;
4489 case XE_BAD_PHASE:
4490 kprintf ("illegal scsi phase (4/5).\n");
4491 break;
4492 default:
4493 kprintf ("extended error %d.\n", cp->xerr_status);
4494 break;
4495 }
4496 if (cp->host_status==HS_COMPLETE)
4497 cp->host_status = HS_FAIL;
4498 }
4499
4500 /*
4501 ** Check the status.
4502 */
4503 if (cp->host_status == HS_COMPLETE) {
4504
4505 if (cp->s_status == SCSI_STATUS_OK) {
4506
4507 /*
4508 ** All went well.
4509 */
4510 /* XXX JGibbs - Properly calculate residual */
4511
4512 tp->bytes += ccb->csio.dxfer_len;
4513 tp->transfers ++;
4514
4515 ccb->ccb_h.status = CAM_REQ_CMP;
4516 } else if ((cp->s_status & SCSI_STATUS_SENSE) != 0) {
4517
4518 /*
4519 * XXX Could be TERMIO too. Should record
4520 * original status.
4521 */
4522 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
4523 cp->s_status &= ~SCSI_STATUS_SENSE;
4524 if (cp->s_status == SCSI_STATUS_OK) {
4525 ccb->ccb_h.status =
4526 CAM_AUTOSNS_VALID|CAM_SCSI_STATUS_ERROR;
4527 } else {
4528 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
4529 }
4530 } else {
4531 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
4532 ccb->csio.scsi_status = cp->s_status;
4533 }
4534
4535
4536 } else if (cp->host_status == HS_SEL_TIMEOUT) {
4537
4538 /*
4539 ** Device failed selection
4540 */
4541 ccb->ccb_h.status = CAM_SEL_TIMEOUT;
4542
4543 } else if (cp->host_status == HS_TIMEOUT) {
4544
4545 /*
4546 ** No response
4547 */
4548 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4549 } else if (cp->host_status == HS_STALL) {
4550 ccb->ccb_h.status = CAM_REQUEUE_REQ;
4551 } else {
4552
4553 /*
4554 ** Other protocol messes
4555 */
4556 PRINT_ADDR(ccb);
4557 kprintf ("COMMAND FAILED (%x %x) @%p.\n",
4558 cp->host_status, cp->s_status, cp);
4559
4560 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4561 }
4562
4563 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) {
4564 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
4565 ccb->ccb_h.status |= CAM_DEV_QFRZN;
4566 }
4567
4568 /*
4569 ** Free this nccb
4570 */
4571 ncr_free_nccb (np, cp);
4572
4573 /*
4574 ** signal completion to generic driver.
4575 */
4576 xpt_done (ccb);
4577 }
4578
4579 /*==========================================================
4580 **
4581 **
4582 ** Signal all (or one) control block done.
4583 **
4584 **
4585 **==========================================================
4586 */
4587
4588 static void
4589 ncr_wakeup (ncb_p np, u_long code)
4590 {
4591 /*
4592 ** Starting at the default nccb and following
4593 ** the links, complete all jobs with a
4594 ** host_status greater than "disconnect".
4595 **
4596 ** If the "code" parameter is not zero,
4597 ** complete all jobs that are not IDLE.
4598 */
4599
4600 nccb_p cp = np->link_nccb;
4601 while (cp) {
4602 switch (cp->host_status) {
4603
4604 case HS_IDLE:
4605 break;
4606
4607 case HS_DISCONNECT:
4608 if(DEBUG_FLAGS & DEBUG_TINY) kprintf ("D");
4609 /* fall through */
4610
4611 case HS_BUSY:
4612 case HS_NEGOTIATE:
4613 if (!code) break;
4614 cp->host_status = code;
4615
4616 /* fall through */
4617
4618 default:
4619 ncr_complete (np, cp);
4620 break;
4621 }
4622 cp = cp -> link_nccb;
4623 }
4624 }
4625
4626 static void
4627 ncr_freeze_devq (ncb_p np, struct cam_path *path)
4628 {
4629 nccb_p cp;
4630 int i;
4631 int count;
4632 int firstskip;
4633 /*
4634 ** Starting at the first nccb and following
4635 ** the links, complete all jobs that match
4636 ** the passed in path and are in the start queue.
4637 */
4638
4639 cp = np->link_nccb;
4640 count = 0;
4641 firstskip = 0;
4642 while (cp) {
4643 switch (cp->host_status) {
4644
4645 case HS_BUSY:
4646 case HS_NEGOTIATE:
4647 if ((cp->phys.header.launch.l_paddr
4648 == NCB_SCRIPT_PHYS (np, select))
4649 && (xpt_path_comp(path, cp->ccb->ccb_h.path) >= 0)) {
4650
4651 /* Mark for removal from the start queue */
4652 for (i = 1; i < MAX_START; i++) {
4653 int idx;
4654
4655 idx = np->squeueput - i;
4656
4657 if (idx < 0)
4658 idx = MAX_START + idx;
4659 if (np->squeue[idx]
4660 == CCB_PHYS(cp, phys)) {
4661 np->squeue[idx] =
4662 NCB_SCRIPT_PHYS (np, skip);
4663 if (i > firstskip)
4664 firstskip = i;
4665 break;
4666 }
4667 }
4668 cp->host_status=HS_STALL;
4669 ncr_complete (np, cp);
4670 count++;
4671 }
4672 break;
4673 default:
4674 break;
4675 }
4676 cp = cp->link_nccb;
4677 }
4678
4679 if (count > 0) {
4680 int j;
4681 int bidx;
4682
4683 /* Compress the start queue */
4684 j = 0;
4685 bidx = np->squeueput;
4686 i = np->squeueput - firstskip;
4687 if (i < 0)
4688 i = MAX_START + i;
4689 for (;;) {
4690
4691 bidx = i - j;
4692 if (bidx < 0)
4693 bidx = MAX_START + bidx;
4694
4695 if (np->squeue[i] == NCB_SCRIPT_PHYS (np, skip)) {
4696 j++;
4697 } else if (j != 0) {
4698 np->squeue[bidx] = np->squeue[i];
4699 if (np->squeue[bidx]
4700 == NCB_SCRIPT_PHYS(np, idle))
4701 break;
4702 }
4703 i = (i + 1) % MAX_START;
4704 }
4705 np->squeueput = bidx;
4706 }
4707 }
4708
4709 /*==========================================================
4710 **
4711 **
4712 ** Start NCR chip.
4713 **
4714 **
4715 **==========================================================
4716 */
4717
4718 static void
4719 ncr_init(ncb_p np, char * msg, u_long code)
4720 {
4721 int i;
4722
4723 /*
4724 ** Reset chip.
4725 */
4726
4727 OUTB (nc_istat, SRST);
4728 DELAY (1000);
4729 OUTB (nc_istat, 0);
4730
4731 /*
4732 ** Message.
4733 */
4734
4735 if (msg) kprintf ("%s: restart (%s).\n", ncr_name (np), msg);
4736
4737 /*
4738 ** Clear Start Queue
4739 */
4740
4741 for (i=0;i<MAX_START;i++)
4742 np -> squeue [i] = NCB_SCRIPT_PHYS (np, idle);
4743
4744 /*
4745 ** Start at first entry.
4746 */
4747
4748 np->squeueput = 0;
4749 WRITESCRIPT(startpos[0], NCB_SCRIPTH_PHYS (np, tryloop));
4750 WRITESCRIPT(start0 [0], SCR_INT ^ IFFALSE (0));
4751
4752 /*
4753 ** Wakeup all pending jobs.
4754 */
4755
4756 ncr_wakeup (np, code);
4757
4758 /*
4759 ** Init chip.
4760 */
4761
4762 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort ... */
4763 OUTB (nc_scntl0, 0xca ); /* full arb., ena parity, par->ATN */
4764 OUTB (nc_scntl1, 0x00 ); /* odd parity, and remove CRST!! */
4765 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
4766 OUTB (nc_scid , RRE|np->myaddr);/* host adapter SCSI address */
4767 OUTW (nc_respid, 1ul<<np->myaddr);/* id to respond to */
4768 OUTB (nc_istat , SIGP ); /* Signal Process */
4769 OUTB (nc_dmode , np->rv_dmode); /* XXX modify burstlen ??? */
4770 OUTB (nc_dcntl , np->rv_dcntl);
4771 OUTB (nc_ctest3, np->rv_ctest3);
4772 OUTB (nc_ctest5, np->rv_ctest5);
4773 OUTB (nc_ctest4, np->rv_ctest4);/* enable master parity checking */
4774 OUTB (nc_stest2, np->rv_stest2|EXT); /* Extended Sreq/Sack filtering */
4775 OUTB (nc_stest3, TE ); /* TolerANT enable */
4776 OUTB (nc_stime0, 0x0b ); /* HTH = disabled, STO = 0.1 sec. */
4777
4778 if (bootverbose >= 2) {
4779 kprintf ("\tACTUAL values:SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
4780 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
4781 kprintf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
4782 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
4783 }
4784
4785 /*
4786 ** Enable GPIO0 pin for writing if LED support.
4787 */
4788
4789 if (np->features & FE_LED0) {
4790 OUTOFFB (nc_gpcntl, 0x01);
4791 }
4792
4793 /*
4794 ** Fill in target structure.
4795 */
4796 for (i=0;i<MAX_TARGET;i++) {
4797 tcb_p tp = &np->target[i];
4798
4799 tp->tinfo.sval = 0;
4800 tp->tinfo.wval = np->rv_scntl3;
4801
4802 tp->tinfo.current.period = 0;
4803 tp->tinfo.current.offset = 0;
4804 tp->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT;
4805 }
4806
4807 /*
4808 ** enable ints
4809 */
4810
4811 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST);
4812 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
4813
4814 /*
4815 ** Start script processor.
4816 */
4817
4818 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
4819
4820 /*
4821 * Notify the XPT of the event
4822 */
4823 if (code == HS_RESET)
4824 xpt_async(AC_BUS_RESET, np->path, NULL);
4825 }
4826
4827 static void
4828 ncr_poll(struct cam_sim *sim)
4829 {
4830 ncr_intr(cam_sim_softc(sim));
4831 }
4832
4833
4834 /*==========================================================
4835 **
4836 ** Get clock factor and sync divisor for a given
4837 ** synchronous factor period.
4838 ** Returns the clock factor (in sxfer) and scntl3
4839 ** synchronous divisor field.
4840 **
4841 **==========================================================
4842 */
4843
4844 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
4845 {
4846 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
4847 int div = np->clock_divn; /* Number of divisors supported */
4848 u_long fak; /* Sync factor in sxfer */
4849 u_long per; /* Period in tenths of ns */
4850 u_long kpc; /* (per * clk) */
4851
4852 /*
4853 ** Compute the synchronous period in tenths of nano-seconds
4854 */
4855 if (sfac <= 10) per = 250;
4856 else if (sfac == 11) per = 303;
4857 else if (sfac == 12) per = 500;
4858 else per = 40 * sfac;
4859
4860 /*
4861 ** Look for the greatest clock divisor that allows an
4862 ** input speed faster than the period.
4863 */
4864 kpc = per * clk;
4865 while (--div >= 0)
4866 if (kpc >= (div_10M[div] * 4)) break;
4867
4868 /*
4869 ** Calculate the lowest clock factor that allows an output
4870 ** speed not faster than the period.
4871 */
4872 fak = (kpc - 1) / div_10M[div] + 1;
4873
4874 #if 0 /* You can #if 1 if you think this optimization is useful */
4875
4876 per = (fak * div_10M[div]) / clk;
4877
4878 /*
4879 ** Why not to try the immediate lower divisor and to choose
4880 ** the one that allows the fastest output speed ?
4881 ** We dont want input speed too much greater than output speed.
4882 */
4883 if (div >= 1 && fak < 6) {
4884 u_long fak2, per2;
4885 fak2 = (kpc - 1) / div_10M[div-1] + 1;
4886 per2 = (fak2 * div_10M[div-1]) / clk;
4887 if (per2 < per && fak2 <= 6) {
4888 fak = fak2;
4889 per = per2;
4890 --div;
4891 }
4892 }
4893 #endif
4894
4895 if (fak < 4) fak = 4; /* Should never happen, too bad ... */
4896
4897 /*
4898 ** Compute and return sync parameters for the ncr
4899 */
4900 *fakp = fak - 4;
4901 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
4902 }
4903
4904 /*==========================================================
4905 **
4906 ** Switch sync mode for current job and its target
4907 **
4908 **==========================================================
4909 */
4910
4911 static void
4912 ncr_setsync(ncb_p np, nccb_p cp, u_char scntl3, u_char sxfer, u_char period)
4913 {
4914 union ccb *ccb;
4915 struct ccb_trans_settings *neg;
4916 tcb_p tp;
4917 int div;
4918 u_int target = INB (nc_sdid) & 0x0f;
4919 u_int period_10ns;
4920
4921 assert (cp);
4922 if (!cp) return;
4923
4924 ccb = cp->ccb;
4925 assert (ccb);
4926 if (!ccb) return;
4927 assert (target == ccb->ccb_h.target_id);
4928
4929 tp = &np->target[target];
4930
4931 if (!scntl3 || !(sxfer & 0x1f))
4932 scntl3 = np->rv_scntl3;
4933 scntl3 = (scntl3 & 0xf0) | (tp->tinfo.wval & EWS)
4934 | (np->rv_scntl3 & 0x07);
4935
4936 /*
4937 ** Deduce the value of controller sync period from scntl3.
4938 ** period is in tenths of nano-seconds.
4939 */
4940
4941 div = ((scntl3 >> 4) & 0x7);
4942 if ((sxfer & 0x1f) && div)
4943 period_10ns =
4944 (((sxfer>>5)+4)*div_10M[div-1])/np->clock_khz;
4945 else
4946 period_10ns = 0;
4947
4948 tp->tinfo.goal.period = period;
4949 tp->tinfo.goal.offset = sxfer & 0x1f;
4950 tp->tinfo.current.period = period;
4951 tp->tinfo.current.offset = sxfer & 0x1f;
4952
4953 /*
4954 ** Stop there if sync parameters are unchanged
4955 */
4956 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
4957 tp->tinfo.sval = sxfer;
4958 tp->tinfo.wval = scntl3;
4959
4960 if (sxfer & 0x1f) {
4961 /*
4962 ** Disable extended Sreq/Sack filtering
4963 */
4964 if (period_10ns <= 2000) OUTOFFB (nc_stest2, EXT);
4965 }
4966
4967 /*
4968 ** Tell the SCSI layer about the
4969 ** new transfer parameters.
4970 */
4971 neg = &xpt_alloc_ccb()->cts;
4972 neg->protocol = PROTO_SCSI;
4973 neg->protocol_version = SCSI_REV_2;
4974 neg->transport = XPORT_SPI;
4975 neg->transport_version = 2;
4976 neg->xport_specific.spi.sync_period = period;
4977 neg->xport_specific.spi.sync_offset = sxfer & 0x1f;
4978 neg->xport_specific.spi.valid = CTS_SPI_VALID_SYNC_RATE
4979 | CTS_SPI_VALID_SYNC_OFFSET;
4980 xpt_setup_ccb(&neg->ccb_h, ccb->ccb_h.path, /*priority*/1);
4981 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, neg);
4982
4983 /*
4984 ** set actual value and sync_status
4985 */
4986 OUTB (nc_sxfer, sxfer);
4987 np->sync_st = sxfer;
4988 OUTB (nc_scntl3, scntl3);
4989 np->wide_st = scntl3;
4990
4991 /*
4992 ** patch ALL nccbs of this target.
4993 */
4994 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
4995 if (!cp->ccb) continue;
4996 if (cp->ccb->ccb_h.target_id != target) continue;
4997 cp->sync_status = sxfer;
4998 cp->wide_status = scntl3;
4999 }
5000
5001 xpt_free_ccb(&neg->ccb_h);
5002 }
5003
5004 /*==========================================================
5005 **
5006 ** Switch wide mode for current job and its target
5007 ** SCSI specs say: a SCSI device that accepts a WDTR
5008 ** message shall reset the synchronous agreement to
5009 ** asynchronous mode.
5010 **
5011 **==========================================================
5012 */
5013
5014 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack)
5015 {
5016 union ccb *ccb;
5017 struct ccb_trans_settings *neg;
5018 u_int target = INB (nc_sdid) & 0x0f;
5019 tcb_p tp;
5020 u_char scntl3;
5021 u_char sxfer;
5022
5023 assert (cp);
5024 if (!cp) return;
5025
5026 ccb = cp->ccb;
5027 assert (ccb);
5028 if (!ccb) return;
5029 assert (target == ccb->ccb_h.target_id);
5030
5031 tp = &np->target[target];
5032 tp->tinfo.current.width = wide;
5033 tp->tinfo.goal.width = wide;
5034 tp->tinfo.current.period = 0;
5035 tp->tinfo.current.offset = 0;
5036
5037 scntl3 = (tp->tinfo.wval & (~EWS)) | (wide ? EWS : 0);
5038
5039 sxfer = ack ? 0 : tp->tinfo.sval;
5040
5041 /*
5042 ** Stop there if sync/wide parameters are unchanged
5043 */
5044 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
5045 tp->tinfo.sval = sxfer;
5046 tp->tinfo.wval = scntl3;
5047
5048 /* Tell the SCSI layer about the new transfer params */
5049 neg = &xpt_alloc_ccb()->cts;
5050
5051 neg->protocol = PROTO_SCSI;
5052 neg->protocol_version = SCSI_REV_2;
5053 neg->transport = XPORT_SPI;
5054 neg->transport_version = 2;
5055 neg->xport_specific.spi.bus_width = (scntl3 & EWS) ?
5056 MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT;
5057 neg->xport_specific.spi.sync_period = 0;
5058 neg->xport_specific.spi.sync_offset = 0;
5059 neg->xport_specific.spi.valid = CTS_SPI_VALID_SYNC_RATE
5060 | CTS_SPI_VALID_SYNC_OFFSET
5061 | CTS_SPI_VALID_BUS_WIDTH;
5062 xpt_setup_ccb(&neg->ccb_h, ccb->ccb_h.path, /*priority*/1);
5063 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, neg);
5064
5065 /*
5066 ** set actual value and sync_status
5067 */
5068 OUTB (nc_sxfer, sxfer);
5069 np->sync_st = sxfer;
5070 OUTB (nc_scntl3, scntl3);
5071 np->wide_st = scntl3;
5072
5073 /*
5074 ** patch ALL nccbs of this target.
5075 */
5076 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
5077 if (!cp->ccb) continue;
5078 if (cp->ccb->ccb_h.target_id != target) continue;
5079 cp->sync_status = sxfer;
5080 cp->wide_status = scntl3;
5081 }
5082
5083 xpt_free_ccb(&neg->ccb_h);
5084 }
5085
5086 /*==========================================================
5087 **
5088 **
5089 ** ncr timeout handler.
5090 **
5091 **
5092 **==========================================================
5093 **
5094 ** Misused to keep the driver running when
5095 ** interrupts are not configured correctly.
5096 **
5097 **----------------------------------------------------------
5098 */
5099
5100 static void
5101 ncr_timeout (void *arg)
5102 {
5103 ncb_p np = arg;
5104 time_t thistime = time_uptime;
5105 ticks_t step = np->ticks;
5106 long t;
5107 nccb_p cp;
5108
5109 if (np->lasttime != thistime) {
5110 /*
5111 ** block ncr interrupts
5112 */
5113 crit_enter();
5114 np->lasttime = thistime;
5115
5116 /*----------------------------------------------------
5117 **
5118 ** handle ncr chip timeouts
5119 **
5120 ** Assumption:
5121 ** We have a chance to arbitrate for the
5122 ** SCSI bus at least every 10 seconds.
5123 **
5124 **----------------------------------------------------
5125 */
5126
5127 t = thistime - np->heartbeat;
5128
5129 if (t<2) np->latetime=0; else np->latetime++;
5130
5131 if (np->latetime>2) {
5132 /*
5133 ** If there are no requests, the script
5134 ** processor will sleep on SEL_WAIT_RESEL.
5135 ** But we have to check whether it died.
5136 ** Let's try to wake it up.
5137 */
5138 OUTB (nc_istat, SIGP);
5139 }
5140
5141 /*----------------------------------------------------
5142 **
5143 ** handle nccb timeouts
5144 **
5145 **----------------------------------------------------
5146 */
5147
5148 for (cp=np->link_nccb; cp; cp=cp->link_nccb) {
5149 /*
5150 ** look for timed out nccbs.
5151 */
5152 if (!cp->host_status) continue;
5153 if (cp->tlimit > thistime) continue;
5154
5155 /*
5156 ** Disable reselect.
5157 ** Remove it from startqueue.
5158 */
5159 cp->jump_nccb.l_cmd = (SCR_JUMP);
5160 if (cp->phys.header.launch.l_paddr ==
5161 NCB_SCRIPT_PHYS (np, select)) {
5162 kprintf ("%s: timeout nccb=%p (skip)\n",
5163 ncr_name (np), cp);
5164 cp->phys.header.launch.l_paddr
5165 = NCB_SCRIPT_PHYS (np, skip);
5166 }
5167
5168 switch (cp->host_status) {
5169
5170 case HS_BUSY:
5171 case HS_NEGOTIATE:
5172 /* fall through */
5173 case HS_DISCONNECT:
5174 cp->host_status=HS_TIMEOUT;
5175 }
5176 cp->tag = 0;
5177
5178 /*
5179 ** wakeup this nccb.
5180 */
5181 ncr_complete (np, cp);
5182 }
5183 crit_exit();
5184 }
5185
5186 callout_reset(&np->timeout_ch, step ? step : 1, ncr_timeout, np);
5187
5188 if (INB(nc_istat) & (INTF|SIP|DIP)) {
5189
5190 /*
5191 ** Process pending interrupts.
5192 */
5193
5194 crit_enter();
5195 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("{");
5196 ncr_exception (np);
5197 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("}");
5198 crit_exit();
5199 }
5200 }
5201
5202 /*==========================================================
5203 **
5204 ** log message for real hard errors
5205 **
5206 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
5207 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
5208 **
5209 ** exception register:
5210 ** ds: dstat
5211 ** si: sist
5212 **
5213 ** SCSI bus lines:
5214 ** so: control lines as driver by NCR.
5215 ** si: control lines as seen by NCR.
5216 ** sd: scsi data lines as seen by NCR.
5217 **
5218 ** wide/fastmode:
5219 ** sxfer: (see the manual)
5220 ** scntl3: (see the manual)
5221 **
5222 ** current script command:
5223 ** dsp: script adress (relative to start of script).
5224 ** dbc: first word of script command.
5225 **
5226 ** First 16 register of the chip:
5227 ** r0..rf
5228 **
5229 **==========================================================
5230 */
5231
5232 static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
5233 {
5234 u_int32_t dsp;
5235 int script_ofs;
5236 int script_size;
5237 char *script_name;
5238 u_char *script_base;
5239 int i;
5240
5241 dsp = INL (nc_dsp);
5242
5243 if (np->p_script < dsp &&
5244 dsp <= np->p_script + sizeof(struct script)) {
5245 script_ofs = dsp - np->p_script;
5246 script_size = sizeof(struct script);
5247 script_base = (u_char *) np->script;
5248 script_name = "script";
5249 }
5250 else if (np->p_scripth < dsp &&
5251 dsp <= np->p_scripth + sizeof(struct scripth)) {
5252 script_ofs = dsp - np->p_scripth;
5253 script_size = sizeof(struct scripth);
5254 script_base = (u_char *) np->scripth;
5255 script_name = "scripth";
5256 } else {
5257 script_ofs = dsp;
5258 script_size = 0;
5259 script_base = NULL;
5260 script_name = "mem";
5261 }
5262
5263 kprintf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
5264 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
5265 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
5266 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
5267 (unsigned)INL (nc_dbc));
5268
5269 if (((script_ofs & 3) == 0) &&
5270 (unsigned)script_ofs < script_size) {
5271 kprintf ("%s: script cmd = %08x\n", ncr_name(np),
5272 (int)READSCRIPT_OFF(script_base, script_ofs));
5273 }
5274
5275 kprintf ("%s: regdump:", ncr_name(np));
5276 for (i=0; i<16;i++)
5277 kprintf (" %02x", (unsigned)INB_OFF(i));
5278 kprintf (".\n");
5279 }
5280
5281 /*==========================================================
5282 **
5283 **
5284 ** ncr chip exception handler.
5285 **
5286 **
5287 **==========================================================
5288 */
5289
5290 static void ncr_exception (ncb_p np)
5291 {
5292 u_char istat, dstat;
5293 u_short sist;
5294
5295 /*
5296 ** interrupt on the fly ?
5297 */
5298 while ((istat = INB (nc_istat)) & INTF) {
5299 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("F ");
5300 OUTB (nc_istat, INTF);
5301 np->profile.num_fly++;
5302 ncr_wakeup (np, 0);
5303 }
5304 if (!(istat & (SIP|DIP))) {
5305 return;
5306 }
5307
5308 /*
5309 ** Steinbach's Guideline for Systems Programming:
5310 ** Never test for an error condition you don't know how to handle.
5311 */
5312
5313 sist = (istat & SIP) ? INW (nc_sist) : 0;
5314 dstat = (istat & DIP) ? INB (nc_dstat) : 0;
5315 np->profile.num_int++;
5316
5317 if (DEBUG_FLAGS & DEBUG_TINY)
5318 kprintf ("<%d|%x:%x|%x:%x>",
5319 INB(nc_scr0),
5320 dstat,sist,
5321 (unsigned)INL(nc_dsp),
5322 (unsigned)INL(nc_dbc));
5323 if ((dstat==DFE) && (sist==PAR)) return;
5324
5325 /*==========================================================
5326 **
5327 ** First the normal cases.
5328 **
5329 **==========================================================
5330 */
5331 /*-------------------------------------------
5332 ** SCSI reset
5333 **-------------------------------------------
5334 */
5335
5336 if (sist & RST) {
5337 ncr_init (np, bootverbose ? "scsi reset" : NULL, HS_RESET);
5338 return;
5339 }
5340
5341 /*-------------------------------------------
5342 ** selection timeout
5343 **
5344 ** IID excluded from dstat mask!
5345 ** (chip bug)
5346 **-------------------------------------------
5347 */
5348
5349 if ((sist & STO) &&
5350 !(sist & (GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5351 !(dstat & (MDPE|BF|ABRT|SIR))) {
5352 ncr_int_sto (np);
5353 return;
5354 }
5355
5356 /*-------------------------------------------
5357 ** Phase mismatch.
5358 **-------------------------------------------
5359 */
5360
5361 if ((sist & MA) &&
5362 !(sist & (STO|GEN|HTH|SGE|UDC|RST|PAR)) &&
5363 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5364 ncr_int_ma (np, dstat);
5365 return;
5366 }
5367
5368 /*----------------------------------------
5369 ** move command with length 0
5370 **----------------------------------------
5371 */
5372
5373 if ((dstat & IID) &&
5374 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5375 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5376 ((INL(nc_dbc) & 0xf8000000) == SCR_MOVE_TBL)) {
5377 /*
5378 ** Target wants more data than available.
5379 ** The "no_data" script will do it.
5380 */
5381 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, no_data));
5382 return;
5383 }
5384
5385 /*-------------------------------------------
5386 ** Programmed interrupt
5387 **-------------------------------------------
5388 */
5389
5390 if ((dstat & SIR) &&
5391 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5392 !(dstat & (MDPE|BF|ABRT|IID)) &&
5393 (INB(nc_dsps) <= SIR_MAX)) {
5394 ncr_int_sir (np);
5395 return;
5396 }
5397
5398 /*========================================
5399 ** log message for real hard errors
5400 **========================================
5401 */
5402
5403 ncr_log_hard_error(np, sist, dstat);
5404
5405 /*========================================
5406 ** do the register dump
5407 **========================================
5408 */
5409
5410 if (time_uptime - np->regtime > 10) {
5411 int i;
5412 np->regtime = time_uptime;
5413 for (i=0; i<sizeof(np->regdump); i++)
5414 ((volatile char*)&np->regdump)[i] = INB_OFF(i);
5415 np->regdump.nc_dstat = dstat;
5416 np->regdump.nc_sist = sist;
5417 }
5418
5419
5420 /*----------------------------------------
5421 ** clean up the dma fifo
5422 **----------------------------------------
5423 */
5424
5425 if ( (INB(nc_sstat0) & (ILF|ORF|OLF) ) ||
5426 (INB(nc_sstat1) & (FF3210) ) ||
5427 (INB(nc_sstat2) & (ILF1|ORF1|OLF1)) || /* wide .. */
5428 !(dstat & DFE)) {
5429 kprintf ("%s: have to clear fifos.\n", ncr_name (np));
5430 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5431 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5432 /* clear dma fifo */
5433 }
5434
5435 /*----------------------------------------
5436 ** handshake timeout
5437 **----------------------------------------
5438 */
5439
5440 if (sist & HTH) {
5441 kprintf ("%s: handshake timeout\n", ncr_name(np));
5442 OUTB (nc_scntl1, CRST);
5443 DELAY (1000);
5444 OUTB (nc_scntl1, 0x00);
5445 OUTB (nc_scr0, HS_FAIL);
5446 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5447 return;
5448 }
5449
5450 /*----------------------------------------
5451 ** unexpected disconnect
5452 **----------------------------------------
5453 */
5454
5455 if ((sist & UDC) &&
5456 !(sist & (STO|GEN|HTH|MA|SGE|RST|PAR)) &&
5457 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5458 OUTB (nc_scr0, HS_UNEXPECTED);
5459 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5460 return;
5461 }
5462
5463 /*----------------------------------------
5464 ** cannot disconnect
5465 **----------------------------------------
5466 */
5467
5468 if ((dstat & IID) &&
5469 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5470 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5471 ((INL(nc_dbc) & 0xf8000000) == SCR_WAIT_DISC)) {
5472 /*
5473 ** Unexpected data cycle while waiting for disconnect.
5474 */
5475 if (INB(nc_sstat2) & LDSC) {
5476 /*
5477 ** It's an early reconnect.
5478 ** Let's continue ...
5479 */
5480 OUTB (nc_dcntl, np->rv_dcntl | STD);
5481 /*
5482 ** info message
5483 */
5484 kprintf ("%s: INFO: LDSC while IID.\n",
5485 ncr_name (np));
5486 return;
5487 }
5488 kprintf ("%s: target %d doesn't release the bus.\n",
5489 ncr_name (np), INB (nc_sdid)&0x0f);
5490 /*
5491 ** return without restarting the NCR.
5492 ** timeout will do the real work.
5493 */
5494 return;
5495 }
5496
5497 /*----------------------------------------
5498 ** single step
5499 **----------------------------------------
5500 */
5501
5502 if ((dstat & SSI) &&
5503 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5504 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5505 OUTB (nc_dcntl, np->rv_dcntl | STD);
5506 return;
5507 }
5508
5509 /*
5510 ** @RECOVER@ HTH, SGE, ABRT.
5511 **
5512 ** We should try to recover from these interrupts.
5513 ** They may occur if there are problems with synch transfers, or
5514 ** if targets are switched on or off while the driver is running.
5515 */
5516
5517 if (sist & SGE) {
5518 /* clear scsi offsets */
5519 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5520 }
5521
5522 /*
5523 ** Freeze controller to be able to read the messages.
5524 */
5525
5526 if (DEBUG_FLAGS & DEBUG_FREEZE) {
5527 int i;
5528 unsigned char val;
5529 for (i=0; i<0x60; i++) {
5530 switch (i%16) {
5531
5532 case 0:
5533 kprintf ("%s: reg[%d0]: ",
5534 ncr_name(np),i/16);
5535 break;
5536 case 4:
5537 case 8:
5538 case 12:
5539 kprintf (" ");
5540 break;
5541 }
5542 val = bus_space_read_1(np->bst, np->bsh, i);
5543 kprintf (" %x%x", val/16, val%16);
5544 if (i%16==15) kprintf (".\n");
5545 }
5546
5547 callout_stop(&np->timeout_ch);
5548
5549 kprintf ("%s: halted!\n", ncr_name(np));
5550 /*
5551 ** don't restart controller ...
5552 */
5553 OUTB (nc_istat, SRST);
5554 return;
5555 }
5556
5557 #ifdef NCR_FREEZE
5558 /*
5559 ** Freeze system to be able to read the messages.
5560 */
5561 kprintf ("ncr: fatal error: system halted - press reset to reboot ...");
5562 crit_enter();
5563 for (;;);
5564 #endif
5565
5566 /*
5567 ** sorry, have to kill ALL jobs ...
5568 */
5569
5570 ncr_init (np, "fatal error", HS_FAIL);
5571 }
5572
5573 /*==========================================================
5574 **
5575 ** ncr chip exception handler for selection timeout
5576 **
5577 **==========================================================
5578 **
5579 ** There seems to be a bug in the 53c810.
5580 ** Although a STO-Interrupt is pending,
5581 ** it continues executing script commands.
5582 ** But it will fail and interrupt (IID) on
5583 ** the next instruction where it's looking
5584 ** for a valid phase.
5585 **
5586 **----------------------------------------------------------
5587 */
5588
5589 static void ncr_int_sto (ncb_p np)
5590 {
5591 u_long dsa, scratcha, diff;
5592 nccb_p cp;
5593 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("T");
5594
5595 /*
5596 ** look for nccb and set the status.
5597 */
5598
5599 dsa = INL (nc_dsa);
5600 cp = np->link_nccb;
5601 while (cp && (CCB_PHYS (cp, phys) != dsa))
5602 cp = cp->link_nccb;
5603
5604 if (cp) {
5605 cp-> host_status = HS_SEL_TIMEOUT;
5606 ncr_complete (np, cp);
5607 }
5608
5609 /*
5610 ** repair start queue
5611 */
5612
5613 scratcha = INL (nc_scratcha);
5614 diff = scratcha - NCB_SCRIPTH_PHYS (np, tryloop);
5615
5616 /* assert ((diff <= MAX_START * 20) && !(diff % 20));*/
5617
5618 if ((diff <= MAX_START * 20) && !(diff % 20)) {
5619 WRITESCRIPT(startpos[0], scratcha);
5620 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
5621 return;
5622 }
5623 ncr_init (np, "selection timeout", HS_FAIL);
5624 }
5625
5626 /*==========================================================
5627 **
5628 **
5629 ** ncr chip exception handler for phase errors.
5630 **
5631 **
5632 **==========================================================
5633 **
5634 ** We have to construct a new transfer descriptor,
5635 ** to transfer the rest of the current block.
5636 **
5637 **----------------------------------------------------------
5638 */
5639
5640 static void ncr_int_ma (ncb_p np, u_char dstat)
5641 {
5642 u_int32_t dbc;
5643 u_int32_t rest;
5644 u_int32_t dsa;
5645 u_int32_t dsp;
5646 u_int32_t nxtdsp;
5647 volatile void *vdsp_base;
5648 size_t vdsp_off;
5649 u_int32_t oadr, olen;
5650 u_int32_t *tblp, *newcmd;
5651 u_char cmd, sbcl, ss0, ss2, ctest5;
5652 u_short delta;
5653 nccb_p cp;
5654
5655 dsp = INL (nc_dsp);
5656 dsa = INL (nc_dsa);
5657 dbc = INL (nc_dbc);
5658 ss0 = INB (nc_sstat0);
5659 ss2 = INB (nc_sstat2);
5660 sbcl= INB (nc_sbcl);
5661
5662 cmd = dbc >> 24;
5663 rest= dbc & 0xffffff;
5664
5665 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
5666 if (ctest5 & DFS)
5667 delta=(((ctest5<<8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff;
5668 else
5669 delta=(INB (nc_dfifo) - rest) & 0x7f;
5670
5671
5672 /*
5673 ** The data in the dma fifo has not been transfered to
5674 ** the target -> add the amount to the rest
5675 ** and clear the data.
5676 ** Check the sstat2 register in case of wide transfer.
5677 */
5678
5679 if (!(dstat & DFE)) rest += delta;
5680 if (ss0 & OLF) rest++;
5681 if (ss0 & ORF) rest++;
5682 if (INB(nc_scntl3) & EWS) {
5683 if (ss2 & OLF1) rest++;
5684 if (ss2 & ORF1) rest++;
5685 }
5686 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
5687 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5688
5689 /*
5690 ** locate matching cp
5691 */
5692 cp = np->link_nccb;
5693 while (cp && (CCB_PHYS (cp, phys) != dsa))
5694 cp = cp->link_nccb;
5695
5696 if (!cp) {
5697 kprintf ("%s: SCSI phase error fixup: CCB already dequeued (%p)\n",
5698 ncr_name (np), (void *) np->header.cp);
5699 return;
5700 }
5701 if (cp != np->header.cp) {
5702 kprintf ("%s: SCSI phase error fixup: CCB address mismatch "
5703 "(%p != %p) np->nccb = %p\n",
5704 ncr_name (np), (void *)cp, (void *)np->header.cp,
5705 (void *)np->link_nccb);
5706 /* return;*/
5707 }
5708
5709 /*
5710 ** find the interrupted script command,
5711 ** and the address at which to continue.
5712 */
5713
5714 if (dsp == vtophys (&cp->patch[2])) {
5715 vdsp_base = cp;
5716 vdsp_off = offsetof(struct nccb, patch[0]);
5717 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5718 } else if (dsp == vtophys (&cp->patch[6])) {
5719 vdsp_base = cp;
5720 vdsp_off = offsetof(struct nccb, patch[4]);
5721 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5722 } else if (dsp > np->p_script &&
5723 dsp <= np->p_script + sizeof(struct script)) {
5724 vdsp_base = np->script;
5725 vdsp_off = dsp - np->p_script - 8;
5726 nxtdsp = dsp;
5727 } else {
5728 vdsp_base = np->scripth;
5729 vdsp_off = dsp - np->p_scripth - 8;
5730 nxtdsp = dsp;
5731 }
5732
5733 /*
5734 ** log the information
5735 */
5736 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) {
5737 kprintf ("P%x%x ",cmd&7, sbcl&7);
5738 kprintf ("RL=%d D=%d SS0=%x ",
5739 (unsigned) rest, (unsigned) delta, ss0);
5740 }
5741 if (DEBUG_FLAGS & DEBUG_PHASE) {
5742 kprintf ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
5743 cp, np->header.cp,
5744 dsp,
5745 nxtdsp, (volatile char*)vdsp_base+vdsp_off, cmd);
5746 }
5747
5748 /*
5749 ** get old startaddress and old length.
5750 */
5751
5752 oadr = READSCRIPT_OFF(vdsp_base, vdsp_off + 1*4);
5753
5754 if (cmd & 0x10) { /* Table indirect */
5755 tblp = (u_int32_t *) ((char*) &cp->phys + oadr);
5756 olen = tblp[0];
5757 oadr = tblp[1];
5758 } else {
5759 tblp = NULL;
5760 olen = READSCRIPT_OFF(vdsp_base, vdsp_off) & 0xffffff;
5761 }
5762
5763 if (DEBUG_FLAGS & DEBUG_PHASE) {
5764 kprintf ("OCMD=%x\nTBLP=%p OLEN=%lx OADR=%lx\n",
5765 (unsigned) (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24),
5766 (void *) tblp,
5767 (u_long) olen,
5768 (u_long) oadr);
5769 }
5770
5771 /*
5772 ** if old phase not dataphase, leave here.
5773 */
5774
5775 if (cmd != (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24)) {
5776 PRINT_ADDR(cp->ccb);
5777 kprintf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
5778 (unsigned)cmd,
5779 (unsigned)READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24);
5780
5781 return;
5782 }
5783 if (cmd & 0x06) {
5784 PRINT_ADDR(cp->ccb);
5785 kprintf ("phase change %x-%x %d@%08x resid=%d.\n",
5786 cmd&7, sbcl&7, (unsigned)olen,
5787 (unsigned)oadr, (unsigned)rest);
5788
5789 OUTB (nc_dcntl, np->rv_dcntl | STD);
5790 return;
5791 }
5792
5793 /*
5794 ** choose the correct patch area.
5795 ** if savep points to one, choose the other.
5796 */
5797
5798 newcmd = cp->patch;
5799 if (cp->phys.header.savep == vtophys (newcmd)) newcmd+=4;
5800
5801 /*
5802 ** fillin the commands
5803 */
5804
5805 newcmd[0] = ((cmd & 0x0f) << 24) | rest;
5806 newcmd[1] = oadr + olen - rest;
5807 newcmd[2] = SCR_JUMP;
5808 newcmd[3] = nxtdsp;
5809
5810 if (DEBUG_FLAGS & DEBUG_PHASE) {
5811 PRINT_ADDR(cp->ccb);
5812 kprintf ("newcmd[%d] %x %x %x %x.\n",
5813 (int)(newcmd - cp->patch),
5814 (unsigned)newcmd[0],
5815 (unsigned)newcmd[1],
5816 (unsigned)newcmd[2],
5817 (unsigned)newcmd[3]);
5818 }
5819 /*
5820 ** fake the return address (to the patch).
5821 ** and restart script processor at dispatcher.
5822 */
5823 np->profile.num_break++;
5824 OUTL (nc_temp, vtophys (newcmd));
5825 if ((cmd & 7) == 0)
5826 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
5827 else
5828 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, checkatn));
5829 }
5830
5831 /*==========================================================
5832 **
5833 **
5834 ** ncr chip exception handler for programmed interrupts.
5835 **
5836 **
5837 **==========================================================
5838 */
5839
5840 static int ncr_show_msg (u_char * msg)
5841 {
5842 u_char i;
5843 kprintf ("%x",*msg);
5844 if (*msg==MSG_EXTENDED) {
5845 for (i=1;i<8;i++) {
5846 if (i-1>msg[1]) break;
5847 kprintf ("-%x",msg[i]);
5848 }
5849 return (i+1);
5850 } else if ((*msg & 0xf0) == 0x20) {
5851 kprintf ("-%x",msg[1]);
5852 return (2);
5853 }
5854 return (1);
5855 }
5856
5857 static void ncr_int_sir (ncb_p np)
5858 {
5859 u_char scntl3;
5860 u_char chg, ofs, per, fak, wide;
5861 u_char num = INB (nc_dsps);
5862 nccb_p cp=NULL;
5863 u_long dsa;
5864 u_int target = INB (nc_sdid) & 0x0f;
5865 tcb_p tp = &np->target[target];
5866 int i;
5867 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("I#%d", num);
5868
5869 switch (num) {
5870 case SIR_SENSE_RESTART:
5871 case SIR_STALL_RESTART:
5872 break;
5873
5874 default:
5875 /*
5876 ** lookup the nccb
5877 */
5878 dsa = INL (nc_dsa);
5879 cp = np->link_nccb;
5880 while (cp && (CCB_PHYS (cp, phys) != dsa))
5881 cp = cp->link_nccb;
5882
5883 assert (cp);
5884 if (!cp)
5885 goto out;
5886 assert (cp == np->header.cp);
5887 if (cp != np->header.cp)
5888 goto out;
5889 }
5890
5891 switch (num) {
5892
5893 /*--------------------------------------------------------------------
5894 **
5895 ** Processing of interrupted getcc selects
5896 **
5897 **--------------------------------------------------------------------
5898 */
5899
5900 case SIR_SENSE_RESTART:
5901 /*------------------------------------------
5902 ** Script processor is idle.
5903 ** Look for interrupted "check cond"
5904 **------------------------------------------
5905 */
5906
5907 if (DEBUG_FLAGS & DEBUG_RESTART)
5908 kprintf ("%s: int#%d",ncr_name (np),num);
5909 cp = (nccb_p) 0;
5910 for (i=0; i<MAX_TARGET; i++) {
5911 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf (" t%d", i);
5912 tp = &np->target[i];
5913 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf ("+");
5914 cp = tp->hold_cp;
5915 if (!cp) continue;
5916 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf ("+");
5917 if ((cp->host_status==HS_BUSY) &&
5918 (cp->s_status==SCSI_STATUS_CHECK_COND))
5919 break;
5920 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf ("- (remove)");
5921 tp->hold_cp = cp = (nccb_p) 0;
5922 }
5923
5924 if (cp) {
5925 if (DEBUG_FLAGS & DEBUG_RESTART)
5926 kprintf ("+ restart job ..\n");
5927 OUTL (nc_dsa, CCB_PHYS (cp, phys));
5928 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, getcc));
5929 return;
5930 }
5931
5932 /*
5933 ** no job, resume normal processing
5934 */
5935 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf (" -- remove trap\n");
5936 WRITESCRIPT(start0[0], SCR_INT ^ IFFALSE (0));
5937 break;
5938
5939 case SIR_SENSE_FAILED:
5940 /*-------------------------------------------
5941 ** While trying to select for
5942 ** getting the condition code,
5943 ** a target reselected us.
5944 **-------------------------------------------
5945 */
5946 if (DEBUG_FLAGS & DEBUG_RESTART) {
5947 PRINT_ADDR(cp->ccb);
5948 kprintf ("in getcc reselect by t%d.\n",
5949 INB(nc_ssid) & 0x0f);
5950 }
5951
5952 /*
5953 ** Mark this job
5954 */
5955 cp->host_status = HS_BUSY;
5956 cp->s_status = SCSI_STATUS_CHECK_COND;
5957 np->target[cp->ccb->ccb_h.target_id].hold_cp = cp;
5958
5959 /*
5960 ** And patch code to restart it.
5961 */
5962 WRITESCRIPT(start0[0], SCR_INT);
5963 break;
5964
5965 /*-----------------------------------------------------------------------------
5966 **
5967 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
5968 **
5969 ** We try to negotiate sync and wide transfer only after
5970 ** a successfull inquire command. We look at byte 7 of the
5971 ** inquire data to determine the capabilities if the target.
5972 **
5973 ** When we try to negotiate, we append the negotiation message
5974 ** to the identify and (maybe) simple tag message.
5975 ** The host status field is set to HS_NEGOTIATE to mark this
5976 ** situation.
5977 **
5978 ** If the target doesn't answer this message immidiately
5979 ** (as required by the standard), the SIR_NEGO_FAIL interrupt
5980 ** will be raised eventually.
5981 ** The handler removes the HS_NEGOTIATE status, and sets the
5982 ** negotiated value to the default (async / nowide).
5983 **
5984 ** If we receive a matching answer immediately, we check it
5985 ** for validity, and set the values.
5986 **
5987 ** If we receive a Reject message immediately, we assume the
5988 ** negotiation has failed, and fall back to standard values.
5989 **
5990 ** If we receive a negotiation message while not in HS_NEGOTIATE
5991 ** state, it's a target initiated negotiation. We prepare a
5992 ** (hopefully) valid answer, set our parameters, and send back
5993 ** this answer to the target.
5994 **
5995 ** If the target doesn't fetch the answer (no message out phase),
5996 ** we assume the negotiation has failed, and fall back to default
5997 ** settings.
5998 **
5999 ** When we set the values, we adjust them in all nccbs belonging
6000 ** to this target, in the controller's register, and in the "phys"
6001 ** field of the controller's struct ncb.
6002 **
6003 ** Possible cases: hs sir msg_in value send goto
6004 ** We try try to negotiate:
6005 ** -> target doesnt't msgin NEG FAIL noop defa. - dispatch
6006 ** -> target rejected our msg NEG FAIL reject defa. - dispatch
6007 ** -> target answered (ok) NEG SYNC sdtr set - clrack
6008 ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad
6009 ** -> target answered (ok) NEG WIDE wdtr set - clrack
6010 ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad
6011 ** -> any other msgin NEG FAIL noop defa. - dispatch
6012 **
6013 ** Target tries to negotiate:
6014 ** -> incoming message --- SYNC sdtr set SDTR -
6015 ** -> incoming message --- WIDE wdtr set WDTR -
6016 ** We sent our answer:
6017 ** -> target doesn't msgout --- PROTO ? defa. - dispatch
6018 **
6019 **-----------------------------------------------------------------------------
6020 */
6021
6022 case SIR_NEGO_FAILED:
6023 /*-------------------------------------------------------
6024 **
6025 ** Negotiation failed.
6026 ** Target doesn't send an answer message,
6027 ** or target rejected our message.
6028 **
6029 ** Remove negotiation request.
6030 **
6031 **-------------------------------------------------------
6032 */
6033 OUTB (HS_PRT, HS_BUSY);
6034
6035 /* fall through */
6036
6037 case SIR_NEGO_PROTO:
6038 /*-------------------------------------------------------
6039 **
6040 ** Negotiation failed.
6041 ** Target doesn't fetch the answer message.
6042 **
6043 **-------------------------------------------------------
6044 */
6045
6046 if (DEBUG_FLAGS & DEBUG_NEGO) {
6047 PRINT_ADDR(cp->ccb);
6048 kprintf ("negotiation failed sir=%x status=%x.\n",
6049 num, cp->nego_status);
6050 }
6051
6052 /*
6053 ** any error in negotiation:
6054 ** fall back to default mode.
6055 */
6056 switch (cp->nego_status) {
6057
6058 case NS_SYNC:
6059 ncr_setsync (np, cp, 0, 0xe0, 0);
6060 break;
6061
6062 case NS_WIDE:
6063 ncr_setwide (np, cp, 0, 0);
6064 break;
6065
6066 }
6067 np->msgin [0] = MSG_NOOP;
6068 np->msgout[0] = MSG_NOOP;
6069 cp->nego_status = 0;
6070 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
6071 break;
6072
6073 case SIR_NEGO_SYNC:
6074 /*
6075 ** Synchronous request message received.
6076 */
6077
6078 if (DEBUG_FLAGS & DEBUG_NEGO) {
6079 PRINT_ADDR(cp->ccb);
6080 kprintf ("sync msgin: ");
6081 (void) ncr_show_msg (np->msgin);
6082 kprintf (".\n");
6083 }
6084
6085 /*
6086 ** get requested values.
6087 */
6088
6089 chg = 0;
6090 per = np->msgin[3];
6091 ofs = np->msgin[4];
6092 if (ofs==0) per=255;
6093
6094 /*
6095 ** check values against driver limits.
6096 */
6097 if (per < np->minsync)
6098 {chg = 1; per = np->minsync;}
6099 if (per < tp->tinfo.user.period)
6100 {chg = 1; per = tp->tinfo.user.period;}
6101 if (ofs > tp->tinfo.user.offset)
6102 {chg = 1; ofs = tp->tinfo.user.offset;}
6103
6104 /*
6105 ** Check against controller limits.
6106 */
6107
6108 fak = 7;
6109 scntl3 = 0;
6110 if (ofs != 0) {
6111 ncr_getsync(np, per, &fak, &scntl3);
6112 if (fak > 7) {
6113 chg = 1;
6114 ofs = 0;
6115 }
6116 }
6117 if (ofs == 0) {
6118 fak = 7;
6119 per = 0;
6120 scntl3 = 0;
6121 }
6122
6123 if (DEBUG_FLAGS & DEBUG_NEGO) {
6124 PRINT_ADDR(cp->ccb);
6125 kprintf ("sync: per=%d scntl3=0x%x ofs=%d fak=%d chg=%d.\n",
6126 per, scntl3, ofs, fak, chg);
6127 }
6128
6129 if (INB (HS_PRT) == HS_NEGOTIATE) {
6130 OUTB (HS_PRT, HS_BUSY);
6131 switch (cp->nego_status) {
6132
6133 case NS_SYNC:
6134 /*
6135 ** This was an answer message
6136 */
6137 if (chg) {
6138 /*
6139 ** Answer wasn't acceptable.
6140 */
6141 ncr_setsync (np, cp, 0, 0xe0, 0);
6142 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6143 } else {
6144 /*
6145 ** Answer is ok.
6146 */
6147 ncr_setsync (np,cp,scntl3,(fak<<5)|ofs, per);
6148 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6149 }
6150 return;
6151
6152 case NS_WIDE:
6153 ncr_setwide (np, cp, 0, 0);
6154 break;
6155 }
6156 }
6157
6158 /*
6159 ** It was a request. Set value and
6160 ** prepare an answer message
6161 */
6162
6163 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs, per);
6164
6165 np->msgout[0] = MSG_EXTENDED;
6166 np->msgout[1] = 3;
6167 np->msgout[2] = MSG_EXT_SDTR;
6168 np->msgout[3] = per;
6169 np->msgout[4] = ofs;
6170
6171 cp->nego_status = NS_SYNC;
6172
6173 if (DEBUG_FLAGS & DEBUG_NEGO) {
6174 PRINT_ADDR(cp->ccb);
6175 kprintf ("sync msgout: ");
6176 (void) ncr_show_msg (np->msgout);
6177 kprintf (".\n");
6178 }
6179
6180 if (!ofs) {
6181 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6182 return;
6183 }
6184 np->msgin [0] = MSG_NOOP;
6185
6186 break;
6187
6188 case SIR_NEGO_WIDE:
6189 /*
6190 ** Wide request message received.
6191 */
6192 if (DEBUG_FLAGS & DEBUG_NEGO) {
6193 PRINT_ADDR(cp->ccb);
6194 kprintf ("wide msgin: ");
6195 (void) ncr_show_msg (np->msgin);
6196 kprintf (".\n");
6197 }
6198
6199 /*
6200 ** get requested values.
6201 */
6202
6203 chg = 0;
6204 wide = np->msgin[3];
6205
6206 /*
6207 ** check values against driver limits.
6208 */
6209
6210 if (wide > tp->tinfo.user.width)
6211 {chg = 1; wide = tp->tinfo.user.width;}
6212
6213 if (DEBUG_FLAGS & DEBUG_NEGO) {
6214 PRINT_ADDR(cp->ccb);
6215 kprintf ("wide: wide=%d chg=%d.\n", wide, chg);
6216 }
6217
6218 if (INB (HS_PRT) == HS_NEGOTIATE) {
6219 OUTB (HS_PRT, HS_BUSY);
6220 switch (cp->nego_status) {
6221
6222 case NS_WIDE:
6223 /*
6224 ** This was an answer message
6225 */
6226 if (chg) {
6227 /*
6228 ** Answer wasn't acceptable.
6229 */
6230 ncr_setwide (np, cp, 0, 1);
6231 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6232 } else {
6233 /*
6234 ** Answer is ok.
6235 */
6236 ncr_setwide (np, cp, wide, 1);
6237 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6238 }
6239 return;
6240
6241 case NS_SYNC:
6242 ncr_setsync (np, cp, 0, 0xe0, 0);
6243 break;
6244 }
6245 }
6246
6247 /*
6248 ** It was a request, set value and
6249 ** prepare an answer message
6250 */
6251
6252 ncr_setwide (np, cp, wide, 1);
6253
6254 np->msgout[0] = MSG_EXTENDED;
6255 np->msgout[1] = 2;
6256 np->msgout[2] = MSG_EXT_WDTR;
6257 np->msgout[3] = wide;
6258
6259 np->msgin [0] = MSG_NOOP;
6260
6261 cp->nego_status = NS_WIDE;
6262
6263 if (DEBUG_FLAGS & DEBUG_NEGO) {
6264 PRINT_ADDR(cp->ccb);
6265 kprintf ("wide msgout: ");
6266 (void) ncr_show_msg (np->msgout);
6267 kprintf (".\n");
6268 }
6269 break;
6270
6271 /*--------------------------------------------------------------------
6272 **
6273 ** Processing of special messages
6274 **
6275 **--------------------------------------------------------------------
6276 */
6277
6278 case SIR_REJECT_RECEIVED:
6279 /*-----------------------------------------------
6280 **
6281 ** We received a MSG_MESSAGE_REJECT message.
6282 **
6283 **-----------------------------------------------
6284 */
6285
6286 PRINT_ADDR(cp->ccb);
6287 kprintf ("MSG_MESSAGE_REJECT received (%x:%x).\n",
6288 (unsigned)np->lastmsg, np->msgout[0]);
6289 break;
6290
6291 case SIR_REJECT_SENT:
6292 /*-----------------------------------------------
6293 **
6294 ** We received an unknown message
6295 **
6296 **-----------------------------------------------
6297 */
6298
6299 PRINT_ADDR(cp->ccb);
6300 kprintf ("MSG_MESSAGE_REJECT sent for ");
6301 (void) ncr_show_msg (np->msgin);
6302 kprintf (".\n");
6303 break;
6304
6305 /*--------------------------------------------------------------------
6306 **
6307 ** Processing of special messages
6308 **
6309 **--------------------------------------------------------------------
6310 */
6311
6312 case SIR_IGN_RESIDUE:
6313 /*-----------------------------------------------
6314 **
6315 ** We received an IGNORE RESIDUE message,
6316 ** which couldn't be handled by the script.
6317 **
6318 **-----------------------------------------------
6319 */
6320
6321 PRINT_ADDR(cp->ccb);
6322 kprintf ("MSG_IGN_WIDE_RESIDUE received, but not yet implemented.\n");
6323 break;
6324
6325 case SIR_MISSING_SAVE:
6326 /*-----------------------------------------------
6327 **
6328 ** We received an DISCONNECT message,
6329 ** but the datapointer wasn't saved before.
6330 **
6331 **-----------------------------------------------
6332 */
6333
6334 PRINT_ADDR(cp->ccb);
6335 kprintf ("MSG_DISCONNECT received, but datapointer not saved:\n"
6336 "\tdata=%x save=%x goal=%x.\n",
6337 (unsigned) INL (nc_temp),
6338 (unsigned) np->header.savep,
6339 (unsigned) np->header.goalp);
6340 break;
6341
6342 /*--------------------------------------------------------------------
6343 **
6344 ** Processing of a "SCSI_STATUS_QUEUE_FULL" status.
6345 **
6346 ** XXX JGibbs - We should do the same thing for BUSY status.
6347 **
6348 ** The current command has been rejected,
6349 ** because there are too many in the command queue.
6350 ** We have started too many commands for that target.
6351 **
6352 **--------------------------------------------------------------------
6353 */
6354 case SIR_STALL_QUEUE:
6355 cp->xerr_status = XE_OK;
6356 cp->host_status = HS_COMPLETE;
6357 cp->s_status = SCSI_STATUS_QUEUE_FULL;
6358 ncr_freeze_devq(np, cp->ccb->ccb_h.path);
6359 ncr_complete(np, cp);
6360
6361 /* FALL THROUGH */
6362
6363 case SIR_STALL_RESTART:
6364 /*-----------------------------------------------
6365 **
6366 ** Enable selecting again,
6367 ** if NO disconnected jobs.
6368 **
6369 **-----------------------------------------------
6370 */
6371 /*
6372 ** Look for a disconnected job.
6373 */
6374 cp = np->link_nccb;
6375 while (cp && cp->host_status != HS_DISCONNECT)
6376 cp = cp->link_nccb;
6377
6378 /*
6379 ** if there is one, ...
6380 */
6381 if (cp) {
6382 /*
6383 ** wait for reselection
6384 */
6385 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, reselect));
6386 return;
6387 }
6388
6389 /*
6390 ** else remove the interrupt.
6391 */
6392
6393 kprintf ("%s: queue empty.\n", ncr_name (np));
6394 WRITESCRIPT(start1[0], SCR_INT ^ IFFALSE (0));
6395 break;
6396 }
6397
6398 out:
6399 OUTB (nc_dcntl, np->rv_dcntl | STD);
6400 }
6401
6402 /*==========================================================
6403 **
6404 **
6405 ** Acquire a control block
6406 **
6407 **
6408 **==========================================================
6409 */
6410
6411 static nccb_p ncr_get_nccb
6412 (ncb_p np, u_long target, u_long lun)
6413 {
6414 lcb_p lp;
6415 nccb_p cp = NULL;
6416
6417 /* Keep our timeout handler out */
6418 crit_enter();
6419
6420 /*
6421 ** Lun structure available ?
6422 */
6423
6424 lp = np->target[target].lp[lun];
6425 if (lp) {
6426 cp = lp->next_nccb;
6427
6428 /*
6429 ** Look for free CCB
6430 */
6431
6432 while (cp && cp->magic) {
6433 cp = cp->next_nccb;
6434 }
6435 }
6436
6437 /*
6438 ** if nothing available, create one.
6439 */
6440
6441 if (cp == NULL)
6442 cp = ncr_alloc_nccb(np, target, lun);
6443
6444 if (cp != NULL) {
6445 if (cp->magic) {
6446 kprintf("%s: Bogus free cp found\n", ncr_name(np));
6447 crit_exit();
6448 return (NULL);
6449 }
6450 cp->magic = 1;
6451 }
6452 crit_exit();
6453 return (cp);
6454 }
6455
6456 /*==========================================================
6457 **
6458 **
6459 ** Release one control block
6460 **
6461 **
6462 **==========================================================
6463 */
6464
6465 static void ncr_free_nccb (ncb_p np, nccb_p cp)
6466 {
6467 /*
6468 ** sanity
6469 */
6470
6471 assert (cp != NULL);
6472
6473 cp -> host_status = HS_IDLE;
6474 cp -> magic = 0;
6475 }
6476
6477 /*==========================================================
6478 **
6479 **
6480 ** Allocation of resources for Targets/Luns/Tags.
6481 **
6482 **
6483 **==========================================================
6484 */
6485
6486 static nccb_p
6487 ncr_alloc_nccb (ncb_p np, u_long target, u_long lun)
6488 {
6489 tcb_p tp;
6490 lcb_p lp;
6491 nccb_p cp;
6492
6493 assert (np != NULL);
6494
6495 if (target>=MAX_TARGET) return(NULL);
6496 if (lun >=MAX_LUN ) return(NULL);
6497
6498 tp=&np->target[target];
6499
6500 if (!tp->jump_tcb.l_cmd) {
6501
6502 /*
6503 ** initialize it.
6504 */
6505 tp->jump_tcb.l_cmd = (SCR_JUMP^IFFALSE (DATA (0x80 + target)));
6506 tp->jump_tcb.l_paddr = np->jump_tcb.l_paddr;
6507
6508 tp->getscr[0] =
6509 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6510 tp->getscr[1] = vtophys (&tp->tinfo.sval);
6511 tp->getscr[2] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_sxfer);
6512 tp->getscr[3] =
6513 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6514 tp->getscr[4] = vtophys (&tp->tinfo.wval);
6515 tp->getscr[5] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_scntl3);
6516
6517 assert (((offsetof(struct ncr_reg, nc_sxfer) ^
6518 (offsetof(struct tcb ,tinfo)
6519 + offsetof(struct ncr_target_tinfo, sval))) & 3) == 0);
6520 assert (((offsetof(struct ncr_reg, nc_scntl3) ^
6521 (offsetof(struct tcb, tinfo)
6522 + offsetof(struct ncr_target_tinfo, wval))) &3) == 0);
6523
6524 tp->call_lun.l_cmd = (SCR_CALL);
6525 tp->call_lun.l_paddr = NCB_SCRIPT_PHYS (np, resel_lun);
6526
6527 tp->jump_lcb.l_cmd = (SCR_JUMP);
6528 tp->jump_lcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
6529 np->jump_tcb.l_paddr = vtophys (&tp->jump_tcb);
6530 }
6531
6532 /*
6533 ** Logic unit control block
6534 */
6535 lp = tp->lp[lun];
6536 if (!lp) {
6537 /*
6538 ** Allocate a lcb
6539 */
6540 lp = kmalloc (sizeof (struct lcb), M_DEVBUF, M_WAITOK | M_ZERO);
6541
6542 /*
6543 ** Initialize it
6544 */
6545 lp->jump_lcb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (lun)));
6546 lp->jump_lcb.l_paddr = tp->jump_lcb.l_paddr;
6547
6548 lp->call_tag.l_cmd = (SCR_CALL);
6549 lp->call_tag.l_paddr = NCB_SCRIPT_PHYS (np, resel_tag);
6550
6551 lp->jump_nccb.l_cmd = (SCR_JUMP);
6552 lp->jump_nccb.l_paddr = NCB_SCRIPTH_PHYS (np, aborttag);
6553
6554 lp->actlink = 1;
6555
6556 /*
6557 ** Chain into LUN list
6558 */
6559 tp->jump_lcb.l_paddr = vtophys (&lp->jump_lcb);
6560 tp->lp[lun] = lp;
6561
6562 }
6563
6564 /*
6565 ** Allocate a nccb
6566 */
6567 cp = kmalloc (sizeof (struct nccb), M_DEVBUF, M_WAITOK | M_ZERO);
6568
6569 if (DEBUG_FLAGS & DEBUG_ALLOC) {
6570 kprintf ("new nccb @%p.\n", cp);
6571 }
6572
6573 /*
6574 ** Fill in physical addresses
6575 */
6576
6577 cp->p_nccb = vtophys (cp);
6578
6579 /*
6580 ** Chain into reselect list
6581 */
6582 cp->jump_nccb.l_cmd = SCR_JUMP;
6583 cp->jump_nccb.l_paddr = lp->jump_nccb.l_paddr;
6584 lp->jump_nccb.l_paddr = CCB_PHYS (cp, jump_nccb);
6585 cp->call_tmp.l_cmd = SCR_CALL;
6586 cp->call_tmp.l_paddr = NCB_SCRIPT_PHYS (np, resel_tmp);
6587
6588 /*
6589 ** Chain into wakeup list
6590 */
6591 cp->link_nccb = np->link_nccb;
6592 np->link_nccb = cp;
6593
6594 /*
6595 ** Chain into CCB list
6596 */
6597 cp->next_nccb = lp->next_nccb;
6598 lp->next_nccb = cp;
6599
6600 return (cp);
6601 }
6602
6603 /*==========================================================
6604 **
6605 **
6606 ** Build Scatter Gather Block
6607 **
6608 **
6609 **==========================================================
6610 **
6611 ** The transfer area may be scattered among
6612 ** several non adjacent physical pages.
6613 **
6614 ** We may use MAX_SCATTER blocks.
6615 **
6616 **----------------------------------------------------------
6617 */
6618
6619 static int ncr_scatter
6620 (struct dsb* phys, vm_offset_t vaddr, vm_size_t datalen)
6621 {
6622 u_long paddr, pnext;
6623
6624 u_short segment = 0;
6625 u_long segsize, segaddr;
6626 u_long size, csize = 0;
6627 u_long chunk = MAX_SIZE;
6628 int free;
6629
6630 bzero (&phys->data, sizeof (phys->data));
6631 if (!datalen) return (0);
6632
6633 paddr = vtophys (vaddr);
6634
6635 /*
6636 ** insert extra break points at a distance of chunk.
6637 ** We try to reduce the number of interrupts caused
6638 ** by unexpected phase changes due to disconnects.
6639 ** A typical harddisk may disconnect before ANY block.
6640 ** If we wanted to avoid unexpected phase changes at all
6641 ** we had to use a break point every 512 bytes.
6642 ** Of course the number of scatter/gather blocks is
6643 ** limited.
6644 */
6645
6646 free = MAX_SCATTER - 1;
6647
6648 if (vaddr & PAGE_MASK) free -= datalen / PAGE_SIZE;
6649
6650 if (free>1)
6651 while ((chunk * free >= 2 * datalen) && (chunk>=1024))
6652 chunk /= 2;
6653
6654 if(DEBUG_FLAGS & DEBUG_SCATTER)
6655 kprintf("ncr?:\tscattering virtual=%p size=%d chunk=%d.\n",
6656 (void *) vaddr, (unsigned) datalen, (unsigned) chunk);
6657
6658 /*
6659 ** Build data descriptors.
6660 */
6661 while (datalen && (segment < MAX_SCATTER)) {
6662
6663 /*
6664 ** this segment is empty
6665 */
6666 segsize = 0;
6667 segaddr = paddr;
6668 pnext = paddr;
6669
6670 if (!csize) csize = chunk;
6671
6672 while ((datalen) && (paddr == pnext) && (csize)) {
6673
6674 /*
6675 ** continue this segment
6676 */
6677 pnext = (paddr & (~PAGE_MASK)) + PAGE_SIZE;
6678
6679 /*
6680 ** Compute max size
6681 */
6682
6683 size = pnext - paddr; /* page size */
6684 if (size > datalen) size = datalen; /* data size */
6685 if (size > csize ) size = csize ; /* chunksize */
6686
6687 segsize += size;
6688 vaddr += size;
6689 csize -= size;
6690 datalen -= size;
6691 paddr = vtophys (vaddr);
6692 }
6693
6694 if(DEBUG_FLAGS & DEBUG_SCATTER)
6695 kprintf ("\tseg #%d addr=%x size=%d (rest=%d).\n",
6696 segment,
6697 (unsigned) segaddr,
6698 (unsigned) segsize,
6699 (unsigned) datalen);
6700
6701 phys->data[segment].addr = segaddr;
6702 phys->data[segment].size = segsize;
6703 segment++;
6704 }
6705
6706 if (datalen) {
6707 kprintf("ncr?: scatter/gather failed (residue=%d).\n",
6708 (unsigned) datalen);
6709 return (-1);
6710 }
6711
6712 return (segment);
6713 }
6714
6715 /*==========================================================
6716 **
6717 **
6718 ** Test the pci bus snoop logic :-(
6719 **
6720 ** Has to be called with interrupts disabled.
6721 **
6722 **
6723 **==========================================================
6724 */
6725
6726 #ifndef NCR_IOMAPPED
6727 static int ncr_regtest (struct ncb* np)
6728 {
6729 volatile u_int32_t data;
6730 /*
6731 ** ncr registers may NOT be cached.
6732 ** write 0xffffffff to a read only register area,
6733 ** and try to read it back.
6734 */
6735 data = 0xffffffff;
6736 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
6737 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
6738 #if 1
6739 if (data == 0xffffffff) {
6740 #else
6741 if ((data & 0xe2f0fffd) != 0x02000080) {
6742 #endif
6743 kprintf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6744 (unsigned) data);
6745 return (0x10);
6746 }
6747 return (0);
6748 }
6749 #endif
6750
6751 static int ncr_snooptest (struct ncb* np)
6752 {
6753 u_int32_t ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
6754 int i, err=0;
6755 #ifndef NCR_IOMAPPED
6756 err |= ncr_regtest (np);
6757 if (err) return (err);
6758 #endif
6759 /*
6760 ** init
6761 */
6762 pc = NCB_SCRIPTH_PHYS (np, snooptest);
6763 host_wr = 1;
6764 ncr_wr = 2;
6765 /*
6766 ** Set memory and register.
6767 */
6768 ncr_cache = host_wr;
6769 OUTL (nc_temp, ncr_wr);
6770 /*
6771 ** Start script (exchange values)
6772 */
6773 OUTL (nc_dsp, pc);
6774 /*
6775 ** Wait 'til done (with timeout)
6776 */
6777 for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
6778 if (INB(nc_istat) & (INTF|SIP|DIP))
6779 break;
6780 /*
6781 ** Save termination position.
6782 */
6783 pc = INL (nc_dsp);
6784 /*
6785 ** Read memory and register.
6786 */
6787 host_rd = ncr_cache;
6788 ncr_rd = INL (nc_scratcha);
6789 ncr_bk = INL (nc_temp);
6790 /*
6791 ** Reset ncr chip
6792 */
6793 OUTB (nc_istat, SRST);
6794 DELAY (1000);
6795 OUTB (nc_istat, 0 );
6796 /*
6797 ** check for timeout
6798 */
6799 if (i>=NCR_SNOOP_TIMEOUT) {
6800 kprintf ("CACHE TEST FAILED: timeout.\n");
6801 return (0x20);
6802 }
6803 /*
6804 ** Check termination position.
6805 */
6806 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
6807 kprintf ("CACHE TEST FAILED: script execution failed.\n");
6808 kprintf ("start=%08lx, pc=%08lx, end=%08lx\n",
6809 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
6810 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
6811 return (0x40);
6812 }
6813 /*
6814 ** Show results.
6815 */
6816 if (host_wr != ncr_rd) {
6817 kprintf ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
6818 (int) host_wr, (int) ncr_rd);
6819 err |= 1;
6820 }
6821 if (host_rd != ncr_wr) {
6822 kprintf ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
6823 (int) ncr_wr, (int) host_rd);
6824 err |= 2;
6825 }
6826 if (ncr_bk != ncr_wr) {
6827 kprintf ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
6828 (int) ncr_wr, (int) ncr_bk);
6829 err |= 4;
6830 }
6831 return (err);
6832 }
6833
6834 /*==========================================================
6835 **
6836 **
6837 ** Profiling the drivers and targets performance.
6838 **
6839 **
6840 **==========================================================
6841 */
6842
6843 /*
6844 ** Compute the difference in milliseconds.
6845 **/
6846
6847 static int ncr_delta (int *from, int *to)
6848 {
6849 if (!from) return (-1);
6850 if (!to) return (-2);
6851 return ((to - from) * 1000 / hz);
6852 }
6853
6854 #define PROFILE cp->phys.header.stamp
6855 static void ncb_profile (ncb_p np, nccb_p cp)
6856 {
6857 int co, da, st, en, di, se, post,work,disc;
6858 u_long diff;
6859
6860 PROFILE.end = ticks;
6861
6862 st = ncr_delta (&PROFILE.start,&PROFILE.status);
6863 if (st<0) return; /* status not reached */
6864
6865 da = ncr_delta (&PROFILE.start,&PROFILE.data);
6866 if (da<0) return; /* No data transfer phase */
6867
6868 co = ncr_delta (&PROFILE.start,&PROFILE.command);
6869 if (co<0) return; /* command not executed */
6870
6871 en = ncr_delta (&PROFILE.start,&PROFILE.end),
6872 di = ncr_delta (&PROFILE.start,&PROFILE.disconnect),
6873 se = ncr_delta (&PROFILE.start,&PROFILE.select);
6874 post = en - st;
6875
6876 /*
6877 ** @PROFILE@ Disconnect time invalid if multiple disconnects
6878 */
6879
6880 if (di>=0) disc = se-di; else disc = 0;
6881
6882 work = (st - co) - disc;
6883
6884 diff = (np->disc_phys - np->disc_ref) & 0xff;
6885 np->disc_ref += diff;
6886
6887 np->profile.num_trans += 1;
6888 if (cp->ccb)
6889 np->profile.num_bytes += cp->ccb->csio.dxfer_len;
6890 np->profile.num_disc += diff;
6891 np->profile.ms_setup += co;
6892 np->profile.ms_data += work;
6893 np->profile.ms_disc += disc;
6894 np->profile.ms_post += post;
6895 }
6896 #undef PROFILE
6897
6898 /*==========================================================
6899 **
6900 ** Determine the ncr's clock frequency.
6901 ** This is essential for the negotiation
6902 ** of the synchronous transfer rate.
6903 **
6904 **==========================================================
6905 **
6906 ** Note: we have to return the correct value.
6907 ** THERE IS NO SAVE DEFAULT VALUE.
6908 **
6909 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6910 ** 53C860 and 53C875 rev. 1 support fast20 transfers but
6911 ** do not have a clock doubler and so are provided with a
6912 ** 80 MHz clock. All other fast20 boards incorporate a doubler
6913 ** and so should be delivered with a 40 MHz clock.
6914 ** The future fast40 chips (895/895) use a 40 Mhz base clock
6915 ** and provide a clock quadrupler (160 Mhz). The code below
6916 ** tries to deal as cleverly as possible with all this stuff.
6917 **
6918 **----------------------------------------------------------
6919 */
6920
6921 /*
6922 * Select NCR SCSI clock frequency
6923 */
6924 static void ncr_selectclock(ncb_p np, u_char scntl3)
6925 {
6926 if (np->multiplier < 2) {
6927 OUTB(nc_scntl3, scntl3);
6928 return;
6929 }
6930
6931 if (bootverbose >= 2)
6932 kprintf ("%s: enabling clock multiplier\n", ncr_name(np));
6933
6934 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6935 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
6936 int i = 20;
6937 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6938 DELAY(20);
6939 if (!i)
6940 kprintf("%s: the chip cannot lock the frequency\n", ncr_name(np));
6941 } else /* Wait 20 micro-seconds for doubler */
6942 DELAY(20);
6943 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6944 OUTB(nc_scntl3, scntl3);
6945 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6946 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6947 }
6948
6949 /*
6950 * calculate NCR SCSI clock frequency (in KHz)
6951 */
6952 static unsigned
6953 ncrgetfreq (ncb_p np, int gen)
6954 {
6955 int ms = 0;
6956 /*
6957 * Measure GEN timer delay in order
6958 * to calculate SCSI clock frequency
6959 *
6960 * This code will never execute too
6961 * many loop iterations (if DELAY is
6962 * reasonably correct). It could get
6963 * too low a delay (too high a freq.)
6964 * if the CPU is slow executing the
6965 * loop for some reason (an NMI, for
6966 * example). For this reason we will
6967 * if multiple measurements are to be
6968 * performed trust the higher delay
6969 * (lower frequency returned).
6970 */
6971 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */
6972 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6973 (void) INW (nc_sist); /* clear pending scsi interrupt */
6974 OUTB (nc_dien , 0); /* mask all dma interrupts */
6975 (void) INW (nc_sist); /* another one, just to be sure :) */
6976 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6977 OUTB (nc_stime1, 0); /* disable general purpose timer */
6978 OUTB (nc_stime1, gen); /* set to nominal delay of (1<<gen) * 125us */
6979 while (!(INW(nc_sist) & GEN) && ms++ < 1000)
6980 DELAY(1000); /* count ms */
6981 OUTB (nc_stime1, 0); /* disable general purpose timer */
6982 OUTB (nc_scntl3, 0);
6983 /*
6984 * Set prescaler to divide by whatever "0" means.
6985 * "0" ought to choose divide by 2, but appears
6986 * to set divide by 3.5 mode in my 53c810 ...
6987 */
6988 OUTB (nc_scntl3, 0);
6989
6990 if (bootverbose >= 2)
6991 kprintf ("\tDelay (GEN=%d): %u msec\n", gen, ms);
6992 /*
6993 * adjust for prescaler, and convert into KHz
6994 */
6995 return ms ? ((1 << gen) * 4440) / ms : 0;
6996 }
6997
6998 static void ncr_getclock (ncb_p np, u_char multiplier)
6999 {
7000 unsigned char scntl3;
7001 unsigned char stest1;
7002 scntl3 = INB(nc_scntl3);
7003 stest1 = INB(nc_stest1);
7004
7005 np->multiplier = 1;
7006
7007 if (multiplier > 1) {
7008 np->multiplier = multiplier;
7009 np->clock_khz = 40000 * multiplier;
7010 } else {
7011 if ((scntl3 & 7) == 0) {
7012 unsigned f1, f2;
7013 /* throw away first result */
7014 (void) ncrgetfreq (np, 11);
7015 f1 = ncrgetfreq (np, 11);
7016 f2 = ncrgetfreq (np, 11);
7017
7018 if (bootverbose >= 2)
7019 kprintf ("\tNCR clock is %uKHz, %uKHz\n", f1, f2);
7020 if (f1 > f2) f1 = f2; /* trust lower result */
7021 if (f1 > 45000) {
7022 scntl3 = 5; /* >45Mhz: assume 80MHz */
7023 } else {
7024 scntl3 = 3; /* <45Mhz: assume 40MHz */
7025 }
7026 }
7027 else if ((scntl3 & 7) == 5)
7028 np->clock_khz = 80000; /* Probably a 875 rev. 1 ? */
7029 }
7030 }
7031
7032 /*=========================================================================*/
7033
7034 #ifdef NCR_TEKRAM_EEPROM
7035
7036 struct tekram_eeprom_dev {
7037 u_char devmode;
7038 #define TKR_PARCHK 0x01
7039 #define TKR_TRYSYNC 0x02
7040 #define TKR_ENDISC 0x04
7041 #define TKR_STARTUNIT 0x08
7042 #define TKR_USETAGS 0x10
7043 #define TKR_TRYWIDE 0x20
7044 u_char syncparam; /* max. sync transfer rate (table ?) */
7045 u_char filler1;
7046 u_char filler2;
7047 };
7048
7049
7050 struct tekram_eeprom {
7051 struct tekram_eeprom_dev
7052 dev[16];
7053 u_char adaptid;
7054 u_char adaptmode;
7055 #define TKR_ADPT_GT2DRV 0x01
7056 #define TKR_ADPT_GT1GB 0x02
7057 #define TKR_ADPT_RSTBUS 0x04
7058 #define TKR_ADPT_ACTNEG 0x08
7059 #define TKR_ADPT_NOSEEK 0x10
7060 #define TKR_ADPT_MORLUN 0x20
7061 u_char delay; /* unit ? ( table ??? ) */
7062 u_char tags; /* use 4 times as many ... */
7063 u_char filler[60];
7064 };
7065
7066 static void
7067 tekram_write_bit (ncb_p np, int bit)
7068 {
7069 u_char val = 0x10 + ((bit & 1) << 1);
7070
7071 DELAY(10);
7072 OUTB (nc_gpreg, val);
7073 DELAY(10);
7074 OUTB (nc_gpreg, val | 0x04);
7075 DELAY(10);
7076 OUTB (nc_gpreg, val);
7077 DELAY(10);
7078 }
7079
7080 static int
7081 tekram_read_bit (ncb_p np)
7082 {
7083 OUTB (nc_gpreg, 0x10);
7084 DELAY(10);
7085 OUTB (nc_gpreg, 0x14);
7086 DELAY(10);
7087 return INB (nc_gpreg) & 1;
7088 }
7089
7090 static u_short
7091 read_tekram_eeprom_reg (ncb_p np, int reg)
7092 {
7093 int bit;
7094 u_short result = 0;
7095 int cmd = 0x80 | reg;
7096
7097 OUTB (nc_gpreg, 0x10);
7098
7099 tekram_write_bit (np, 1);
7100 for (bit = 7; bit >= 0; bit--)
7101 {
7102 tekram_write_bit (np, cmd >> bit);
7103 }
7104
7105 for (bit = 0; bit < 16; bit++)
7106 {
7107 result <<= 1;
7108 result |= tekram_read_bit (np);
7109 }
7110
7111 OUTB (nc_gpreg, 0x00);
7112 return result;
7113 }
7114
7115 static int
7116 read_tekram_eeprom(ncb_p np, struct tekram_eeprom *buffer)
7117 {
7118 u_short *p = (u_short *) buffer;
7119 u_short sum = 0;
7120 int i;
7121
7122 if (INB (nc_gpcntl) != 0x09)
7123 {
7124 return 0;
7125 }
7126 for (i = 0; i < 64; i++)
7127 {
7128 u_short val;
7129 if((i&0x0f) == 0) kprintf ("%02x:", i*2);
7130 val = read_tekram_eeprom_reg (np, i);
7131 if (p)
7132 *p++ = val;
7133 sum += val;
7134 if((i&0x01) == 0x00) kprintf (" ");
7135 kprintf ("%02x%02x", val & 0xff, (val >> 8) & 0xff);
7136 if((i&0x0f) == 0x0f) kprintf ("\n");
7137 }
7138 kprintf ("Sum = %04x\n", sum);
7139 return sum == 0x1234;
7140 }
7141 #endif /* NCR_TEKRAM_EEPROM */
7142
7143 static device_method_t ncr_methods[] = {
7144 /* Device interface */
7145 DEVMETHOD(device_probe, ncr_probe),
7146 DEVMETHOD(device_attach, ncr_attach),
7147
7148 DEVMETHOD_END
7149 };
7150
7151 static driver_t ncr_driver = {
7152 "ncr",
7153 ncr_methods,
7154 sizeof(struct ncb),
7155 };
7156
7157 static devclass_t ncr_devclass;
7158
7159 DRIVER_MODULE(if_ncr, pci, ncr_driver, ncr_devclass, NULL, NULL);
7160
7161 /*=========================================================================*/
7162 #endif /* _KERNEL */
DragonFly BSD