soc/intel/braswell: Correct configuration of interrupts
[coreboot.git] / 3rdparty / 
treea4c68dd02ea810a1494b6a5e564926b50eb9258b
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m--------- - arm-trusted-firmware
m--------- - blobs
m--------- - chromeec
m--------- - fsp
m--------- - libgfxinit
m--------- - libhwbase
m--------- - vboot