| commit | 9348413c61b22300ce23baf4503825219249a5ad | |
| author | Frans Hendriks <fhendriks@eltan.com> | |
| Mon, 10 Dec 2018 11:38:16 +0000 (10 12:38 +0100) | ||
| committer | Patrick Georgi <pgeorgi@google.com> | |
| Thu, 28 Feb 2019 17:03:49 +0000 (28 17:03 +0000) | ||
| tree | 997a58bff4aafd692188b27842024bd92d233eea | treesnapshot (tar.gz zip) |
| parent | 3e8504a325007cfbc6fdaa5e034ddea0657ee737 | commitdiff |
soc/intel/braswell: Correct configuration of interrupts
The level/edge mode of PIRQ is not configured and i8259 PIC not initialized.
Add calls to:
- i8259_configure_irq_trigger()
- setup_i8259()
- write_pci_config_irqs()
to correct the configuration of interrupts.
BUG=N/A
TEST=Intel CherryHill CRB
Change-Id: I128cb35dd0e348a9cd9fb162651e0aa2b7e4a3ef
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/29419
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
The level/edge mode of PIRQ is not configured and i8259 PIC not initialized.
Add calls to:
- i8259_configure_irq_trigger()
- setup_i8259()
- write_pci_config_irqs()
to correct the configuration of interrupts.
BUG=N/A
TEST=Intel CherryHill CRB
Change-Id: I128cb35dd0e348a9cd9fb162651e0aa2b7e4a3ef
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/29419
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
| src/soc/intel/braswell/include/soc/irq.h | diffblobblamehistory | |
| src/soc/intel/braswell/southcluster.c | diffblobblamehistory |