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2018-07-23	Arthur Heymans	mb/apple/macbookair4_2/Kconfig: Don't select VGA Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-07-22	Arthur Heymans	mb/asrock/g41c-gs: Add g41m-gs variant Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-07-22	Arthur Heymans	mb/asrock/g41c-gs: Add the revision 1 variant Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-07-19	Arthur Heymans	mb/lenovo/x201: Allow use of libgfxinit Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-07-19	Arthur Heymans	drivers/intel/gma: Default to LVDS for Internal on... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-07-18	Arthur Heymans	mb/lenovo/x201: Add data.vbt file Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-07-03	Arthur Heymans	mb/intel/dg43gt: Expose some SIO devices via ACPI Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-07-03	Arthur Heymans	mb/intel/dg41wv: Expose some SIO devices via ACPI Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-29	Arthur Heymans	soc/intel/baytrail: Fix Kconfig for mrc.bin inclusion Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-29	Arthur Heymans	sb/intel/i82801{g,j}x: Automatically generate ACPI... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-29	Arthur Heymans	sb/intel/i82801ix: Use the common ACPI pirq generator Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-28	Arthur Heymans	arch/x86: include verstage.c only when verstage is... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-27	Arthur Heymans	cpu/intel/p4-netburst: skip caching rom on model_fxx Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-25	Arthur Heymans	nb/lenovo/t400: Enable libgfxinit Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-22	Arthur Heymans	cbfstool/fit.c: Fix for older CPUs without total_size... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-21	Arthur Heymans	sb/intel/i82801xx: Use common RCBA MACROs Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-21	Arthur Heymans	sb/intel/common/rcba_pirq.c: Use common RCBA acces... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-21	Arthur Heymans	sb/intel/common: Make RCBA manipulation MACROs common Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-21	Arthur Heymans	Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-21	Arthur Heymans	util/abuild: Fix building when not in coreboot root dir Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-21	Arthur Heymans	drivers/ati/ragexl: Remove dead code Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-17	Arthur Heymans	nb/intel/x4x: Issue a hard reset with empty MRC cache... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-14	Arthur Heymans	cpu/intel/haswell: Use the common intel romstage_main... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-14	Arthur Heymans	driver/spi/macronix.c: Add MX25L8005 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-14	Arthur Heymans	mb/lenovo/x200: Enable libgfxinit Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-14	Arthur Heymans	nb/intel/x4x: Deprecate native graphic init Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-14	Arthur Heymans	mb//: Enable libgfxinit on x4x boards Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-14	Arthur Heymans	nb/intel/x4x: Fix a few things in set_enhanced_mode Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-14	Arthur Heymans	nb/intel/x4x: Work around a quirk Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-14	Arthur Heymans	nb/intel/x4x: Add the option for stacked channel map... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-08	Arthur Heymans	3rdparty/libgfxinit: Update submodule pointer Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-07	Arthur Heymans	nb/intel/pineview: Enable and allocate 8M for TSEG Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-07	Arthur Heymans	nb/intel/i945: Enable and allocate 8M for TSEG Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-07	Arthur Heymans	nb/intel/i945: Add a common function to compute TSEG... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-06	Arthur Heymans	mb//: Add a few VBT files Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-06	Arthur Heymans	drivers/intel/gma: Include mainboard data.vbt Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-05	Arthur Heymans	cpu/intel/haswell: Switch to POSTCAR_STAGE Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-05	Arthur Heymans	cpu/intel/model_2065x: Switch to POSTCAR_STAGE Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-05	Arthur Heymans	cpu/intel/model_206ax: Switch to POSTCAR_STAGE Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-05	Arthur Heymans	cpu/intel/car/non-evict: Improve a few things Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-05	Arthur Heymans	cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-05	Arthur Heymans	nb/intel/gm45: Switch to POSTCAR_STAGE Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-05	Arthur Heymans	nb/intel/x4x: Switch to POSTCAR_STAGE Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-05	Arthur Heymans	nb/intel/pineview: Switch to POSTCAR_STAGE Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-05	Arthur Heymans	nb/intel/i945: Switch to POSTCAR_STAGE Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-05	Arthur Heymans	cpu/intel/car/core2: Improve a few things Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-05	Arthur Heymans	cpu/intel/car/core2: Prepare for POSTCAR_STAGE support Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-04	Arthur Heymans	sb/intel/i82801gx: Add the option to lock the platform Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-04	Arthur Heymans	src/sb/intel/common/spi.c: Adapt and link in romstage Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-06-04	Arthur Heymans	sb/intel/common/spi.c: Add a SPI write protect function Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-26	Arthur Heymans	mb/intel/dg41wv: Add mainboard Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-25	Arthur Heymans	sb/intel/common/pirq_gen: Rework generating pin-route... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-24	Arthur Heymans	nb/intel/x4x: Adapt post JEDEC for DDR3 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-24	Arthur Heymans	nb/intel/x4x/raminit: Add DDR3 enhanced mode and power... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-24	Arthur Heymans	nb/intel/x4x/raminit: Add DDR3 specific dra/drb settings Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-24	Arthur Heymans	nb/intel/x4x: Implement write leveling Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-24	Arthur Heymans	nb/intel/x4x: Add DDR3 JEDEC init Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-18	Arthur Heymans	nb/common/intel: Remove the mrc cache code Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-18	Arthur Heymans	nb/intel/nehalem: Use the common mrc cache driver Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-14	Arthur Heymans	nb/intel/x4x/raminit: DDR3 specific ODT Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-14	Arthur Heymans	nb/intel/x4x: Add DDR3 rcomp Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-14	Arthur Heymans	nb/intel/x4x/raminit: Support programming initials... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-14	Arthur Heymans	nb/intel/x4x/raminit: Support programming DDR3 timings Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-14	Arthur Heymans	nb/intel/x4x/raminit: Make programming launch ddr3... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-14	Arthur Heymans	nb/intel/x4x/raminit: Make programming crossclock support... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-14	Arthur Heymans	nb/intel/x4x: Rename a things that are not specific... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-14	Arthur Heymans	nb/x4x/raminit: Decode ddr3 dimms Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-14	Arthur Heymans	nb/intel/x4x/raminit: Fix programming dual channel... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-01	Arthur Heymans	nb/intel/x4x: Change memory layout to improve MTRR Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-01	Arthur Heymans	nb/intel/x4x: Fix programming CxDRB Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-05-01	Arthur Heymans	nb/intel/x4x: Implement both read and write training Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-30	Arthur Heymans	mb/lenovo/x220: Allow optional use of the mrc.bin Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-28	Arthur Heymans	nb/intel/x4x: Fix computing page_size Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-17	Arthur Heymans	nb/intel/x4x/rcven.c: Change the verbosity of some... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-17	Arthur Heymans	nb/intel/x4x: Add a convenient macro to loop over bytelanes Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-17	Arthur Heymans	nb/intel/x4x: Clarify the raminit memory mapping Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-17	Arthur Heymans	nb/intel/x4x: Refactor setting default dll settings Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-17	Arthur Heymans	nb/intel/x4x: Use SPI flash to cache raminit results Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-11	Arthur Heymans	Revert "model_206ax: Use parallel MP init" Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-11	Arthur Heymans	model_206ax: Use parallel MP init Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-11	Arthur Heymans	soc/intel: Remove superfluous pointers variables Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-10	Arthur Heymans	cpu/intel/sandybridge: Put stage cache into TSEG Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-09	Arthur Heymans	device/dram/ddr2.c: Add methods to compute to identify... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-04-01	Arthur Heymans	drivers/spi/flashconsole.c: Fix broken header Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-03-28	Arthur Heymans	nb/intel/gm45: Allocate a 8M TSEG region Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-03-28	Arthur Heymans	sb/intel/common: Add common code for SMM setup and... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-27	Arthur Heymans	sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-22	Arthur Heymans	device/ddr2,ddr3: Rename and move a few things Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-20	Arthur Heymans	driver/spi: Warn when probed SF size differs from CONFIG_ROM... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-10	Arthur Heymans	payloads: Add an option to compress secondary payloads Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-06	Arthur Heymans	nb/intel/sandybridge: Always use the same MMCONF_BASE_ADDRESS Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-06	Arthur Heymans	nb/intel/haswell: Use the common MRC cache driver Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-06	Arthur Heymans	inteltool: Add Cougar- and Pantherpoint PCH PCI IDs... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-06	Arthur Heymans	inteltool: Fix displaying 64bit spi registers Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-06	Arthur Heymans	soc/intel/appololake: Remove dead MPINIT code selection Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-06	Arthur Heymans	cpu/intel/haswell: Don't select PARALLEL_CPU_INIT Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-06	Arthur Heymans	nvramtool: Fix message when option table is not found Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-01	Arthur Heymans	payloads/tianocore: Add a patch to use the proper BytesPersc... Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-02-01	Arthur Heymans	Add a default path for vbt.bin Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
2018-01-30	Arthur Heymans	autoport: Don't do writes to FD in romstage Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>	commit \| commitdiff \| tree
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