| commit | 840c27ecfccc1cdb75ae2d0c11da54efb8c5676a | |
| author | Arthur Heymans <arthur@aheymans.xyz> | |
| Mon, 15 May 2017 08:21:37 +0000 (15 10:21 +0200) | ||
| committer | Patrick Georgi <pgeorgi@google.com> | |
| Mon, 14 May 2018 07:41:11 +0000 (14 07:41 +0000) | ||
| tree | 1a226abb85117da17c56e65570d6305b43c91dbc | treesnapshot (tar.gz zip) |
| parent | a2cc23169a81f669fa38ebf0f6b1393b06c17fda | commitdiff |
nb/intel/x4x/raminit: Make programming crossclock support DDR3
A few values were wrong, but it does not seem to matter all that
much.
Change-Id: I86b70e06c81817854994b7feddf9f3638fd16198
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19871
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
A few values were wrong, but it does not seem to matter all that
much.
Change-Id: I86b70e06c81817854994b7feddf9f3638fd16198
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19871
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/northbridge/intel/x4x/raminit_ddr23.c | diffblobblamehistory |