Use more secure HTTPS URLs for coreboot sites
commita8843dee58d15de6860b682975ee01ee61893670
authorPaul Menzel <paulepanter@users.sourceforge.net>
Mon, 5 Jun 2017 10:33:23 +0000 (5 12:33 +0200)
committerPatrick Georgi <pgeorgi@google.com>
Wed, 7 Jun 2017 10:04:50 +0000 (7 12:04 +0200)
treef26fe56b7ddf2452dadd6a9de88819d789410f91
parent619e83045a3dfc189cf12b2f755b7a888c428382
Use more secure HTTPS URLs for coreboot sites

The coreboot sites support HTTPS, and requests over HTTP with SSL are
also redirected. So use the more secure URLs, which also saves a
request most of the times, as nothing needs to be redirected.

Run the command below to replace all occurences.

```
$ git grep -l -E 'http://(www.|review.|)coreboot.org'
| xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g'
```

Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20034
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
77 files changed:
Documentation/CorebootBuildingGuide.tex
Documentation/Intel/Board/board.html
Documentation/Intel/SoC/soc.html
Documentation/Intel/development.html
Documentation/gerrit_guidelines.md
MAINTAINERS
Makefile.inc
README
payloads/external/FILO/Kconfig.name
payloads/external/GRUB2/Kconfig.name
payloads/external/SeaBIOS/Kconfig.name
payloads/external/U-Boot/Kconfig.name
payloads/external/depthcharge/Kconfig.name
payloads/external/tianocore/Kconfig.name
payloads/libpayload/README
payloads/libpayload/arch/x86/exec.S
payloads/libpayload/arch/x86/head.S
src/cpu/amd/car/cache_as_ram.inc
src/cpu/intel/car/cache_as_ram.inc
src/cpu/intel/car/cache_as_ram_ht.inc
src/cpu/intel/haswell/cache_as_ram.inc
src/cpu/intel/model_2065x/cache_as_ram.inc
src/cpu/intel/model_206ax/cache_as_ram.inc
src/cpu/intel/model_6ex/cache_as_ram.inc
src/cpu/via/car/cache_as_ram.inc
src/drivers/usb/Kconfig
src/mainboard/supermicro/h8dmr_fam10/README
src/mainboard/via/epia-m700/romstage.c
src/northbridge/intel/i82810/raminit.c
src/soc/intel/broadwell/romstage/cache_as_ram.inc
util/abuild/abuild.1
util/amdtools/k8-compare-pci-space.pl
util/amdtools/k8-interpret-extended-memory-settings.pl
util/amdtools/parse-bkdg.pl
util/autoport/readme.md
util/board_status/to-wiki/foreword.wiki
util/board_status/to-wiki/push-to-wiki.sh
util/docker/coreboot-sdk/Dockerfile
util/intelmetool/intelmetool.h
util/inteltool/inteltool.8
util/inteltool/inteltool.h
util/msrtool/darwin.c
util/msrtool/msrtool.h
util/nvramtool/DISCLAIMER
util/nvramtool/README
util/nvramtool/accessors/layout-bin.c
util/nvramtool/accessors/layout-common.c
util/nvramtool/accessors/layout-text.c
util/nvramtool/accessors/layout-text.h
util/nvramtool/cli/nvramtool.8
util/nvramtool/cli/nvramtool.c
util/nvramtool/cli/opts.c
util/nvramtool/cli/opts.h
util/nvramtool/cmos_lowlevel.c
util/nvramtool/cmos_lowlevel.h
util/nvramtool/cmos_ops.c
util/nvramtool/cmos_ops.h
util/nvramtool/common.c
util/nvramtool/common.h
util/nvramtool/compute_ip_checksum.c
util/nvramtool/coreboot_tables.h
util/nvramtool/input_file.c
util/nvramtool/input_file.h
util/nvramtool/ip_checksum.h
util/nvramtool/layout.c
util/nvramtool/layout.h
util/nvramtool/lbtable.c
util/nvramtool/lbtable.h
util/nvramtool/reg_expr.c
util/nvramtool/reg_expr.h
util/optionlist/README
util/optionlist/kconfig2wiki
util/superiotool/README
util/superiotool/superiotool.8
util/superiotool/superiotool.c
util/superiotool/superiotool.h
util/viatool/viatool.h