soc/amd/picasso: initialize ACP device at init() time
[coreboot.git] / src / soc / amd / picasso / acp.c
blob854dd8f52bc372f569268dd898c901d5f7039dc5
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
4 #include <device/device.h>
5 #include <device/pci.h>
6 #include <device/pci_ids.h>
7 #include <device/pci_ops.h>
8 #include "chip.h"
9 #include <soc/acp.h>
10 #include <soc/acpi.h>
11 #include <soc/pci_devs.h>
12 #include <soc/southbridge.h>
13 #include <amdblocks/acpimmio.h>
14 #include <commonlib/helpers.h>
16 static void init(struct device *dev)
18 const struct soc_amd_picasso_config *cfg;
19 const struct device *nb_dev = pcidev_path_on_root(GNB_DEVFN);
20 struct resource *res;
21 uintptr_t bar;
23 /* Set the proper I2S_PIN_CONFIG state */
24 if (!nb_dev || !nb_dev->chip_info)
25 return;
27 cfg = nb_dev->chip_info;
29 res = dev->resource_list;
30 if (!res || !res->base) {
31 printk(BIOS_ERR, "Error, unable to configure pin in %s\n", __func__);
32 return;
35 bar = (uintptr_t)res->base;
36 write32((void *)(bar + ACP_I2S_PIN_CONFIG), cfg->acp_pin_cfg);
38 if (cfg->acp_pin_cfg == I2S_PINS_I2S_TDM)
39 sb_clk_output_48Mhz(); /* Internal connection to I2S */
42 static struct device_operations acp_ops = {
43 .read_resources = pci_dev_read_resources,
44 .set_resources = pci_dev_set_resources,
45 .enable_resources = pci_dev_enable_resources,
46 .init = init,
47 .ops_pci = &pci_dev_ops_pci,
50 static const struct pci_driver acp_driver __pci_driver = {
51 .ops = &acp_ops,
52 .vendor = PCI_VENDOR_ID_AMD,
53 .device = PCI_DEVICE_ID_AMD_FAM17H_ACP,