src/soc/intel/jasperlake/bootblock/report_platform.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /* This file is part of the coreboot project. */
   3
   4 #include <arch/cpu.h>
   5 #include <device/pci_ops.h>
   6 #include <console/console.h>
   7 #include <cpu/x86/msr.h>
   8 #include <device/pci.h>
   9 #include <device/pci_ids.h>
  10 #include <intelblocks/mp_init.h>
  11 #include <soc/bootblock.h>
  12 #include <soc/pch.h>
  13 #include <soc/pci_devs.h>
  14 #include <string.h>
  15
  16 #define BIOS_SIGN_ID    0x8B
  17
  18 static struct {
  19         u32 cpuid;
  20         const char *name;
  21 } cpu_table[] = {
  22         { CPUID_JASPERLAKE_A0, "Jasperlake A0" },
  23 };
  24
  25 static struct {
  26         u16 mchid;
  27         const char *name;
  28 } mch_table[] = {
  29         { PCI_DEVICE_ID_INTEL_JSL_ID_1, "Jasperlake SKU4-1" },
  30         { PCI_DEVICE_ID_INTEL_JSL_ID_2, "Jasperlake SKU4-2" },
  31         { PCI_DEVICE_ID_INTEL_JSL_ID_3, "Jasperlake SKU2-1" },
  32         { PCI_DEVICE_ID_INTEL_JSL_ID_4, "Jasperlake SKU2-2" },
  33 };
  34
  35 static struct {
  36         u16 espiid;
  37         const char *name;
  38 } pch_table[] = {
  39         { PCI_DEVICE_ID_INTEL_JSP_SUPER_ESPI, "Jasperlake Super" },
  40 };
  41
  42 static struct {
  43         u16 igdid;
  44         const char *name;
  45 } igd_table[] = {
  46         { PCI_DEVICE_ID_INTEL_JSL_GT1, "Jasperlake GT1" },
  47         { PCI_DEVICE_ID_INTEL_JSL_GT2, "Jasperlake GT2" },
  48 };
  49
  50 static inline uint8_t get_dev_revision(pci_devfn_t dev)
  51 {
  52         return pci_read_config8(dev, PCI_REVISION_ID);
  53 }
  54
  55 static inline uint16_t get_dev_id(pci_devfn_t dev)
  56 {
  57         return pci_read_config16(dev, PCI_DEVICE_ID);
  58 }
  59
  60 static void report_cpu_info(void)
  61 {
  62         struct cpuid_result cpuidr;
  63         u32 i, index, cpu_id, cpu_feature_flag;
  64         const char cpu_not_found[] = "Platform info not available";
  65         const char *cpu_name = cpu_not_found; /* 48 bytes are reported */
  66         int vt, txt, aes;
  67         msr_t microcode_ver;
  68         static const char *const mode[] = {"NOT ", ""};
  69         const char *cpu_type = "Unknown";
  70         u32 p[13];
  71
  72         index = 0x80000000;
  73         cpuidr = cpuid(index);
  74         if (cpuidr.eax >= 0x80000004) {
  75                 int j = 0;
  76
  77                 for (i = 2; i <= 4; i++) {
  78                         cpuidr = cpuid(index + i);
  79                         p[j++] = cpuidr.eax;
  80                         p[j++] = cpuidr.ebx;
  81                         p[j++] = cpuidr.ecx;
  82                         p[j++] = cpuidr.edx;
  83                 }
  84                 p[12] = 0;
  85                 cpu_name = (char *)p;
  86
  87                 /* Skip leading spaces in CPU name string */
  88                 while (cpu_name[0] == ' ' && strlen(cpu_name) > 0)
  89                         cpu_name++;
  90         }
  91
  92         microcode_ver.lo = 0;
  93         microcode_ver.hi = 0;
  94         wrmsr(BIOS_SIGN_ID, microcode_ver);
  95         cpu_id = cpu_get_cpuid();
  96         microcode_ver = rdmsr(BIOS_SIGN_ID);
  97
  98         /* Look for string to match the name */
  99         for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
 100                 if (cpu_table[i].cpuid == cpu_id) {
 101                         cpu_type = cpu_table[i].name;
 102                         break;
 103                 }
 104         }
 105
 106         printk(BIOS_DEBUG, "CPU: %s\n", cpu_name);
 107         printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",
 108                cpu_id, cpu_type, microcode_ver.hi);
 109
 110         cpu_feature_flag = cpu_get_feature_flags_ecx();
 111         aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0;
 112         txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0;
 113         vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0;
 114         printk(BIOS_DEBUG,
 115                 "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",
 116                 mode[aes], mode[txt], mode[vt]);
 117 }
 118
 119 static void report_mch_info(void)
 120 {
 121         int i;
 122         pci_devfn_t dev = SA_DEV_ROOT;
 123         uint16_t mchid = get_dev_id(dev);
 124         uint8_t mch_revision = get_dev_revision(dev);
 125         const char *mch_type = "Unknown";
 126
 127         for (i = 0; i < ARRAY_SIZE(mch_table); i++) {
 128                 if (mch_table[i].mchid == mchid) {
 129                         mch_type = mch_table[i].name;
 130                         break;
 131                 }
 132         }
 133
 134         printk(BIOS_DEBUG, "MCH: device id %04x (rev %02x) is %s\n",
 135                 mchid, mch_revision, mch_type);
 136 }
 137
 138 static void report_pch_info(void)
 139 {
 140         int i;
 141         pci_devfn_t dev = PCH_DEV_ESPI;
 142         uint16_t espiid = get_dev_id(dev);
 143         const char *pch_type = "Unknown";
 144
 145         for (i = 0; i < ARRAY_SIZE(pch_table); i++) {
 146                 if (pch_table[i].espiid == espiid) {
 147                         pch_type = pch_table[i].name;
 148                         break;
 149                 }
 150         }
 151         printk(BIOS_DEBUG, "PCH: device id %04x (rev %02x) is %s\n",
 152                 espiid, get_dev_revision(dev), pch_type);
 153 }
 154
 155 static void report_igd_info(void)
 156 {
 157         int i;
 158         pci_devfn_t dev = SA_DEV_IGD;
 159         uint16_t igdid = get_dev_id(dev);
 160         const char *igd_type = "Unknown";
 161
 162         for (i = 0; i < ARRAY_SIZE(igd_table); i++) {
 163                 if (igd_table[i].igdid == igdid) {
 164                         igd_type = igd_table[i].name;
 165                         break;
 166                 }
 167         }
 168         printk(BIOS_DEBUG, "IGD: device id %04x (rev %02x) is %s\n",
 169                 igdid, get_dev_revision(dev), igd_type);
 170 }
 171
 172 void report_platform_info(void)
 173 {
 174         report_cpu_info();
 175         report_mch_info();
 176         report_pch_info();
 177         report_igd_info();
 178 }