1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
5 #include <cpu/intel/cpu_ids.h>
6 #include <cpu/intel/microcode.h>
7 #include <cpu/x86/msr.h>
8 #include <cpu/x86/name.h>
9 #include <device/pci.h>
10 #include <device/pci_ids.h>
11 #include <device/pci_ops.h>
12 #include <soc/bootblock.h>
14 #include <soc/pci_devs.h>
20 { CPUID_JASPERLAKE_A0
, "Jasperlake A0" },
27 { PCI_DID_INTEL_JSL_ID_1
, "Jasperlake SKU4-1" },
28 { PCI_DID_INTEL_JSL_ID_2
, "Jasperlake SKU4-2" },
29 { PCI_DID_INTEL_JSL_ID_3
, "Jasperlake SKU2-1" },
30 { PCI_DID_INTEL_JSL_ID_4
, "Jasperlake SKU2-2" },
31 { PCI_DID_INTEL_JSL_ID_5
, "Jasperlake SKU4-3" },
32 { PCI_DID_INTEL_JSL_ID_6
, "Jasperlake SKU4-3" },
39 { PCI_DID_INTEL_JSP_SUPER_ESPI
, "Jasperlake Super" },
46 { PCI_DID_INTEL_JSL_GT1
, "Jasperlake GT1" },
47 { PCI_DID_INTEL_JSL_GT2
, "Jasperlake GT2" },
48 { PCI_DID_INTEL_JSL_GT3
, "Jasperlake GT3" },
49 { PCI_DID_INTEL_JSL_GT4
, "Jasperlake GT4" },
52 static inline uint8_t get_dev_revision(pci_devfn_t dev
)
54 return pci_read_config8(dev
, PCI_REVISION_ID
);
57 static inline uint16_t get_dev_id(pci_devfn_t dev
)
59 return pci_read_config16(dev
, PCI_DEVICE_ID
);
62 static void report_cpu_info(void)
64 u32 i
, cpu_id
, cpu_feature_flag
;
67 static const char *const mode
[] = {"NOT ", ""};
68 const char *cpu_type
= "Unknown";
70 fill_processor_name(cpu_name
);
71 cpu_id
= cpu_get_cpuid();
73 /* Look for string to match the name */
74 for (i
= 0; i
< ARRAY_SIZE(cpu_table
); i
++) {
75 if (cpu_table
[i
].cpuid
== cpu_id
) {
76 cpu_type
= cpu_table
[i
].name
;
81 printk(BIOS_DEBUG
, "CPU: %s\n", cpu_name
);
82 printk(BIOS_DEBUG
, "CPU: ID %x, %s, ucode: %08x\n",
83 cpu_id
, cpu_type
, get_current_microcode_rev());
85 cpu_feature_flag
= cpu_get_feature_flags_ecx();
86 aes
= (cpu_feature_flag
& CPUID_AES
) ? 1 : 0;
87 txt
= (cpu_feature_flag
& CPUID_SMX
) ? 1 : 0;
88 vt
= (cpu_feature_flag
& CPUID_VMX
) ? 1 : 0;
90 "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",
91 mode
[aes
], mode
[txt
], mode
[vt
]);
94 static void report_mch_info(void)
97 pci_devfn_t dev
= SA_DEV_ROOT
;
98 uint16_t mchid
= get_dev_id(dev
);
99 uint8_t mch_revision
= get_dev_revision(dev
);
100 const char *mch_type
= "Unknown";
102 for (i
= 0; i
< ARRAY_SIZE(mch_table
); i
++) {
103 if (mch_table
[i
].mchid
== mchid
) {
104 mch_type
= mch_table
[i
].name
;
109 printk(BIOS_DEBUG
, "MCH: device id %04x (rev %02x) is %s\n",
110 mchid
, mch_revision
, mch_type
);
113 static void report_pch_info(void)
116 pci_devfn_t dev
= PCH_DEV_ESPI
;
117 uint16_t espiid
= get_dev_id(dev
);
118 const char *pch_type
= "Unknown";
120 for (i
= 0; i
< ARRAY_SIZE(pch_table
); i
++) {
121 if (pch_table
[i
].espiid
== espiid
) {
122 pch_type
= pch_table
[i
].name
;
126 printk(BIOS_DEBUG
, "PCH: device id %04x (rev %02x) is %s\n",
127 espiid
, get_dev_revision(dev
), pch_type
);
130 static void report_igd_info(void)
133 pci_devfn_t dev
= SA_DEV_IGD
;
134 uint16_t igdid
= get_dev_id(dev
);
135 const char *igd_type
= "Unknown";
137 for (i
= 0; i
< ARRAY_SIZE(igd_table
); i
++) {
138 if (igd_table
[i
].igdid
== igdid
) {
139 igd_type
= igd_table
[i
].name
;
143 printk(BIOS_DEBUG
, "IGD: device id %04x (rev %02x) is %s\n",
144 igdid
, get_dev_revision(dev
), igd_type
);
147 void report_platform_info(void)