src/mainboard/intel/kblrvp/romstage.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2016-2018 Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <cbfs.h>
  17 #include <console/console.h>
  18 #include <fsp/api.h>
  19 #include <gpio.h>
  20 #include "gpio.h"
  21 #include <soc/romstage.h>
  22 #include <soc/gpio.h>
  23 #include "spd/spd.h"
  24 #include <spd_bin.h>
  25 #include "board_id.h"
  26
  27
  28 void mainboard_memory_init_params(FSPM_UPD *mupd)
  29 {
  30         FSP_M_CONFIG *mem_cfg;
  31         mem_cfg = &mupd->FspmConfig;
  32         u8 spd_index;
  33         if (get_spd_index(&spd_index) < 0)
  34                 return;
  35
  36         printk(BIOS_INFO, "SPD index %d\n", spd_index);
  37
  38         mainboard_fill_dq_map_data(&mem_cfg->DqByteMapCh0,
  39                                    &mem_cfg->DqByteMapCh1);
  40         mainboard_fill_dqs_map_data(&mem_cfg->DqsMapCpu2DramCh0,
  41                                     &mem_cfg->DqsMapCpu2DramCh1);
  42         mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor);
  43         mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget);
  44
  45         if (CONFIG(BOARD_INTEL_KBLRVP3)) {
  46                 struct region_device spd_rdev;
  47
  48                 mem_cfg->DqPinsInterleaved = 0;
  49                 if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0)
  50                         die("spd.bin not found\n");
  51                 mem_cfg->MemorySpdDataLen = region_device_sz(&spd_rdev);
  52                 /* Memory leak is ok since we have memory mapped boot media */
  53                 mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev);
  54         } else { /* CONFIG_BOARD_INTEL_KBLRVP7 and CONFIG_BOARD_INTEL_KBLRVP8 */
  55                 struct spd_block blk = {
  56                         .addr_map = { 0x50, 0x51, 0x52, 0x53, },
  57                 };
  58
  59                 mem_cfg->DqPinsInterleaved = 1;
  60                 get_spd_smbus(&blk);
  61                 mem_cfg->MemorySpdDataLen = blk.len;
  62                 mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0];
  63                 mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[2];
  64
  65                 switch (get_board_id()) {
  66                 case BOARD_ID_KBL_RVP8:
  67                 case BOARD_ID_KBL_RVP11:
  68                         mem_cfg->MemorySpdPtr01 = (uintptr_t)blk.spd_array[1];
  69                         mem_cfg->MemorySpdPtr11 = (uintptr_t)blk.spd_array[3];
  70                         mem_cfg->UserBd = BOARD_TYPE_DESKTOP;
  71                         break;
  72                 default:
  73                         break;
  74                 }
  75         }
  76         mupd->FspmTestConfig.DmiVc1 = 1;
  77 }