1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <console/console.h>
7 #include <soc/romstage.h>
12 void mainboard_memory_init_params(FSPM_UPD
*mupd
)
14 FSP_M_CONFIG
*mem_cfg
;
15 mem_cfg
= &mupd
->FspmConfig
;
17 if (get_spd_index(&spd_index
) < 0)
20 printk(BIOS_INFO
, "SPD index %d\n", spd_index
);
22 mainboard_fill_dq_map_data(&mem_cfg
->DqByteMapCh0
,
23 &mem_cfg
->DqByteMapCh1
);
24 mainboard_fill_dqs_map_data(&mem_cfg
->DqsMapCpu2DramCh0
,
25 &mem_cfg
->DqsMapCpu2DramCh1
);
26 mainboard_fill_rcomp_res_data(&mem_cfg
->RcompResistor
);
27 mainboard_fill_rcomp_strength_data(&mem_cfg
->RcompTarget
);
29 if (CONFIG(BOARD_INTEL_KBLRVP3
)) {
30 mem_cfg
->DqPinsInterleaved
= 0;
31 mem_cfg
->MemorySpdDataLen
= CONFIG_DIMM_SPD_SIZE
;
32 /* Memory leak is ok since we have memory mapped boot media */
33 mem_cfg
->MemorySpdPtr00
= spd_cbfs_map(spd_index
);
34 if (!mem_cfg
->MemorySpdPtr00
)
35 die("spd.bin not found\n");
36 } else { /* CONFIG_BOARD_INTEL_KBLRVP7 and CONFIG_BOARD_INTEL_KBLRVP8 */
37 struct spd_block blk
= {
38 .addr_map
= { 0x50, 0x51, 0x52, 0x53, },
41 mem_cfg
->DqPinsInterleaved
= 1;
43 mem_cfg
->MemorySpdDataLen
= blk
.len
;
44 mem_cfg
->MemorySpdPtr00
= (uintptr_t)blk
.spd_array
[0];
45 mem_cfg
->MemorySpdPtr10
= (uintptr_t)blk
.spd_array
[2];
47 switch (get_board_id()) {
48 case BOARD_ID_KBL_RVP8
:
49 case BOARD_ID_KBL_RVP11
:
50 mem_cfg
->MemorySpdPtr01
= (uintptr_t)blk
.spd_array
[1];
51 mem_cfg
->MemorySpdPtr11
= (uintptr_t)blk
.spd_array
[3];
57 mupd
->FspmTestConfig
.DmiVc1
= 1;