util/inteltool/inteltool.h

   1 /*
   2  * inteltool - dump all registers on an Intel CPU + chipset based system.
   3  *
   4  * Copyright (C) 2008-2010 by coresystems GmbH
   5  * Copyright (C) 2009 Carl-Daniel Hailfinger
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  */
  20
  21 #include <stdint.h>
  22
  23 #if defined(__GLIBC__)
  24 #include <sys/io.h>
  25 #endif
  26 #if (defined(__MACH__) && defined(__APPLE__))
  27 /* DirectHW is available here: http://www.coreboot.org/DirectHW */
  28 #define __DARWIN__
  29 #include <DirectHW/DirectHW.h>
  30 #endif
  31 #include <pci/pci.h>
  32
  33 /* This #include is needed for freebsd_{rd,wr}msr. */
  34 #if defined(__FreeBSD__)
  35 #include <machine/cpufunc.h>
  36 #endif
  37
  38 #define INTELTOOL_VERSION "1.0"
  39
  40 /* Tested chipsets: */
  41 #define PCI_VENDOR_ID_INTEL                     0x8086
  42 #define PCI_DEVICE_ID_INTEL_ICH                 0x2410
  43 #define PCI_DEVICE_ID_INTEL_ICH0                0x2420
  44 #define PCI_DEVICE_ID_INTEL_ICH2                0x2440
  45 #define PCI_DEVICE_ID_INTEL_ICH4                0x24c0
  46 #define PCI_DEVICE_ID_INTEL_ICH4M               0x24cc
  47 #define PCI_DEVICE_ID_INTEL_ICH5                0x24d0
  48 #define PCI_DEVICE_ID_INTEL_ICH6                0x2640
  49 #define PCI_DEVICE_ID_INTEL_ICH7DH              0x27b0
  50 #define PCI_DEVICE_ID_INTEL_ICH7                0x27b8
  51 #define PCI_DEVICE_ID_INTEL_ICH7M               0x27b9
  52 #define PCI_DEVICE_ID_INTEL_ICH7MDH             0x27bd
  53 #define PCI_DEVICE_ID_INTEL_NM10                0x27bc
  54 #define PCI_DEVICE_ID_INTEL_ICH8                0x2810
  55 #define PCI_DEVICE_ID_INTEL_ICH8M               0x2815
  56 #define PCI_DEVICE_ID_INTEL_ICH9DH              0x2912
  57 #define PCI_DEVICE_ID_INTEL_ICH9DO              0x2914
  58 #define PCI_DEVICE_ID_INTEL_ICH9R               0x2916
  59 #define PCI_DEVICE_ID_INTEL_ICH9                0x2918
  60 #define PCI_DEVICE_ID_INTEL_ICH9M               0x2919
  61 #define PCI_DEVICE_ID_INTEL_ICH9ME              0x2917
  62 #define PCI_DEVICE_ID_INTEL_ICH10R              0x3a16
  63 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC     0x8119
  64
  65 #define PCI_DEVICE_ID_INTEL_82810               0x7120
  66 #define PCI_DEVICE_ID_INTEL_82810DC             0x7122
  67 #define PCI_DEVICE_ID_INTEL_82810E_MC           0x7124
  68 #define PCI_DEVICE_ID_INTEL_82830M              0x3575
  69 #define PCI_DEVICE_ID_INTEL_82845               0x1a30
  70 #define PCI_DEVICE_ID_INTEL_82865               0x2570
  71 #define PCI_DEVICE_ID_INTEL_82915               0x2580
  72 #define PCI_DEVICE_ID_INTEL_82945P              0x2770
  73 #define PCI_DEVICE_ID_INTEL_82945GM             0x27a0
  74 #define PCI_DEVICE_ID_INTEL_82945GSE            0x27ac
  75 #define PCI_DEVICE_ID_INTEL_PM965               0x2a00
  76 #define PCI_DEVICE_ID_INTEL_Q965                0x2990
  77 #define PCI_DEVICE_ID_INTEL_82975X              0x277c
  78 #define PCI_DEVICE_ID_INTEL_82Q35               0x29b0
  79 #define PCI_DEVICE_ID_INTEL_82G33               0x29c0
  80 #define PCI_DEVICE_ID_INTEL_82Q33               0x29d0
  81 #define PCI_DEVICE_ID_INTEL_X44                 0x29e0
  82 #define PCI_DEVICE_ID_INTEL_32X0                0x29f0
  83 #define PCI_DEVICE_ID_INTEL_GS45                0x2a40
  84 #define PCI_DEVICE_ID_INTEL_X58                 0x3405
  85 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO         0x8100
  86 #define PCI_DEVICE_ID_INTEL_ATOM_DXXX           0xa000
  87 #define PCI_DEVICE_ID_INTEL_I63XX               0x2670
  88
  89 #define PCI_DEVICE_ID_INTEL_I5000X              0x25d0
  90 #define PCI_DEVICE_ID_INTEL_I5000Z              0x25d4
  91 #define PCI_DEVICE_ID_INTEL_I5000P              0x25d8
  92
  93 /* untested, but almost identical to D-series */
  94 #define PCI_DEVICE_ID_INTEL_ATOM_NXXX           0xa010
  95
  96 #define PCI_DEVICE_ID_INTEL_82443LX             0x7180
  97 /* 82443BX has a different device ID if AGP is disabled (hardware-wise). */
  98 #define PCI_DEVICE_ID_INTEL_82443BX             0x7190
  99 #define PCI_DEVICE_ID_INTEL_82443BX_NO_AGP      0x7192
 100
 101 /* 82371AB/EB/MB use the same device ID value. */
 102 #define PCI_DEVICE_ID_INTEL_82371XX             0x7110
 103
 104 #define ARRAY_SIZE(a) ((int)(sizeof(a) / sizeof((a)[0])))
 105
 106 #if !defined(__DARWIN__) && !defined(__FreeBSD__)
 107 typedef struct { uint32_t hi, lo; } msr_t;
 108 #endif
 109 #if defined (__FreeBSD__)
 110 /* FreeBSD already has conflicting definitions for wrmsr/rdmsr. */
 111 #undef rdmsr
 112 #undef wrmsr
 113 #define rdmsr freebsd_rdmsr
 114 #define wrmsr freebsd_wrmsr
 115 typedef struct { uint32_t hi, lo; } msr_t;
 116 msr_t freebsd_rdmsr(int addr);
 117 int freebsd_wrmsr(int addr, msr_t msr);
 118 #endif
 119 typedef struct { uint16_t addr; int size; char *name; } io_register_t;
 120
 121 void *map_physical(uint64_t phys_addr, size_t len);
 122 void unmap_physical(void *virt_addr, size_t len);
 123
 124 unsigned int cpuid(unsigned int op);
 125 int print_intel_core_msrs(void);
 126 int print_mchbar(struct pci_dev *nb, struct pci_access *pacc);
 127 int print_pmbase(struct pci_dev *sb, struct pci_access *pacc);
 128 int print_rcba(struct pci_dev *sb);
 129 int print_gpios(struct pci_dev *sb);
 130 int print_epbar(struct pci_dev *nb);
 131 int print_dmibar(struct pci_dev *nb);
 132 int print_pciexbar(struct pci_dev *nb);
 133 int print_ambs(struct pci_dev *nb, struct pci_access *pacc);