[analyzer] lib/StaticAnalyzer/Checkers/ExprEngineExperimentalChecks.cpp -> lib/Static...
[clang.git] / lib / Basic / Targets.cpp
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1 //===--- Targets.cpp - Implement -arch option and targets -----------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements construction of a TargetInfo object from a
11 // target triple.
13 //===----------------------------------------------------------------------===//
15 #include "clang/Basic/TargetInfo.h"
16 #include "clang/Basic/Builtins.h"
17 #include "clang/Basic/Diagnostic.h"
18 #include "clang/Basic/LangOptions.h"
19 #include "clang/Basic/MacroBuilder.h"
20 #include "clang/Basic/TargetBuiltins.h"
21 #include "clang/Basic/TargetOptions.h"
22 #include "llvm/ADT/APFloat.h"
23 #include "llvm/ADT/OwningPtr.h"
24 #include "llvm/ADT/STLExtras.h"
25 #include "llvm/ADT/StringRef.h"
26 #include "llvm/ADT/StringSwitch.h"
27 #include "llvm/ADT/Triple.h"
28 #include "llvm/MC/MCSectionMachO.h"
29 #include "llvm/Type.h"
30 #include <algorithm>
31 using namespace clang;
33 //===----------------------------------------------------------------------===//
34 // Common code shared among targets.
35 //===----------------------------------------------------------------------===//
37 /// DefineStd - Define a macro name and standard variants. For example if
38 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
39 /// when in GNU mode.
40 static void DefineStd(MacroBuilder &Builder, llvm::StringRef MacroName,
41 const LangOptions &Opts) {
42 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
45 // in the user's namespace.
46 if (Opts.GNUMode)
47 Builder.defineMacro(MacroName);
49 // Define __unix.
50 Builder.defineMacro("__" + MacroName);
52 // Define __unix__.
53 Builder.defineMacro("__" + MacroName + "__");
56 //===----------------------------------------------------------------------===//
57 // Defines specific to certain operating systems.
58 //===----------------------------------------------------------------------===//
60 namespace {
61 template<typename TgtInfo>
62 class OSTargetInfo : public TgtInfo {
63 protected:
64 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
65 MacroBuilder &Builder) const=0;
66 public:
67 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
68 virtual void getTargetDefines(const LangOptions &Opts,
69 MacroBuilder &Builder) const {
70 TgtInfo::getTargetDefines(Opts, Builder);
71 getOSDefines(Opts, TgtInfo::getTriple(), Builder);
75 } // end anonymous namespace
78 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
79 const llvm::Triple &Triple) {
80 Builder.defineMacro("__APPLE_CC__", "5621");
81 Builder.defineMacro("__APPLE__");
82 Builder.defineMacro("__MACH__");
83 Builder.defineMacro("OBJC_NEW_PROPERTIES");
85 // __weak is always defined, for use in blocks and with objc pointers.
86 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
88 // Darwin defines __strong even in C mode (just to nothing).
89 if (!Opts.ObjC1 || Opts.getGCMode() == LangOptions::NonGC)
90 Builder.defineMacro("__strong", "");
91 else
92 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
94 if (Opts.Static)
95 Builder.defineMacro("__STATIC__");
96 else
97 Builder.defineMacro("__DYNAMIC__");
99 if (Opts.POSIXThreads)
100 Builder.defineMacro("_REENTRANT");
102 // Get the OS version number from the triple.
103 unsigned Maj, Min, Rev;
105 // If no version was given, default to to 10.4.0, for simplifying tests.
106 if (Triple.getOSName() == "darwin") {
107 Min = Rev = 0;
108 Maj = 8;
109 } else
110 Triple.getDarwinNumber(Maj, Min, Rev);
112 // Set the appropriate OS version define.
113 if (Triple.getEnvironmentName() == "iphoneos") {
114 assert(Maj < 10 && Min < 99 && Rev < 99 && "Invalid version!");
115 char Str[6];
116 Str[0] = '0' + Maj;
117 Str[1] = '0' + (Min / 10);
118 Str[2] = '0' + (Min % 10);
119 Str[3] = '0' + (Rev / 10);
120 Str[4] = '0' + (Rev % 10);
121 Str[5] = '\0';
122 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
123 } else {
124 // For historical reasons that make little sense, the version passed here is
125 // the "darwin" version, which drops the 10 and offsets by 4.
126 Rev = Min;
127 Min = Maj - 4;
128 Maj = 10;
130 assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
131 assert(Maj < 99 && Min < 10 && Rev < 10 && "Invalid version!");
132 char Str[5];
133 Str[0] = '0' + (Maj / 10);
134 Str[1] = '0' + (Maj % 10);
135 Str[2] = '0' + Min;
136 Str[3] = '0' + Rev;
137 Str[4] = '\0';
138 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
142 namespace {
143 template<typename Target>
144 class DarwinTargetInfo : public OSTargetInfo<Target> {
145 protected:
146 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
147 MacroBuilder &Builder) const {
148 getDarwinDefines(Builder, Opts, Triple);
151 public:
152 DarwinTargetInfo(const std::string& triple) :
153 OSTargetInfo<Target>(triple) {
154 this->TLSSupported = llvm::Triple(triple).getDarwinMajorNumber() > 10;
157 virtual std::string isValidSectionSpecifier(llvm::StringRef SR) const {
158 // Let MCSectionMachO validate this.
159 llvm::StringRef Segment, Section;
160 unsigned TAA, StubSize;
161 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
162 TAA, StubSize);
165 virtual const char *getStaticInitSectionSpecifier() const {
166 // FIXME: We should return 0 when building kexts.
167 return "__TEXT,__StaticInit,regular,pure_instructions";
173 // DragonFlyBSD Target
174 template<typename Target>
175 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
176 protected:
177 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
178 MacroBuilder &Builder) const {
179 // DragonFly defines; list based off of gcc output
180 Builder.defineMacro("__DragonFly__");
181 Builder.defineMacro("__DragonFly_cc_version", "100001");
182 Builder.defineMacro("__ELF__");
183 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
184 Builder.defineMacro("__tune_i386__");
185 DefineStd(Builder, "unix", Opts);
187 public:
188 DragonFlyBSDTargetInfo(const std::string &triple)
189 : OSTargetInfo<Target>(triple) {}
192 // FreeBSD Target
193 template<typename Target>
194 class FreeBSDTargetInfo : public OSTargetInfo<Target> {
195 protected:
196 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
197 MacroBuilder &Builder) const {
198 // FreeBSD defines; list based off of gcc output
200 // FIXME: Move version number handling to llvm::Triple.
201 llvm::StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1);
203 Builder.defineMacro("__FreeBSD__", Release);
204 Builder.defineMacro("__FreeBSD_cc_version", Release + "00001");
205 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
206 DefineStd(Builder, "unix", Opts);
207 Builder.defineMacro("__ELF__");
209 public:
210 FreeBSDTargetInfo(const std::string &triple)
211 : OSTargetInfo<Target>(triple) {
212 this->UserLabelPrefix = "";
216 // Minix Target
217 template<typename Target>
218 class MinixTargetInfo : public OSTargetInfo<Target> {
219 protected:
220 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
221 MacroBuilder &Builder) const {
222 // Minix defines
224 Builder.defineMacro("__minix", "3");
225 Builder.defineMacro("_EM_WSIZE", "4");
226 Builder.defineMacro("_EM_PSIZE", "4");
227 Builder.defineMacro("_EM_SSIZE", "2");
228 Builder.defineMacro("_EM_LSIZE", "4");
229 Builder.defineMacro("_EM_FSIZE", "4");
230 Builder.defineMacro("_EM_DSIZE", "8");
231 DefineStd(Builder, "unix", Opts);
233 public:
234 MinixTargetInfo(const std::string &triple)
235 : OSTargetInfo<Target>(triple) {
236 this->UserLabelPrefix = "";
240 // Linux target
241 template<typename Target>
242 class LinuxTargetInfo : public OSTargetInfo<Target> {
243 protected:
244 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
245 MacroBuilder &Builder) const {
246 // Linux defines; list based off of gcc output
247 DefineStd(Builder, "unix", Opts);
248 DefineStd(Builder, "linux", Opts);
249 Builder.defineMacro("__gnu_linux__");
250 Builder.defineMacro("__ELF__");
251 if (Opts.POSIXThreads)
252 Builder.defineMacro("_REENTRANT");
253 if (Opts.CPlusPlus)
254 Builder.defineMacro("_GNU_SOURCE");
256 public:
257 LinuxTargetInfo(const std::string& triple)
258 : OSTargetInfo<Target>(triple) {
259 this->UserLabelPrefix = "";
260 this->WIntType = TargetInfo::UnsignedInt;
264 // NetBSD Target
265 template<typename Target>
266 class NetBSDTargetInfo : public OSTargetInfo<Target> {
267 protected:
268 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
269 MacroBuilder &Builder) const {
270 // NetBSD defines; list based off of gcc output
271 Builder.defineMacro("__NetBSD__");
272 Builder.defineMacro("__unix__");
273 Builder.defineMacro("__ELF__");
274 if (Opts.POSIXThreads)
275 Builder.defineMacro("_POSIX_THREADS");
277 public:
278 NetBSDTargetInfo(const std::string &triple)
279 : OSTargetInfo<Target>(triple) {
280 this->UserLabelPrefix = "";
284 // OpenBSD Target
285 template<typename Target>
286 class OpenBSDTargetInfo : public OSTargetInfo<Target> {
287 protected:
288 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
289 MacroBuilder &Builder) const {
290 // OpenBSD defines; list based off of gcc output
292 Builder.defineMacro("__OpenBSD__");
293 DefineStd(Builder, "unix", Opts);
294 Builder.defineMacro("__ELF__");
295 if (Opts.POSIXThreads)
296 Builder.defineMacro("_POSIX_THREADS");
298 public:
299 OpenBSDTargetInfo(const std::string &triple)
300 : OSTargetInfo<Target>(triple) {}
303 // PSP Target
304 template<typename Target>
305 class PSPTargetInfo : public OSTargetInfo<Target> {
306 protected:
307 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
308 MacroBuilder &Builder) const {
309 // PSP defines; list based on the output of the pspdev gcc toolchain.
310 Builder.defineMacro("PSP");
311 Builder.defineMacro("_PSP");
312 Builder.defineMacro("__psp__");
313 Builder.defineMacro("__ELF__");
315 public:
316 PSPTargetInfo(const std::string& triple)
317 : OSTargetInfo<Target>(triple) {
318 this->UserLabelPrefix = "";
322 // PS3 PPU Target
323 template<typename Target>
324 class PS3PPUTargetInfo : public OSTargetInfo<Target> {
325 protected:
326 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
327 MacroBuilder &Builder) const {
328 // PS3 PPU defines.
329 Builder.defineMacro("__PPC__");
330 Builder.defineMacro("__PPU__");
331 Builder.defineMacro("__CELLOS_LV2__");
332 Builder.defineMacro("__ELF__");
333 Builder.defineMacro("__LP32__");
334 Builder.defineMacro("_ARCH_PPC64");
335 Builder.defineMacro("__powerpc64__");
337 public:
338 PS3PPUTargetInfo(const std::string& triple)
339 : OSTargetInfo<Target>(triple) {
340 this->UserLabelPrefix = "";
341 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32;
342 this->IntMaxType = TargetInfo::SignedLongLong;
343 this->UIntMaxType = TargetInfo::UnsignedLongLong;
344 this->Int64Type = TargetInfo::SignedLongLong;
345 this->SizeType = TargetInfo::UnsignedInt;
346 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
347 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
351 // FIXME: Need a real SPU target.
352 // PS3 SPU Target
353 template<typename Target>
354 class PS3SPUTargetInfo : public OSTargetInfo<Target> {
355 protected:
356 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
357 MacroBuilder &Builder) const {
358 // PS3 PPU defines.
359 Builder.defineMacro("__SPU__");
360 Builder.defineMacro("__ELF__");
362 public:
363 PS3SPUTargetInfo(const std::string& triple)
364 : OSTargetInfo<Target>(triple) {
365 this->UserLabelPrefix = "";
369 // AuroraUX target
370 template<typename Target>
371 class AuroraUXTargetInfo : public OSTargetInfo<Target> {
372 protected:
373 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
374 MacroBuilder &Builder) const {
375 DefineStd(Builder, "sun", Opts);
376 DefineStd(Builder, "unix", Opts);
377 Builder.defineMacro("__ELF__");
378 Builder.defineMacro("__svr4__");
379 Builder.defineMacro("__SVR4");
381 public:
382 AuroraUXTargetInfo(const std::string& triple)
383 : OSTargetInfo<Target>(triple) {
384 this->UserLabelPrefix = "";
385 this->WCharType = this->SignedLong;
386 // FIXME: WIntType should be SignedLong
390 // Solaris target
391 template<typename Target>
392 class SolarisTargetInfo : public OSTargetInfo<Target> {
393 protected:
394 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
395 MacroBuilder &Builder) const {
396 DefineStd(Builder, "sun", Opts);
397 DefineStd(Builder, "unix", Opts);
398 Builder.defineMacro("__ELF__");
399 Builder.defineMacro("__svr4__");
400 Builder.defineMacro("__SVR4");
402 public:
403 SolarisTargetInfo(const std::string& triple)
404 : OSTargetInfo<Target>(triple) {
405 this->UserLabelPrefix = "";
406 this->WCharType = this->SignedLong;
407 // FIXME: WIntType should be SignedLong
411 // Windows target
412 template<typename Target>
413 class WindowsTargetInfo : public OSTargetInfo<Target> {
414 protected:
415 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
416 MacroBuilder &Builder) const {
417 Builder.defineMacro("_WIN32");
419 void getVisualStudioDefines(const LangOptions &Opts,
420 MacroBuilder &Builder) const {
421 if (Opts.CPlusPlus) {
422 if (Opts.RTTI)
423 Builder.defineMacro("_CPPRTTI");
425 if (Opts.Exceptions)
426 Builder.defineMacro("_CPPUNWIND");
429 if (!Opts.CharIsSigned)
430 Builder.defineMacro("_CHAR_UNSIGNED");
432 // FIXME: POSIXThreads isn't exactly the option this should be defined for,
433 // but it works for now.
434 if (Opts.POSIXThreads)
435 Builder.defineMacro("_MT");
437 if (Opts.MSCVersion != 0)
438 Builder.defineMacro("_MSC_VER", llvm::Twine(Opts.MSCVersion));
440 if (Opts.Microsoft) {
441 Builder.defineMacro("_MSC_EXTENSIONS");
443 if (Opts.CPlusPlus0x) {
444 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
445 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
446 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
450 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
453 public:
454 WindowsTargetInfo(const std::string &triple)
455 : OSTargetInfo<Target>(triple) {}
458 } // end anonymous namespace.
460 //===----------------------------------------------------------------------===//
461 // Specific target implementations.
462 //===----------------------------------------------------------------------===//
464 namespace {
465 // PPC abstract base class
466 class PPCTargetInfo : public TargetInfo {
467 static const Builtin::Info BuiltinInfo[];
468 static const char * const GCCRegNames[];
469 static const TargetInfo::GCCRegAlias GCCRegAliases[];
471 public:
472 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
474 virtual void getTargetBuiltins(const Builtin::Info *&Records,
475 unsigned &NumRecords) const {
476 Records = BuiltinInfo;
477 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
480 virtual void getTargetDefines(const LangOptions &Opts,
481 MacroBuilder &Builder) const;
483 virtual void getGCCRegNames(const char * const *&Names,
484 unsigned &NumNames) const;
485 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
486 unsigned &NumAliases) const;
487 virtual bool validateAsmConstraint(const char *&Name,
488 TargetInfo::ConstraintInfo &Info) const {
489 switch (*Name) {
490 default: return false;
491 case 'O': // Zero
492 break;
493 case 'b': // Base register
494 case 'f': // Floating point register
495 Info.setAllowsRegister();
496 break;
497 // FIXME: The following are added to allow parsing.
498 // I just took a guess at what the actions should be.
499 // Also, is more specific checking needed? I.e. specific registers?
500 case 'd': // Floating point register (containing 64-bit value)
501 case 'v': // Altivec vector register
502 Info.setAllowsRegister();
503 break;
504 case 'w':
505 switch (Name[1]) {
506 case 'd':// VSX vector register to hold vector double data
507 case 'f':// VSX vector register to hold vector float data
508 case 's':// VSX vector register to hold scalar float data
509 case 'a':// Any VSX register
510 break;
511 default:
512 return false;
514 Info.setAllowsRegister();
515 Name++; // Skip over 'w'.
516 break;
517 case 'h': // `MQ', `CTR', or `LINK' register
518 case 'q': // `MQ' register
519 case 'c': // `CTR' register
520 case 'l': // `LINK' register
521 case 'x': // `CR' register (condition register) number 0
522 case 'y': // `CR' register (condition register)
523 case 'z': // `XER[CA]' carry bit (part of the XER register)
524 Info.setAllowsRegister();
525 break;
526 case 'I': // Signed 16-bit constant
527 case 'J': // Unsigned 16-bit constant shifted left 16 bits
528 // (use `L' instead for SImode constants)
529 case 'K': // Unsigned 16-bit constant
530 case 'L': // Signed 16-bit constant shifted left 16 bits
531 case 'M': // Constant larger than 31
532 case 'N': // Exact power of 2
533 case 'P': // Constant whose negation is a signed 16-bit constant
534 case 'G': // Floating point constant that can be loaded into a
535 // register with one instruction per word
536 case 'H': // Integer/Floating point constant that can be loaded
537 // into a register using three instructions
538 break;
539 case 'm': // Memory operand. Note that on PowerPC targets, m can
540 // include addresses that update the base register. It
541 // is therefore only safe to use `m' in an asm statement
542 // if that asm statement accesses the operand exactly once.
543 // The asm statement must also use `%U<opno>' as a
544 // placeholder for the "update" flag in the corresponding
545 // load or store instruction. For example:
546 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
547 // is correct but:
548 // asm ("st %1,%0" : "=m" (mem) : "r" (val));
549 // is not. Use es rather than m if you don't want the base
550 // register to be updated.
551 case 'e':
552 if (Name[1] != 's')
553 return false;
554 // es: A "stable" memory operand; that is, one which does not
555 // include any automodification of the base register. Unlike
556 // `m', this constraint can be used in asm statements that
557 // might access the operand several times, or that might not
558 // access it at all.
559 Info.setAllowsMemory();
560 Name++; // Skip over 'e'.
561 break;
562 case 'Q': // Memory operand that is an offset from a register (it is
563 // usually better to use `m' or `es' in asm statements)
564 case 'Z': // Memory operand that is an indexed or indirect from a
565 // register (it is usually better to use `m' or `es' in
566 // asm statements)
567 Info.setAllowsMemory();
568 Info.setAllowsRegister();
569 break;
570 case 'R': // AIX TOC entry
571 case 'a': // Address operand that is an indexed or indirect from a
572 // register (`p' is preferable for asm statements)
573 case 'S': // Constant suitable as a 64-bit mask operand
574 case 'T': // Constant suitable as a 32-bit mask operand
575 case 'U': // System V Release 4 small data area reference
576 case 't': // AND masks that can be performed by two rldic{l, r}
577 // instructions
578 case 'W': // Vector constant that does not require memory
579 case 'j': // Vector constant that is all zeros.
580 break;
581 // End FIXME.
583 return true;
585 virtual const char *getClobbers() const {
586 return "";
590 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
591 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false },
592 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
593 ALL_LANGUAGES, false },
594 #include "clang/Basic/BuiltinsPPC.def"
598 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
599 /// #defines that are not tied to a specific subtarget.
600 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
601 MacroBuilder &Builder) const {
602 // Target identification.
603 Builder.defineMacro("__ppc__");
604 Builder.defineMacro("_ARCH_PPC");
605 Builder.defineMacro("__powerpc__");
606 Builder.defineMacro("__POWERPC__");
607 if (PointerWidth == 64) {
608 Builder.defineMacro("_ARCH_PPC64");
609 Builder.defineMacro("_LP64");
610 Builder.defineMacro("__LP64__");
611 Builder.defineMacro("__powerpc64__");
612 Builder.defineMacro("__ppc64__");
613 } else {
614 Builder.defineMacro("__ppc__");
617 // Target properties.
618 Builder.defineMacro("_BIG_ENDIAN");
619 Builder.defineMacro("__BIG_ENDIAN__");
621 // Subtarget options.
622 Builder.defineMacro("__NATURAL_ALIGNMENT__");
623 Builder.defineMacro("__REGISTER_PREFIX__", "");
625 // FIXME: Should be controlled by command line option.
626 Builder.defineMacro("__LONG_DOUBLE_128__");
628 if (Opts.AltiVec) {
629 Builder.defineMacro("__VEC__", "10206");
630 Builder.defineMacro("__ALTIVEC__");
635 const char * const PPCTargetInfo::GCCRegNames[] = {
636 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
637 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
638 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
639 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
640 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
641 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
642 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
643 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
644 "mq", "lr", "ctr", "ap",
645 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
646 "xer",
647 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
648 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
649 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
650 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
651 "vrsave", "vscr",
652 "spe_acc", "spefscr",
653 "sfp"
656 void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
657 unsigned &NumNames) const {
658 Names = GCCRegNames;
659 NumNames = llvm::array_lengthof(GCCRegNames);
662 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
663 // While some of these aliases do map to different registers
664 // they still share the same register name.
665 { { "0" }, "r0" },
666 { { "1"}, "r1" },
667 { { "2" }, "r2" },
668 { { "3" }, "r3" },
669 { { "4" }, "r4" },
670 { { "5" }, "r5" },
671 { { "6" }, "r6" },
672 { { "7" }, "r7" },
673 { { "8" }, "r8" },
674 { { "9" }, "r9" },
675 { { "10" }, "r10" },
676 { { "11" }, "r11" },
677 { { "12" }, "r12" },
678 { { "13" }, "r13" },
679 { { "14" }, "r14" },
680 { { "15" }, "r15" },
681 { { "16" }, "r16" },
682 { { "17" }, "r17" },
683 { { "18" }, "r18" },
684 { { "19" }, "r19" },
685 { { "20" }, "r20" },
686 { { "21" }, "r21" },
687 { { "22" }, "r22" },
688 { { "23" }, "r23" },
689 { { "24" }, "r24" },
690 { { "25" }, "r25" },
691 { { "26" }, "r26" },
692 { { "27" }, "r27" },
693 { { "28" }, "r28" },
694 { { "29" }, "r29" },
695 { { "30" }, "r30" },
696 { { "31" }, "r31" },
697 { { "fr0" }, "f0" },
698 { { "fr1" }, "f1" },
699 { { "fr2" }, "f2" },
700 { { "fr3" }, "f3" },
701 { { "fr4" }, "f4" },
702 { { "fr5" }, "f5" },
703 { { "fr6" }, "f6" },
704 { { "fr7" }, "f7" },
705 { { "fr8" }, "f8" },
706 { { "fr9" }, "f9" },
707 { { "fr10" }, "f10" },
708 { { "fr11" }, "f11" },
709 { { "fr12" }, "f12" },
710 { { "fr13" }, "f13" },
711 { { "fr14" }, "f14" },
712 { { "fr15" }, "f15" },
713 { { "fr16" }, "f16" },
714 { { "fr17" }, "f17" },
715 { { "fr18" }, "f18" },
716 { { "fr19" }, "f19" },
717 { { "fr20" }, "f20" },
718 { { "fr21" }, "f21" },
719 { { "fr22" }, "f22" },
720 { { "fr23" }, "f23" },
721 { { "fr24" }, "f24" },
722 { { "fr25" }, "f25" },
723 { { "fr26" }, "f26" },
724 { { "fr27" }, "f27" },
725 { { "fr28" }, "f28" },
726 { { "fr29" }, "f29" },
727 { { "fr30" }, "f30" },
728 { { "fr31" }, "f31" },
729 { { "cc" }, "cr0" },
732 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
733 unsigned &NumAliases) const {
734 Aliases = GCCRegAliases;
735 NumAliases = llvm::array_lengthof(GCCRegAliases);
737 } // end anonymous namespace.
739 namespace {
740 class PPC32TargetInfo : public PPCTargetInfo {
741 public:
742 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
743 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
744 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
746 if (getTriple().getOS() == llvm::Triple::FreeBSD)
747 SizeType = UnsignedInt;
750 virtual const char *getVAListDeclaration() const {
751 // This is the ELF definition, and is overridden by the Darwin sub-target
752 return "typedef struct __va_list_tag {"
753 " unsigned char gpr;"
754 " unsigned char fpr;"
755 " unsigned short reserved;"
756 " void* overflow_arg_area;"
757 " void* reg_save_area;"
758 "} __builtin_va_list[1];";
761 } // end anonymous namespace.
763 namespace {
764 class PPC64TargetInfo : public PPCTargetInfo {
765 public:
766 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
767 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
768 IntMaxType = SignedLong;
769 UIntMaxType = UnsignedLong;
770 Int64Type = SignedLong;
771 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
772 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
774 virtual const char *getVAListDeclaration() const {
775 return "typedef char* __builtin_va_list;";
778 } // end anonymous namespace.
781 namespace {
782 class DarwinPPC32TargetInfo :
783 public DarwinTargetInfo<PPC32TargetInfo> {
784 public:
785 DarwinPPC32TargetInfo(const std::string& triple)
786 : DarwinTargetInfo<PPC32TargetInfo>(triple) {
787 HasAlignMac68kSupport = true;
788 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
790 virtual const char *getVAListDeclaration() const {
791 return "typedef char* __builtin_va_list;";
795 class DarwinPPC64TargetInfo :
796 public DarwinTargetInfo<PPC64TargetInfo> {
797 public:
798 DarwinPPC64TargetInfo(const std::string& triple)
799 : DarwinTargetInfo<PPC64TargetInfo>(triple) {
800 HasAlignMac68kSupport = true;
803 } // end anonymous namespace.
805 namespace {
806 // MBlaze abstract base class
807 class MBlazeTargetInfo : public TargetInfo {
808 static const char * const GCCRegNames[];
809 static const TargetInfo::GCCRegAlias GCCRegAliases[];
811 public:
812 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
813 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
816 virtual void getTargetBuiltins(const Builtin::Info *&Records,
817 unsigned &NumRecords) const {
818 // FIXME: Implement.
819 Records = 0;
820 NumRecords = 0;
823 virtual void getTargetDefines(const LangOptions &Opts,
824 MacroBuilder &Builder) const;
826 virtual const char *getVAListDeclaration() const {
827 return "typedef char* __builtin_va_list;";
829 virtual const char *getTargetPrefix() const {
830 return "mblaze";
832 virtual void getGCCRegNames(const char * const *&Names,
833 unsigned &NumNames) const;
834 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
835 unsigned &NumAliases) const;
836 virtual bool validateAsmConstraint(const char *&Name,
837 TargetInfo::ConstraintInfo &Info) const {
838 switch (*Name) {
839 default: return false;
840 case 'O': // Zero
841 return true;
842 case 'b': // Base register
843 case 'f': // Floating point register
844 Info.setAllowsRegister();
845 return true;
848 virtual const char *getClobbers() const {
849 return "";
853 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
854 /// #defines that are not tied to a specific subtarget.
855 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
856 MacroBuilder &Builder) const {
857 // Target identification.
858 Builder.defineMacro("__microblaze__");
859 Builder.defineMacro("_ARCH_MICROBLAZE");
860 Builder.defineMacro("__MICROBLAZE__");
862 // Target properties.
863 Builder.defineMacro("_BIG_ENDIAN");
864 Builder.defineMacro("__BIG_ENDIAN__");
866 // Subtarget options.
867 Builder.defineMacro("__REGISTER_PREFIX__", "");
871 const char * const MBlazeTargetInfo::GCCRegNames[] = {
872 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
873 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
874 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
875 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
876 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
877 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
878 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
879 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
880 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
881 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp"
884 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
885 unsigned &NumNames) const {
886 Names = GCCRegNames;
887 NumNames = llvm::array_lengthof(GCCRegNames);
890 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
891 { {"f0"}, "r0" },
892 { {"f1"}, "r1" },
893 { {"f2"}, "r2" },
894 { {"f3"}, "r3" },
895 { {"f4"}, "r4" },
896 { {"f5"}, "r5" },
897 { {"f6"}, "r6" },
898 { {"f7"}, "r7" },
899 { {"f8"}, "r8" },
900 { {"f9"}, "r9" },
901 { {"f10"}, "r10" },
902 { {"f11"}, "r11" },
903 { {"f12"}, "r12" },
904 { {"f13"}, "r13" },
905 { {"f14"}, "r14" },
906 { {"f15"}, "r15" },
907 { {"f16"}, "r16" },
908 { {"f17"}, "r17" },
909 { {"f18"}, "r18" },
910 { {"f19"}, "r19" },
911 { {"f20"}, "r20" },
912 { {"f21"}, "r21" },
913 { {"f22"}, "r22" },
914 { {"f23"}, "r23" },
915 { {"f24"}, "r24" },
916 { {"f25"}, "r25" },
917 { {"f26"}, "r26" },
918 { {"f27"}, "r27" },
919 { {"f28"}, "r28" },
920 { {"f29"}, "r29" },
921 { {"f30"}, "r30" },
922 { {"f31"}, "r31" },
925 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
926 unsigned &NumAliases) const {
927 Aliases = GCCRegAliases;
928 NumAliases = llvm::array_lengthof(GCCRegAliases);
930 } // end anonymous namespace.
932 namespace {
933 // Namespace for x86 abstract base class
934 const Builtin::Info BuiltinInfo[] = {
935 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false },
936 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
937 ALL_LANGUAGES, false },
938 #include "clang/Basic/BuiltinsX86.def"
941 static const char* const GCCRegNames[] = {
942 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
943 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
944 "argp", "flags", "fspr", "dirflag", "frame",
945 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
946 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
947 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
948 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"
951 const TargetInfo::GCCRegAlias GCCRegAliases[] = {
952 { { "al", "ah", "eax", "rax" }, "ax" },
953 { { "bl", "bh", "ebx", "rbx" }, "bx" },
954 { { "cl", "ch", "ecx", "rcx" }, "cx" },
955 { { "dl", "dh", "edx", "rdx" }, "dx" },
956 { { "esi", "rsi" }, "si" },
957 { { "edi", "rdi" }, "di" },
958 { { "esp", "rsp" }, "sp" },
959 { { "ebp", "rbp" }, "bp" },
962 // X86 target abstract base class; x86-32 and x86-64 are very close, so
963 // most of the implementation can be shared.
964 class X86TargetInfo : public TargetInfo {
965 enum X86SSEEnum {
966 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
967 } SSELevel;
968 enum AMD3DNowEnum {
969 NoAMD3DNow, AMD3DNow, AMD3DNowAthlon
970 } AMD3DNowLevel;
972 bool HasAES;
973 bool HasAVX;
975 public:
976 X86TargetInfo(const std::string& triple)
977 : TargetInfo(triple), SSELevel(NoMMXSSE), AMD3DNowLevel(NoAMD3DNow),
978 HasAES(false), HasAVX(false) {
979 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
981 virtual void getTargetBuiltins(const Builtin::Info *&Records,
982 unsigned &NumRecords) const {
983 Records = BuiltinInfo;
984 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
986 virtual void getGCCRegNames(const char * const *&Names,
987 unsigned &NumNames) const {
988 Names = GCCRegNames;
989 NumNames = llvm::array_lengthof(GCCRegNames);
991 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
992 unsigned &NumAliases) const {
993 Aliases = GCCRegAliases;
994 NumAliases = llvm::array_lengthof(GCCRegAliases);
996 virtual bool validateAsmConstraint(const char *&Name,
997 TargetInfo::ConstraintInfo &info) const;
998 virtual const llvm::Type* adjustInlineAsmType(std::string& Constraint,
999 const llvm::Type* Ty,
1000 llvm::LLVMContext& Context) const;
1001 virtual std::string convertConstraint(const char Constraint) const;
1002 virtual const char *getClobbers() const {
1003 return "~{dirflag},~{fpsr},~{flags}";
1005 virtual void getTargetDefines(const LangOptions &Opts,
1006 MacroBuilder &Builder) const;
1007 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1008 const std::string &Name,
1009 bool Enabled) const;
1010 virtual void getDefaultFeatures(const std::string &CPU,
1011 llvm::StringMap<bool> &Features) const;
1012 virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1015 void X86TargetInfo::getDefaultFeatures(const std::string &CPU,
1016 llvm::StringMap<bool> &Features) const {
1017 // FIXME: This should not be here.
1018 Features["3dnow"] = false;
1019 Features["3dnowa"] = false;
1020 Features["mmx"] = false;
1021 Features["sse"] = false;
1022 Features["sse2"] = false;
1023 Features["sse3"] = false;
1024 Features["ssse3"] = false;
1025 Features["sse41"] = false;
1026 Features["sse42"] = false;
1027 Features["aes"] = false;
1028 Features["avx"] = false;
1030 // LLVM does not currently recognize this.
1031 // Features["sse4a"] = false;
1033 // FIXME: This *really* should not be here.
1035 // X86_64 always has SSE2.
1036 if (PointerWidth == 64)
1037 Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1039 if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" ||
1040 CPU == "pentium" || CPU == "i686" || CPU == "pentiumpro")
1042 else if (CPU == "pentium-mmx" || CPU == "pentium2")
1043 setFeatureEnabled(Features, "mmx", true);
1044 else if (CPU == "pentium3")
1045 setFeatureEnabled(Features, "sse", true);
1046 else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64")
1047 setFeatureEnabled(Features, "sse2", true);
1048 else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona")
1049 setFeatureEnabled(Features, "sse3", true);
1050 else if (CPU == "core2")
1051 setFeatureEnabled(Features, "ssse3", true);
1052 else if (CPU == "penryn") {
1053 setFeatureEnabled(Features, "sse4", true);
1054 Features["sse42"] = false;
1055 } else if (CPU == "atom")
1056 setFeatureEnabled(Features, "sse3", true);
1057 else if (CPU == "corei7") {
1058 setFeatureEnabled(Features, "sse4", true);
1059 setFeatureEnabled(Features, "aes", true);
1061 else if (CPU == "k6" || CPU == "winchip-c6")
1062 setFeatureEnabled(Features, "mmx", true);
1063 else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" ||
1064 CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") {
1065 setFeatureEnabled(Features, "mmx", true);
1066 setFeatureEnabled(Features, "3dnow", true);
1067 } else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") {
1068 setFeatureEnabled(Features, "sse", true);
1069 setFeatureEnabled(Features, "3dnowa", true);
1070 } else if (CPU == "k8" || CPU == "opteron" || CPU == "athlon64" ||
1071 CPU == "athlon-fx") {
1072 setFeatureEnabled(Features, "sse2", true);
1073 setFeatureEnabled(Features, "3dnowa", true);
1074 } else if (CPU == "k8-sse3") {
1075 setFeatureEnabled(Features, "sse3", true);
1076 setFeatureEnabled(Features, "3dnowa", true);
1077 } else if (CPU == "c3-2")
1078 setFeatureEnabled(Features, "sse", true);
1081 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1082 const std::string &Name,
1083 bool Enabled) const {
1084 // FIXME: This *really* should not be here. We need some way of translating
1085 // options into llvm subtarget features.
1086 if (!Features.count(Name) &&
1087 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1088 return false;
1090 if (Enabled) {
1091 if (Name == "mmx")
1092 Features["mmx"] = true;
1093 else if (Name == "sse")
1094 Features["mmx"] = Features["sse"] = true;
1095 else if (Name == "sse2")
1096 Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1097 else if (Name == "sse3")
1098 Features["mmx"] = Features["sse"] = Features["sse2"] =
1099 Features["sse3"] = true;
1100 else if (Name == "ssse3")
1101 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1102 Features["ssse3"] = true;
1103 else if (Name == "sse4" || Name == "sse4.2")
1104 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1105 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true;
1106 else if (Name == "sse4.1")
1107 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1108 Features["ssse3"] = Features["sse41"] = true;
1109 else if (Name == "3dnow")
1110 Features["3dnowa"] = true;
1111 else if (Name == "3dnowa")
1112 Features["3dnow"] = Features["3dnowa"] = true;
1113 else if (Name == "aes")
1114 Features["aes"] = true;
1115 else if (Name == "avx")
1116 Features["avx"] = true;
1117 } else {
1118 if (Name == "mmx")
1119 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1120 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1121 else if (Name == "sse")
1122 Features["sse"] = Features["sse2"] = Features["sse3"] =
1123 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1124 else if (Name == "sse2")
1125 Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1126 Features["sse41"] = Features["sse42"] = false;
1127 else if (Name == "sse3")
1128 Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1129 Features["sse42"] = false;
1130 else if (Name == "ssse3")
1131 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1132 else if (Name == "sse4")
1133 Features["sse41"] = Features["sse42"] = false;
1134 else if (Name == "sse4.2")
1135 Features["sse42"] = false;
1136 else if (Name == "sse4.1")
1137 Features["sse41"] = Features["sse42"] = false;
1138 else if (Name == "3dnow")
1139 Features["3dnow"] = Features["3dnowa"] = false;
1140 else if (Name == "3dnowa")
1141 Features["3dnowa"] = false;
1142 else if (Name == "aes")
1143 Features["aes"] = false;
1144 else if (Name == "avx")
1145 Features["avx"] = false;
1148 return true;
1151 /// HandleTargetOptions - Perform initialization based on the user
1152 /// configured set of features.
1153 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1154 // Remember the maximum enabled sselevel.
1155 for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1156 // Ignore disabled features.
1157 if (Features[i][0] == '-')
1158 continue;
1160 if (Features[i].substr(1) == "aes") {
1161 HasAES = true;
1162 continue;
1165 // FIXME: Not sure yet how to treat AVX in regard to SSE levels.
1166 // For now let it be enabled together with other SSE levels.
1167 if (Features[i].substr(1) == "avx") {
1168 HasAVX = true;
1169 continue;
1172 assert(Features[i][0] == '+' && "Invalid target feature!");
1173 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1174 .Case("sse42", SSE42)
1175 .Case("sse41", SSE41)
1176 .Case("ssse3", SSSE3)
1177 .Case("sse3", SSE3)
1178 .Case("sse2", SSE2)
1179 .Case("sse", SSE1)
1180 .Case("mmx", MMX)
1181 .Default(NoMMXSSE);
1182 SSELevel = std::max(SSELevel, Level);
1184 AMD3DNowEnum ThreeDNowLevel =
1185 llvm::StringSwitch<AMD3DNowEnum>(Features[i].substr(1))
1186 .Case("3dnowa", AMD3DNowAthlon)
1187 .Case("3dnow", AMD3DNow)
1188 .Default(NoAMD3DNow);
1190 AMD3DNowLevel = std::max(AMD3DNowLevel, ThreeDNowLevel);
1194 /// X86TargetInfo::getTargetDefines - Return a set of the X86-specific #defines
1195 /// that are not tied to a specific subtarget.
1196 void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1197 MacroBuilder &Builder) const {
1198 // Target identification.
1199 if (PointerWidth == 64) {
1200 Builder.defineMacro("_LP64");
1201 Builder.defineMacro("__LP64__");
1202 Builder.defineMacro("__amd64__");
1203 Builder.defineMacro("__amd64");
1204 Builder.defineMacro("__x86_64");
1205 Builder.defineMacro("__x86_64__");
1206 } else {
1207 DefineStd(Builder, "i386", Opts);
1210 if (HasAES)
1211 Builder.defineMacro("__AES__");
1213 if (HasAVX)
1214 Builder.defineMacro("__AVX__");
1216 // Target properties.
1217 Builder.defineMacro("__LITTLE_ENDIAN__");
1219 // Subtarget options.
1220 Builder.defineMacro("__nocona");
1221 Builder.defineMacro("__nocona__");
1222 Builder.defineMacro("__tune_nocona__");
1223 Builder.defineMacro("__REGISTER_PREFIX__", "");
1225 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
1226 // functions in glibc header files that use FP Stack inline asm which the
1227 // backend can't deal with (PR879).
1228 Builder.defineMacro("__NO_MATH_INLINES");
1230 // Each case falls through to the previous one here.
1231 switch (SSELevel) {
1232 case SSE42:
1233 Builder.defineMacro("__SSE4_2__");
1234 case SSE41:
1235 Builder.defineMacro("__SSE4_1__");
1236 case SSSE3:
1237 Builder.defineMacro("__SSSE3__");
1238 case SSE3:
1239 Builder.defineMacro("__SSE3__");
1240 case SSE2:
1241 Builder.defineMacro("__SSE2__");
1242 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied.
1243 case SSE1:
1244 Builder.defineMacro("__SSE__");
1245 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied.
1246 case MMX:
1247 Builder.defineMacro("__MMX__");
1248 case NoMMXSSE:
1249 break;
1252 if (Opts.Microsoft && PointerWidth == 32) {
1253 switch (SSELevel) {
1254 case SSE42:
1255 case SSE41:
1256 case SSSE3:
1257 case SSE3:
1258 case SSE2:
1259 Builder.defineMacro("_M_IX86_FP", llvm::Twine(2));
1260 break;
1261 case SSE1:
1262 Builder.defineMacro("_M_IX86_FP", llvm::Twine(1));
1263 break;
1264 default:
1265 Builder.defineMacro("_M_IX86_FP", llvm::Twine(0));
1269 // Each case falls through to the previous one here.
1270 switch (AMD3DNowLevel) {
1271 case AMD3DNowAthlon:
1272 Builder.defineMacro("__3dNOW_A__");
1273 case AMD3DNow:
1274 Builder.defineMacro("__3dNOW__");
1275 case NoAMD3DNow:
1276 break;
1281 bool
1282 X86TargetInfo::validateAsmConstraint(const char *&Name,
1283 TargetInfo::ConstraintInfo &Info) const {
1284 switch (*Name) {
1285 default: return false;
1286 case 'Y': // first letter of a pair:
1287 switch (*(Name+1)) {
1288 default: return false;
1289 case '0': // First SSE register.
1290 case 't': // Any SSE register, when SSE2 is enabled.
1291 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled.
1292 case 'm': // any MMX register, when inter-unit moves enabled.
1293 break; // falls through to setAllowsRegister.
1295 case 'a': // eax.
1296 case 'b': // ebx.
1297 case 'c': // ecx.
1298 case 'd': // edx.
1299 case 'S': // esi.
1300 case 'D': // edi.
1301 case 'A': // edx:eax.
1302 case 'f': // any x87 floating point stack register.
1303 case 't': // top of floating point stack.
1304 case 'u': // second from top of floating point stack.
1305 case 'q': // Any register accessible as [r]l: a, b, c, and d.
1306 case 'y': // Any MMX register.
1307 case 'x': // Any SSE register.
1308 case 'Q': // Any register accessible as [r]h: a, b, c, and d.
1309 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
1310 case 'l': // "Index" registers: any general register that can be used as an
1311 // index in a base+index memory access.
1312 Info.setAllowsRegister();
1313 return true;
1314 case 'C': // SSE floating point constant.
1315 case 'G': // x87 floating point constant.
1316 case 'e': // 32-bit signed integer constant for use with zero-extending
1317 // x86_64 instructions.
1318 case 'Z': // 32-bit unsigned integer constant for use with zero-extending
1319 // x86_64 instructions.
1320 return true;
1322 return false;
1325 const llvm::Type*
1326 X86TargetInfo::adjustInlineAsmType(std::string& Constraint,
1327 const llvm::Type* Ty,
1328 llvm::LLVMContext &Context) const {
1329 if (Constraint=="y" && Ty->isVectorTy())
1330 return llvm::Type::getX86_MMXTy(Context);
1331 return Ty;
1335 std::string
1336 X86TargetInfo::convertConstraint(const char Constraint) const {
1337 switch (Constraint) {
1338 case 'a': return std::string("{ax}");
1339 case 'b': return std::string("{bx}");
1340 case 'c': return std::string("{cx}");
1341 case 'd': return std::string("{dx}");
1342 case 'S': return std::string("{si}");
1343 case 'D': return std::string("{di}");
1344 case 'p': // address
1345 return std::string("im");
1346 case 't': // top of floating point stack.
1347 return std::string("{st}");
1348 case 'u': // second from top of floating point stack.
1349 return std::string("{st(1)}"); // second from top of floating point stack.
1350 default:
1351 return std::string(1, Constraint);
1354 } // end anonymous namespace
1356 namespace {
1357 // X86-32 generic target
1358 class X86_32TargetInfo : public X86TargetInfo {
1359 public:
1360 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
1361 DoubleAlign = LongLongAlign = 32;
1362 LongDoubleWidth = 96;
1363 LongDoubleAlign = 32;
1364 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1365 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1366 "a0:0:64-f80:32:32-n8:16:32";
1367 SizeType = UnsignedInt;
1368 PtrDiffType = SignedInt;
1369 IntPtrType = SignedInt;
1370 RegParmMax = 3;
1372 // Use fpret for all types.
1373 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
1374 (1 << TargetInfo::Double) |
1375 (1 << TargetInfo::LongDouble));
1377 virtual const char *getVAListDeclaration() const {
1378 return "typedef char* __builtin_va_list;";
1381 int getEHDataRegisterNumber(unsigned RegNo) const {
1382 if (RegNo == 0) return 0;
1383 if (RegNo == 1) return 2;
1384 return -1;
1387 } // end anonymous namespace
1389 namespace {
1390 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
1391 public:
1392 OpenBSDI386TargetInfo(const std::string& triple) :
1393 OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
1394 SizeType = UnsignedLong;
1395 IntPtrType = SignedLong;
1396 PtrDiffType = SignedLong;
1399 } // end anonymous namespace
1401 namespace {
1402 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
1403 public:
1404 DarwinI386TargetInfo(const std::string& triple) :
1405 DarwinTargetInfo<X86_32TargetInfo>(triple) {
1406 LongDoubleWidth = 128;
1407 LongDoubleAlign = 128;
1408 SizeType = UnsignedLong;
1409 IntPtrType = SignedLong;
1410 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1411 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1412 "a0:0:64-f80:128:128-n8:16:32";
1413 HasAlignMac68kSupport = true;
1417 } // end anonymous namespace
1419 namespace {
1420 // x86-32 Windows target
1421 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
1422 public:
1423 WindowsX86_32TargetInfo(const std::string& triple)
1424 : WindowsTargetInfo<X86_32TargetInfo>(triple) {
1425 TLSSupported = false;
1426 WCharType = UnsignedShort;
1427 DoubleAlign = LongLongAlign = 64;
1428 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1429 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
1430 "v128:128:128-a0:0:64-f80:32:32-n8:16:32";
1432 virtual void getTargetDefines(const LangOptions &Opts,
1433 MacroBuilder &Builder) const {
1434 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
1437 } // end anonymous namespace
1439 namespace {
1441 // x86-32 Windows Visual Studio target
1442 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
1443 public:
1444 VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
1445 : WindowsX86_32TargetInfo(triple) {
1446 LongDoubleWidth = 64;
1447 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1449 virtual void getTargetDefines(const LangOptions &Opts,
1450 MacroBuilder &Builder) const {
1451 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1452 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
1453 // The value of the following reflects processor type.
1454 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
1455 // We lost the original triple, so we use the default.
1456 Builder.defineMacro("_M_IX86", "600");
1459 } // end anonymous namespace
1461 namespace {
1462 // x86-32 MinGW target
1463 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
1464 public:
1465 MinGWX86_32TargetInfo(const std::string& triple)
1466 : WindowsX86_32TargetInfo(triple) {
1468 virtual void getTargetDefines(const LangOptions &Opts,
1469 MacroBuilder &Builder) const {
1470 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1471 DefineStd(Builder, "WIN32", Opts);
1472 DefineStd(Builder, "WINNT", Opts);
1473 Builder.defineMacro("_X86_");
1474 Builder.defineMacro("__MSVCRT__");
1475 Builder.defineMacro("__MINGW32__");
1476 Builder.defineMacro("__declspec", "__declspec");
1479 } // end anonymous namespace
1481 namespace {
1482 // x86-32 Cygwin target
1483 class CygwinX86_32TargetInfo : public X86_32TargetInfo {
1484 public:
1485 CygwinX86_32TargetInfo(const std::string& triple)
1486 : X86_32TargetInfo(triple) {
1487 TLSSupported = false;
1488 WCharType = UnsignedShort;
1489 DoubleAlign = LongLongAlign = 64;
1490 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1491 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1492 "a0:0:64-f80:32:32-n8:16:32";
1494 virtual void getTargetDefines(const LangOptions &Opts,
1495 MacroBuilder &Builder) const {
1496 X86_32TargetInfo::getTargetDefines(Opts, Builder);
1497 Builder.defineMacro("__CYGWIN__");
1498 Builder.defineMacro("__CYGWIN32__");
1499 DefineStd(Builder, "unix", Opts);
1500 if (Opts.CPlusPlus)
1501 Builder.defineMacro("_GNU_SOURCE");
1504 } // end anonymous namespace
1506 namespace {
1507 // x86-32 Haiku target
1508 class HaikuX86_32TargetInfo : public X86_32TargetInfo {
1509 public:
1510 HaikuX86_32TargetInfo(const std::string& triple)
1511 : X86_32TargetInfo(triple) {
1512 SizeType = UnsignedLong;
1513 IntPtrType = SignedLong;
1514 PtrDiffType = SignedLong;
1515 this->UserLabelPrefix = "";
1517 virtual void getTargetDefines(const LangOptions &Opts,
1518 MacroBuilder &Builder) const {
1519 X86_32TargetInfo::getTargetDefines(Opts, Builder);
1520 Builder.defineMacro("__INTEL__");
1521 Builder.defineMacro("__HAIKU__");
1524 } // end anonymous namespace
1526 namespace {
1527 // x86-64 generic target
1528 class X86_64TargetInfo : public X86TargetInfo {
1529 public:
1530 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
1531 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1532 LongDoubleWidth = 128;
1533 LongDoubleAlign = 128;
1534 LargeArrayMinWidth = 128;
1535 LargeArrayAlign = 128;
1536 IntMaxType = SignedLong;
1537 UIntMaxType = UnsignedLong;
1538 Int64Type = SignedLong;
1539 RegParmMax = 6;
1541 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1542 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1543 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64";
1545 // Use fpret only for long double.
1546 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
1548 virtual const char *getVAListDeclaration() const {
1549 return "typedef struct __va_list_tag {"
1550 " unsigned gp_offset;"
1551 " unsigned fp_offset;"
1552 " void* overflow_arg_area;"
1553 " void* reg_save_area;"
1554 "} __va_list_tag;"
1555 "typedef __va_list_tag __builtin_va_list[1];";
1558 int getEHDataRegisterNumber(unsigned RegNo) const {
1559 if (RegNo == 0) return 0;
1560 if (RegNo == 1) return 1;
1561 return -1;
1564 } // end anonymous namespace
1566 namespace {
1567 // x86-64 Windows target
1568 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
1569 public:
1570 WindowsX86_64TargetInfo(const std::string& triple)
1571 : WindowsTargetInfo<X86_64TargetInfo>(triple) {
1572 TLSSupported = false;
1573 WCharType = UnsignedShort;
1574 LongWidth = LongAlign = 32;
1575 DoubleAlign = LongLongAlign = 64;
1576 IntMaxType = SignedLongLong;
1577 UIntMaxType = UnsignedLongLong;
1578 Int64Type = SignedLongLong;
1579 SizeType = UnsignedLongLong;
1580 PtrDiffType = SignedLongLong;
1581 IntPtrType = SignedLongLong;
1582 this->UserLabelPrefix = "";
1584 virtual void getTargetDefines(const LangOptions &Opts,
1585 MacroBuilder &Builder) const {
1586 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
1587 Builder.defineMacro("_WIN64");
1589 virtual const char *getVAListDeclaration() const {
1590 return "typedef char* __builtin_va_list;";
1593 } // end anonymous namespace
1595 namespace {
1596 // x86-64 Windows Visual Studio target
1597 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
1598 public:
1599 VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
1600 : WindowsX86_64TargetInfo(triple) {
1602 virtual void getTargetDefines(const LangOptions &Opts,
1603 MacroBuilder &Builder) const {
1604 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1605 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
1606 Builder.defineMacro("_M_X64");
1607 Builder.defineMacro("_M_AMD64");
1610 } // end anonymous namespace
1612 namespace {
1613 // x86-64 MinGW target
1614 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
1615 public:
1616 MinGWX86_64TargetInfo(const std::string& triple)
1617 : WindowsX86_64TargetInfo(triple) {
1619 virtual void getTargetDefines(const LangOptions &Opts,
1620 MacroBuilder &Builder) const {
1621 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1622 DefineStd(Builder, "WIN64", Opts);
1623 Builder.defineMacro("__MSVCRT__");
1624 Builder.defineMacro("__MINGW64__");
1625 Builder.defineMacro("__declspec", "__declspec");
1628 } // end anonymous namespace
1630 namespace {
1631 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
1632 public:
1633 DarwinX86_64TargetInfo(const std::string& triple)
1634 : DarwinTargetInfo<X86_64TargetInfo>(triple) {
1635 Int64Type = SignedLongLong;
1638 } // end anonymous namespace
1640 namespace {
1641 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
1642 public:
1643 OpenBSDX86_64TargetInfo(const std::string& triple)
1644 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
1645 IntMaxType = SignedLongLong;
1646 UIntMaxType = UnsignedLongLong;
1647 Int64Type = SignedLongLong;
1650 } // end anonymous namespace
1652 namespace {
1653 class ARMTargetInfo : public TargetInfo {
1654 // Possible FPU choices.
1655 enum FPUMode {
1656 NoFPU,
1657 VFP2FPU,
1658 VFP3FPU,
1659 NeonFPU
1662 static bool FPUModeIsVFP(FPUMode Mode) {
1663 return Mode >= VFP2FPU && Mode <= NeonFPU;
1666 static const TargetInfo::GCCRegAlias GCCRegAliases[];
1667 static const char * const GCCRegNames[];
1669 std::string ABI, CPU;
1671 unsigned FPU : 3;
1673 unsigned IsThumb : 1;
1675 // Initialized via features.
1676 unsigned SoftFloat : 1;
1677 unsigned SoftFloatABI : 1;
1679 static const Builtin::Info BuiltinInfo[];
1681 public:
1682 ARMTargetInfo(const std::string &TripleStr)
1683 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
1685 SizeType = UnsignedInt;
1686 PtrDiffType = SignedInt;
1688 // {} in inline assembly are neon specifiers, not assembly variant
1689 // specifiers.
1690 NoAsmVariants = true;
1692 // FIXME: Should we just treat this as a feature?
1693 IsThumb = getTriple().getArchName().startswith("thumb");
1694 if (IsThumb) {
1695 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1696 "i64:64:64-f32:32:32-f64:64:64-"
1697 "v64:64:64-v128:128:128-a0:0:32-n32");
1698 } else {
1699 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1700 "i64:64:64-f32:32:32-f64:64:64-"
1701 "v64:64:64-v128:128:128-a0:0:64-n32");
1704 // ARM targets default to using the ARM C++ ABI.
1705 CXXABI = CXXABI_ARM;
1707 virtual const char *getABI() const { return ABI.c_str(); }
1708 virtual bool setABI(const std::string &Name) {
1709 ABI = Name;
1711 // The defaults (above) are for AAPCS, check if we need to change them.
1713 // FIXME: We need support for -meabi... we could just mangle it into the
1714 // name.
1715 if (Name == "apcs-gnu") {
1716 DoubleAlign = LongLongAlign = LongDoubleAlign = 32;
1717 SizeType = UnsignedLong;
1719 // Do not respect the alignment of bit-field types when laying out
1720 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
1721 UseBitFieldTypeAlignment = false;
1723 if (IsThumb) {
1724 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1725 "i64:32:32-f32:32:32-f64:32:32-"
1726 "v64:64:64-v128:128:128-a0:0:32-n32");
1727 } else {
1728 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1729 "i64:32:32-f32:32:32-f64:32:32-"
1730 "v64:64:64-v128:128:128-a0:0:64-n32");
1733 // FIXME: Override "preferred align" for double and long long.
1734 } else if (Name == "aapcs") {
1735 // FIXME: Enumerated types are variable width in straight AAPCS.
1736 } else if (Name == "aapcs-linux") {
1738 } else
1739 return false;
1741 return true;
1744 void getDefaultFeatures(const std::string &CPU,
1745 llvm::StringMap<bool> &Features) const {
1746 // FIXME: This should not be here.
1747 Features["vfp2"] = false;
1748 Features["vfp3"] = false;
1749 Features["neon"] = false;
1751 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
1752 Features["vfp2"] = true;
1753 else if (CPU == "cortex-a8" || CPU == "cortex-a9")
1754 Features["neon"] = true;
1757 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1758 const std::string &Name,
1759 bool Enabled) const {
1760 if (Name == "soft-float" || Name == "soft-float-abi") {
1761 Features[Name] = Enabled;
1762 } else if (Name == "vfp2" || Name == "vfp3" || Name == "neon") {
1763 // These effectively are a single option, reset them when any is enabled.
1764 if (Enabled)
1765 Features["vfp2"] = Features["vfp3"] = Features["neon"] = false;
1766 Features[Name] = Enabled;
1767 } else
1768 return false;
1770 return true;
1773 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
1774 FPU = NoFPU;
1775 SoftFloat = SoftFloatABI = false;
1776 for (unsigned i = 0, e = Features.size(); i != e; ++i) {
1777 if (Features[i] == "+soft-float")
1778 SoftFloat = true;
1779 else if (Features[i] == "+soft-float-abi")
1780 SoftFloatABI = true;
1781 else if (Features[i] == "+vfp2")
1782 FPU = VFP2FPU;
1783 else if (Features[i] == "+vfp3")
1784 FPU = VFP3FPU;
1785 else if (Features[i] == "+neon")
1786 FPU = NeonFPU;
1789 // Remove front-end specific options which the backend handles differently.
1790 std::vector<std::string>::iterator it;
1791 it = std::find(Features.begin(), Features.end(), "+soft-float");
1792 if (it != Features.end())
1793 Features.erase(it);
1794 it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
1795 if (it != Features.end())
1796 Features.erase(it);
1799 static const char *getCPUDefineSuffix(llvm::StringRef Name) {
1800 return llvm::StringSwitch<const char*>(Name)
1801 .Cases("arm8", "arm810", "4")
1802 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
1803 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
1804 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
1805 .Case("ep9312", "4T")
1806 .Cases("arm10tdmi", "arm1020t", "5T")
1807 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
1808 .Case("arm926ej-s", "5TEJ")
1809 .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
1810 .Cases("xscale", "iwmmxt", "5TE")
1811 .Case("arm1136j-s", "6J")
1812 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
1813 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
1814 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
1815 .Cases("cortex-a8", "cortex-a9", "7A")
1816 .Case("cortex-m3", "7M")
1817 .Default(0);
1819 virtual bool setCPU(const std::string &Name) {
1820 if (!getCPUDefineSuffix(Name))
1821 return false;
1823 CPU = Name;
1824 return true;
1826 virtual void getTargetDefines(const LangOptions &Opts,
1827 MacroBuilder &Builder) const {
1828 // Target identification.
1829 Builder.defineMacro("__arm");
1830 Builder.defineMacro("__arm__");
1832 // Target properties.
1833 Builder.defineMacro("__ARMEL__");
1834 Builder.defineMacro("__LITTLE_ENDIAN__");
1835 Builder.defineMacro("__REGISTER_PREFIX__", "");
1837 llvm::StringRef CPUArch = getCPUDefineSuffix(CPU);
1838 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
1840 // Subtarget options.
1842 // FIXME: It's more complicated than this and we don't really support
1843 // interworking.
1844 if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
1845 Builder.defineMacro("__THUMB_INTERWORK__");
1847 if (ABI == "aapcs" || ABI == "aapcs-linux")
1848 Builder.defineMacro("__ARM_EABI__");
1850 if (SoftFloat)
1851 Builder.defineMacro("__SOFTFP__");
1853 if (CPU == "xscale")
1854 Builder.defineMacro("__XSCALE__");
1856 bool IsThumb2 = IsThumb && (CPUArch == "6T2" || CPUArch.startswith("7"));
1857 if (IsThumb) {
1858 Builder.defineMacro("__THUMBEL__");
1859 Builder.defineMacro("__thumb__");
1860 if (IsThumb2)
1861 Builder.defineMacro("__thumb2__");
1864 // Note, this is always on in gcc, even though it doesn't make sense.
1865 Builder.defineMacro("__APCS_32__");
1867 if (FPUModeIsVFP((FPUMode) FPU))
1868 Builder.defineMacro("__VFP_FP__");
1870 // This only gets set when Neon instructions are actually available, unlike
1871 // the VFP define, hence the soft float and arch check. This is subtly
1872 // different from gcc, we follow the intent which was that it should be set
1873 // when Neon instructions are actually available.
1874 if (FPU == NeonFPU && !SoftFloat && IsThumb2)
1875 Builder.defineMacro("__ARM_NEON__");
1877 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1878 unsigned &NumRecords) const {
1879 Records = BuiltinInfo;
1880 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
1882 virtual const char *getVAListDeclaration() const {
1883 return "typedef char* __builtin_va_list;";
1885 virtual void getGCCRegNames(const char * const *&Names,
1886 unsigned &NumNames) const;
1887 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1888 unsigned &NumAliases) const;
1889 virtual bool validateAsmConstraint(const char *&Name,
1890 TargetInfo::ConstraintInfo &Info) const {
1891 // FIXME: Check if this is complete
1892 switch (*Name) {
1893 default:
1894 case 'l': // r0-r7
1895 case 'h': // r8-r15
1896 case 'w': // VFP Floating point register single precision
1897 case 'P': // VFP Floating point register double precision
1898 Info.setAllowsRegister();
1899 return true;
1901 return false;
1903 virtual const char *getClobbers() const {
1904 // FIXME: Is this really right?
1905 return "";
1909 const char * const ARMTargetInfo::GCCRegNames[] = {
1910 // Integer registers
1911 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1912 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
1914 // Float registers
1915 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
1916 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
1917 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
1918 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
1920 // Double registers
1921 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
1922 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
1923 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
1924 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
1926 // Quad registers
1927 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
1928 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
1931 void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
1932 unsigned &NumNames) const {
1933 Names = GCCRegNames;
1934 NumNames = llvm::array_lengthof(GCCRegNames);
1937 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
1938 { { "a1" }, "r0" },
1939 { { "a2" }, "r1" },
1940 { { "a3" }, "r2" },
1941 { { "a4" }, "r3" },
1942 { { "v1" }, "r4" },
1943 { { "v2" }, "r5" },
1944 { { "v3" }, "r6" },
1945 { { "v4" }, "r7" },
1946 { { "v5" }, "r8" },
1947 { { "v6", "rfp" }, "r9" },
1948 { { "sl" }, "r10" },
1949 { { "fp" }, "r11" },
1950 { { "ip" }, "r12" },
1951 { { "r13" }, "sp" },
1952 { { "r14" }, "lr" },
1953 { { "r15" }, "pc" },
1954 // The S, D and Q registers overlap, but aren't really aliases; we
1955 // don't want to substitute one of these for a different-sized one.
1958 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1959 unsigned &NumAliases) const {
1960 Aliases = GCCRegAliases;
1961 NumAliases = llvm::array_lengthof(GCCRegAliases);
1964 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
1965 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false },
1966 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1967 ALL_LANGUAGES, false },
1968 #include "clang/Basic/BuiltinsARM.def"
1970 } // end anonymous namespace.
1973 namespace {
1974 class DarwinARMTargetInfo :
1975 public DarwinTargetInfo<ARMTargetInfo> {
1976 protected:
1977 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
1978 MacroBuilder &Builder) const {
1979 getDarwinDefines(Builder, Opts, Triple);
1982 public:
1983 DarwinARMTargetInfo(const std::string& triple)
1984 : DarwinTargetInfo<ARMTargetInfo>(triple) {
1985 HasAlignMac68kSupport = true;
1988 } // end anonymous namespace.
1990 namespace {
1991 class SparcV8TargetInfo : public TargetInfo {
1992 static const TargetInfo::GCCRegAlias GCCRegAliases[];
1993 static const char * const GCCRegNames[];
1994 bool SoftFloat;
1995 public:
1996 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
1997 // FIXME: Support Sparc quad-precision long double?
1998 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1999 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
2001 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2002 const std::string &Name,
2003 bool Enabled) const {
2004 if (Name == "soft-float")
2005 Features[Name] = Enabled;
2006 else
2007 return false;
2009 return true;
2011 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2012 SoftFloat = false;
2013 for (unsigned i = 0, e = Features.size(); i != e; ++i)
2014 if (Features[i] == "+soft-float")
2015 SoftFloat = true;
2017 virtual void getTargetDefines(const LangOptions &Opts,
2018 MacroBuilder &Builder) const {
2019 DefineStd(Builder, "sparc", Opts);
2020 Builder.defineMacro("__sparcv8");
2021 Builder.defineMacro("__REGISTER_PREFIX__", "");
2023 if (SoftFloat)
2024 Builder.defineMacro("SOFT_FLOAT", "1");
2026 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2027 unsigned &NumRecords) const {
2028 // FIXME: Implement!
2030 virtual const char *getVAListDeclaration() const {
2031 return "typedef void* __builtin_va_list;";
2033 virtual void getGCCRegNames(const char * const *&Names,
2034 unsigned &NumNames) const;
2035 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2036 unsigned &NumAliases) const;
2037 virtual bool validateAsmConstraint(const char *&Name,
2038 TargetInfo::ConstraintInfo &info) const {
2039 // FIXME: Implement!
2040 return false;
2042 virtual const char *getClobbers() const {
2043 // FIXME: Implement!
2044 return "";
2048 const char * const SparcV8TargetInfo::GCCRegNames[] = {
2049 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2050 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
2051 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
2052 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
2055 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
2056 unsigned &NumNames) const {
2057 Names = GCCRegNames;
2058 NumNames = llvm::array_lengthof(GCCRegNames);
2061 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
2062 { { "g0" }, "r0" },
2063 { { "g1" }, "r1" },
2064 { { "g2" }, "r2" },
2065 { { "g3" }, "r3" },
2066 { { "g4" }, "r4" },
2067 { { "g5" }, "r5" },
2068 { { "g6" }, "r6" },
2069 { { "g7" }, "r7" },
2070 { { "o0" }, "r8" },
2071 { { "o1" }, "r9" },
2072 { { "o2" }, "r10" },
2073 { { "o3" }, "r11" },
2074 { { "o4" }, "r12" },
2075 { { "o5" }, "r13" },
2076 { { "o6", "sp" }, "r14" },
2077 { { "o7" }, "r15" },
2078 { { "l0" }, "r16" },
2079 { { "l1" }, "r17" },
2080 { { "l2" }, "r18" },
2081 { { "l3" }, "r19" },
2082 { { "l4" }, "r20" },
2083 { { "l5" }, "r21" },
2084 { { "l6" }, "r22" },
2085 { { "l7" }, "r23" },
2086 { { "i0" }, "r24" },
2087 { { "i1" }, "r25" },
2088 { { "i2" }, "r26" },
2089 { { "i3" }, "r27" },
2090 { { "i4" }, "r28" },
2091 { { "i5" }, "r29" },
2092 { { "i6", "fp" }, "r30" },
2093 { { "i7" }, "r31" },
2096 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2097 unsigned &NumAliases) const {
2098 Aliases = GCCRegAliases;
2099 NumAliases = llvm::array_lengthof(GCCRegAliases);
2101 } // end anonymous namespace.
2103 namespace {
2104 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
2105 public:
2106 AuroraUXSparcV8TargetInfo(const std::string& triple) :
2107 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
2108 SizeType = UnsignedInt;
2109 PtrDiffType = SignedInt;
2112 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
2113 public:
2114 SolarisSparcV8TargetInfo(const std::string& triple) :
2115 SolarisTargetInfo<SparcV8TargetInfo>(triple) {
2116 SizeType = UnsignedInt;
2117 PtrDiffType = SignedInt;
2120 } // end anonymous namespace.
2122 namespace {
2123 class MSP430TargetInfo : public TargetInfo {
2124 static const char * const GCCRegNames[];
2125 public:
2126 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
2127 TLSSupported = false;
2128 IntWidth = 16; IntAlign = 16;
2129 LongWidth = 32; LongLongWidth = 64;
2130 LongAlign = LongLongAlign = 16;
2131 PointerWidth = 16; PointerAlign = 16;
2132 SizeType = UnsignedInt;
2133 IntMaxType = SignedLong;
2134 UIntMaxType = UnsignedLong;
2135 IntPtrType = SignedShort;
2136 PtrDiffType = SignedInt;
2137 SigAtomicType = SignedLong;
2138 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
2140 virtual void getTargetDefines(const LangOptions &Opts,
2141 MacroBuilder &Builder) const {
2142 Builder.defineMacro("MSP430");
2143 Builder.defineMacro("__MSP430__");
2144 // FIXME: defines for different 'flavours' of MCU
2146 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2147 unsigned &NumRecords) const {
2148 // FIXME: Implement.
2149 Records = 0;
2150 NumRecords = 0;
2152 virtual void getGCCRegNames(const char * const *&Names,
2153 unsigned &NumNames) const;
2154 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2155 unsigned &NumAliases) const {
2156 // No aliases.
2157 Aliases = 0;
2158 NumAliases = 0;
2160 virtual bool validateAsmConstraint(const char *&Name,
2161 TargetInfo::ConstraintInfo &info) const {
2162 // No target constraints for now.
2163 return false;
2165 virtual const char *getClobbers() const {
2166 // FIXME: Is this really right?
2167 return "";
2169 virtual const char *getVAListDeclaration() const {
2170 // FIXME: implement
2171 return "typedef char* __builtin_va_list;";
2175 const char * const MSP430TargetInfo::GCCRegNames[] = {
2176 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2177 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2180 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
2181 unsigned &NumNames) const {
2182 Names = GCCRegNames;
2183 NumNames = llvm::array_lengthof(GCCRegNames);
2188 namespace {
2189 class SystemZTargetInfo : public TargetInfo {
2190 static const char * const GCCRegNames[];
2191 public:
2192 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) {
2193 TLSSupported = false;
2194 IntWidth = IntAlign = 32;
2195 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
2196 PointerWidth = PointerAlign = 64;
2197 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-"
2198 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64";
2200 virtual void getTargetDefines(const LangOptions &Opts,
2201 MacroBuilder &Builder) const {
2202 Builder.defineMacro("__s390__");
2203 Builder.defineMacro("__s390x__");
2205 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2206 unsigned &NumRecords) const {
2207 // FIXME: Implement.
2208 Records = 0;
2209 NumRecords = 0;
2212 virtual void getGCCRegNames(const char * const *&Names,
2213 unsigned &NumNames) const;
2214 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2215 unsigned &NumAliases) const {
2216 // No aliases.
2217 Aliases = 0;
2218 NumAliases = 0;
2220 virtual bool validateAsmConstraint(const char *&Name,
2221 TargetInfo::ConstraintInfo &info) const {
2222 // FIXME: implement
2223 return true;
2225 virtual const char *getClobbers() const {
2226 // FIXME: Is this really right?
2227 return "";
2229 virtual const char *getVAListDeclaration() const {
2230 // FIXME: implement
2231 return "typedef char* __builtin_va_list;";
2235 const char * const SystemZTargetInfo::GCCRegNames[] = {
2236 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2237 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2240 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names,
2241 unsigned &NumNames) const {
2242 Names = GCCRegNames;
2243 NumNames = llvm::array_lengthof(GCCRegNames);
2247 namespace {
2248 class BlackfinTargetInfo : public TargetInfo {
2249 static const char * const GCCRegNames[];
2250 public:
2251 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) {
2252 TLSSupported = false;
2253 DoubleAlign = 32;
2254 LongLongAlign = 32;
2255 LongDoubleAlign = 32;
2256 DescriptionString = "e-p:32:32-i64:32-f64:32-n32";
2259 virtual void getTargetDefines(const LangOptions &Opts,
2260 MacroBuilder &Builder) const {
2261 DefineStd(Builder, "bfin", Opts);
2262 DefineStd(Builder, "BFIN", Opts);
2263 Builder.defineMacro("__ADSPBLACKFIN__");
2264 // FIXME: This one is really dependent on -mcpu
2265 Builder.defineMacro("__ADSPLPBLACKFIN__");
2266 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__
2269 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2270 unsigned &NumRecords) const {
2271 // FIXME: Implement.
2272 Records = 0;
2273 NumRecords = 0;
2276 virtual void getGCCRegNames(const char * const *&Names,
2277 unsigned &NumNames) const;
2279 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2280 unsigned &NumAliases) const {
2281 // No aliases.
2282 Aliases = 0;
2283 NumAliases = 0;
2286 virtual bool validateAsmConstraint(const char *&Name,
2287 TargetInfo::ConstraintInfo &Info) const {
2288 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) {
2289 Info.setAllowsRegister();
2290 return true;
2292 return false;
2295 virtual const char *getClobbers() const {
2296 return "";
2299 virtual const char *getVAListDeclaration() const {
2300 return "typedef char* __builtin_va_list;";
2304 const char * const BlackfinTargetInfo::GCCRegNames[] = {
2305 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2306 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
2307 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3",
2308 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3",
2309 "a0", "a1", "cc",
2310 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp",
2311 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1"
2314 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names,
2315 unsigned &NumNames) const {
2316 Names = GCCRegNames;
2317 NumNames = llvm::array_lengthof(GCCRegNames);
2321 namespace {
2323 // LLVM and Clang cannot be used directly to output native binaries for
2324 // target, but is used to compile C code to llvm bitcode with correct
2325 // type and alignment information.
2327 // TCE uses the llvm bitcode as input and uses it for generating customized
2328 // target processor and program binary. TCE co-design environment is
2329 // publicly available in http://tce.cs.tut.fi
2331 class TCETargetInfo : public TargetInfo{
2332 public:
2333 TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
2334 TLSSupported = false;
2335 IntWidth = 32;
2336 LongWidth = LongLongWidth = 32;
2337 PointerWidth = 32;
2338 IntAlign = 32;
2339 LongAlign = LongLongAlign = 32;
2340 PointerAlign = 32;
2341 SizeType = UnsignedInt;
2342 IntMaxType = SignedLong;
2343 UIntMaxType = UnsignedLong;
2344 IntPtrType = SignedInt;
2345 PtrDiffType = SignedInt;
2346 FloatWidth = 32;
2347 FloatAlign = 32;
2348 DoubleWidth = 32;
2349 DoubleAlign = 32;
2350 LongDoubleWidth = 32;
2351 LongDoubleAlign = 32;
2352 FloatFormat = &llvm::APFloat::IEEEsingle;
2353 DoubleFormat = &llvm::APFloat::IEEEsingle;
2354 LongDoubleFormat = &llvm::APFloat::IEEEsingle;
2355 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
2356 "i16:16:32-i32:32:32-i64:32:32-"
2357 "f32:32:32-f64:64:64-v64:64:64-"
2358 "v128:128:128-a0:0:64-n32";
2361 virtual void getTargetDefines(const LangOptions &Opts,
2362 MacroBuilder &Builder) const {
2363 DefineStd(Builder, "tce", Opts);
2364 Builder.defineMacro("__TCE__");
2365 Builder.defineMacro("__TCE_V1__");
2367 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2368 unsigned &NumRecords) const {}
2369 virtual const char *getClobbers() const {
2370 return "";
2372 virtual const char *getVAListDeclaration() const {
2373 return "typedef void* __builtin_va_list;";
2375 virtual void getGCCRegNames(const char * const *&Names,
2376 unsigned &NumNames) const {}
2377 virtual bool validateAsmConstraint(const char *&Name,
2378 TargetInfo::ConstraintInfo &info) const {
2379 return true;
2381 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2382 unsigned &NumAliases) const {}
2386 namespace {
2387 class MipsTargetInfo : public TargetInfo {
2388 std::string ABI, CPU;
2389 static const TargetInfo::GCCRegAlias GCCRegAliases[];
2390 static const char * const GCCRegNames[];
2391 public:
2392 MipsTargetInfo(const std::string& triple) : TargetInfo(triple), ABI("o32") {
2393 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2394 "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32";
2396 virtual const char *getABI() const { return ABI.c_str(); }
2397 virtual bool setABI(const std::string &Name) {
2399 if ((Name == "o32") || (Name == "eabi")) {
2400 ABI = Name;
2401 return true;
2402 } else
2403 return false;
2405 virtual bool setCPU(const std::string &Name) {
2406 CPU = Name;
2407 return true;
2409 void getDefaultFeatures(const std::string &CPU,
2410 llvm::StringMap<bool> &Features) const {
2411 Features[ABI] = true;
2412 Features[CPU] = true;
2414 virtual void getArchDefines(const LangOptions &Opts,
2415 MacroBuilder &Builder) const {
2416 if (ABI == "o32")
2417 Builder.defineMacro("__mips_o32");
2418 else if (ABI == "eabi")
2419 Builder.defineMacro("__mips_eabi");
2421 virtual void getTargetDefines(const LangOptions &Opts,
2422 MacroBuilder &Builder) const {
2423 DefineStd(Builder, "mips", Opts);
2424 Builder.defineMacro("_mips");
2425 DefineStd(Builder, "MIPSEB", Opts);
2426 Builder.defineMacro("_MIPSEB");
2427 Builder.defineMacro("__REGISTER_PREFIX__", "");
2428 getArchDefines(Opts, Builder);
2430 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2431 unsigned &NumRecords) const {
2432 // FIXME: Implement!
2434 virtual const char *getVAListDeclaration() const {
2435 return "typedef void* __builtin_va_list;";
2437 virtual void getGCCRegNames(const char * const *&Names,
2438 unsigned &NumNames) const;
2439 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2440 unsigned &NumAliases) const;
2441 virtual bool validateAsmConstraint(const char *&Name,
2442 TargetInfo::ConstraintInfo &Info) const {
2443 switch (*Name) {
2444 default:
2445 case 'r': // CPU registers.
2446 case 'd': // Equivalent to "r" unless generating MIPS16 code.
2447 case 'y': // Equivalent to "r", backwards compatibility only.
2448 case 'f': // floating-point registers.
2449 Info.setAllowsRegister();
2450 return true;
2452 return false;
2455 virtual const char *getClobbers() const {
2456 // FIXME: Implement!
2457 return "";
2461 const char * const MipsTargetInfo::GCCRegNames[] = {
2462 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7",
2463 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15",
2464 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23",
2465 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31",
2466 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
2467 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
2468 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
2469 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
2470 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
2471 "$fcc5","$fcc6","$fcc7"
2474 void MipsTargetInfo::getGCCRegNames(const char * const *&Names,
2475 unsigned &NumNames) const {
2476 Names = GCCRegNames;
2477 NumNames = llvm::array_lengthof(GCCRegNames);
2480 const TargetInfo::GCCRegAlias MipsTargetInfo::GCCRegAliases[] = {
2481 { { "at" }, "$1" },
2482 { { "v0" }, "$2" },
2483 { { "v1" }, "$3" },
2484 { { "a0" }, "$4" },
2485 { { "a1" }, "$5" },
2486 { { "a2" }, "$6" },
2487 { { "a3" }, "$7" },
2488 { { "t0" }, "$8" },
2489 { { "t1" }, "$9" },
2490 { { "t2" }, "$10" },
2491 { { "t3" }, "$11" },
2492 { { "t4" }, "$12" },
2493 { { "t5" }, "$13" },
2494 { { "t6" }, "$14" },
2495 { { "t7" }, "$15" },
2496 { { "s0" }, "$16" },
2497 { { "s1" }, "$17" },
2498 { { "s2" }, "$18" },
2499 { { "s3" }, "$19" },
2500 { { "s4" }, "$20" },
2501 { { "s5" }, "$21" },
2502 { { "s6" }, "$22" },
2503 { { "s7" }, "$23" },
2504 { { "t8" }, "$24" },
2505 { { "t9" }, "$25" },
2506 { { "k0" }, "$26" },
2507 { { "k1" }, "$27" },
2508 { { "gp" }, "$28" },
2509 { { "sp" }, "$29" },
2510 { { "fp" }, "$30" },
2511 { { "ra" }, "$31" }
2514 void MipsTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2515 unsigned &NumAliases) const {
2516 Aliases = GCCRegAliases;
2517 NumAliases = llvm::array_lengthof(GCCRegAliases);
2519 } // end anonymous namespace.
2521 namespace {
2522 class MipselTargetInfo : public MipsTargetInfo {
2523 public:
2524 MipselTargetInfo(const std::string& triple) : MipsTargetInfo(triple) {
2525 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2526 "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32";
2529 virtual void getTargetDefines(const LangOptions &Opts,
2530 MacroBuilder &Builder) const;
2533 void MipselTargetInfo::getTargetDefines(const LangOptions &Opts,
2534 MacroBuilder &Builder) const {
2535 DefineStd(Builder, "mips", Opts);
2536 Builder.defineMacro("_mips");
2537 DefineStd(Builder, "MIPSEL", Opts);
2538 Builder.defineMacro("_MIPSEL");
2539 Builder.defineMacro("__REGISTER_PREFIX__", "");
2540 getArchDefines(Opts, Builder);
2542 } // end anonymous namespace.
2544 //===----------------------------------------------------------------------===//
2545 // Driver code
2546 //===----------------------------------------------------------------------===//
2548 static TargetInfo *AllocateTarget(const std::string &T) {
2549 llvm::Triple Triple(T);
2550 llvm::Triple::OSType os = Triple.getOS();
2552 switch (Triple.getArch()) {
2553 default:
2554 return NULL;
2556 case llvm::Triple::arm:
2557 case llvm::Triple::thumb:
2558 switch (os) {
2559 case llvm::Triple::Linux:
2560 return new LinuxTargetInfo<ARMTargetInfo>(T);
2561 case llvm::Triple::Darwin:
2562 return new DarwinARMTargetInfo(T);
2563 case llvm::Triple::FreeBSD:
2564 return new FreeBSDTargetInfo<ARMTargetInfo>(T);
2565 default:
2566 return new ARMTargetInfo(T);
2569 case llvm::Triple::bfin:
2570 return new BlackfinTargetInfo(T);
2572 case llvm::Triple::msp430:
2573 return new MSP430TargetInfo(T);
2575 case llvm::Triple::mips:
2576 if (os == llvm::Triple::Psp)
2577 return new PSPTargetInfo<MipsTargetInfo>(T);
2578 if (os == llvm::Triple::Linux)
2579 return new LinuxTargetInfo<MipsTargetInfo>(T);
2580 return new MipsTargetInfo(T);
2582 case llvm::Triple::mipsel:
2583 if (os == llvm::Triple::Psp)
2584 return new PSPTargetInfo<MipselTargetInfo>(T);
2585 if (os == llvm::Triple::Linux)
2586 return new LinuxTargetInfo<MipselTargetInfo>(T);
2587 return new MipselTargetInfo(T);
2589 case llvm::Triple::ppc:
2590 if (os == llvm::Triple::Darwin)
2591 return new DarwinPPC32TargetInfo(T);
2592 else if (os == llvm::Triple::FreeBSD)
2593 return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
2594 return new PPC32TargetInfo(T);
2596 case llvm::Triple::ppc64:
2597 if (os == llvm::Triple::Darwin)
2598 return new DarwinPPC64TargetInfo(T);
2599 else if (os == llvm::Triple::Lv2)
2600 return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
2601 else if (os == llvm::Triple::FreeBSD)
2602 return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
2603 return new PPC64TargetInfo(T);
2605 case llvm::Triple::mblaze:
2606 return new MBlazeTargetInfo(T);
2608 case llvm::Triple::sparc:
2609 if (os == llvm::Triple::AuroraUX)
2610 return new AuroraUXSparcV8TargetInfo(T);
2611 if (os == llvm::Triple::Solaris)
2612 return new SolarisSparcV8TargetInfo(T);
2613 return new SparcV8TargetInfo(T);
2615 // FIXME: Need a real SPU target.
2616 case llvm::Triple::cellspu:
2617 return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
2619 case llvm::Triple::systemz:
2620 return new SystemZTargetInfo(T);
2622 case llvm::Triple::tce:
2623 return new TCETargetInfo(T);
2625 case llvm::Triple::x86:
2626 switch (os) {
2627 case llvm::Triple::AuroraUX:
2628 return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
2629 case llvm::Triple::Darwin:
2630 return new DarwinI386TargetInfo(T);
2631 case llvm::Triple::Linux:
2632 return new LinuxTargetInfo<X86_32TargetInfo>(T);
2633 case llvm::Triple::DragonFly:
2634 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
2635 case llvm::Triple::NetBSD:
2636 return new NetBSDTargetInfo<X86_32TargetInfo>(T);
2637 case llvm::Triple::OpenBSD:
2638 return new OpenBSDI386TargetInfo(T);
2639 case llvm::Triple::FreeBSD:
2640 return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
2641 case llvm::Triple::Minix:
2642 return new MinixTargetInfo<X86_32TargetInfo>(T);
2643 case llvm::Triple::Solaris:
2644 return new SolarisTargetInfo<X86_32TargetInfo>(T);
2645 case llvm::Triple::Cygwin:
2646 return new CygwinX86_32TargetInfo(T);
2647 case llvm::Triple::MinGW32:
2648 return new MinGWX86_32TargetInfo(T);
2649 case llvm::Triple::Win32:
2650 return new VisualStudioWindowsX86_32TargetInfo(T);
2651 case llvm::Triple::Haiku:
2652 return new HaikuX86_32TargetInfo(T);
2653 default:
2654 return new X86_32TargetInfo(T);
2657 case llvm::Triple::x86_64:
2658 switch (os) {
2659 case llvm::Triple::AuroraUX:
2660 return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
2661 case llvm::Triple::Darwin:
2662 return new DarwinX86_64TargetInfo(T);
2663 case llvm::Triple::Linux:
2664 return new LinuxTargetInfo<X86_64TargetInfo>(T);
2665 case llvm::Triple::DragonFly:
2666 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
2667 case llvm::Triple::NetBSD:
2668 return new NetBSDTargetInfo<X86_64TargetInfo>(T);
2669 case llvm::Triple::OpenBSD:
2670 return new OpenBSDX86_64TargetInfo(T);
2671 case llvm::Triple::FreeBSD:
2672 return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
2673 case llvm::Triple::Solaris:
2674 return new SolarisTargetInfo<X86_64TargetInfo>(T);
2675 case llvm::Triple::MinGW64:
2676 return new MinGWX86_64TargetInfo(T);
2677 case llvm::Triple::Win32: // This is what Triple.h supports now.
2678 if (Triple.getEnvironment() == llvm::Triple::MachO)
2679 return new DarwinX86_64TargetInfo(T);
2680 else
2681 return new VisualStudioWindowsX86_64TargetInfo(T);
2682 default:
2683 return new X86_64TargetInfo(T);
2688 /// CreateTargetInfo - Return the target info object for the specified target
2689 /// triple.
2690 TargetInfo *TargetInfo::CreateTargetInfo(Diagnostic &Diags,
2691 TargetOptions &Opts) {
2692 llvm::Triple Triple(Opts.Triple);
2694 // Construct the target
2695 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
2696 if (!Target) {
2697 Diags.Report(diag::err_target_unknown_triple) << Triple.str();
2698 return 0;
2701 // Set the target CPU if specified.
2702 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
2703 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
2704 return 0;
2707 // Set the target ABI if specified.
2708 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
2709 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
2710 return 0;
2713 // Set the target C++ ABI.
2714 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
2715 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
2716 return 0;
2719 // Compute the default target features, we need the target to handle this
2720 // because features may have dependencies on one another.
2721 llvm::StringMap<bool> Features;
2722 Target->getDefaultFeatures(Opts.CPU, Features);
2724 // Apply the user specified deltas.
2725 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
2726 ie = Opts.Features.end(); it != ie; ++it) {
2727 const char *Name = it->c_str();
2729 // Apply the feature via the target.
2730 if ((Name[0] != '-' && Name[0] != '+') ||
2731 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) {
2732 Diags.Report(diag::err_target_invalid_feature) << Name;
2733 return 0;
2737 // Add the features to the compile options.
2739 // FIXME: If we are completely confident that we have the right set, we only
2740 // need to pass the minuses.
2741 Opts.Features.clear();
2742 for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
2743 ie = Features.end(); it != ie; ++it)
2744 Opts.Features.push_back(std::string(it->second ? "+" : "-") + it->first());
2745 Target->HandleTargetFeatures(Opts.Features);
2747 return Target.take();