[Heikki Kultala] This patch contains the ABI changes for the TCE target.
[clang.git] / lib / Basic / Targets.cpp
bloba8198e4ae79e288207cc8e73bcc96da7e8345793
1 //===--- Targets.cpp - Implement -arch option and targets -----------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements construction of a TargetInfo object from a
11 // target triple.
13 //===----------------------------------------------------------------------===//
15 #include "clang/Basic/TargetInfo.h"
16 #include "clang/Basic/Builtins.h"
17 #include "clang/Basic/Diagnostic.h"
18 #include "clang/Basic/LangOptions.h"
19 #include "clang/Basic/MacroBuilder.h"
20 #include "clang/Basic/TargetBuiltins.h"
21 #include "clang/Basic/TargetOptions.h"
22 #include "llvm/ADT/APFloat.h"
23 #include "llvm/ADT/OwningPtr.h"
24 #include "llvm/ADT/STLExtras.h"
25 #include "llvm/ADT/StringRef.h"
26 #include "llvm/ADT/StringSwitch.h"
27 #include "llvm/ADT/Triple.h"
28 #include "llvm/MC/MCSectionMachO.h"
29 #include "llvm/Type.h"
30 #include <algorithm>
31 using namespace clang;
33 //===----------------------------------------------------------------------===//
34 // Common code shared among targets.
35 //===----------------------------------------------------------------------===//
37 /// DefineStd - Define a macro name and standard variants. For example if
38 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
39 /// when in GNU mode.
40 static void DefineStd(MacroBuilder &Builder, llvm::StringRef MacroName,
41 const LangOptions &Opts) {
42 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
44 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
45 // in the user's namespace.
46 if (Opts.GNUMode)
47 Builder.defineMacro(MacroName);
49 // Define __unix.
50 Builder.defineMacro("__" + MacroName);
52 // Define __unix__.
53 Builder.defineMacro("__" + MacroName + "__");
56 //===----------------------------------------------------------------------===//
57 // Defines specific to certain operating systems.
58 //===----------------------------------------------------------------------===//
60 namespace {
61 template<typename TgtInfo>
62 class OSTargetInfo : public TgtInfo {
63 protected:
64 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
65 MacroBuilder &Builder) const=0;
66 public:
67 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
68 virtual void getTargetDefines(const LangOptions &Opts,
69 MacroBuilder &Builder) const {
70 TgtInfo::getTargetDefines(Opts, Builder);
71 getOSDefines(Opts, TgtInfo::getTriple(), Builder);
75 } // end anonymous namespace
78 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
79 const llvm::Triple &Triple) {
80 Builder.defineMacro("__APPLE_CC__", "5621");
81 Builder.defineMacro("__APPLE__");
82 Builder.defineMacro("__MACH__");
83 Builder.defineMacro("OBJC_NEW_PROPERTIES");
85 // __weak is always defined, for use in blocks and with objc pointers.
86 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
88 // Darwin defines __strong even in C mode (just to nothing).
89 if (!Opts.ObjC1 || Opts.getGCMode() == LangOptions::NonGC)
90 Builder.defineMacro("__strong", "");
91 else
92 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
94 if (Opts.Static)
95 Builder.defineMacro("__STATIC__");
96 else
97 Builder.defineMacro("__DYNAMIC__");
99 if (Opts.POSIXThreads)
100 Builder.defineMacro("_REENTRANT");
102 // Get the OS version number from the triple.
103 unsigned Maj, Min, Rev;
105 // If no version was given, default to to 10.4.0, for simplifying tests.
106 if (Triple.getOSName() == "darwin") {
107 Min = Rev = 0;
108 Maj = 8;
109 } else
110 Triple.getDarwinNumber(Maj, Min, Rev);
112 // Set the appropriate OS version define.
113 if (Triple.getEnvironmentName() == "iphoneos") {
114 assert(Maj < 10 && Min < 99 && Rev < 99 && "Invalid version!");
115 char Str[6];
116 Str[0] = '0' + Maj;
117 Str[1] = '0' + (Min / 10);
118 Str[2] = '0' + (Min % 10);
119 Str[3] = '0' + (Rev / 10);
120 Str[4] = '0' + (Rev % 10);
121 Str[5] = '\0';
122 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
123 } else {
124 // For historical reasons that make little sense, the version passed here is
125 // the "darwin" version, which drops the 10 and offsets by 4.
126 Rev = Min;
127 Min = Maj - 4;
128 Maj = 10;
130 assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
131 assert(Maj < 99 && Min < 10 && Rev < 10 && "Invalid version!");
132 char Str[5];
133 Str[0] = '0' + (Maj / 10);
134 Str[1] = '0' + (Maj % 10);
135 Str[2] = '0' + Min;
136 Str[3] = '0' + Rev;
137 Str[4] = '\0';
138 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
142 namespace {
143 template<typename Target>
144 class DarwinTargetInfo : public OSTargetInfo<Target> {
145 protected:
146 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
147 MacroBuilder &Builder) const {
148 getDarwinDefines(Builder, Opts, Triple);
151 public:
152 DarwinTargetInfo(const std::string& triple) :
153 OSTargetInfo<Target>(triple) {
154 this->TLSSupported = llvm::Triple(triple).getDarwinMajorNumber() > 10;
157 virtual std::string isValidSectionSpecifier(llvm::StringRef SR) const {
158 // Let MCSectionMachO validate this.
159 llvm::StringRef Segment, Section;
160 unsigned TAA, StubSize;
161 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
162 TAA, StubSize);
165 virtual const char *getStaticInitSectionSpecifier() const {
166 // FIXME: We should return 0 when building kexts.
167 return "__TEXT,__StaticInit,regular,pure_instructions";
173 // DragonFlyBSD Target
174 template<typename Target>
175 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
176 protected:
177 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
178 MacroBuilder &Builder) const {
179 // DragonFly defines; list based off of gcc output
180 Builder.defineMacro("__DragonFly__");
181 Builder.defineMacro("__DragonFly_cc_version", "100001");
182 Builder.defineMacro("__ELF__");
183 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
184 Builder.defineMacro("__tune_i386__");
185 DefineStd(Builder, "unix", Opts);
187 public:
188 DragonFlyBSDTargetInfo(const std::string &triple)
189 : OSTargetInfo<Target>(triple) {}
192 // FreeBSD Target
193 template<typename Target>
194 class FreeBSDTargetInfo : public OSTargetInfo<Target> {
195 protected:
196 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
197 MacroBuilder &Builder) const {
198 // FreeBSD defines; list based off of gcc output
200 // FIXME: Move version number handling to llvm::Triple.
201 llvm::StringRef Release = Triple.getOSName().substr(strlen("freebsd"), 1);
203 Builder.defineMacro("__FreeBSD__", Release);
204 Builder.defineMacro("__FreeBSD_cc_version", Release + "00001");
205 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
206 DefineStd(Builder, "unix", Opts);
207 Builder.defineMacro("__ELF__");
209 public:
210 FreeBSDTargetInfo(const std::string &triple)
211 : OSTargetInfo<Target>(triple) {
212 this->UserLabelPrefix = "";
214 llvm::Triple Triple(triple);
215 switch (Triple.getArch()) {
216 default:
217 case llvm::Triple::x86:
218 case llvm::Triple::x86_64:
219 this->MCountName = ".mcount";
220 break;
221 case llvm::Triple::mips:
222 case llvm::Triple::mipsel:
223 case llvm::Triple::ppc:
224 case llvm::Triple::ppc64:
225 this->MCountName = "_mcount";
226 break;
227 case llvm::Triple::arm:
228 this->MCountName = "__mcount";
229 break;
235 // Minix Target
236 template<typename Target>
237 class MinixTargetInfo : public OSTargetInfo<Target> {
238 protected:
239 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
240 MacroBuilder &Builder) const {
241 // Minix defines
243 Builder.defineMacro("__minix", "3");
244 Builder.defineMacro("_EM_WSIZE", "4");
245 Builder.defineMacro("_EM_PSIZE", "4");
246 Builder.defineMacro("_EM_SSIZE", "2");
247 Builder.defineMacro("_EM_LSIZE", "4");
248 Builder.defineMacro("_EM_FSIZE", "4");
249 Builder.defineMacro("_EM_DSIZE", "8");
250 DefineStd(Builder, "unix", Opts);
252 public:
253 MinixTargetInfo(const std::string &triple)
254 : OSTargetInfo<Target>(triple) {
255 this->UserLabelPrefix = "";
259 // Linux target
260 template<typename Target>
261 class LinuxTargetInfo : public OSTargetInfo<Target> {
262 protected:
263 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
264 MacroBuilder &Builder) const {
265 // Linux defines; list based off of gcc output
266 DefineStd(Builder, "unix", Opts);
267 DefineStd(Builder, "linux", Opts);
268 Builder.defineMacro("__gnu_linux__");
269 Builder.defineMacro("__ELF__");
270 if (Opts.POSIXThreads)
271 Builder.defineMacro("_REENTRANT");
272 if (Opts.CPlusPlus)
273 Builder.defineMacro("_GNU_SOURCE");
275 public:
276 LinuxTargetInfo(const std::string& triple)
277 : OSTargetInfo<Target>(triple) {
278 this->UserLabelPrefix = "";
279 this->WIntType = TargetInfo::UnsignedInt;
283 // NetBSD Target
284 template<typename Target>
285 class NetBSDTargetInfo : public OSTargetInfo<Target> {
286 protected:
287 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
288 MacroBuilder &Builder) const {
289 // NetBSD defines; list based off of gcc output
290 Builder.defineMacro("__NetBSD__");
291 Builder.defineMacro("__unix__");
292 Builder.defineMacro("__ELF__");
293 if (Opts.POSIXThreads)
294 Builder.defineMacro("_POSIX_THREADS");
296 public:
297 NetBSDTargetInfo(const std::string &triple)
298 : OSTargetInfo<Target>(triple) {
299 this->UserLabelPrefix = "";
303 // OpenBSD Target
304 template<typename Target>
305 class OpenBSDTargetInfo : public OSTargetInfo<Target> {
306 protected:
307 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
308 MacroBuilder &Builder) const {
309 // OpenBSD defines; list based off of gcc output
311 Builder.defineMacro("__OpenBSD__");
312 DefineStd(Builder, "unix", Opts);
313 Builder.defineMacro("__ELF__");
314 if (Opts.POSIXThreads)
315 Builder.defineMacro("_POSIX_THREADS");
317 public:
318 OpenBSDTargetInfo(const std::string &triple)
319 : OSTargetInfo<Target>(triple) {}
322 // PSP Target
323 template<typename Target>
324 class PSPTargetInfo : public OSTargetInfo<Target> {
325 protected:
326 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
327 MacroBuilder &Builder) const {
328 // PSP defines; list based on the output of the pspdev gcc toolchain.
329 Builder.defineMacro("PSP");
330 Builder.defineMacro("_PSP");
331 Builder.defineMacro("__psp__");
332 Builder.defineMacro("__ELF__");
334 public:
335 PSPTargetInfo(const std::string& triple)
336 : OSTargetInfo<Target>(triple) {
337 this->UserLabelPrefix = "";
341 // PS3 PPU Target
342 template<typename Target>
343 class PS3PPUTargetInfo : public OSTargetInfo<Target> {
344 protected:
345 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
346 MacroBuilder &Builder) const {
347 // PS3 PPU defines.
348 Builder.defineMacro("__PPC__");
349 Builder.defineMacro("__PPU__");
350 Builder.defineMacro("__CELLOS_LV2__");
351 Builder.defineMacro("__ELF__");
352 Builder.defineMacro("__LP32__");
353 Builder.defineMacro("_ARCH_PPC64");
354 Builder.defineMacro("__powerpc64__");
356 public:
357 PS3PPUTargetInfo(const std::string& triple)
358 : OSTargetInfo<Target>(triple) {
359 this->UserLabelPrefix = "";
360 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32;
361 this->IntMaxType = TargetInfo::SignedLongLong;
362 this->UIntMaxType = TargetInfo::UnsignedLongLong;
363 this->Int64Type = TargetInfo::SignedLongLong;
364 this->SizeType = TargetInfo::UnsignedInt;
365 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
366 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
370 // FIXME: Need a real SPU target.
371 // PS3 SPU Target
372 template<typename Target>
373 class PS3SPUTargetInfo : public OSTargetInfo<Target> {
374 protected:
375 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
376 MacroBuilder &Builder) const {
377 // PS3 PPU defines.
378 Builder.defineMacro("__SPU__");
379 Builder.defineMacro("__ELF__");
381 public:
382 PS3SPUTargetInfo(const std::string& triple)
383 : OSTargetInfo<Target>(triple) {
384 this->UserLabelPrefix = "";
388 // AuroraUX target
389 template<typename Target>
390 class AuroraUXTargetInfo : public OSTargetInfo<Target> {
391 protected:
392 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
393 MacroBuilder &Builder) const {
394 DefineStd(Builder, "sun", Opts);
395 DefineStd(Builder, "unix", Opts);
396 Builder.defineMacro("__ELF__");
397 Builder.defineMacro("__svr4__");
398 Builder.defineMacro("__SVR4");
400 public:
401 AuroraUXTargetInfo(const std::string& triple)
402 : OSTargetInfo<Target>(triple) {
403 this->UserLabelPrefix = "";
404 this->WCharType = this->SignedLong;
405 // FIXME: WIntType should be SignedLong
409 // Solaris target
410 template<typename Target>
411 class SolarisTargetInfo : public OSTargetInfo<Target> {
412 protected:
413 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
414 MacroBuilder &Builder) const {
415 DefineStd(Builder, "sun", Opts);
416 DefineStd(Builder, "unix", Opts);
417 Builder.defineMacro("__ELF__");
418 Builder.defineMacro("__svr4__");
419 Builder.defineMacro("__SVR4");
421 public:
422 SolarisTargetInfo(const std::string& triple)
423 : OSTargetInfo<Target>(triple) {
424 this->UserLabelPrefix = "";
425 this->WCharType = this->SignedLong;
426 // FIXME: WIntType should be SignedLong
430 // Windows target
431 template<typename Target>
432 class WindowsTargetInfo : public OSTargetInfo<Target> {
433 protected:
434 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
435 MacroBuilder &Builder) const {
436 Builder.defineMacro("_WIN32");
438 void getVisualStudioDefines(const LangOptions &Opts,
439 MacroBuilder &Builder) const {
440 if (Opts.CPlusPlus) {
441 if (Opts.RTTI)
442 Builder.defineMacro("_CPPRTTI");
444 if (Opts.Exceptions)
445 Builder.defineMacro("_CPPUNWIND");
448 if (!Opts.CharIsSigned)
449 Builder.defineMacro("_CHAR_UNSIGNED");
451 // FIXME: POSIXThreads isn't exactly the option this should be defined for,
452 // but it works for now.
453 if (Opts.POSIXThreads)
454 Builder.defineMacro("_MT");
456 if (Opts.MSCVersion != 0)
457 Builder.defineMacro("_MSC_VER", llvm::Twine(Opts.MSCVersion));
459 if (Opts.Microsoft) {
460 Builder.defineMacro("_MSC_EXTENSIONS");
462 if (Opts.CPlusPlus0x) {
463 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
464 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
465 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
469 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
472 public:
473 WindowsTargetInfo(const std::string &triple)
474 : OSTargetInfo<Target>(triple) {}
477 } // end anonymous namespace.
479 //===----------------------------------------------------------------------===//
480 // Specific target implementations.
481 //===----------------------------------------------------------------------===//
483 namespace {
484 // PPC abstract base class
485 class PPCTargetInfo : public TargetInfo {
486 static const Builtin::Info BuiltinInfo[];
487 static const char * const GCCRegNames[];
488 static const TargetInfo::GCCRegAlias GCCRegAliases[];
490 public:
491 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
493 virtual void getTargetBuiltins(const Builtin::Info *&Records,
494 unsigned &NumRecords) const {
495 Records = BuiltinInfo;
496 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
499 virtual void getTargetDefines(const LangOptions &Opts,
500 MacroBuilder &Builder) const;
502 virtual void getGCCRegNames(const char * const *&Names,
503 unsigned &NumNames) const;
504 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
505 unsigned &NumAliases) const;
506 virtual bool validateAsmConstraint(const char *&Name,
507 TargetInfo::ConstraintInfo &Info) const {
508 switch (*Name) {
509 default: return false;
510 case 'O': // Zero
511 break;
512 case 'b': // Base register
513 case 'f': // Floating point register
514 Info.setAllowsRegister();
515 break;
516 // FIXME: The following are added to allow parsing.
517 // I just took a guess at what the actions should be.
518 // Also, is more specific checking needed? I.e. specific registers?
519 case 'd': // Floating point register (containing 64-bit value)
520 case 'v': // Altivec vector register
521 Info.setAllowsRegister();
522 break;
523 case 'w':
524 switch (Name[1]) {
525 case 'd':// VSX vector register to hold vector double data
526 case 'f':// VSX vector register to hold vector float data
527 case 's':// VSX vector register to hold scalar float data
528 case 'a':// Any VSX register
529 break;
530 default:
531 return false;
533 Info.setAllowsRegister();
534 Name++; // Skip over 'w'.
535 break;
536 case 'h': // `MQ', `CTR', or `LINK' register
537 case 'q': // `MQ' register
538 case 'c': // `CTR' register
539 case 'l': // `LINK' register
540 case 'x': // `CR' register (condition register) number 0
541 case 'y': // `CR' register (condition register)
542 case 'z': // `XER[CA]' carry bit (part of the XER register)
543 Info.setAllowsRegister();
544 break;
545 case 'I': // Signed 16-bit constant
546 case 'J': // Unsigned 16-bit constant shifted left 16 bits
547 // (use `L' instead for SImode constants)
548 case 'K': // Unsigned 16-bit constant
549 case 'L': // Signed 16-bit constant shifted left 16 bits
550 case 'M': // Constant larger than 31
551 case 'N': // Exact power of 2
552 case 'P': // Constant whose negation is a signed 16-bit constant
553 case 'G': // Floating point constant that can be loaded into a
554 // register with one instruction per word
555 case 'H': // Integer/Floating point constant that can be loaded
556 // into a register using three instructions
557 break;
558 case 'm': // Memory operand. Note that on PowerPC targets, m can
559 // include addresses that update the base register. It
560 // is therefore only safe to use `m' in an asm statement
561 // if that asm statement accesses the operand exactly once.
562 // The asm statement must also use `%U<opno>' as a
563 // placeholder for the "update" flag in the corresponding
564 // load or store instruction. For example:
565 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
566 // is correct but:
567 // asm ("st %1,%0" : "=m" (mem) : "r" (val));
568 // is not. Use es rather than m if you don't want the base
569 // register to be updated.
570 case 'e':
571 if (Name[1] != 's')
572 return false;
573 // es: A "stable" memory operand; that is, one which does not
574 // include any automodification of the base register. Unlike
575 // `m', this constraint can be used in asm statements that
576 // might access the operand several times, or that might not
577 // access it at all.
578 Info.setAllowsMemory();
579 Name++; // Skip over 'e'.
580 break;
581 case 'Q': // Memory operand that is an offset from a register (it is
582 // usually better to use `m' or `es' in asm statements)
583 case 'Z': // Memory operand that is an indexed or indirect from a
584 // register (it is usually better to use `m' or `es' in
585 // asm statements)
586 Info.setAllowsMemory();
587 Info.setAllowsRegister();
588 break;
589 case 'R': // AIX TOC entry
590 case 'a': // Address operand that is an indexed or indirect from a
591 // register (`p' is preferable for asm statements)
592 case 'S': // Constant suitable as a 64-bit mask operand
593 case 'T': // Constant suitable as a 32-bit mask operand
594 case 'U': // System V Release 4 small data area reference
595 case 't': // AND masks that can be performed by two rldic{l, r}
596 // instructions
597 case 'W': // Vector constant that does not require memory
598 case 'j': // Vector constant that is all zeros.
599 break;
600 // End FIXME.
602 return true;
604 virtual const char *getClobbers() const {
605 return "";
609 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
610 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false },
611 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
612 ALL_LANGUAGES, false },
613 #include "clang/Basic/BuiltinsPPC.def"
617 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
618 /// #defines that are not tied to a specific subtarget.
619 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
620 MacroBuilder &Builder) const {
621 // Target identification.
622 Builder.defineMacro("__ppc__");
623 Builder.defineMacro("_ARCH_PPC");
624 Builder.defineMacro("__powerpc__");
625 Builder.defineMacro("__POWERPC__");
626 if (PointerWidth == 64) {
627 Builder.defineMacro("_ARCH_PPC64");
628 Builder.defineMacro("_LP64");
629 Builder.defineMacro("__LP64__");
630 Builder.defineMacro("__powerpc64__");
631 Builder.defineMacro("__ppc64__");
632 } else {
633 Builder.defineMacro("__ppc__");
636 // Target properties.
637 Builder.defineMacro("_BIG_ENDIAN");
638 Builder.defineMacro("__BIG_ENDIAN__");
640 // Subtarget options.
641 Builder.defineMacro("__NATURAL_ALIGNMENT__");
642 Builder.defineMacro("__REGISTER_PREFIX__", "");
644 // FIXME: Should be controlled by command line option.
645 Builder.defineMacro("__LONG_DOUBLE_128__");
647 if (Opts.AltiVec) {
648 Builder.defineMacro("__VEC__", "10206");
649 Builder.defineMacro("__ALTIVEC__");
654 const char * const PPCTargetInfo::GCCRegNames[] = {
655 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
656 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
657 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
658 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
659 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
660 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
661 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
662 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
663 "mq", "lr", "ctr", "ap",
664 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
665 "xer",
666 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
667 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
668 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
669 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
670 "vrsave", "vscr",
671 "spe_acc", "spefscr",
672 "sfp"
675 void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
676 unsigned &NumNames) const {
677 Names = GCCRegNames;
678 NumNames = llvm::array_lengthof(GCCRegNames);
681 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
682 // While some of these aliases do map to different registers
683 // they still share the same register name.
684 { { "0" }, "r0" },
685 { { "1"}, "r1" },
686 { { "2" }, "r2" },
687 { { "3" }, "r3" },
688 { { "4" }, "r4" },
689 { { "5" }, "r5" },
690 { { "6" }, "r6" },
691 { { "7" }, "r7" },
692 { { "8" }, "r8" },
693 { { "9" }, "r9" },
694 { { "10" }, "r10" },
695 { { "11" }, "r11" },
696 { { "12" }, "r12" },
697 { { "13" }, "r13" },
698 { { "14" }, "r14" },
699 { { "15" }, "r15" },
700 { { "16" }, "r16" },
701 { { "17" }, "r17" },
702 { { "18" }, "r18" },
703 { { "19" }, "r19" },
704 { { "20" }, "r20" },
705 { { "21" }, "r21" },
706 { { "22" }, "r22" },
707 { { "23" }, "r23" },
708 { { "24" }, "r24" },
709 { { "25" }, "r25" },
710 { { "26" }, "r26" },
711 { { "27" }, "r27" },
712 { { "28" }, "r28" },
713 { { "29" }, "r29" },
714 { { "30" }, "r30" },
715 { { "31" }, "r31" },
716 { { "fr0" }, "f0" },
717 { { "fr1" }, "f1" },
718 { { "fr2" }, "f2" },
719 { { "fr3" }, "f3" },
720 { { "fr4" }, "f4" },
721 { { "fr5" }, "f5" },
722 { { "fr6" }, "f6" },
723 { { "fr7" }, "f7" },
724 { { "fr8" }, "f8" },
725 { { "fr9" }, "f9" },
726 { { "fr10" }, "f10" },
727 { { "fr11" }, "f11" },
728 { { "fr12" }, "f12" },
729 { { "fr13" }, "f13" },
730 { { "fr14" }, "f14" },
731 { { "fr15" }, "f15" },
732 { { "fr16" }, "f16" },
733 { { "fr17" }, "f17" },
734 { { "fr18" }, "f18" },
735 { { "fr19" }, "f19" },
736 { { "fr20" }, "f20" },
737 { { "fr21" }, "f21" },
738 { { "fr22" }, "f22" },
739 { { "fr23" }, "f23" },
740 { { "fr24" }, "f24" },
741 { { "fr25" }, "f25" },
742 { { "fr26" }, "f26" },
743 { { "fr27" }, "f27" },
744 { { "fr28" }, "f28" },
745 { { "fr29" }, "f29" },
746 { { "fr30" }, "f30" },
747 { { "fr31" }, "f31" },
748 { { "cc" }, "cr0" },
751 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
752 unsigned &NumAliases) const {
753 Aliases = GCCRegAliases;
754 NumAliases = llvm::array_lengthof(GCCRegAliases);
756 } // end anonymous namespace.
758 namespace {
759 class PPC32TargetInfo : public PPCTargetInfo {
760 public:
761 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
762 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
763 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
765 if (getTriple().getOS() == llvm::Triple::FreeBSD)
766 SizeType = UnsignedInt;
769 virtual const char *getVAListDeclaration() const {
770 // This is the ELF definition, and is overridden by the Darwin sub-target
771 return "typedef struct __va_list_tag {"
772 " unsigned char gpr;"
773 " unsigned char fpr;"
774 " unsigned short reserved;"
775 " void* overflow_arg_area;"
776 " void* reg_save_area;"
777 "} __builtin_va_list[1];";
780 } // end anonymous namespace.
782 namespace {
783 class PPC64TargetInfo : public PPCTargetInfo {
784 public:
785 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
786 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
787 IntMaxType = SignedLong;
788 UIntMaxType = UnsignedLong;
789 Int64Type = SignedLong;
790 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
791 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
793 virtual const char *getVAListDeclaration() const {
794 return "typedef char* __builtin_va_list;";
797 } // end anonymous namespace.
800 namespace {
801 class DarwinPPC32TargetInfo :
802 public DarwinTargetInfo<PPC32TargetInfo> {
803 public:
804 DarwinPPC32TargetInfo(const std::string& triple)
805 : DarwinTargetInfo<PPC32TargetInfo>(triple) {
806 HasAlignMac68kSupport = true;
807 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
809 virtual const char *getVAListDeclaration() const {
810 return "typedef char* __builtin_va_list;";
814 class DarwinPPC64TargetInfo :
815 public DarwinTargetInfo<PPC64TargetInfo> {
816 public:
817 DarwinPPC64TargetInfo(const std::string& triple)
818 : DarwinTargetInfo<PPC64TargetInfo>(triple) {
819 HasAlignMac68kSupport = true;
822 } // end anonymous namespace.
824 namespace {
825 // MBlaze abstract base class
826 class MBlazeTargetInfo : public TargetInfo {
827 static const char * const GCCRegNames[];
828 static const TargetInfo::GCCRegAlias GCCRegAliases[];
830 public:
831 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
832 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
835 virtual void getTargetBuiltins(const Builtin::Info *&Records,
836 unsigned &NumRecords) const {
837 // FIXME: Implement.
838 Records = 0;
839 NumRecords = 0;
842 virtual void getTargetDefines(const LangOptions &Opts,
843 MacroBuilder &Builder) const;
845 virtual const char *getVAListDeclaration() const {
846 return "typedef char* __builtin_va_list;";
848 virtual const char *getTargetPrefix() const {
849 return "mblaze";
851 virtual void getGCCRegNames(const char * const *&Names,
852 unsigned &NumNames) const;
853 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
854 unsigned &NumAliases) const;
855 virtual bool validateAsmConstraint(const char *&Name,
856 TargetInfo::ConstraintInfo &Info) const {
857 switch (*Name) {
858 default: return false;
859 case 'O': // Zero
860 return true;
861 case 'b': // Base register
862 case 'f': // Floating point register
863 Info.setAllowsRegister();
864 return true;
867 virtual const char *getClobbers() const {
868 return "";
872 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
873 /// #defines that are not tied to a specific subtarget.
874 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
875 MacroBuilder &Builder) const {
876 // Target identification.
877 Builder.defineMacro("__microblaze__");
878 Builder.defineMacro("_ARCH_MICROBLAZE");
879 Builder.defineMacro("__MICROBLAZE__");
881 // Target properties.
882 Builder.defineMacro("_BIG_ENDIAN");
883 Builder.defineMacro("__BIG_ENDIAN__");
885 // Subtarget options.
886 Builder.defineMacro("__REGISTER_PREFIX__", "");
890 const char * const MBlazeTargetInfo::GCCRegNames[] = {
891 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
892 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
893 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
894 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
895 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
896 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
897 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
898 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
899 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
900 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp"
903 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
904 unsigned &NumNames) const {
905 Names = GCCRegNames;
906 NumNames = llvm::array_lengthof(GCCRegNames);
909 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
910 { {"f0"}, "r0" },
911 { {"f1"}, "r1" },
912 { {"f2"}, "r2" },
913 { {"f3"}, "r3" },
914 { {"f4"}, "r4" },
915 { {"f5"}, "r5" },
916 { {"f6"}, "r6" },
917 { {"f7"}, "r7" },
918 { {"f8"}, "r8" },
919 { {"f9"}, "r9" },
920 { {"f10"}, "r10" },
921 { {"f11"}, "r11" },
922 { {"f12"}, "r12" },
923 { {"f13"}, "r13" },
924 { {"f14"}, "r14" },
925 { {"f15"}, "r15" },
926 { {"f16"}, "r16" },
927 { {"f17"}, "r17" },
928 { {"f18"}, "r18" },
929 { {"f19"}, "r19" },
930 { {"f20"}, "r20" },
931 { {"f21"}, "r21" },
932 { {"f22"}, "r22" },
933 { {"f23"}, "r23" },
934 { {"f24"}, "r24" },
935 { {"f25"}, "r25" },
936 { {"f26"}, "r26" },
937 { {"f27"}, "r27" },
938 { {"f28"}, "r28" },
939 { {"f29"}, "r29" },
940 { {"f30"}, "r30" },
941 { {"f31"}, "r31" },
944 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
945 unsigned &NumAliases) const {
946 Aliases = GCCRegAliases;
947 NumAliases = llvm::array_lengthof(GCCRegAliases);
949 } // end anonymous namespace.
951 namespace {
952 // Namespace for x86 abstract base class
953 const Builtin::Info BuiltinInfo[] = {
954 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false },
955 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
956 ALL_LANGUAGES, false },
957 #include "clang/Basic/BuiltinsX86.def"
960 static const char* const GCCRegNames[] = {
961 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
962 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
963 "argp", "flags", "fspr", "dirflag", "frame",
964 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
965 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
966 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
967 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"
970 const TargetInfo::GCCRegAlias GCCRegAliases[] = {
971 { { "al", "ah", "eax", "rax" }, "ax" },
972 { { "bl", "bh", "ebx", "rbx" }, "bx" },
973 { { "cl", "ch", "ecx", "rcx" }, "cx" },
974 { { "dl", "dh", "edx", "rdx" }, "dx" },
975 { { "esi", "rsi" }, "si" },
976 { { "edi", "rdi" }, "di" },
977 { { "esp", "rsp" }, "sp" },
978 { { "ebp", "rbp" }, "bp" },
981 // X86 target abstract base class; x86-32 and x86-64 are very close, so
982 // most of the implementation can be shared.
983 class X86TargetInfo : public TargetInfo {
984 enum X86SSEEnum {
985 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
986 } SSELevel;
987 enum AMD3DNowEnum {
988 NoAMD3DNow, AMD3DNow, AMD3DNowAthlon
989 } AMD3DNowLevel;
991 bool HasAES;
992 bool HasAVX;
994 public:
995 X86TargetInfo(const std::string& triple)
996 : TargetInfo(triple), SSELevel(NoMMXSSE), AMD3DNowLevel(NoAMD3DNow),
997 HasAES(false), HasAVX(false) {
998 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1000 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1001 unsigned &NumRecords) const {
1002 Records = BuiltinInfo;
1003 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1005 virtual void getGCCRegNames(const char * const *&Names,
1006 unsigned &NumNames) const {
1007 Names = GCCRegNames;
1008 NumNames = llvm::array_lengthof(GCCRegNames);
1010 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1011 unsigned &NumAliases) const {
1012 Aliases = GCCRegAliases;
1013 NumAliases = llvm::array_lengthof(GCCRegAliases);
1015 virtual bool validateAsmConstraint(const char *&Name,
1016 TargetInfo::ConstraintInfo &info) const;
1017 virtual std::string convertConstraint(const char Constraint) const;
1018 virtual const char *getClobbers() const {
1019 return "~{dirflag},~{fpsr},~{flags}";
1021 virtual void getTargetDefines(const LangOptions &Opts,
1022 MacroBuilder &Builder) const;
1023 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1024 const std::string &Name,
1025 bool Enabled) const;
1026 virtual void getDefaultFeatures(const std::string &CPU,
1027 llvm::StringMap<bool> &Features) const;
1028 virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1031 void X86TargetInfo::getDefaultFeatures(const std::string &CPU,
1032 llvm::StringMap<bool> &Features) const {
1033 // FIXME: This should not be here.
1034 Features["3dnow"] = false;
1035 Features["3dnowa"] = false;
1036 Features["mmx"] = false;
1037 Features["sse"] = false;
1038 Features["sse2"] = false;
1039 Features["sse3"] = false;
1040 Features["ssse3"] = false;
1041 Features["sse41"] = false;
1042 Features["sse42"] = false;
1043 Features["aes"] = false;
1044 Features["avx"] = false;
1046 // LLVM does not currently recognize this.
1047 // Features["sse4a"] = false;
1049 // FIXME: This *really* should not be here.
1051 // X86_64 always has SSE2.
1052 if (PointerWidth == 64)
1053 Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1055 if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" ||
1056 CPU == "pentium" || CPU == "i686" || CPU == "pentiumpro")
1058 else if (CPU == "pentium-mmx" || CPU == "pentium2")
1059 setFeatureEnabled(Features, "mmx", true);
1060 else if (CPU == "pentium3")
1061 setFeatureEnabled(Features, "sse", true);
1062 else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64")
1063 setFeatureEnabled(Features, "sse2", true);
1064 else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona")
1065 setFeatureEnabled(Features, "sse3", true);
1066 else if (CPU == "core2")
1067 setFeatureEnabled(Features, "ssse3", true);
1068 else if (CPU == "penryn") {
1069 setFeatureEnabled(Features, "sse4", true);
1070 Features["sse42"] = false;
1071 } else if (CPU == "atom")
1072 setFeatureEnabled(Features, "sse3", true);
1073 else if (CPU == "corei7") {
1074 setFeatureEnabled(Features, "sse4", true);
1075 setFeatureEnabled(Features, "aes", true);
1077 else if (CPU == "k6" || CPU == "winchip-c6")
1078 setFeatureEnabled(Features, "mmx", true);
1079 else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" ||
1080 CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") {
1081 setFeatureEnabled(Features, "mmx", true);
1082 setFeatureEnabled(Features, "3dnow", true);
1083 } else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") {
1084 setFeatureEnabled(Features, "sse", true);
1085 setFeatureEnabled(Features, "3dnowa", true);
1086 } else if (CPU == "k8" || CPU == "opteron" || CPU == "athlon64" ||
1087 CPU == "athlon-fx") {
1088 setFeatureEnabled(Features, "sse2", true);
1089 setFeatureEnabled(Features, "3dnowa", true);
1090 } else if (CPU == "k8-sse3") {
1091 setFeatureEnabled(Features, "sse3", true);
1092 setFeatureEnabled(Features, "3dnowa", true);
1093 } else if (CPU == "c3-2")
1094 setFeatureEnabled(Features, "sse", true);
1097 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1098 const std::string &Name,
1099 bool Enabled) const {
1100 // FIXME: This *really* should not be here. We need some way of translating
1101 // options into llvm subtarget features.
1102 if (!Features.count(Name) &&
1103 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1104 return false;
1106 if (Enabled) {
1107 if (Name == "mmx")
1108 Features["mmx"] = true;
1109 else if (Name == "sse")
1110 Features["mmx"] = Features["sse"] = true;
1111 else if (Name == "sse2")
1112 Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1113 else if (Name == "sse3")
1114 Features["mmx"] = Features["sse"] = Features["sse2"] =
1115 Features["sse3"] = true;
1116 else if (Name == "ssse3")
1117 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1118 Features["ssse3"] = true;
1119 else if (Name == "sse4" || Name == "sse4.2")
1120 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1121 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true;
1122 else if (Name == "sse4.1")
1123 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1124 Features["ssse3"] = Features["sse41"] = true;
1125 else if (Name == "3dnow")
1126 Features["3dnowa"] = true;
1127 else if (Name == "3dnowa")
1128 Features["3dnow"] = Features["3dnowa"] = true;
1129 else if (Name == "aes")
1130 Features["aes"] = true;
1131 else if (Name == "avx")
1132 Features["avx"] = true;
1133 } else {
1134 if (Name == "mmx")
1135 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1136 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1137 else if (Name == "sse")
1138 Features["sse"] = Features["sse2"] = Features["sse3"] =
1139 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1140 else if (Name == "sse2")
1141 Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1142 Features["sse41"] = Features["sse42"] = false;
1143 else if (Name == "sse3")
1144 Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1145 Features["sse42"] = false;
1146 else if (Name == "ssse3")
1147 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1148 else if (Name == "sse4")
1149 Features["sse41"] = Features["sse42"] = false;
1150 else if (Name == "sse4.2")
1151 Features["sse42"] = false;
1152 else if (Name == "sse4.1")
1153 Features["sse41"] = Features["sse42"] = false;
1154 else if (Name == "3dnow")
1155 Features["3dnow"] = Features["3dnowa"] = false;
1156 else if (Name == "3dnowa")
1157 Features["3dnowa"] = false;
1158 else if (Name == "aes")
1159 Features["aes"] = false;
1160 else if (Name == "avx")
1161 Features["avx"] = false;
1164 return true;
1167 /// HandleTargetOptions - Perform initialization based on the user
1168 /// configured set of features.
1169 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1170 // Remember the maximum enabled sselevel.
1171 for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1172 // Ignore disabled features.
1173 if (Features[i][0] == '-')
1174 continue;
1176 if (Features[i].substr(1) == "aes") {
1177 HasAES = true;
1178 continue;
1181 // FIXME: Not sure yet how to treat AVX in regard to SSE levels.
1182 // For now let it be enabled together with other SSE levels.
1183 if (Features[i].substr(1) == "avx") {
1184 HasAVX = true;
1185 continue;
1188 assert(Features[i][0] == '+' && "Invalid target feature!");
1189 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1190 .Case("sse42", SSE42)
1191 .Case("sse41", SSE41)
1192 .Case("ssse3", SSSE3)
1193 .Case("sse3", SSE3)
1194 .Case("sse2", SSE2)
1195 .Case("sse", SSE1)
1196 .Case("mmx", MMX)
1197 .Default(NoMMXSSE);
1198 SSELevel = std::max(SSELevel, Level);
1200 AMD3DNowEnum ThreeDNowLevel =
1201 llvm::StringSwitch<AMD3DNowEnum>(Features[i].substr(1))
1202 .Case("3dnowa", AMD3DNowAthlon)
1203 .Case("3dnow", AMD3DNow)
1204 .Default(NoAMD3DNow);
1206 AMD3DNowLevel = std::max(AMD3DNowLevel, ThreeDNowLevel);
1210 /// X86TargetInfo::getTargetDefines - Return a set of the X86-specific #defines
1211 /// that are not tied to a specific subtarget.
1212 void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1213 MacroBuilder &Builder) const {
1214 // Target identification.
1215 if (PointerWidth == 64) {
1216 Builder.defineMacro("_LP64");
1217 Builder.defineMacro("__LP64__");
1218 Builder.defineMacro("__amd64__");
1219 Builder.defineMacro("__amd64");
1220 Builder.defineMacro("__x86_64");
1221 Builder.defineMacro("__x86_64__");
1222 } else {
1223 DefineStd(Builder, "i386", Opts);
1226 if (HasAES)
1227 Builder.defineMacro("__AES__");
1229 if (HasAVX)
1230 Builder.defineMacro("__AVX__");
1232 // Target properties.
1233 Builder.defineMacro("__LITTLE_ENDIAN__");
1235 // Subtarget options.
1236 Builder.defineMacro("__nocona");
1237 Builder.defineMacro("__nocona__");
1238 Builder.defineMacro("__tune_nocona__");
1239 Builder.defineMacro("__REGISTER_PREFIX__", "");
1241 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
1242 // functions in glibc header files that use FP Stack inline asm which the
1243 // backend can't deal with (PR879).
1244 Builder.defineMacro("__NO_MATH_INLINES");
1246 // Each case falls through to the previous one here.
1247 switch (SSELevel) {
1248 case SSE42:
1249 Builder.defineMacro("__SSE4_2__");
1250 case SSE41:
1251 Builder.defineMacro("__SSE4_1__");
1252 case SSSE3:
1253 Builder.defineMacro("__SSSE3__");
1254 case SSE3:
1255 Builder.defineMacro("__SSE3__");
1256 case SSE2:
1257 Builder.defineMacro("__SSE2__");
1258 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied.
1259 case SSE1:
1260 Builder.defineMacro("__SSE__");
1261 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied.
1262 case MMX:
1263 Builder.defineMacro("__MMX__");
1264 case NoMMXSSE:
1265 break;
1268 if (Opts.Microsoft && PointerWidth == 32) {
1269 switch (SSELevel) {
1270 case SSE42:
1271 case SSE41:
1272 case SSSE3:
1273 case SSE3:
1274 case SSE2:
1275 Builder.defineMacro("_M_IX86_FP", llvm::Twine(2));
1276 break;
1277 case SSE1:
1278 Builder.defineMacro("_M_IX86_FP", llvm::Twine(1));
1279 break;
1280 default:
1281 Builder.defineMacro("_M_IX86_FP", llvm::Twine(0));
1285 // Each case falls through to the previous one here.
1286 switch (AMD3DNowLevel) {
1287 case AMD3DNowAthlon:
1288 Builder.defineMacro("__3dNOW_A__");
1289 case AMD3DNow:
1290 Builder.defineMacro("__3dNOW__");
1291 case NoAMD3DNow:
1292 break;
1297 bool
1298 X86TargetInfo::validateAsmConstraint(const char *&Name,
1299 TargetInfo::ConstraintInfo &Info) const {
1300 switch (*Name) {
1301 default: return false;
1302 case 'Y': // first letter of a pair:
1303 switch (*(Name+1)) {
1304 default: return false;
1305 case '0': // First SSE register.
1306 case 't': // Any SSE register, when SSE2 is enabled.
1307 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled.
1308 case 'm': // any MMX register, when inter-unit moves enabled.
1309 break; // falls through to setAllowsRegister.
1311 case 'a': // eax.
1312 case 'b': // ebx.
1313 case 'c': // ecx.
1314 case 'd': // edx.
1315 case 'S': // esi.
1316 case 'D': // edi.
1317 case 'A': // edx:eax.
1318 case 'f': // any x87 floating point stack register.
1319 case 't': // top of floating point stack.
1320 case 'u': // second from top of floating point stack.
1321 case 'q': // Any register accessible as [r]l: a, b, c, and d.
1322 case 'y': // Any MMX register.
1323 case 'x': // Any SSE register.
1324 case 'Q': // Any register accessible as [r]h: a, b, c, and d.
1325 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
1326 case 'l': // "Index" registers: any general register that can be used as an
1327 // index in a base+index memory access.
1328 Info.setAllowsRegister();
1329 return true;
1330 case 'C': // SSE floating point constant.
1331 case 'G': // x87 floating point constant.
1332 case 'e': // 32-bit signed integer constant for use with zero-extending
1333 // x86_64 instructions.
1334 case 'Z': // 32-bit unsigned integer constant for use with zero-extending
1335 // x86_64 instructions.
1336 return true;
1338 return false;
1342 std::string
1343 X86TargetInfo::convertConstraint(const char Constraint) const {
1344 switch (Constraint) {
1345 case 'a': return std::string("{ax}");
1346 case 'b': return std::string("{bx}");
1347 case 'c': return std::string("{cx}");
1348 case 'd': return std::string("{dx}");
1349 case 'S': return std::string("{si}");
1350 case 'D': return std::string("{di}");
1351 case 'p': // address
1352 return std::string("im");
1353 case 't': // top of floating point stack.
1354 return std::string("{st}");
1355 case 'u': // second from top of floating point stack.
1356 return std::string("{st(1)}"); // second from top of floating point stack.
1357 default:
1358 return std::string(1, Constraint);
1361 } // end anonymous namespace
1363 namespace {
1364 // X86-32 generic target
1365 class X86_32TargetInfo : public X86TargetInfo {
1366 public:
1367 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
1368 DoubleAlign = LongLongAlign = 32;
1369 LongDoubleWidth = 96;
1370 LongDoubleAlign = 32;
1371 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1372 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1373 "a0:0:64-f80:32:32-n8:16:32";
1374 SizeType = UnsignedInt;
1375 PtrDiffType = SignedInt;
1376 IntPtrType = SignedInt;
1377 RegParmMax = 3;
1379 // Use fpret for all types.
1380 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
1381 (1 << TargetInfo::Double) |
1382 (1 << TargetInfo::LongDouble));
1384 virtual const char *getVAListDeclaration() const {
1385 return "typedef char* __builtin_va_list;";
1388 int getEHDataRegisterNumber(unsigned RegNo) const {
1389 if (RegNo == 0) return 0;
1390 if (RegNo == 1) return 2;
1391 return -1;
1394 } // end anonymous namespace
1396 namespace {
1397 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
1398 public:
1399 OpenBSDI386TargetInfo(const std::string& triple) :
1400 OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
1401 SizeType = UnsignedLong;
1402 IntPtrType = SignedLong;
1403 PtrDiffType = SignedLong;
1406 } // end anonymous namespace
1408 namespace {
1409 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
1410 public:
1411 DarwinI386TargetInfo(const std::string& triple) :
1412 DarwinTargetInfo<X86_32TargetInfo>(triple) {
1413 LongDoubleWidth = 128;
1414 LongDoubleAlign = 128;
1415 SizeType = UnsignedLong;
1416 IntPtrType = SignedLong;
1417 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1418 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1419 "a0:0:64-f80:128:128-n8:16:32";
1420 HasAlignMac68kSupport = true;
1424 } // end anonymous namespace
1426 namespace {
1427 // x86-32 Windows target
1428 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
1429 public:
1430 WindowsX86_32TargetInfo(const std::string& triple)
1431 : WindowsTargetInfo<X86_32TargetInfo>(triple) {
1432 TLSSupported = false;
1433 WCharType = UnsignedShort;
1434 DoubleAlign = LongLongAlign = 64;
1435 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1436 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
1437 "v128:128:128-a0:0:64-f80:32:32-n8:16:32";
1439 virtual void getTargetDefines(const LangOptions &Opts,
1440 MacroBuilder &Builder) const {
1441 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
1444 } // end anonymous namespace
1446 namespace {
1448 // x86-32 Windows Visual Studio target
1449 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
1450 public:
1451 VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
1452 : WindowsX86_32TargetInfo(triple) {
1453 LongDoubleWidth = 64;
1454 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1456 virtual void getTargetDefines(const LangOptions &Opts,
1457 MacroBuilder &Builder) const {
1458 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1459 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
1460 // The value of the following reflects processor type.
1461 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
1462 // We lost the original triple, so we use the default.
1463 Builder.defineMacro("_M_IX86", "600");
1466 } // end anonymous namespace
1468 namespace {
1469 // x86-32 MinGW target
1470 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
1471 public:
1472 MinGWX86_32TargetInfo(const std::string& triple)
1473 : WindowsX86_32TargetInfo(triple) {
1475 virtual void getTargetDefines(const LangOptions &Opts,
1476 MacroBuilder &Builder) const {
1477 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
1478 DefineStd(Builder, "WIN32", Opts);
1479 DefineStd(Builder, "WINNT", Opts);
1480 Builder.defineMacro("_X86_");
1481 Builder.defineMacro("__MSVCRT__");
1482 Builder.defineMacro("__MINGW32__");
1483 Builder.defineMacro("__declspec", "__declspec");
1486 } // end anonymous namespace
1488 namespace {
1489 // x86-32 Cygwin target
1490 class CygwinX86_32TargetInfo : public X86_32TargetInfo {
1491 public:
1492 CygwinX86_32TargetInfo(const std::string& triple)
1493 : X86_32TargetInfo(triple) {
1494 TLSSupported = false;
1495 WCharType = UnsignedShort;
1496 DoubleAlign = LongLongAlign = 64;
1497 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1498 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1499 "a0:0:64-f80:32:32-n8:16:32";
1501 virtual void getTargetDefines(const LangOptions &Opts,
1502 MacroBuilder &Builder) const {
1503 X86_32TargetInfo::getTargetDefines(Opts, Builder);
1504 Builder.defineMacro("__CYGWIN__");
1505 Builder.defineMacro("__CYGWIN32__");
1506 DefineStd(Builder, "unix", Opts);
1507 if (Opts.CPlusPlus)
1508 Builder.defineMacro("_GNU_SOURCE");
1511 } // end anonymous namespace
1513 namespace {
1514 // x86-32 Haiku target
1515 class HaikuX86_32TargetInfo : public X86_32TargetInfo {
1516 public:
1517 HaikuX86_32TargetInfo(const std::string& triple)
1518 : X86_32TargetInfo(triple) {
1519 SizeType = UnsignedLong;
1520 IntPtrType = SignedLong;
1521 PtrDiffType = SignedLong;
1522 this->UserLabelPrefix = "";
1524 virtual void getTargetDefines(const LangOptions &Opts,
1525 MacroBuilder &Builder) const {
1526 X86_32TargetInfo::getTargetDefines(Opts, Builder);
1527 Builder.defineMacro("__INTEL__");
1528 Builder.defineMacro("__HAIKU__");
1531 } // end anonymous namespace
1533 namespace {
1534 // x86-64 generic target
1535 class X86_64TargetInfo : public X86TargetInfo {
1536 public:
1537 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
1538 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1539 LongDoubleWidth = 128;
1540 LongDoubleAlign = 128;
1541 LargeArrayMinWidth = 128;
1542 LargeArrayAlign = 128;
1543 IntMaxType = SignedLong;
1544 UIntMaxType = UnsignedLong;
1545 Int64Type = SignedLong;
1546 RegParmMax = 6;
1548 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1549 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
1550 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64";
1552 // Use fpret only for long double.
1553 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
1555 virtual const char *getVAListDeclaration() const {
1556 return "typedef struct __va_list_tag {"
1557 " unsigned gp_offset;"
1558 " unsigned fp_offset;"
1559 " void* overflow_arg_area;"
1560 " void* reg_save_area;"
1561 "} __va_list_tag;"
1562 "typedef __va_list_tag __builtin_va_list[1];";
1565 int getEHDataRegisterNumber(unsigned RegNo) const {
1566 if (RegNo == 0) return 0;
1567 if (RegNo == 1) return 1;
1568 return -1;
1571 } // end anonymous namespace
1573 namespace {
1574 // x86-64 Windows target
1575 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
1576 public:
1577 WindowsX86_64TargetInfo(const std::string& triple)
1578 : WindowsTargetInfo<X86_64TargetInfo>(triple) {
1579 TLSSupported = false;
1580 WCharType = UnsignedShort;
1581 LongWidth = LongAlign = 32;
1582 DoubleAlign = LongLongAlign = 64;
1583 IntMaxType = SignedLongLong;
1584 UIntMaxType = UnsignedLongLong;
1585 Int64Type = SignedLongLong;
1586 SizeType = UnsignedLongLong;
1587 PtrDiffType = SignedLongLong;
1588 IntPtrType = SignedLongLong;
1589 this->UserLabelPrefix = "";
1591 virtual void getTargetDefines(const LangOptions &Opts,
1592 MacroBuilder &Builder) const {
1593 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
1594 Builder.defineMacro("_WIN64");
1596 virtual const char *getVAListDeclaration() const {
1597 return "typedef char* __builtin_va_list;";
1600 } // end anonymous namespace
1602 namespace {
1603 // x86-64 Windows Visual Studio target
1604 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
1605 public:
1606 VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
1607 : WindowsX86_64TargetInfo(triple) {
1609 virtual void getTargetDefines(const LangOptions &Opts,
1610 MacroBuilder &Builder) const {
1611 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1612 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
1613 Builder.defineMacro("_M_X64");
1614 Builder.defineMacro("_M_AMD64");
1617 } // end anonymous namespace
1619 namespace {
1620 // x86-64 MinGW target
1621 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
1622 public:
1623 MinGWX86_64TargetInfo(const std::string& triple)
1624 : WindowsX86_64TargetInfo(triple) {
1626 virtual void getTargetDefines(const LangOptions &Opts,
1627 MacroBuilder &Builder) const {
1628 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
1629 DefineStd(Builder, "WIN64", Opts);
1630 Builder.defineMacro("__MSVCRT__");
1631 Builder.defineMacro("__MINGW64__");
1632 Builder.defineMacro("__declspec", "__declspec");
1635 } // end anonymous namespace
1637 namespace {
1638 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
1639 public:
1640 DarwinX86_64TargetInfo(const std::string& triple)
1641 : DarwinTargetInfo<X86_64TargetInfo>(triple) {
1642 Int64Type = SignedLongLong;
1645 } // end anonymous namespace
1647 namespace {
1648 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
1649 public:
1650 OpenBSDX86_64TargetInfo(const std::string& triple)
1651 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
1652 IntMaxType = SignedLongLong;
1653 UIntMaxType = UnsignedLongLong;
1654 Int64Type = SignedLongLong;
1657 } // end anonymous namespace
1659 namespace {
1660 class ARMTargetInfo : public TargetInfo {
1661 // Possible FPU choices.
1662 enum FPUMode {
1663 NoFPU,
1664 VFP2FPU,
1665 VFP3FPU,
1666 NeonFPU
1669 static bool FPUModeIsVFP(FPUMode Mode) {
1670 return Mode >= VFP2FPU && Mode <= NeonFPU;
1673 static const TargetInfo::GCCRegAlias GCCRegAliases[];
1674 static const char * const GCCRegNames[];
1676 std::string ABI, CPU;
1678 unsigned FPU : 3;
1680 unsigned IsThumb : 1;
1682 // Initialized via features.
1683 unsigned SoftFloat : 1;
1684 unsigned SoftFloatABI : 1;
1686 static const Builtin::Info BuiltinInfo[];
1688 public:
1689 ARMTargetInfo(const std::string &TripleStr)
1690 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
1692 SizeType = UnsignedInt;
1693 PtrDiffType = SignedInt;
1695 // {} in inline assembly are neon specifiers, not assembly variant
1696 // specifiers.
1697 NoAsmVariants = true;
1699 // FIXME: Should we just treat this as a feature?
1700 IsThumb = getTriple().getArchName().startswith("thumb");
1701 if (IsThumb) {
1702 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1703 "i64:64:64-f32:32:32-f64:64:64-"
1704 "v64:64:64-v128:128:128-a0:0:32-n32");
1705 } else {
1706 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1707 "i64:64:64-f32:32:32-f64:64:64-"
1708 "v64:64:64-v128:128:128-a0:0:64-n32");
1711 // ARM targets default to using the ARM C++ ABI.
1712 CXXABI = CXXABI_ARM;
1714 virtual const char *getABI() const { return ABI.c_str(); }
1715 virtual bool setABI(const std::string &Name) {
1716 ABI = Name;
1718 // The defaults (above) are for AAPCS, check if we need to change them.
1720 // FIXME: We need support for -meabi... we could just mangle it into the
1721 // name.
1722 if (Name == "apcs-gnu") {
1723 DoubleAlign = LongLongAlign = LongDoubleAlign = 32;
1724 SizeType = UnsignedLong;
1726 // Do not respect the alignment of bit-field types when laying out
1727 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
1728 UseBitFieldTypeAlignment = false;
1730 if (IsThumb) {
1731 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
1732 "i64:32:32-f32:32:32-f64:32:32-"
1733 "v64:64:64-v128:128:128-a0:0:32-n32");
1734 } else {
1735 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1736 "i64:32:32-f32:32:32-f64:32:32-"
1737 "v64:64:64-v128:128:128-a0:0:64-n32");
1740 // FIXME: Override "preferred align" for double and long long.
1741 } else if (Name == "aapcs") {
1742 // FIXME: Enumerated types are variable width in straight AAPCS.
1743 } else if (Name == "aapcs-linux") {
1745 } else
1746 return false;
1748 return true;
1751 void getDefaultFeatures(const std::string &CPU,
1752 llvm::StringMap<bool> &Features) const {
1753 // FIXME: This should not be here.
1754 Features["vfp2"] = false;
1755 Features["vfp3"] = false;
1756 Features["neon"] = false;
1758 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
1759 Features["vfp2"] = true;
1760 else if (CPU == "cortex-a8" || CPU == "cortex-a9")
1761 Features["neon"] = true;
1764 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1765 const std::string &Name,
1766 bool Enabled) const {
1767 if (Name == "soft-float" || Name == "soft-float-abi") {
1768 Features[Name] = Enabled;
1769 } else if (Name == "vfp2" || Name == "vfp3" || Name == "neon") {
1770 // These effectively are a single option, reset them when any is enabled.
1771 if (Enabled)
1772 Features["vfp2"] = Features["vfp3"] = Features["neon"] = false;
1773 Features[Name] = Enabled;
1774 } else
1775 return false;
1777 return true;
1780 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
1781 FPU = NoFPU;
1782 SoftFloat = SoftFloatABI = false;
1783 for (unsigned i = 0, e = Features.size(); i != e; ++i) {
1784 if (Features[i] == "+soft-float")
1785 SoftFloat = true;
1786 else if (Features[i] == "+soft-float-abi")
1787 SoftFloatABI = true;
1788 else if (Features[i] == "+vfp2")
1789 FPU = VFP2FPU;
1790 else if (Features[i] == "+vfp3")
1791 FPU = VFP3FPU;
1792 else if (Features[i] == "+neon")
1793 FPU = NeonFPU;
1796 // Remove front-end specific options which the backend handles differently.
1797 std::vector<std::string>::iterator it;
1798 it = std::find(Features.begin(), Features.end(), "+soft-float");
1799 if (it != Features.end())
1800 Features.erase(it);
1801 it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
1802 if (it != Features.end())
1803 Features.erase(it);
1806 static const char *getCPUDefineSuffix(llvm::StringRef Name) {
1807 return llvm::StringSwitch<const char*>(Name)
1808 .Cases("arm8", "arm810", "4")
1809 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
1810 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
1811 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
1812 .Case("ep9312", "4T")
1813 .Cases("arm10tdmi", "arm1020t", "5T")
1814 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
1815 .Case("arm926ej-s", "5TEJ")
1816 .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
1817 .Cases("xscale", "iwmmxt", "5TE")
1818 .Case("arm1136j-s", "6J")
1819 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
1820 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
1821 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
1822 .Cases("cortex-a8", "cortex-a9", "7A")
1823 .Case("cortex-m3", "7M")
1824 .Default(0);
1826 virtual bool setCPU(const std::string &Name) {
1827 if (!getCPUDefineSuffix(Name))
1828 return false;
1830 CPU = Name;
1831 return true;
1833 virtual void getTargetDefines(const LangOptions &Opts,
1834 MacroBuilder &Builder) const {
1835 // Target identification.
1836 Builder.defineMacro("__arm");
1837 Builder.defineMacro("__arm__");
1839 // Target properties.
1840 Builder.defineMacro("__ARMEL__");
1841 Builder.defineMacro("__LITTLE_ENDIAN__");
1842 Builder.defineMacro("__REGISTER_PREFIX__", "");
1844 llvm::StringRef CPUArch = getCPUDefineSuffix(CPU);
1845 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
1847 // Subtarget options.
1849 // FIXME: It's more complicated than this and we don't really support
1850 // interworking.
1851 if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
1852 Builder.defineMacro("__THUMB_INTERWORK__");
1854 if (ABI == "aapcs" || ABI == "aapcs-linux")
1855 Builder.defineMacro("__ARM_EABI__");
1857 if (SoftFloat)
1858 Builder.defineMacro("__SOFTFP__");
1860 if (CPU == "xscale")
1861 Builder.defineMacro("__XSCALE__");
1863 bool IsThumb2 = IsThumb && (CPUArch == "6T2" || CPUArch.startswith("7"));
1864 if (IsThumb) {
1865 Builder.defineMacro("__THUMBEL__");
1866 Builder.defineMacro("__thumb__");
1867 if (IsThumb2)
1868 Builder.defineMacro("__thumb2__");
1871 // Note, this is always on in gcc, even though it doesn't make sense.
1872 Builder.defineMacro("__APCS_32__");
1874 if (FPUModeIsVFP((FPUMode) FPU))
1875 Builder.defineMacro("__VFP_FP__");
1877 // This only gets set when Neon instructions are actually available, unlike
1878 // the VFP define, hence the soft float and arch check. This is subtly
1879 // different from gcc, we follow the intent which was that it should be set
1880 // when Neon instructions are actually available.
1881 if (FPU == NeonFPU && !SoftFloat && IsThumb2)
1882 Builder.defineMacro("__ARM_NEON__");
1884 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1885 unsigned &NumRecords) const {
1886 Records = BuiltinInfo;
1887 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
1889 virtual const char *getVAListDeclaration() const {
1890 return "typedef char* __builtin_va_list;";
1892 virtual void getGCCRegNames(const char * const *&Names,
1893 unsigned &NumNames) const;
1894 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1895 unsigned &NumAliases) const;
1896 virtual bool validateAsmConstraint(const char *&Name,
1897 TargetInfo::ConstraintInfo &Info) const {
1898 // FIXME: Check if this is complete
1899 switch (*Name) {
1900 default:
1901 case 'l': // r0-r7
1902 case 'h': // r8-r15
1903 case 'w': // VFP Floating point register single precision
1904 case 'P': // VFP Floating point register double precision
1905 Info.setAllowsRegister();
1906 return true;
1908 return false;
1910 virtual const char *getClobbers() const {
1911 // FIXME: Is this really right?
1912 return "";
1916 const char * const ARMTargetInfo::GCCRegNames[] = {
1917 // Integer registers
1918 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1919 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
1921 // Float registers
1922 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
1923 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
1924 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
1925 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
1927 // Double registers
1928 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
1929 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
1930 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
1931 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
1933 // Quad registers
1934 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
1935 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
1938 void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
1939 unsigned &NumNames) const {
1940 Names = GCCRegNames;
1941 NumNames = llvm::array_lengthof(GCCRegNames);
1944 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
1945 { { "a1" }, "r0" },
1946 { { "a2" }, "r1" },
1947 { { "a3" }, "r2" },
1948 { { "a4" }, "r3" },
1949 { { "v1" }, "r4" },
1950 { { "v2" }, "r5" },
1951 { { "v3" }, "r6" },
1952 { { "v4" }, "r7" },
1953 { { "v5" }, "r8" },
1954 { { "v6", "rfp" }, "r9" },
1955 { { "sl" }, "r10" },
1956 { { "fp" }, "r11" },
1957 { { "ip" }, "r12" },
1958 { { "r13" }, "sp" },
1959 { { "r14" }, "lr" },
1960 { { "r15" }, "pc" },
1961 // The S, D and Q registers overlap, but aren't really aliases; we
1962 // don't want to substitute one of these for a different-sized one.
1965 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1966 unsigned &NumAliases) const {
1967 Aliases = GCCRegAliases;
1968 NumAliases = llvm::array_lengthof(GCCRegAliases);
1971 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
1972 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES, false },
1973 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1974 ALL_LANGUAGES, false },
1975 #include "clang/Basic/BuiltinsARM.def"
1977 } // end anonymous namespace.
1980 namespace {
1981 class DarwinARMTargetInfo :
1982 public DarwinTargetInfo<ARMTargetInfo> {
1983 protected:
1984 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
1985 MacroBuilder &Builder) const {
1986 getDarwinDefines(Builder, Opts, Triple);
1989 public:
1990 DarwinARMTargetInfo(const std::string& triple)
1991 : DarwinTargetInfo<ARMTargetInfo>(triple) {
1992 HasAlignMac68kSupport = true;
1995 } // end anonymous namespace.
1997 namespace {
1998 class SparcV8TargetInfo : public TargetInfo {
1999 static const TargetInfo::GCCRegAlias GCCRegAliases[];
2000 static const char * const GCCRegNames[];
2001 bool SoftFloat;
2002 public:
2003 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
2004 // FIXME: Support Sparc quad-precision long double?
2005 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2006 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
2008 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2009 const std::string &Name,
2010 bool Enabled) const {
2011 if (Name == "soft-float")
2012 Features[Name] = Enabled;
2013 else
2014 return false;
2016 return true;
2018 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2019 SoftFloat = false;
2020 for (unsigned i = 0, e = Features.size(); i != e; ++i)
2021 if (Features[i] == "+soft-float")
2022 SoftFloat = true;
2024 virtual void getTargetDefines(const LangOptions &Opts,
2025 MacroBuilder &Builder) const {
2026 DefineStd(Builder, "sparc", Opts);
2027 Builder.defineMacro("__sparcv8");
2028 Builder.defineMacro("__REGISTER_PREFIX__", "");
2030 if (SoftFloat)
2031 Builder.defineMacro("SOFT_FLOAT", "1");
2033 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2034 unsigned &NumRecords) const {
2035 // FIXME: Implement!
2037 virtual const char *getVAListDeclaration() const {
2038 return "typedef void* __builtin_va_list;";
2040 virtual void getGCCRegNames(const char * const *&Names,
2041 unsigned &NumNames) const;
2042 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2043 unsigned &NumAliases) const;
2044 virtual bool validateAsmConstraint(const char *&Name,
2045 TargetInfo::ConstraintInfo &info) const {
2046 // FIXME: Implement!
2047 return false;
2049 virtual const char *getClobbers() const {
2050 // FIXME: Implement!
2051 return "";
2055 const char * const SparcV8TargetInfo::GCCRegNames[] = {
2056 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2057 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
2058 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
2059 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
2062 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
2063 unsigned &NumNames) const {
2064 Names = GCCRegNames;
2065 NumNames = llvm::array_lengthof(GCCRegNames);
2068 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
2069 { { "g0" }, "r0" },
2070 { { "g1" }, "r1" },
2071 { { "g2" }, "r2" },
2072 { { "g3" }, "r3" },
2073 { { "g4" }, "r4" },
2074 { { "g5" }, "r5" },
2075 { { "g6" }, "r6" },
2076 { { "g7" }, "r7" },
2077 { { "o0" }, "r8" },
2078 { { "o1" }, "r9" },
2079 { { "o2" }, "r10" },
2080 { { "o3" }, "r11" },
2081 { { "o4" }, "r12" },
2082 { { "o5" }, "r13" },
2083 { { "o6", "sp" }, "r14" },
2084 { { "o7" }, "r15" },
2085 { { "l0" }, "r16" },
2086 { { "l1" }, "r17" },
2087 { { "l2" }, "r18" },
2088 { { "l3" }, "r19" },
2089 { { "l4" }, "r20" },
2090 { { "l5" }, "r21" },
2091 { { "l6" }, "r22" },
2092 { { "l7" }, "r23" },
2093 { { "i0" }, "r24" },
2094 { { "i1" }, "r25" },
2095 { { "i2" }, "r26" },
2096 { { "i3" }, "r27" },
2097 { { "i4" }, "r28" },
2098 { { "i5" }, "r29" },
2099 { { "i6", "fp" }, "r30" },
2100 { { "i7" }, "r31" },
2103 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2104 unsigned &NumAliases) const {
2105 Aliases = GCCRegAliases;
2106 NumAliases = llvm::array_lengthof(GCCRegAliases);
2108 } // end anonymous namespace.
2110 namespace {
2111 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
2112 public:
2113 AuroraUXSparcV8TargetInfo(const std::string& triple) :
2114 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
2115 SizeType = UnsignedInt;
2116 PtrDiffType = SignedInt;
2119 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
2120 public:
2121 SolarisSparcV8TargetInfo(const std::string& triple) :
2122 SolarisTargetInfo<SparcV8TargetInfo>(triple) {
2123 SizeType = UnsignedInt;
2124 PtrDiffType = SignedInt;
2127 } // end anonymous namespace.
2129 namespace {
2130 class MSP430TargetInfo : public TargetInfo {
2131 static const char * const GCCRegNames[];
2132 public:
2133 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
2134 TLSSupported = false;
2135 IntWidth = 16; IntAlign = 16;
2136 LongWidth = 32; LongLongWidth = 64;
2137 LongAlign = LongLongAlign = 16;
2138 PointerWidth = 16; PointerAlign = 16;
2139 SizeType = UnsignedInt;
2140 IntMaxType = SignedLong;
2141 UIntMaxType = UnsignedLong;
2142 IntPtrType = SignedShort;
2143 PtrDiffType = SignedInt;
2144 SigAtomicType = SignedLong;
2145 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
2147 virtual void getTargetDefines(const LangOptions &Opts,
2148 MacroBuilder &Builder) const {
2149 Builder.defineMacro("MSP430");
2150 Builder.defineMacro("__MSP430__");
2151 // FIXME: defines for different 'flavours' of MCU
2153 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2154 unsigned &NumRecords) const {
2155 // FIXME: Implement.
2156 Records = 0;
2157 NumRecords = 0;
2159 virtual void getGCCRegNames(const char * const *&Names,
2160 unsigned &NumNames) const;
2161 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2162 unsigned &NumAliases) const {
2163 // No aliases.
2164 Aliases = 0;
2165 NumAliases = 0;
2167 virtual bool validateAsmConstraint(const char *&Name,
2168 TargetInfo::ConstraintInfo &info) const {
2169 // No target constraints for now.
2170 return false;
2172 virtual const char *getClobbers() const {
2173 // FIXME: Is this really right?
2174 return "";
2176 virtual const char *getVAListDeclaration() const {
2177 // FIXME: implement
2178 return "typedef char* __builtin_va_list;";
2182 const char * const MSP430TargetInfo::GCCRegNames[] = {
2183 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2184 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2187 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
2188 unsigned &NumNames) const {
2189 Names = GCCRegNames;
2190 NumNames = llvm::array_lengthof(GCCRegNames);
2195 namespace {
2196 class SystemZTargetInfo : public TargetInfo {
2197 static const char * const GCCRegNames[];
2198 public:
2199 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) {
2200 TLSSupported = false;
2201 IntWidth = IntAlign = 32;
2202 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
2203 PointerWidth = PointerAlign = 64;
2204 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-"
2205 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64";
2207 virtual void getTargetDefines(const LangOptions &Opts,
2208 MacroBuilder &Builder) const {
2209 Builder.defineMacro("__s390__");
2210 Builder.defineMacro("__s390x__");
2212 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2213 unsigned &NumRecords) const {
2214 // FIXME: Implement.
2215 Records = 0;
2216 NumRecords = 0;
2219 virtual void getGCCRegNames(const char * const *&Names,
2220 unsigned &NumNames) const;
2221 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2222 unsigned &NumAliases) const {
2223 // No aliases.
2224 Aliases = 0;
2225 NumAliases = 0;
2227 virtual bool validateAsmConstraint(const char *&Name,
2228 TargetInfo::ConstraintInfo &info) const {
2229 // FIXME: implement
2230 return true;
2232 virtual const char *getClobbers() const {
2233 // FIXME: Is this really right?
2234 return "";
2236 virtual const char *getVAListDeclaration() const {
2237 // FIXME: implement
2238 return "typedef char* __builtin_va_list;";
2242 const char * const SystemZTargetInfo::GCCRegNames[] = {
2243 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2244 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2247 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names,
2248 unsigned &NumNames) const {
2249 Names = GCCRegNames;
2250 NumNames = llvm::array_lengthof(GCCRegNames);
2254 namespace {
2255 class BlackfinTargetInfo : public TargetInfo {
2256 static const char * const GCCRegNames[];
2257 public:
2258 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) {
2259 TLSSupported = false;
2260 DoubleAlign = 32;
2261 LongLongAlign = 32;
2262 LongDoubleAlign = 32;
2263 DescriptionString = "e-p:32:32-i64:32-f64:32-n32";
2266 virtual void getTargetDefines(const LangOptions &Opts,
2267 MacroBuilder &Builder) const {
2268 DefineStd(Builder, "bfin", Opts);
2269 DefineStd(Builder, "BFIN", Opts);
2270 Builder.defineMacro("__ADSPBLACKFIN__");
2271 // FIXME: This one is really dependent on -mcpu
2272 Builder.defineMacro("__ADSPLPBLACKFIN__");
2273 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__
2276 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2277 unsigned &NumRecords) const {
2278 // FIXME: Implement.
2279 Records = 0;
2280 NumRecords = 0;
2283 virtual void getGCCRegNames(const char * const *&Names,
2284 unsigned &NumNames) const;
2286 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2287 unsigned &NumAliases) const {
2288 // No aliases.
2289 Aliases = 0;
2290 NumAliases = 0;
2293 virtual bool validateAsmConstraint(const char *&Name,
2294 TargetInfo::ConstraintInfo &Info) const {
2295 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) {
2296 Info.setAllowsRegister();
2297 return true;
2299 return false;
2302 virtual const char *getClobbers() const {
2303 return "";
2306 virtual const char *getVAListDeclaration() const {
2307 return "typedef char* __builtin_va_list;";
2311 const char * const BlackfinTargetInfo::GCCRegNames[] = {
2312 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2313 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
2314 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3",
2315 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3",
2316 "a0", "a1", "cc",
2317 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp",
2318 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1"
2321 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names,
2322 unsigned &NumNames) const {
2323 Names = GCCRegNames;
2324 NumNames = llvm::array_lengthof(GCCRegNames);
2328 namespace {
2330 // LLVM and Clang cannot be used directly to output native binaries for
2331 // target, but is used to compile C code to llvm bitcode with correct
2332 // type and alignment information.
2334 // TCE uses the llvm bitcode as input and uses it for generating customized
2335 // target processor and program binary. TCE co-design environment is
2336 // publicly available in http://tce.cs.tut.fi
2338 class TCETargetInfo : public TargetInfo{
2339 public:
2340 TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
2341 TLSSupported = false;
2342 IntWidth = 32;
2343 LongWidth = LongLongWidth = 32;
2344 PointerWidth = 32;
2345 IntAlign = 32;
2346 LongAlign = LongLongAlign = 32;
2347 PointerAlign = 32;
2348 SizeType = UnsignedInt;
2349 IntMaxType = SignedLong;
2350 UIntMaxType = UnsignedLong;
2351 IntPtrType = SignedInt;
2352 PtrDiffType = SignedInt;
2353 FloatWidth = 32;
2354 FloatAlign = 32;
2355 DoubleWidth = 32;
2356 DoubleAlign = 32;
2357 LongDoubleWidth = 32;
2358 LongDoubleAlign = 32;
2359 FloatFormat = &llvm::APFloat::IEEEsingle;
2360 DoubleFormat = &llvm::APFloat::IEEEsingle;
2361 LongDoubleFormat = &llvm::APFloat::IEEEsingle;
2362 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
2363 "i16:16:32-i32:32:32-i64:32:32-"
2364 "f32:32:32-f64:32:32-v64:32:32-"
2365 "v128:32:32-a0:0:32-n32";
2368 virtual void getTargetDefines(const LangOptions &Opts,
2369 MacroBuilder &Builder) const {
2370 DefineStd(Builder, "tce", Opts);
2371 Builder.defineMacro("__TCE__");
2372 Builder.defineMacro("__TCE_V1__");
2374 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2375 unsigned &NumRecords) const {}
2376 virtual const char *getClobbers() const {
2377 return "";
2379 virtual const char *getVAListDeclaration() const {
2380 return "typedef void* __builtin_va_list;";
2382 virtual void getGCCRegNames(const char * const *&Names,
2383 unsigned &NumNames) const {}
2384 virtual bool validateAsmConstraint(const char *&Name,
2385 TargetInfo::ConstraintInfo &info) const {
2386 return true;
2388 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2389 unsigned &NumAliases) const {}
2393 namespace {
2394 class MipsTargetInfo : public TargetInfo {
2395 std::string ABI, CPU;
2396 static const TargetInfo::GCCRegAlias GCCRegAliases[];
2397 static const char * const GCCRegNames[];
2398 public:
2399 MipsTargetInfo(const std::string& triple) : TargetInfo(triple), ABI("o32") {
2400 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2401 "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32";
2403 virtual const char *getABI() const { return ABI.c_str(); }
2404 virtual bool setABI(const std::string &Name) {
2406 if ((Name == "o32") || (Name == "eabi")) {
2407 ABI = Name;
2408 return true;
2409 } else
2410 return false;
2412 virtual bool setCPU(const std::string &Name) {
2413 CPU = Name;
2414 return true;
2416 void getDefaultFeatures(const std::string &CPU,
2417 llvm::StringMap<bool> &Features) const {
2418 Features[ABI] = true;
2419 Features[CPU] = true;
2421 virtual void getArchDefines(const LangOptions &Opts,
2422 MacroBuilder &Builder) const {
2423 if (ABI == "o32")
2424 Builder.defineMacro("__mips_o32");
2425 else if (ABI == "eabi")
2426 Builder.defineMacro("__mips_eabi");
2428 virtual void getTargetDefines(const LangOptions &Opts,
2429 MacroBuilder &Builder) const {
2430 DefineStd(Builder, "mips", Opts);
2431 Builder.defineMacro("_mips");
2432 DefineStd(Builder, "MIPSEB", Opts);
2433 Builder.defineMacro("_MIPSEB");
2434 Builder.defineMacro("__REGISTER_PREFIX__", "");
2435 getArchDefines(Opts, Builder);
2437 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2438 unsigned &NumRecords) const {
2439 // FIXME: Implement!
2441 virtual const char *getVAListDeclaration() const {
2442 return "typedef void* __builtin_va_list;";
2444 virtual void getGCCRegNames(const char * const *&Names,
2445 unsigned &NumNames) const;
2446 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2447 unsigned &NumAliases) const;
2448 virtual bool validateAsmConstraint(const char *&Name,
2449 TargetInfo::ConstraintInfo &Info) const {
2450 switch (*Name) {
2451 default:
2452 case 'r': // CPU registers.
2453 case 'd': // Equivalent to "r" unless generating MIPS16 code.
2454 case 'y': // Equivalent to "r", backwards compatibility only.
2455 case 'f': // floating-point registers.
2456 Info.setAllowsRegister();
2457 return true;
2459 return false;
2462 virtual const char *getClobbers() const {
2463 // FIXME: Implement!
2464 return "";
2468 const char * const MipsTargetInfo::GCCRegNames[] = {
2469 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7",
2470 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15",
2471 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23",
2472 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31",
2473 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
2474 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
2475 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
2476 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
2477 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
2478 "$fcc5","$fcc6","$fcc7"
2481 void MipsTargetInfo::getGCCRegNames(const char * const *&Names,
2482 unsigned &NumNames) const {
2483 Names = GCCRegNames;
2484 NumNames = llvm::array_lengthof(GCCRegNames);
2487 const TargetInfo::GCCRegAlias MipsTargetInfo::GCCRegAliases[] = {
2488 { { "at" }, "$1" },
2489 { { "v0" }, "$2" },
2490 { { "v1" }, "$3" },
2491 { { "a0" }, "$4" },
2492 { { "a1" }, "$5" },
2493 { { "a2" }, "$6" },
2494 { { "a3" }, "$7" },
2495 { { "t0" }, "$8" },
2496 { { "t1" }, "$9" },
2497 { { "t2" }, "$10" },
2498 { { "t3" }, "$11" },
2499 { { "t4" }, "$12" },
2500 { { "t5" }, "$13" },
2501 { { "t6" }, "$14" },
2502 { { "t7" }, "$15" },
2503 { { "s0" }, "$16" },
2504 { { "s1" }, "$17" },
2505 { { "s2" }, "$18" },
2506 { { "s3" }, "$19" },
2507 { { "s4" }, "$20" },
2508 { { "s5" }, "$21" },
2509 { { "s6" }, "$22" },
2510 { { "s7" }, "$23" },
2511 { { "t8" }, "$24" },
2512 { { "t9" }, "$25" },
2513 { { "k0" }, "$26" },
2514 { { "k1" }, "$27" },
2515 { { "gp" }, "$28" },
2516 { { "sp" }, "$29" },
2517 { { "fp" }, "$30" },
2518 { { "ra" }, "$31" }
2521 void MipsTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2522 unsigned &NumAliases) const {
2523 Aliases = GCCRegAliases;
2524 NumAliases = llvm::array_lengthof(GCCRegAliases);
2526 } // end anonymous namespace.
2528 namespace {
2529 class MipselTargetInfo : public MipsTargetInfo {
2530 public:
2531 MipselTargetInfo(const std::string& triple) : MipsTargetInfo(triple) {
2532 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
2533 "i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32";
2536 virtual void getTargetDefines(const LangOptions &Opts,
2537 MacroBuilder &Builder) const;
2540 void MipselTargetInfo::getTargetDefines(const LangOptions &Opts,
2541 MacroBuilder &Builder) const {
2542 DefineStd(Builder, "mips", Opts);
2543 Builder.defineMacro("_mips");
2544 DefineStd(Builder, "MIPSEL", Opts);
2545 Builder.defineMacro("_MIPSEL");
2546 Builder.defineMacro("__REGISTER_PREFIX__", "");
2547 getArchDefines(Opts, Builder);
2549 } // end anonymous namespace.
2551 //===----------------------------------------------------------------------===//
2552 // Driver code
2553 //===----------------------------------------------------------------------===//
2555 static TargetInfo *AllocateTarget(const std::string &T) {
2556 llvm::Triple Triple(T);
2557 llvm::Triple::OSType os = Triple.getOS();
2559 switch (Triple.getArch()) {
2560 default:
2561 return NULL;
2563 case llvm::Triple::arm:
2564 case llvm::Triple::thumb:
2565 switch (os) {
2566 case llvm::Triple::Linux:
2567 return new LinuxTargetInfo<ARMTargetInfo>(T);
2568 case llvm::Triple::Darwin:
2569 return new DarwinARMTargetInfo(T);
2570 case llvm::Triple::FreeBSD:
2571 return new FreeBSDTargetInfo<ARMTargetInfo>(T);
2572 default:
2573 return new ARMTargetInfo(T);
2576 case llvm::Triple::bfin:
2577 return new BlackfinTargetInfo(T);
2579 case llvm::Triple::msp430:
2580 return new MSP430TargetInfo(T);
2582 case llvm::Triple::mips:
2583 if (os == llvm::Triple::Psp)
2584 return new PSPTargetInfo<MipsTargetInfo>(T);
2585 if (os == llvm::Triple::Linux)
2586 return new LinuxTargetInfo<MipsTargetInfo>(T);
2587 return new MipsTargetInfo(T);
2589 case llvm::Triple::mipsel:
2590 if (os == llvm::Triple::Psp)
2591 return new PSPTargetInfo<MipselTargetInfo>(T);
2592 if (os == llvm::Triple::Linux)
2593 return new LinuxTargetInfo<MipselTargetInfo>(T);
2594 return new MipselTargetInfo(T);
2596 case llvm::Triple::ppc:
2597 if (os == llvm::Triple::Darwin)
2598 return new DarwinPPC32TargetInfo(T);
2599 else if (os == llvm::Triple::FreeBSD)
2600 return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
2601 return new PPC32TargetInfo(T);
2603 case llvm::Triple::ppc64:
2604 if (os == llvm::Triple::Darwin)
2605 return new DarwinPPC64TargetInfo(T);
2606 else if (os == llvm::Triple::Lv2)
2607 return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
2608 else if (os == llvm::Triple::FreeBSD)
2609 return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
2610 return new PPC64TargetInfo(T);
2612 case llvm::Triple::mblaze:
2613 return new MBlazeTargetInfo(T);
2615 case llvm::Triple::sparc:
2616 if (os == llvm::Triple::AuroraUX)
2617 return new AuroraUXSparcV8TargetInfo(T);
2618 if (os == llvm::Triple::Solaris)
2619 return new SolarisSparcV8TargetInfo(T);
2620 return new SparcV8TargetInfo(T);
2622 // FIXME: Need a real SPU target.
2623 case llvm::Triple::cellspu:
2624 return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
2626 case llvm::Triple::systemz:
2627 return new SystemZTargetInfo(T);
2629 case llvm::Triple::tce:
2630 return new TCETargetInfo(T);
2632 case llvm::Triple::x86:
2633 switch (os) {
2634 case llvm::Triple::AuroraUX:
2635 return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
2636 case llvm::Triple::Darwin:
2637 return new DarwinI386TargetInfo(T);
2638 case llvm::Triple::Linux:
2639 return new LinuxTargetInfo<X86_32TargetInfo>(T);
2640 case llvm::Triple::DragonFly:
2641 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
2642 case llvm::Triple::NetBSD:
2643 return new NetBSDTargetInfo<X86_32TargetInfo>(T);
2644 case llvm::Triple::OpenBSD:
2645 return new OpenBSDI386TargetInfo(T);
2646 case llvm::Triple::FreeBSD:
2647 return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
2648 case llvm::Triple::Minix:
2649 return new MinixTargetInfo<X86_32TargetInfo>(T);
2650 case llvm::Triple::Solaris:
2651 return new SolarisTargetInfo<X86_32TargetInfo>(T);
2652 case llvm::Triple::Cygwin:
2653 return new CygwinX86_32TargetInfo(T);
2654 case llvm::Triple::MinGW32:
2655 return new MinGWX86_32TargetInfo(T);
2656 case llvm::Triple::Win32:
2657 return new VisualStudioWindowsX86_32TargetInfo(T);
2658 case llvm::Triple::Haiku:
2659 return new HaikuX86_32TargetInfo(T);
2660 default:
2661 return new X86_32TargetInfo(T);
2664 case llvm::Triple::x86_64:
2665 switch (os) {
2666 case llvm::Triple::AuroraUX:
2667 return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
2668 case llvm::Triple::Darwin:
2669 return new DarwinX86_64TargetInfo(T);
2670 case llvm::Triple::Linux:
2671 return new LinuxTargetInfo<X86_64TargetInfo>(T);
2672 case llvm::Triple::DragonFly:
2673 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
2674 case llvm::Triple::NetBSD:
2675 return new NetBSDTargetInfo<X86_64TargetInfo>(T);
2676 case llvm::Triple::OpenBSD:
2677 return new OpenBSDX86_64TargetInfo(T);
2678 case llvm::Triple::FreeBSD:
2679 return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
2680 case llvm::Triple::Solaris:
2681 return new SolarisTargetInfo<X86_64TargetInfo>(T);
2682 case llvm::Triple::MinGW32:
2683 return new MinGWX86_64TargetInfo(T);
2684 case llvm::Triple::Win32: // This is what Triple.h supports now.
2685 if (Triple.getEnvironment() == llvm::Triple::MachO)
2686 return new DarwinX86_64TargetInfo(T);
2687 else
2688 return new VisualStudioWindowsX86_64TargetInfo(T);
2689 default:
2690 return new X86_64TargetInfo(T);
2695 /// CreateTargetInfo - Return the target info object for the specified target
2696 /// triple.
2697 TargetInfo *TargetInfo::CreateTargetInfo(Diagnostic &Diags,
2698 TargetOptions &Opts) {
2699 llvm::Triple Triple(Opts.Triple);
2701 // Construct the target
2702 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
2703 if (!Target) {
2704 Diags.Report(diag::err_target_unknown_triple) << Triple.str();
2705 return 0;
2708 // Set the target CPU if specified.
2709 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
2710 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
2711 return 0;
2714 // Set the target ABI if specified.
2715 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
2716 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
2717 return 0;
2720 // Set the target C++ ABI.
2721 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
2722 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
2723 return 0;
2726 // Compute the default target features, we need the target to handle this
2727 // because features may have dependencies on one another.
2728 llvm::StringMap<bool> Features;
2729 Target->getDefaultFeatures(Opts.CPU, Features);
2731 // Apply the user specified deltas.
2732 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
2733 ie = Opts.Features.end(); it != ie; ++it) {
2734 const char *Name = it->c_str();
2736 // Apply the feature via the target.
2737 if ((Name[0] != '-' && Name[0] != '+') ||
2738 !Target->setFeatureEnabled(Features, Name + 1, (Name[0] == '+'))) {
2739 Diags.Report(diag::err_target_invalid_feature) << Name;
2740 return 0;
2744 // Add the features to the compile options.
2746 // FIXME: If we are completely confident that we have the right set, we only
2747 // need to pass the minuses.
2748 Opts.Features.clear();
2749 for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
2750 ie = Features.end(); it != ie; ++it)
2751 Opts.Features.push_back(std::string(it->second ? "+" : "-") + it->first());
2752 Target->HandleTargetFeatures(Opts.Features);
2754 return Target.take();