| blob | a47d02c020df4b666669b448dc90a1c351bbc749 |
1 /* 32-bit ELF support for ARM
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008 Free Software Foundation, Inc.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
30 /* Return the relocation section associated with NAME. HTAB is the
31 bfd's elf32_arm_link_hash_entry. */
32 #define RELOC_SECTION(HTAB, NAME) \
35 /* Return size of a relocation entry. HTAB is the bfd's
36 elf32_arm_link_hash_entry. */
37 #define RELOC_SIZE(HTAB) \
38 ((HTAB)->use_rel \
39 ? sizeof (Elf32_External_Rel) \
40 : sizeof (Elf32_External_Rela))
42 /* Return function to swap relocations in. HTAB is the bfd's
43 elf32_arm_link_hash_entry. */
44 #define SWAP_RELOC_IN(HTAB) \
45 ((HTAB)->use_rel \
46 ? bfd_elf32_swap_reloc_in \
47 : bfd_elf32_swap_reloca_in)
49 /* Return function to swap relocations out. HTAB is the bfd's
50 elf32_arm_link_hash_entry. */
51 #define SWAP_RELOC_OUT(HTAB) \
52 ((HTAB)->use_rel \
53 ? bfd_elf32_swap_reloc_out \
54 : bfd_elf32_swap_reloca_out)
56 #define elf_info_to_howto 0
57 #define elf_info_to_howto_rel elf32_arm_info_to_howto
59 #define ARM_ELF_ABI_VERSION 0
60 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
65 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
66 in that slot. */
69 {
70 /* No relocation. */
99 /* 32 bit absolute */
114 /* standard 32bit pc-relative reloc */
129 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
144 /* 16 bit absolute */
159 /* 12 bit absolute */
188 /* 8 bit absolute */
287 /* BLX instruction for the ARM. */
302 /* BLX instruction for the Thumb. */
317 /* Dynamic TLS relocations. */
361 /* Relocs used in ARM Linux */
825 /* These are declared as 13-bit signed relocations because we can
826 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
827 versa. */
884 /* Group relocations. */
1264 /* End of group relocations. */
1427 /* GNU extension to record C++ vtable member usage */
1442 /* GNU extension to record C++ vtable hierarchy */
1485 /* TLS relocations */
1597 };
1599 /* 112-127 private relocations
1600 128 R_ARM_ME_TOO, obsolete
1601 129-255 unallocated in AAELF.
1603 249-255 extended, currently unused, relocations: */
1606 {
1662 };
1666 {
1675 }
1677 static void
1680 {
1685 }
1687 struct elf32_arm_reloc_map
1688 {
1689 bfd_reloc_code_real_type bfd_reloc_val;
1691 };
1693 /* All entries in this list must also be present in elf32_arm_howto_table. */
1695 {
1774 };
1778 bfd_reloc_code_real_type code)
1779 {
1787 }
1792 {
1806 }
1808 /* Support for core dump NOTE sections. */
1810 static bfd_boolean
1812 {
1817 {
1822 /* pr_cursig */
1825 /* pr_pid */
1828 /* pr_reg */
1833 }
1835 /* Make a ".reg/999" section. */
1838 }
1840 static bfd_boolean
1842 {
1844 {
1853 }
1855 /* Note that for some reason, a spurious space is tacked
1856 onto the end of the args in some (at least one anyway)
1857 implementations, so strip it off if it exists. */
1858 {
1864 }
1867 }
1869 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1871 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1874 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1875 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1880 /* In lieu of proper flags, assume all EABIv4 or later objects are
1881 interworkable. */
1882 #define INTERWORK_FLAG(abfd) \
1883 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
1884 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK))
1886 /* The linker script knows the section names for placement.
1887 The entry_names are used to do simple name mangling on the stubs.
1888 Given a function name, and its type, the stub can be found. The
1889 name can be changed. The only requirement is the %s be present. */
1904 /* The name of the dynamic interpreter. This is put in the .interp
1905 section. */
1908 #ifdef FOUR_WORD_PLT
1910 /* The first entry in a procedure linkage table looks like
1911 this. It is set up so that any shared library function that is
1912 called before the relocation has been set up calls the dynamic
1913 linker first. */
1915 {
1920 };
1922 /* Subsequent entries in a procedure linkage table look like
1923 this. */
1925 {
1930 };
1932 #else
1934 /* The first entry in a procedure linkage table looks like
1935 this. It is set up so that any shared library function that is
1936 called before the relocation has been set up calls the dynamic
1937 linker first. */
1939 {
1945 };
1947 /* Subsequent entries in a procedure linkage table look like
1948 this. */
1950 {
1954 };
1956 #endif
1958 /* The format of the first entry in the procedure linkage table
1959 for a VxWorks executable. */
1961 {
1966 };
1968 /* The format of subsequent entries in a VxWorks executable. */
1970 {
1977 };
1979 /* The format of entries in a VxWorks shared library. */
1981 {
1988 };
1990 /* An initial stub used if the PLT entry is referenced from Thumb code. */
1991 #define PLT_THUMB_STUB_SIZE 4
1993 {
1996 };
1998 /* The entries in a PLT when using a DLL-based target with multiple
1999 address spaces. */
2001 {
2004 };
2006 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2007 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2008 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2009 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2010 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2011 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2013 enum stub_insn_type
2014 {
2016 THUMB32_TYPE,
2017 ARM_TYPE,
2018 DATA_TYPE
2019 };
2021 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2022 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2023 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2024 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2025 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
2028 {
2029 bfd_vma data;
2035 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2036 to reach the stub if necessary. */
2038 {
2041 };
2043 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2044 available. */
2046 {
2050 };
2052 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
2054 {
2062 };
2064 /* V4T Thumb -> Thumb long branch stub. Using the stack is not
2065 allowed. */
2067 {
2073 };
2075 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2076 available. */
2078 {
2083 };
2085 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2086 one, when the destination is close enough. */
2088 {
2092 };
2094 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
2095 blx to reach the stub if necessary. */
2097 {
2101 };
2103 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2104 blx to reach the stub if necessary. We can not add into pc;
2105 it is not guaranteed to mode switch (different in ARMv6 and
2106 ARMv7). */
2108 {
2113 };
2115 /* V4T ARM -> ARM long branch stub, PIC. */
2117 {
2122 };
2124 /* V4T Thumb -> ARM long branch stub, PIC. */
2126 {
2132 };
2134 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2135 architectures. */
2137 {
2145 };
2147 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2148 allowed. */
2150 {
2157 };
2159 /* Section name for stubs is the associated section name plus this
2160 string. */
2163 enum elf32_arm_stub_type
2164 {
2165 arm_stub_none,
2166 arm_stub_long_branch_any_any,
2167 arm_stub_long_branch_v4t_arm_thumb,
2168 arm_stub_long_branch_thumb_only,
2169 arm_stub_long_branch_v4t_thumb_thumb,
2170 arm_stub_long_branch_v4t_thumb_arm,
2171 arm_stub_short_branch_v4t_thumb_arm,
2172 arm_stub_long_branch_any_arm_pic,
2173 arm_stub_long_branch_any_thumb_pic,
2174 arm_stub_long_branch_v4t_arm_thumb_pic,
2175 arm_stub_long_branch_v4t_thumb_arm_pic,
2176 arm_stub_long_branch_thumb_only_pic,
2177 arm_stub_long_branch_v4t_thumb_thumb_pic,
2178 };
2180 struct elf32_arm_stub_hash_entry
2181 {
2182 /* Base hash table entry structure. */
2185 /* The stub section. */
2188 /* Offset within stub_sec of the beginning of this stub. */
2189 bfd_vma stub_offset;
2191 /* Given the symbol's value and its section we can determine its final
2192 value when building the stubs (so the stub knows where to jump). */
2193 bfd_vma target_value;
2196 /* The stub type. */
2198 /* Its encoding size in bytes. */
2200 /* Its template. */
2202 /* The size of the template (number of entries). */
2205 /* The symbol table entry, if any, that this was derived from. */
2208 /* Destination symbol type (STT_ARM_TFUNC, ...) */
2211 /* Where this stub is being called from, or, in the case of combined
2212 stub sections, the first input section in the group. */
2215 /* The name for the local symbol at the start of this stub. The
2216 stub name in the hash table has to be unique; this does not, so
2217 it can be friendlier. */
2219 };
2221 /* Used to build a map of a section. This is required for mixed-endian
2222 code/data. */
2225 {
2226 bfd_vma vma;
2228 }
2229 elf32_arm_section_map;
2231 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2234 {
2235 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2236 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2237 VFP11_ERRATUM_ARM_VENEER,
2238 VFP11_ERRATUM_THUMB_VENEER
2239 }
2240 elf32_vfp11_erratum_type;
2243 {
2245 bfd_vma vma;
2246 union
2247 {
2248 struct
2249 {
2253 struct
2254 {
2259 elf32_vfp11_erratum_type type;
2260 }
2261 elf32_vfp11_erratum_list;
2264 {
2271 }
2272 _arm_elf_section_data;
2274 #define elf32_arm_section_data(sec) \
2275 ((_arm_elf_section_data *) elf_section_data (sec))
2277 /* The size of the thread control block. */
2278 #define TCB_SIZE 8
2280 struct elf_arm_obj_tdata
2281 {
2284 /* tls_type for each local got entry. */
2287 /* Zero to warn when linking objects with incompatible enum sizes. */
2290 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2292 };
2294 #define elf_arm_tdata(bfd) \
2295 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
2297 #define elf32_arm_local_got_tls_type(bfd) \
2298 (elf_arm_tdata (bfd)->local_got_tls_type)
2300 #define is_arm_elf(bfd) \
2301 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2302 && elf_tdata (bfd) != NULL \
2303 && elf_object_id (bfd) == ARM_ELF_TDATA)
2305 static bfd_boolean
2307 {
2309 ARM_ELF_TDATA);
2310 }
2312 /* The ARM linker needs to keep track of the number of relocs that it
2313 decides to copy in check_relocs for each symbol. This is so that
2314 it can discard PC relative relocs if it doesn't need them when
2315 linking with -Bsymbolic. We store the information in a field
2316 extending the regular ELF linker hash table. */
2318 /* This structure keeps track of the number of relocs we have copied
2319 for a given symbol. */
2320 struct elf32_arm_relocs_copied
2321 {
2322 /* Next section. */
2324 /* A section in dynobj. */
2326 /* Number of relocs copied in this section. */
2327 bfd_size_type count;
2328 /* Number of PC-relative relocs copied in this section. */
2329 bfd_size_type pc_count;
2330 };
2332 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2334 /* Arm ELF linker hash entry. */
2335 struct elf32_arm_link_hash_entry
2336 {
2339 /* Number of PC relative relocs copied for this symbol. */
2342 /* We reference count Thumb references to a PLT entry separately,
2343 so that we can emit the Thumb trampoline only if needed. */
2344 bfd_signed_vma plt_thumb_refcount;
2346 /* Some references from Thumb code may be eliminated by BL->BLX
2347 conversion, so record them separately. */
2348 bfd_signed_vma plt_maybe_thumb_refcount;
2350 /* Since PLT entries have variable size if the Thumb prologue is
2351 used, we need to record the index into .got.plt instead of
2352 recomputing it from the PLT offset. */
2353 bfd_signed_vma plt_got_offset;
2355 #define GOT_UNKNOWN 0
2356 #define GOT_NORMAL 1
2357 #define GOT_TLS_GD 2
2358 #define GOT_TLS_IE 4
2361 /* The symbol marking the real symbol location for exported thumb
2362 symbols with Arm stubs. */
2365 /* A pointer to the most recently used stub hash entry against this
2366 symbol. */
2368 };
2370 /* Traverse an arm ELF linker hash table. */
2371 #define elf32_arm_link_hash_traverse(table, func, info) \
2372 (elf_link_hash_traverse \
2373 (&(table)->root, \
2374 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
2375 (info)))
2377 /* Get the ARM elf linker hash table from a link_info structure. */
2378 #define elf32_arm_hash_table(info) \
2379 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2381 #define arm_stub_hash_lookup(table, string, create, copy) \
2382 ((struct elf32_arm_stub_hash_entry *) \
2383 bfd_hash_lookup ((table), (string), (create), (copy)))
2385 /* ARM ELF linker hash table. */
2386 struct elf32_arm_link_hash_table
2387 {
2388 /* The main hash table. */
2391 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2392 bfd_size_type thumb_glue_size;
2394 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2395 bfd_size_type arm_glue_size;
2397 /* The size in bytes of section containing the ARMv4 BX veneers. */
2398 bfd_size_type bx_glue_size;
2400 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2401 veneer has been populated. */
2404 /* The size in bytes of the section containing glue for VFP11 erratum
2405 veneers. */
2406 bfd_size_type vfp11_erratum_glue_size;
2408 /* An arbitrary input BFD chosen to hold the glue sections. */
2411 /* Nonzero to output a BE8 image. */
2414 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2415 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2418 /* The relocation to use for R_ARM_TARGET2 relocations. */
2421 /* 0 = Ignore R_ARM_V4BX.
2422 1 = Convert BX to MOV PC.
2423 2 = Generate v4 interworing stubs. */
2426 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2429 /* What sort of code sequences we should look for which may trigger the
2430 VFP11 denorm erratum. */
2431 bfd_arm_vfp11_fix vfp11_fix;
2433 /* Global counter for the number of fixes we have emitted. */
2436 /* Nonzero to force PIC branch veneers. */
2439 /* The number of bytes in the initial entry in the PLT. */
2440 bfd_size_type plt_header_size;
2442 /* The number of bytes in the subsequent PLT etries. */
2443 bfd_size_type plt_entry_size;
2445 /* True if the target system is VxWorks. */
2448 /* True if the target system is Symbian OS. */
2451 /* True if the target uses REL relocations. */
2454 /* Short-cuts to get to dynamic linker sections. */
2463 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2466 /* Data for R_ARM_TLS_LDM32 relocations. */
2467 union
2468 {
2469 bfd_signed_vma refcount;
2470 bfd_vma offset;
2473 /* Small local sym to section mapping cache. */
2476 /* For convenience in allocate_dynrelocs. */
2479 /* The stub hash table. */
2482 /* Linker stub bfd. */
2485 /* Linker call-backs. */
2489 /* Array to keep track of which stub sections have been created, and
2490 information on stub grouping. */
2491 struct map_stub
2492 {
2493 /* This is the section to which stubs in the group will be
2494 attached. */
2496 /* The stub section. */
2500 /* Assorted information used by elf32_arm_size_stubs. */
2504 };
2506 /* Create an entry in an ARM ELF linker hash table. */
2512 {
2516 /* Allocate the structure if it has not already been allocated by a
2517 subclass. */
2523 /* Call the allocation method of the superclass. */
2528 {
2537 }
2540 }
2542 /* Initialize an entry in the stub hash table. */
2548 {
2549 /* Allocate the structure if it has not already been allocated by a
2550 subclass. */
2552 {
2557 }
2559 /* Call the allocation method of the superclass. */
2562 {
2565 /* Initialize the local fields. */
2577 }
2580 }
2582 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
2583 shortcuts to them in our hash table. */
2585 static bfd_boolean
2587 {
2591 /* BPABI objects never have a GOT, or associated sections. */
2606 | SEC_HAS_CONTENTS
2607 | SEC_IN_MEMORY
2608 | SEC_LINKER_CREATED
2614 }
2616 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2617 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
2618 hash table. */
2620 static bfd_boolean
2622 {
2641 {
2646 {
2648 htab->plt_entry_size
2650 }
2651 else
2652 {
2653 htab->plt_header_size
2655 htab->plt_entry_size
2657 }
2658 }
2667 }
2669 /* Copy the extra info we tack onto an elf_link_hash_entry. */
2671 static void
2675 {
2682 {
2684 {
2688 /* Add reloc counts against the indirect sym to the direct sym
2689 list. Merge any entries against the same section. */
2691 {
2696 {
2701 }
2704 }
2706 }
2710 }
2713 {
2714 /* Copy over PLT info. */
2721 {
2724 }
2725 }
2728 }
2730 /* Create an ARM elf linker hash table. */
2734 {
2743 elf32_arm_link_hash_newfunc,
2745 {
2748 }
2769 #ifdef FOUR_WORD_PLT
2772 #else
2775 #endif
2794 {
2797 }
2800 }
2802 /* Free the derived linker hash table. */
2804 static void
2806 {
2812 }
2814 /* Determine if we're dealing with a Thumb only architecture. */
2816 static bfd_boolean
2818 {
2820 Tag_CPU_arch);
2827 Tag_CPU_arch_profile);
2830 }
2832 /* Determine if we're dealing with a Thumb-2 object. */
2834 static bfd_boolean
2836 {
2838 Tag_CPU_arch);
2840 }
2842 static bfd_boolean
2844 {
2846 {
2859 }
2860 }
2862 /* Determine the type of stub needed, if any, for a call. */
2864 static enum elf32_arm_stub_type
2870 bfd_vma destination,
2874 {
2875 bfd_vma location;
2876 bfd_signed_vma branch_offset;
2884 /* We don't know the actual type of destination in case it is of
2885 type STT_SECTION: give up. */
2895 /* Determine where the call point is. */
2904 /* Keep a simpler condition, for the sake of clarity. */
2906 {
2908 /* Note when dealing with PLT entries: the main PLT stub is in
2909 ARM mode, so if the branch is in Thumb mode, another
2910 Thumb->ARM stub will be inserted later just before the ARM
2911 PLT stub. We don't take this extra distance into account
2912 here, because if a long branch stub is needed, we'll add a
2913 Thumb->Arm one and branch directly to the ARM PLT entry
2914 because it avoids spreading offset corrections in several
2915 places. */
2916 }
2919 {
2920 /* Handle cases where:
2921 - this call goes too far (different Thumb/Thumb2 max
2922 distance)
2923 - it's a Thumb->Arm call and blx is not available. A stub is
2924 needed in this case, but only if this call is not through a
2925 PLT entry. Indeed, PLT stubs handle mode switching already.
2926 */
2930 || (thumb2
2936 {
2938 {
2939 /* Thumb to thumb. */
2941 {
2943 /* PIC stubs. */
2945 /* V5T and above. */
2946 ? arm_stub_long_branch_any_thumb_pic
2947 /* On V4T, use Thumb code only. */
2950 /* non-PIC stubs. */
2952 /* V5T and above. */
2953 ? arm_stub_long_branch_any_any
2954 /* V4T. */
2956 }
2957 else
2958 {
2960 /* PIC stub. */
2961 ? arm_stub_long_branch_thumb_only_pic
2962 /* non-PIC stub. */
2964 }
2965 }
2966 else
2967 {
2968 /* Thumb to arm. */
2972 {
2977 }
2980 /* PIC stubs. */
2982 /* V5T and above. */
2983 ? arm_stub_long_branch_any_arm_pic
2984 /* V4T PIC stub. */
2987 /* non-PIC stubs. */
2989 /* V5T and above. */
2990 ? arm_stub_long_branch_any_any
2991 /* V4T. */
2994 /* Handle v4t short branches. */
2999 }
3000 }
3001 }
3003 {
3005 {
3006 /* Arm to thumb. */
3011 {
3016 }
3018 /* We have an extra 2-bytes reach because of
3019 the mode change (bit 24 (H) of BLX encoding). */
3023 {
3025 /* PIC stubs. */
3027 /* V5T and above. */
3028 ? arm_stub_long_branch_any_thumb_pic
3029 /* V4T stub. */
3032 /* non-PIC stubs. */
3034 /* V5T and above. */
3035 ? arm_stub_long_branch_any_any
3036 /* V4T. */
3038 }
3039 }
3040 else
3041 {
3042 /* Arm to arm. */
3045 {
3047 /* PIC stubs. */
3048 ? arm_stub_long_branch_any_arm_pic
3049 /* non-PIC stubs. */
3051 }
3052 }
3053 }
3056 }
3058 /* Build a name for an entry in the stub hash table. */
3065 {
3067 bfd_size_type len;
3070 {
3078 }
3079 else
3080 {
3089 }
3092 }
3094 /* Look up an entry in the stub hash. Stub entries are cached because
3095 creating the stub name takes a bit of time. */
3103 {
3111 /* If this input section is part of a group of sections sharing one
3112 stub section, then use the id of the first section in the group.
3113 Stub names need to include a section id, as there may well be
3114 more than one stub used to reach say, printf, and we need to
3115 distinguish between them. */
3121 {
3123 }
3124 else
3125 {
3138 }
3141 }
3143 /* Add a new stub entry to the stub hash. Not all fields of the new
3144 stub entry are initialised. */
3150 {
3158 {
3161 {
3163 bfd_size_type len;
3178 }
3180 }
3182 /* Enter this entry into the linker stub hash table. */
3186 {
3189 stub_name);
3191 }
3198 }
3200 /* Store an Arm insn into an output section not processed by
3201 elf32_arm_write_section. */
3203 static void
3206 {
3209 else
3211 }
3213 /* Store a 16-bit Thumb insn into an output section not processed by
3214 elf32_arm_write_section. */
3216 static void
3219 {
3222 else
3224 }
3226 static bfd_boolean
3229 {
3235 bfd_vma stub_addr;
3237 bfd_vma sym_value;
3246 /* Massage our args to the form they really have. */
3255 /* Make a note of the offset within the stubs for this entry. */
3261 /* This is the address of the start of the stub. */
3265 /* This is the address of the stub destination. */
3275 {
3277 {
3285 /* Handle cases where the target is encoded within the
3286 instruction. */
3288 {
3291 }
3305 }
3306 }
3310 /* Stub size has already been computed in arm_size_one_stub. Check
3311 consistency. */
3314 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
3318 /* Assume there is one and only one entry to relocate in each stub. */
3327 }
3329 /* As above, but don't actually build the stub. Just bump offset so
3330 we know stub section sizes. */
3332 static bfd_boolean
3335 {
3343 /* Massage our args to the form they really have. */
3348 {
3400 }
3404 {
3406 {
3422 }
3423 }
3433 }
3435 /* External entry points for sizing and building linker stubs. */
3437 /* Set up various things so that we can make a list of input sections
3438 for each output section included in the link. Returns -1 on error,
3439 0 when no stubs will be needed, and 1 on success. */
3441 int
3444 {
3450 bfd_size_type amt;
3456 /* Count the number of input BFDs and find the top input section id. */
3460 {
3465 {
3468 }
3469 }
3477 /* We can't use output_bfd->section_count here to find the top output
3478 section index as some sections may have been removed, and
3479 _bfd_strip_section_from_output doesn't renumber the indices. */
3483 {
3486 }
3495 /* For sections we aren't interested in, mark their entries with a
3496 value we can check later. */
3498 do
3505 {
3508 }
3511 }
3513 /* The linker repeatedly calls this function for each input section,
3514 in the order that input sections are linked into output sections.
3515 Build lists of input sections to determine groupings between which
3516 we may insert linker stubs. */
3518 void
3521 {
3525 {
3529 {
3530 /* Steal the link_sec pointer for our list. */
3531 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
3532 /* This happens to make the list in reverse order,
3533 which we reverse later. */
3536 }
3537 }
3538 }
3540 /* See whether we can group stub sections together. Grouping stub
3541 sections may result in fewer stubs. More importantly, we need to
3542 put all .init* and .fini* stubs at the end of the .init or
3543 .fini output sections respectively, because glibc splits the
3544 _init and _fini functions into multiple parts. Putting a stub in
3545 the middle of a function is not a good idea. */
3547 static void
3549 bfd_size_type stub_group_size,
3550 bfd_boolean stubs_always_after_branch)
3551 {
3554 do
3555 {
3562 /* Reverse the list: we must avoid placing stubs at the
3563 beginning of the section because the beginning of the text
3564 section may be required for an interrupt vector in bare metal
3565 code. */
3566 #define NEXT_SEC PREV_SEC
3569 {
3570 /* Pop from tail. */
3574 /* Push on head. */
3577 }
3580 {
3584 bfd_vma end_of_next;
3588 {
3592 /* End of NEXT is too far from start, so stop. */
3594 /* Add NEXT to the group. */
3596 }
3598 /* OK, the size from the start to the start of CURR is less
3599 than stub_group_size and thus can be handled by one stub
3600 section. (Or the head section is itself larger than
3601 stub_group_size, in which case we may be toast.)
3602 We should really be keeping track of the total size of
3603 stubs added here, as stubs contribute to the final output
3604 section size. */
3605 do
3606 {
3608 /* Set up this stub group. */
3610 }
3613 /* But wait, there's more! Input sections up to stub_group_size
3614 bytes after the stub section can be handled by it too. */
3616 {
3620 {
3623 /* End of NEXT is too far from stubs, so stop. */
3625 /* Add NEXT to the stub group. */
3629 }
3630 }
3632 }
3633 }
3637 #undef PREV_SEC
3638 #undef NEXT_SEC
3639 }
3641 /* Determine and set the size of the stub section for a final link.
3643 The basic idea here is to examine all the relocations looking for
3644 PC-relative calls to a target that is unreachable with a "bl"
3645 instruction. */
3647 bfd_boolean
3651 bfd_signed_vma group_size,
3654 {
3655 bfd_size_type stub_group_size;
3656 bfd_boolean stubs_always_after_branch;
3660 /* Propagate mach to stub bfd, because it may not have been
3661 finalized when we created stub_bfd. */
3665 /* Stash our params away. */
3672 else
3676 {
3677 /* Default values. */
3678 /* Thumb branch range is +-4MB has to be used as the default
3679 maximum size (a given section can contain both ARM and Thumb
3680 code, so the worst case has to be taken into account).
3682 This value is 24K less than that, which allows for 2025
3683 12-byte stubs. If we exceed that, then we will fail to link.
3684 The user will have to relink with an explicit group size
3685 option. */
3687 }
3692 {
3700 {
3705 /* We'll need the symbol table in a second. */
3710 /* Walk over each section attached to the input bfd. */
3714 {
3717 /* If there aren't any relocs, then there's nothing more
3718 to do. */
3724 /* If this section is a link-once section that will be
3725 discarded, then don't create any stubs. */
3730 /* Get the relocs. */
3731 internal_relocs
3737 /* Now examine each relocation. */
3741 {
3746 bfd_vma sym_value;
3747 bfd_vma destination;
3758 {
3760 error_ret_free_internal:
3764 }
3766 /* Only look for stubs on call instructions. */
3771 /* Now determine the call target, its name, value,
3772 section. */
3779 {
3780 /* It's a local symbol. */
3785 {
3786 local_syms
3789 local_syms
3795 }
3806 sym_name
3810 }
3811 else
3812 {
3813 /* It's an external symbol. */
3827 {
3834 }
3837 /* For a shared library, these will need a PLT stub,
3838 which is treated separately.
3839 For absolute code, they cannot be handled. */
3841 else
3842 {
3845 }
3848 }
3850 /* Determine what (if any) linker stub is needed. */
3857 /* Support for grouping stub sections. */
3860 /* Get the name of this stub. */
3866 stub_name,
3869 {
3870 /* The proper stub has already been created. */
3873 }
3877 {
3880 }
3890 stub_entry->output_name
3895 {
3898 }
3900 /* For historical reasons, use the existing names for
3901 ARM-to-Thumb and Thumb-to-ARM stubs. */
3905 sym_name);
3909 sym_name);
3910 else
3912 sym_name);
3915 }
3917 /* We're done with the internal relocs, free them. */
3920 }
3921 }
3926 /* OK, we've added some stubs. Find out the new size of the
3927 stub sections. */
3935 /* Ask the linker to do its stuff. */
3938 }
3942 error_ret_free_local:
3944 }
3946 /* Build all the stubs associated with the current output file. The
3947 stubs are kept in a hash table attached to the main linker hash
3948 table. We also set up the .plt entries for statically linked PIC
3949 functions here. This function is called via arm_elf_finish in the
3950 linker. */
3952 bfd_boolean
3954 {
3964 {
3965 bfd_size_type size;
3967 /* Ignore non-stub sections. */
3971 /* Allocate memory to hold the linker stubs. */
3977 }
3979 /* Build the stubs as directed by the stub hash table. */
3984 }
3986 /* Locate the Thumb encoded calling stub for NAME. */
3992 {
3997 /* We need a pointer to the armelf specific hash table. */
4007 hash = elf_link_hash_lookup
4018 }
4020 /* Locate the ARM encoded calling stub for NAME. */
4026 {
4031 /* We need a pointer to the elfarm specific hash table. */
4041 myh = elf_link_hash_lookup
4052 }
4054 /* ARM->Thumb glue (static images):
4056 .arm
4057 __func_from_arm:
4058 ldr r12, __func_addr
4059 bx r12
4060 __func_addr:
4061 .word func @ behave as if you saw a ARM_32 reloc.
4063 (v5t static images)
4064 .arm
4065 __func_from_arm:
4066 ldr pc, __func_addr
4067 __func_addr:
4068 .word func @ behave as if you saw a ARM_32 reloc.
4070 (relocatable images)
4071 .arm
4072 __func_from_arm:
4073 ldr r12, __func_offset
4074 add r12, r12, pc
4075 bx r12
4076 __func_offset:
4077 .word func - . */
4079 #define ARM2THUMB_STATIC_GLUE_SIZE 12
4084 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
4088 #define ARM2THUMB_PIC_GLUE_SIZE 16
4093 /* Thumb->ARM: Thumb->(non-interworking aware) ARM
4095 .thumb .thumb
4096 .align 2 .align 2
4097 __func_from_thumb: __func_from_thumb:
4098 bx pc push {r6, lr}
4099 nop ldr r6, __func_addr
4100 .arm mov lr, pc
4101 b func bx r6
4102 .arm
4103 ;; back_to_thumb
4104 ldmia r13! {r6, lr}
4105 bx lr
4106 __func_addr:
4107 .word func */
4109 #define THUMB2ARM_GLUE_SIZE 8
4114 #define VFP11_ERRATUM_VENEER_SIZE 8
4116 #define ARM_BX_VENEER_SIZE 12
4121 #ifndef ELFARM_NABI_C_INCLUDED
4122 static void
4124 {
4140 }
4142 bfd_boolean
4144 {
4152 ARM2THUMB_GLUE_SECTION_NAME);
4156 THUMB2ARM_GLUE_SECTION_NAME);
4160 VFP11_ERRATUM_VENEER_SECTION_NAME);
4164 ARM_BX_GLUE_SECTION_NAME);
4167 }
4169 /* Allocate space and symbols for calling a Thumb function from Arm mode.
4170 returns the symbol identifying the stub. */
4175 {
4182 bfd_vma val;
4183 bfd_size_type size;
4190 s = bfd_get_section_by_name
4195 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
4201 myh = elf_link_hash_lookup
4205 {
4206 /* We've already seen this guy. */
4209 }
4211 /* The only trick here is using hash_table->arm_glue_size as the value.
4212 Even though the section isn't allocated yet, this is where we will be
4213 putting it. The +1 on the value marks that the stub has not been
4214 output yet - not that it is a Thumb function. */
4232 else
4239 }
4241 static void
4244 {
4251 bfd_vma val;
4258 s = bfd_get_section_by_name
4270 myh = elf_link_hash_lookup
4274 {
4275 /* We've already seen this guy. */
4278 }
4280 /* The only trick here is using hash_table->thumb_glue_size as the value.
4281 Even though the section isn't allocated yet, this is where we will be
4282 putting it. The +1 on the value marks that the stub has not been
4283 output yet - not that it is a Thumb function. */
4290 /* If we mark it 'Thumb', the disassembler will do a better job. */
4300 /* Allocate another symbol to mark where we switch to Arm mode. */
4318 }
4321 /* Allocate space for ARMv4 BX veneers. */
4323 static void
4325 {
4331 bfd_vma val;
4333 /* BX PC does not need a veneer. */
4342 /* Check if this veneer has already been allocated. */
4346 s = bfd_get_section_by_name
4351 /* Add symbol for veneer. */
4358 myh = elf_link_hash_lookup
4376 }
4379 /* Add an entry to the code/data map for section SEC. */
4381 static void
4383 {
4388 {
4392 }
4397 {
4401 }
4404 {
4407 }
4408 }
4411 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
4412 veneers are handled for now. */
4414 static bfd_vma
4420 {
4426 bfd_vma val;
4436 s = bfd_get_section_by_name
4451 myh = elf_link_hash_lookup
4466 /* Link veneer back to calling location. */
4479 /* A symbol for the return from the veneer. */
4483 myh = elf_link_hash_lookup
4500 /* Generate a mapping symbol for the veneer section, and explicitly add an
4501 entry for that symbol to the code/data map for the section. */
4503 {
4505 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
4506 ever requires this erratum fix. */
4516 /* The elf32_arm_init_maps function only cares about symbols from input
4517 BFDs. We must make a note of this generated mapping symbol
4518 ourselves so that code byteswapping works properly in
4519 elf32_arm_write_section. */
4521 }
4527 /* The offset of the veneer. */
4529 }
4531 /* Note: we do not include the flag SEC_LINKER_CREATED, as that
4532 would prevent elf_link_input_bfd() from processing the contents
4533 of the section. */
4534 #define ARM_GLUE_SECTION_FLAGS \
4535 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE | SEC_READONLY)
4537 /* Create a fake section for use by the ARM backend of the linker. */
4539 static bfd_boolean
4541 {
4546 /* Already made. */
4555 /* Set the gc mark to prevent the section from being removed by garbage
4556 collection, despite the fact that no relocs refer to this section. */
4560 }
4562 /* Add the glue sections to ABFD. This function is called from the
4563 linker scripts in ld/emultempl/{armelf}.em. */
4565 bfd_boolean
4568 {
4569 /* If we are only performing a partial
4570 link do not bother adding the glue. */
4574 /* Linker stubs don't need glue. */
4582 }
4584 /* Select a BFD to be used to hold the sections used by the glue code.
4585 This function is called from the linker scripts in ld/emultempl/
4586 {armelf/pe}.em. */
4588 bfd_boolean
4590 {
4593 /* If we are only performing a partial link
4594 do not bother getting a bfd to hold the glue. */
4598 /* Make sure we don't attach the glue sections to a dynamic object. */
4608 /* Save the bfd for later use. */
4612 }
4614 static void
4616 {
4620 }
4622 bfd_boolean
4625 {
4634 /* If we are only performing a partial link do not bother
4635 to construct any glue. */
4639 /* Here we have a bfd that is to be included on the link. We have a
4640 hook to do reloc rummaging, before section sizes are nailed down. */
4648 {
4650 abfd);
4652 }
4654 /* PR 5398: If we have not decided to include any loadable sections in
4655 the output then we will not have a glue owner bfd. This is OK, it
4656 just means that there is nothing else for us to do here. */
4660 /* Rummage around all the relocs and map the glue vectors. */
4667 {
4676 /* Load the relocs. */
4677 internal_relocs
4685 {
4694 /* These are the only relocation types we care about. */
4702 /* Get the section contents if we haven't done so already. */
4704 {
4705 /* Get cached copy if it exists. */
4708 else
4709 {
4710 /* Go get them off disk. */
4713 }
4714 }
4717 {
4723 }
4725 /* If the relocation is not against a symbol it cannot concern us. */
4728 /* We don't care about local symbols. */
4732 /* This is an external symbol. */
4737 /* If the relocation is against a static symbol it must be within
4738 the current section and so cannot be a cross ARM/Thumb relocation. */
4742 /* If the call will go through a PLT entry then we do not need
4743 glue. */
4748 {
4752 /* This one is a call from arm code. We need to look up
4753 the target of the call. If it is a thumb target, we
4754 insert glue. */
4760 /* This one is a call from thumb code. We look
4761 up the target of the call. If it is not a thumb
4762 target, we insert glue. */
4771 }
4772 }
4783 }
4787 error_return:
4796 }
4797 #endif
4800 /* Initialise maps of ARM/Thumb/data for input BFDs. */
4802 void
4804 {
4809 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
4819 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
4820 should contain the number of local symbols, which should come before any
4821 global symbols. Mapping symbols are always local. */
4823 NULL);
4825 /* No internal symbols read? Skip this BFD. */
4830 {
4837 {
4842 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
4844 }
4845 }
4846 }
4849 void
4851 {
4855 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
4857 {
4859 {
4866 /* Give a warning, but do as the user requests anyway. */
4869 }
4870 }
4872 /* For earlier architectures, we might need the workaround, but do not
4873 enable it by default. If users is running with broken hardware, they
4874 must enable the erratum fix explicitly. */
4876 }
4879 enum bfd_arm_vfp11_pipe
4880 {
4881 VFP11_FMAC,
4882 VFP11_LS,
4883 VFP11_DS,
4884 VFP11_BAD
4885 };
4887 /* Return a VFP register number. This is encoded as RX:X for single-precision
4888 registers, or X:RX for double-precision registers, where RX is the group of
4889 four bits in the instruction encoding and X is the single extension bit.
4890 RX and X fields are specified using their lowest (starting) bit. The return
4891 value is:
4893 0...31: single-precision registers s0...s31
4894 32...63: double-precision registers d0...d31.
4896 Although X should be zero for VFP11 (encoding d0...d15 only), we might
4897 encounter VFP3 instructions, so we allow the full range for DP registers. */
4899 static unsigned int
4902 {
4905 else
4907 }
4909 /* Set bits in *WMASK according to a register number REG as encoded by
4910 bfd_arm_vfp11_regno(). Ignore d16-d31. */
4912 static void
4914 {
4919 }
4921 /* Return TRUE if WMASK overwrites anything in REGS. */
4923 static bfd_boolean
4925 {
4929 {
4942 }
4945 }
4947 /* In this function, we're interested in two things: finding input registers
4948 for VFP data-processing instructions, and finding the set of registers which
4949 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
4950 hold the written set, so FLDM etc. are easy to deal with (we're only
4951 interested in 32 SP registers or 16 dp registers, due to the VFP version
4952 implemented by the chip in question). DP registers are marked by setting
4953 both SP registers in the write mask). */
4955 static enum bfd_arm_vfp11_pipe
4958 {
4963 {
4973 {
4995 vfp_binop:
5003 {
5008 {
5022 /* These instructions will not bounce due to underflow. */
5028 /* fsqrt cannot underflow, but it can (perhaps) overwrite
5029 registers to cause the erratum in previous instructions. */
5035 {
5040 /* Only FCVTSD can underflow. */
5047 }
5052 }
5053 }
5058 }
5059 }
5060 /* Two-register transfer. */
5062 {
5066 {
5069 else
5070 {
5073 }
5074 }
5077 }
5079 {
5084 {
5091 {
5099 }
5109 }
5112 }
5113 /* Single-register transfer. Note L==0. */
5115 {
5120 {
5123 /* Mark fmdhr and fmdlr as writing to the whole of the DP
5124 destination register. I don't know if this is exactly right,
5125 but it is the conservative choice. */
5131 }
5134 }
5137 }
5143 /* Look for potentially-troublesome code sequences which might trigger the
5144 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
5145 (available from ARM) for details of the erratum. A short version is
5146 described in ld.texinfo. */
5148 bfd_boolean
5150 {
5158 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
5159 The states transition as follows:
5161 0 -> 1 (vector) or 0 -> 2 (scalar)
5162 A VFP FMAC-pipeline instruction has been seen. Fill
5163 regs[0]..regs[numregs-1] with its input operands. Remember this
5164 instruction in 'first_fmac'.
5166 1 -> 2
5167 Any instruction, except for a VFP instruction which overwrites
5168 regs[*].
5170 1 -> 3 [ -> 0 ] or
5171 2 -> 3 [ -> 0 ]
5172 A VFP instruction has been seen which overwrites any of regs[*].
5173 We must make a veneer! Reset state to 0 before examining next
5174 instruction.
5176 2 -> 0
5177 If we fail to match anything in state 2, reset to state 0 and reset
5178 the instruction pointer to the instruction after 'first_fmac'.
5180 If the VFP11 vector mode is in use, there must be at least two unrelated
5181 instructions between anti-dependent VFP11 instructions to properly avoid
5182 triggering the erratum, hence the use of the extra state 1. */
5184 /* If we are only performing a partial link do not bother
5185 to construct any glue. */
5189 /* Skip if this bfd does not correspond to an ELF image. */
5193 /* We should have chosen a fix type by the time we get here. */
5199 /* Skip this BFD if it corresponds to an executable or dynamic object. */
5204 {
5208 /* If we don't have executable progbits, we're not interested in this
5209 section. Also skip if section is to be excluded. */
5229 elf32_arm_compare_mapping);
5232 {
5238 /* FIXME: Only ARM mode is supported at present. We may need to
5239 support Thumb-2 mode also at some point. */
5244 {
5259 {
5263 /* I'm assuming the VFP11 erratum can trigger with denorm
5264 operands on either the FMAC or the DS pipeline. This might
5265 lead to slightly overenthusiastic veneer insertion. */
5267 {
5271 }
5275 {
5278 other_regs,
5282 numregs))
5284 else
5286 }
5290 {
5293 other_regs,
5297 numregs))
5299 else
5300 {
5303 }
5304 }
5309 }
5312 {
5313 elf32_vfp11_erratum_list *newerr
5322 {
5329 }
5332 first_fmac);
5340 }
5343 }
5344 }
5350 }
5354 error_return:
5360 }
5362 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations
5363 after sections have been laid out, using specially-named symbols. */
5365 void
5368 {
5376 /* Skip if this bfd does not correspond to an ELF image. */
5386 {
5391 {
5393 bfd_vma vma;
5396 {
5399 /* Find veneer symbol. */
5403 myh = elf_link_hash_lookup
5419 /* Find return location. */
5423 myh = elf_link_hash_lookup
5439 }
5440 }
5441 }
5444 }
5447 /* Set target relocation values needed during linking. */
5449 void
5456 bfd_arm_vfp11_fix vfp11_fix,
5459 {
5471 else
5472 {
5474 target2_type);
5475 }
5484 }
5486 /* Replace the target offset of a Thumb bl or b.w instruction. */
5488 static void
5490 {
5491 bfd_vma upper;
5492 bfd_vma lower;
5509 }
5511 /* Thumb code calling an ARM function. */
5513 static int
5521 bfd_vma offset,
5522 bfd_signed_vma addend,
5523 bfd_vma val,
5525 {
5527 bfd_vma my_offset;
5544 THUMB2ARM_GLUE_SECTION_NAME);
5551 {
5555 {
5562 }
5573 ret_offset =
5574 /* Address of destination of the stub. */
5577 /* Offset from the start of the current section
5578 to the start of the stubs. */
5580 /* Offset of the start of this stub from the start of the stubs. */
5581 + my_offset
5582 /* Address of the start of the current section. */
5584 /* The branch instruction is 4 bytes into the stub. */
5586 /* ARM branches work from the pc of the instruction + 8. */
5592 }
5596 /* Now go back and fix up the original BL insn to point to here. */
5597 ret_offset =
5598 /* Address of where the stub is located. */
5600 /* Address of where the BL is located. */
5603 /* Addend in the relocation. */
5604 - addend
5605 /* Biassing for PC-relative addressing. */
5611 }
5613 /* Populate an Arm to Thumb stub. Returns the stub symbol. */
5621 bfd_vma val,
5624 {
5625 bfd_vma my_offset;
5642 {
5646 {
5651 }
5658 {
5659 /* For relocatable objects we can't use absolute addresses,
5660 so construct the address from a relative offset. */
5661 /* TODO: If the offset is small it's probably worth
5662 constructing the address with adds. */
5669 /* Adjust the offset by 4 for the position of the add,
5670 and 8 for the pipeline offset. */
5677 }
5679 {
5683 /* It's a thumb address. Add the low order bit. */
5686 }
5687 else
5688 {
5695 /* It's a thumb address. Add the low order bit. */
5700 }
5701 }
5706 }
5708 /* Arm code calling a Thumb function. */
5710 static int
5718 bfd_vma offset,
5719 bfd_signed_vma addend,
5720 bfd_vma val,
5722 {
5724 bfd_vma my_offset;
5736 ARM2THUMB_GLUE_SECTION_NAME);
5750 /* Somehow these are both 4 too far, so subtract 8. */
5752 + my_offset
5764 }
5766 /* Populate Arm stub for an exported Thumb function. */
5768 static bfd_boolean
5770 {
5777 bfd_vma val;
5781 /* Allocate stubs for exported Thumb functions on v4t. */
5791 ARM2THUMB_GLUE_SECTION_NAME);
5809 }
5811 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
5813 static bfd_vma
5815 {
5817 bfd_vma glue_addr;
5827 ARM_BX_GLUE_SECTION_NAME);
5837 {
5843 }
5846 }
5848 /* Generate Arm stubs for exported Thumb symbols. */
5849 static void
5852 {
5856 /* Ignore this if we are not called by the ELF backend linker. */
5860 /* If blx is available then exported Thumb symbols are OK and there is
5861 nothing to do. */
5866 link_info);
5867 }
5869 /* Some relocations map to different relocations depending on the
5870 target. Return the real relocation. */
5872 static int
5875 {
5877 {
5881 else
5889 }
5890 }
5892 /* Return the base VMA address which should be subtracted from real addresses
5893 when resolving @dtpoff relocation.
5894 This is PT_TLS segment p_vaddr. */
5896 static bfd_vma
5898 {
5899 /* If tls_sec is NULL, we should have signalled an error already. */
5903 }
5905 /* Return the relocation value for @tpoff relocation
5906 if STT_TLS virtual address is ADDRESS. */
5908 static bfd_vma
5910 {
5912 bfd_vma base;
5914 /* If tls_sec is NULL, we should have signalled an error already. */
5919 }
5921 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
5922 VALUE is the relocation value. */
5924 static bfd_reloc_status_type
5926 {
5933 }
5935 /* For a given value of n, calculate the value of G_n as required to
5936 deal with group relocations. We return it in the form of an
5937 encoded constant-and-rotation, together with the final residual. If n is
5938 specified as less than zero, then final_residual is filled with the
5939 input value and no further action is performed. */
5941 static bfd_vma
5943 {
5945 bfd_vma g_n;
5950 {
5953 /* Calculate which part of the value to mask. */
5956 else
5957 {
5960 /* Determine the most significant bit in the residual and
5961 align the resulting value to a 2-bit boundary. */
5966 /* The desired shift is now (msb - 6), or zero, whichever
5967 is the greater. */
5971 }
5973 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
5978 /* Calculate the residual for the next time around. */
5980 }
5985 }
5987 /* Given an ARM instruction, determine whether it is an ADD or a SUB.
5988 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
5990 static int
5992 {
6002 }
6004 /* Perform a relocation as part of a final link. */
6006 static bfd_reloc_status_type
6013 bfd_vma value,
6021 {
6032 bfd_vma addend;
6033 bfd_signed_vma signed_addend;
6040 /* Some relocation types map to different relocations depending on the
6041 target. We pick the right one here. */
6046 /* If the start address has been set, then set the EF_ARM_HASENTRY
6047 flag. Setting this more than once is redundant, but the cost is
6048 not too high, and it keeps the code simple.
6050 The test is done here, rather than somewhere else, because the
6051 start address is only set just before the final link commences.
6053 Note - if the user deliberately sets a start address of 0, the
6054 flag will not be set. */
6060 {
6063 }
6070 {
6074 {
6078 }
6079 else
6081 }
6082 else
6086 {
6088 /* We don't need to find a value for this symbol. It's just a
6089 marker. */
6107 /* Handle relocations which should use the PLT entry. ABS32/REL32
6108 will use the symbol's value, which may point to a PLT entry, but we
6109 don't need to handle that here. If we created a PLT entry, all
6110 branches in this object should go to it, except if the PLT is too
6111 far away, in which case a long branch stub should be inserted. */
6118 {
6119 /* If we've created a .plt section, and assigned a PLT entry to
6120 this function, it should not be known to bind locally. If
6121 it were, we would have cleared the PLT entry. */
6131 }
6133 /* When generating a shared object or relocatable executable, these
6134 relocations are copied into the output file to be resolved at
6135 run time. */
6151 {
6152 Elf_Internal_Rela outrel;
6159 {
6165 }
6189 else
6190 {
6193 /* This symbol is local, or marked to become local. */
6197 {
6200 /* On Symbian OS, the data segment and text segement
6201 can be relocated independently. Therefore, we
6202 must indicate the segment to which this
6203 relocation is relative. The BPABI allows us to
6204 use any symbol in the right segment; we just use
6205 the section symbol as it is convenient. (We
6206 cannot use the symbol given by "h" directly as it
6207 will not appear in the dynamic symbol table.)
6209 Note that the dynamic linker ignores the section
6210 symbol value, so we don't subtract osec->vma
6211 from the emitted reloc addend. */
6214 else
6218 {
6224 else
6227 }
6229 }
6230 else
6231 /* On SVR4-ish systems, the dynamic loader cannot
6232 relocate the text and data segments independently,
6233 so the symbol does not matter. */
6238 else
6240 }
6246 /* If this reloc is against an external symbol, we do not want to
6247 fiddle with the addend. Otherwise, we need to include the symbol
6248 value so that it becomes an addend for the dynamic reloc. */
6255 }
6257 {
6266 {
6267 bfd_vma from;
6268 bfd_signed_vma branch_offset;
6272 {
6273 /* Check for Arm calling Arm function. */
6274 /* FIXME: Should we translate the instruction into a BL
6275 instruction instead ? */
6279 input_bfd,
6281 }
6283 {
6284 /* Check for Arm calling Thumb function. */
6286 {
6291 error_message))
6293 else
6295 }
6296 }
6298 /* Check if a stub has to be inserted because the
6299 destination is too far or we are changing mode. */
6301 {
6302 /* If the call goes through a PLT entry, make sure to
6303 check distance to the right destination address. */
6305 {
6310 }
6320 {
6321 /* The target is out of reach, so redirect the
6322 branch to the local stub for this function. */
6331 }
6332 }
6334 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
6335 where:
6336 S is the address of the symbol in the relocation.
6337 P is address of the instruction being relocated.
6338 A is the addend (extracted from the instruction) in bytes.
6340 S is held in 'value'.
6341 P is the base address of the section containing the
6342 instruction plus the offset of the reloc into that
6343 section, ie:
6344 (input_section->output_section->vma +
6345 input_section->output_offset +
6346 rel->r_offset).
6347 A is the addend, converted into bytes, ie:
6348 (signed_addend * 4)
6350 Note: None of these operations have knowledge of the pipeline
6351 size of the processor, thus it is up to the assembler to
6352 encode this information into the addend. */
6358 else
6359 /* RELA addends do not have to be adjusted by howto->size. */
6365 /* A branch to an undefined weak symbol is turned into a jump to
6366 the next instruction. */
6368 {
6371 }
6372 else
6373 {
6374 /* Perform a signed range check. */
6384 /* Set the H bit in the BLX instruction. */
6386 {
6389 else
6391 }
6393 {
6394 /* Select the correct instruction (BL or BLX). */
6395 /* Only if we are not handling a BL to a stub. In this
6396 case, mode switching is performed by the stub. */
6399 else
6400 {
6403 }
6404 }
6405 }
6406 }
6438 {
6439 /* Check for overflow. */
6442 }
6448 }
6471 /* Support ldr and str instructions for the thumb. */
6473 {
6474 /* Need to refetch addend. */
6476 /* ??? Need to determine shift amount from operand size. */
6478 }
6481 /* ??? Isn't value unsigned? */
6485 /* ??? Value needs to be properly shifted into place first. */
6491 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
6492 {
6493 bfd_vma insn;
6494 bfd_signed_vma relocation;
6500 {
6505 }
6527 }
6530 /* Corresponds to: ldr.w reg, [pc, #offset]. */
6531 {
6532 bfd_vma insn;
6533 bfd_signed_vma relocation;
6539 {
6543 }
6563 }
6568 /* Thumb BL (branch long instruction). */
6569 {
6570 bfd_vma relocation;
6571 bfd_vma reloc_sign;
6575 bfd_signed_vma reloc_signed_max;
6576 bfd_signed_vma reloc_signed_min;
6577 bfd_vma check;
6578 bfd_signed_vma signed_check;
6582 /* A branch to an undefined weak symbol is turned into a jump to
6583 the next instruction unless a PLT entry will be created. */
6586 {
6590 }
6592 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
6593 with Thumb-1) involving the J1 and J2 bits. */
6595 {
6605 /* Sign extend. */
6609 }
6612 {
6613 /* Check for Thumb to Thumb call. */
6614 /* FIXME: Should we translate the instruction into a BL
6615 instruction instead ? */
6619 input_bfd,
6621 }
6622 else
6623 {
6624 /* If it is not a call to Thumb, assume call to Arm.
6625 If it is a call relative to a section name, then it is not a
6626 function call at all, but rather a long jump. Calls through
6627 the PLT do not require stubs. */
6631 {
6633 {
6634 /* Convert BL to BLX. */
6636 }
6638 {
6642 error_message))
6644 else
6646 }
6647 }
6650 {
6651 /* Make sure this is a BL. */
6653 }
6654 }
6656 /* Handle calls via the PLT. */
6658 {
6663 {
6664 /* If the Thumb BLX instruction is available, convert the
6665 BL to a BLX instruction to call the ARM-mode PLT entry. */
6667 }
6668 else
6669 /* Target the Thumb stub before the ARM PLT entry. */
6672 }
6675 {
6676 /* Check if a stub has to be inserted because the destination
6677 is too far. */
6678 bfd_vma from;
6679 bfd_signed_vma branch_offset;
6690 ||
6691 (thumb2
6695 {
6696 /* The target is out of reach or we are changing modes, so
6697 redirect the branch to the local stub for this
6698 function. */
6707 /* If this call becomes a call to Arm, force BLX. */
6709 {
6714 }
6715 }
6716 }
6726 /* If this is a signed value, the rightshift just dropped
6727 leading 1 bits (assuming twos complement). */
6730 else
6733 /* Calculate the permissable maximum and minimum values for
6734 this relocation according to whether we're relocating for
6735 Thumb-2 or not. */
6742 /* Assumes two's complement. */
6747 /* For a BLX instruction, make sure that the relocation is rounded up
6748 to a word boundary. This follows the semantics of the instruction
6749 which specifies that bit 1 of the target address will come from bit
6750 1 of the base address. */
6753 /* Put RELOCATION back into the insn. Assumes two's complement.
6754 We use the Thumb-2 encoding, which is safe even if dealing with
6755 a Thumb-1 instruction by virtue of our overflow check above. */
6765 /* Put the relocated value back in the object file: */
6770 }
6774 /* Thumb32 conditional branch instruction. */
6775 {
6776 bfd_vma relocation;
6782 bfd_signed_vma signed_check;
6784 /* Need to refetch the addend, reconstruct the top three bits,
6785 and squish the two 11 bit pieces together. */
6787 {
6801 }
6803 /* Handle calls via the PLT. */
6805 {
6809 /* Target the Thumb stub before the ARM PLT entry. */
6812 }
6814 /* ??? Should handle interworking? GCC might someday try to
6815 use this for tail calls. */
6826 /* Put RELOCATION back into the insn. */
6827 {
6836 }
6838 /* Put the relocated value back in the object file: */
6843 }
6848 /* Thumb B (branch) instruction). */
6849 {
6850 bfd_signed_vma relocation;
6853 bfd_signed_vma signed_check;
6855 /* CZB cannot jump backward. */
6860 {
6861 /* Need to refetch addend. */
6864 {
6868 }
6869 else
6871 /* The value in the insn has been right shifted. We need to
6872 undo this, so that we can perform the address calculation
6873 in terms of bytes. */
6875 }
6887 else
6893 /* Assumes two's complement. */
6898 }
6903 {
6904 bfd_vma insn;
6905 bfd_vma relocation;
6909 {
6910 /* Extract the addend. */
6913 }
6923 }
6931 /* Relocation is relative to the start of the
6932 global offset table. */
6938 /* If we are addressing a Thumb function, we need to adjust the
6939 address by one, so that attempts to call the function pointer will
6940 correctly interpret it as Thumb code. */
6944 /* Note that sgot->output_offset is not involved in this
6945 calculation. We always want the start of .got. If we
6946 define _GLOBAL_OFFSET_TABLE in a different way, as is
6947 permitted by the ABI, we might have to change this
6948 calculation. */
6955 /* Use global offset table as symbol value. */
6969 /* Relocation is to the entry for this symbol in the
6970 global offset table. */
6975 {
6976 bfd_vma off;
6977 bfd_boolean dyn;
6988 {
6989 /* This is actually a static link, or it is a -Bsymbolic link
6990 and the symbol is defined locally. We must initialize this
6991 entry in the global offset table. Since the offset must
6992 always be a multiple of 4, we use the least significant bit
6993 to record whether we have initialized it already.
6995 When doing a dynamic link, we create a .rel(a).got relocation
6996 entry to initialize the value. This is done in the
6997 finish_dynamic_symbol routine. */
7000 else
7001 {
7002 /* If we are addressing a Thumb function, we need to
7003 adjust the address by one, so that attempts to
7004 call the function pointer will correctly
7005 interpret it as Thumb code. */
7011 }
7012 }
7013 else
7017 }
7018 else
7019 {
7020 bfd_vma off;
7027 /* The offset must always be a multiple of 4. We use the
7028 least significant bit to record whether we have already
7029 generated the necessary reloc. */
7032 else
7033 {
7034 /* If we are addressing a Thumb function, we need to
7035 adjust the address by one, so that attempts to
7036 call the function pointer will correctly
7037 interpret it as Thumb code. */
7045 {
7047 Elf_Internal_Rela outrel;
7050 srelgot = (bfd_get_section_by_name
7062 }
7065 }
7068 }
7084 {
7085 bfd_vma off;
7094 else
7095 {
7096 /* If we don't know the module number, create a relocation
7097 for it. */
7099 {
7100 Elf_Internal_Rela outrel;
7118 }
7119 else
7123 }
7131 }
7135 {
7136 bfd_vma off;
7145 {
7146 bfd_boolean dyn;
7151 {
7154 }
7157 }
7158 else
7159 {
7164 }
7171 else
7172 {
7174 Elf_Internal_Rela outrel;
7178 /* The GOT entries have not been initialized yet. Do it
7179 now, and emit any relocations. If both an IE GOT and a
7180 GD GOT are necessary, we emit the GD first. */
7186 {
7192 }
7195 {
7197 {
7215 else
7216 {
7219 R_ARM_TLS_DTPOFF32);
7230 }
7231 }
7232 else
7233 {
7234 /* If we are not emitting relocations for a
7235 general dynamic reference, then we must be in a
7236 static link or an executable link with the
7237 symbol binding locally. Mark it as belonging
7238 to module 1, the executable. */
7243 }
7246 }
7249 {
7251 {
7254 else
7268 }
7269 else
7273 }
7277 else
7279 }
7289 }
7293 {
7299 }
7300 else
7309 {
7312 /* Ensure that we have a BX instruction. */
7316 {
7317 /* Branch to veneer. */
7318 bfd_vma glue_addr;
7325 }
7326 else
7327 {
7328 /* Preserve Rm (lowest four bits) and the condition code
7329 (highest four bits). Other bits encode MOV PC,Rm. */
7331 }
7334 }
7341 /* Until we properly support segment-base-relative addressing then
7342 we assume the segment base to be zero, as for the group relocations.
7343 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
7344 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
7348 {
7352 {
7355 }
7377 }
7384 /* Until we properly support segment-base-relative addressing then
7385 we assume the segment base to be zero, as for the above relocations.
7386 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
7387 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
7388 as R_ARM_THM_MOVT_ABS. */
7392 {
7393 bfd_vma insn;
7399 {
7405 }
7431 }
7444 {
7448 /* sb should be the origin of the *segment* containing the symbol.
7449 It is not clear how to obtain this OS-dependent value, so we
7450 make an arbitrary choice of zero. */
7452 bfd_vma residual;
7453 bfd_vma g_n;
7454 bfd_signed_vma signed_value;
7457 /* Determine which group of bits to select. */
7459 {
7481 }
7483 /* If REL, extract the addend from the insn. If RELA, it will
7484 have already been fetched for us. */
7486 {
7493 else
7494 {
7495 /* Compensate for the fact that in the instruction, the
7496 rotation is stored in multiples of 2 bits. */
7499 /* Rotate "constant" right by "rotation" bits. */
7502 }
7504 /* Determine if the instruction is an ADD or a SUB.
7505 (For REL, this determines the sign of the addend.) */
7508 {
7514 }
7517 }
7519 /* Compute the value (X) to go in the place. */
7525 /* PC relative. */
7527 else
7528 /* Section base relative. */
7531 /* If the target symbol is a Thumb function, then set the
7532 Thumb bit in the address. */
7536 /* Calculate the value of the relevant G_n, in encoded
7537 constant-with-rotation format. */
7541 /* Check for overflow if required. */
7548 {
7554 }
7556 /* Mask out the value and the ADD/SUB part of the opcode; take care
7557 not to destroy the S bit. */
7560 /* Set the opcode according to whether the value to go in the
7561 place is negative. */
7564 else
7567 /* Encode the offset. */
7571 }
7580 {
7585 bfd_vma residual;
7586 bfd_signed_vma signed_value;
7589 /* Determine which groups of bits to calculate. */
7591 {
7609 }
7611 /* If REL, extract the addend from the insn. If RELA, it will
7612 have already been fetched for us. */
7614 {
7617 }
7619 /* Compute the value (X) to go in the place. */
7623 /* PC relative. */
7625 else
7626 /* Section base relative. */
7629 /* Calculate the value of the relevant G_{n-1} to obtain
7630 the residual at that stage. */
7633 /* Check for overflow. */
7635 {
7641 }
7643 /* Mask out the value and U bit. */
7646 /* Set the U bit if the value to go in the place is non-negative. */
7650 /* Encode the offset. */
7654 }
7663 {
7668 bfd_vma residual;
7669 bfd_signed_vma signed_value;
7672 /* Determine which groups of bits to calculate. */
7674 {
7692 }
7694 /* If REL, extract the addend from the insn. If RELA, it will
7695 have already been fetched for us. */
7697 {
7700 }
7702 /* Compute the value (X) to go in the place. */
7706 /* PC relative. */
7708 else
7709 /* Section base relative. */
7712 /* Calculate the value of the relevant G_{n-1} to obtain
7713 the residual at that stage. */
7716 /* Check for overflow. */
7718 {
7724 }
7726 /* Mask out the value and U bit. */
7729 /* Set the U bit if the value to go in the place is non-negative. */
7733 /* Encode the offset. */
7737 }
7746 {
7751 bfd_vma residual;
7752 bfd_signed_vma signed_value;
7755 /* Determine which groups of bits to calculate. */
7757 {
7775 }
7777 /* If REL, extract the addend from the insn. If RELA, it will
7778 have already been fetched for us. */
7780 {
7783 }
7785 /* Compute the value (X) to go in the place. */
7789 /* PC relative. */
7791 else
7792 /* Section base relative. */
7795 /* Calculate the value of the relevant G_{n-1} to obtain
7796 the residual at that stage. */
7799 /* Check for overflow. (The absolute value to go in the place must be
7800 divisible by four and, after having been divided by four, must
7801 fit in eight bits.) */
7803 {
7809 }
7811 /* Mask out the value and U bit. */
7814 /* Set the U bit if the value to go in the place is non-negative. */
7818 /* Encode the offset. */
7822 }
7827 }
7828 }
7830 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
7831 static void
7835 bfd_signed_vma increment)
7836 {
7837 bfd_signed_vma addend;
7841 {
7859 }
7860 else
7861 {
7862 bfd_vma contents;
7866 /* Get the (signed) value from the instruction. */
7869 {
7870 bfd_signed_vma mask;
7875 }
7877 /* Add in the increment, (which is a byte value). */
7879 {
7891 /* Should we check for overflow here ? */
7893 /* Drop any undesired bits. */
7896 }
7901 }
7902 }
7904 #define IS_ARM_TLS_RELOC(R_TYPE) \
7905 ((R_TYPE) == R_ARM_TLS_GD32 \
7906 || (R_TYPE) == R_ARM_TLS_LDO32 \
7907 || (R_TYPE) == R_ARM_TLS_LDM32 \
7908 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
7909 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
7910 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
7911 || (R_TYPE) == R_ARM_TLS_LE32 \
7912 || (R_TYPE) == R_ARM_TLS_IE32)
7914 /* Relocate an ARM ELF section. */
7916 static bfd_boolean
7925 {
7941 {
7948 bfd_vma relocation;
7949 bfd_reloc_status_type r;
7950 arelent bfd_reloc;
7971 {
7976 {
7983 {
7988 {
8010 {
8016 }
8020 /* Get the (signed) value from the instruction. */
8023 {
8024 bfd_signed_vma mask;
8029 }
8031 }
8034 addend =
8039 /* Cases here must match those in the preceeding
8040 switch statement. */
8042 {
8065 }
8066 }
8067 }
8068 else
8070 }
8071 else
8072 {
8073 bfd_boolean warned;
8081 }
8084 {
8085 /* For relocs against symbols from removed linkonce sections,
8086 or sections discarded by a linker script, we just want the
8087 section contents zeroed. Avoid any special processing. */
8092 }
8095 {
8096 /* This is a relocatable link. We don't have to change
8097 anything, unless the reloc is against a section symbol,
8098 in which case we have to adjust according to where the
8099 section symbol winds up in the output section. */
8101 {
8105 else
8107 }
8109 }
8113 else
8114 {
8115 name = (bfd_elf_string_from_elf_section
8119 }
8127 {
8132 input_bfd,
8133 input_section,
8136 name);
8137 }
8146 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
8147 because such sections are not SEC_ALLOC and thus ld.so will
8148 not process them. */
8152 {
8155 input_bfd,
8156 input_section,
8161 }
8164 {
8166 {
8168 /* If the overflowing reloc was to an undefined symbol,
8169 we have already printed one error message and there
8170 is no point complaining again. */
8196 /* error_message should already be set. */
8201 /* Fall through. */
8203 common_error:
8210 }
8211 }
8212 }
8215 }
8217 /* Set the right machine number. */
8219 static bfd_boolean
8221 {
8232 else
8236 }
8238 /* Function to keep ARM specific flags in the ELF header. */
8240 static bfd_boolean
8242 {
8245 {
8247 {
8250 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
8251 abfd);
8252 else
8253 _bfd_error_handler
8255 abfd);
8256 }
8257 }
8258 else
8259 {
8262 }
8265 }
8267 /* Copy backend specific data from one object module to another. */
8269 static bfd_boolean
8271 {
8272 flagword in_flags;
8273 flagword out_flags;
8284 {
8285 /* Cannot mix APCS26 and APCS32 code. */
8289 /* Cannot mix float APCS and non-float APCS code. */
8293 /* If the src and dest have different interworking flags
8294 then turn off the interworking bit. */
8296 {
8298 _bfd_error_handler
8299 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
8303 }
8305 /* Likewise for PIC, though don't warn for this case. */
8308 }
8313 /* Also copy the EI_OSABI field. */
8317 /* Copy object attributes. */
8321 }
8323 /* Values for Tag_ABI_PCS_R9_use. */
8324 enum
8325 {
8326 AEABI_R9_V6,
8327 AEABI_R9_SB,
8328 AEABI_R9_TLS,
8329 AEABI_R9_unused
8330 };
8332 /* Values for Tag_ABI_PCS_RW_data. */
8333 enum
8334 {
8335 AEABI_PCS_RW_data_absolute,
8336 AEABI_PCS_RW_data_PCrel,
8337 AEABI_PCS_RW_data_SBrel,
8338 AEABI_PCS_RW_data_unused
8339 };
8341 /* Values for Tag_ABI_enum_size. */
8342 enum
8343 {
8344 AEABI_enum_unused,
8345 AEABI_enum_short,
8346 AEABI_enum_wide,
8347 AEABI_enum_forced_wide
8348 };
8350 /* Determine whether an object attribute tag takes an integer, a
8351 string or both. */
8353 static int
8355 {
8364 else
8366 }
8368 /* The ABI defines that Tag_conformance should be emitted first, and that
8369 Tag_nodefaults should be second (if either is defined). This sets those
8370 two positions, and bumps up the position of all the remaining tags to
8371 compensate. */
8372 static int
8374 {
8384 }
8386 /* Read the architecture from the Tag_also_compatible_with attribute, if any.
8387 Returns -1 if no architecture could be read. */
8389 static int
8391 {
8395 /* Note: the tag and its argument below are uleb128 values, though
8396 currently-defined values fit in one byte for each. */
8403 /* This tag is "safely ignorable", so don't complain if it looks funny. */
8405 }
8407 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
8408 The tag is removed if ARCH is -1. */
8410 static void
8412 {
8417 {
8420 }
8422 /* Note: the tag and its argument below are uleb128 values, though
8423 currently-defined values fit in one byte for each. */
8429 }
8431 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
8432 into account. */
8434 static int
8437 {
8438 #define T(X) TAG_CPU_ARCH_##X
8441 {
8451 };
8453 {
8464 };
8466 {
8478 };
8480 {
8493 };
8495 {
8509 };
8511 {
8526 };
8528 {
8529 v6t2,
8530 v6k,
8531 v7,
8532 v6_m,
8533 v6s_m,
8534 /* Pseudo-architecture. */
8535 v4t_plus_v6_m
8536 };
8538 /* Check we've not got a higher architecture than we know about. */
8541 {
8544 }
8546 /* Override old tag if we have a Tag_also_compatible_with on the output. */
8552 /* And override the new tag if we have a Tag_also_compatible_with on the
8553 input. */
8562 /* Architectures before V6KZ add features monotonically. */
8568 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
8569 as the canonical version. */
8571 {
8574 }
8575 else
8579 {
8583 }
8586 #undef T
8587 }
8589 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
8590 are conflicting attributes. */
8592 static bfd_boolean
8594 {
8600 /* Some tags have 0 = don't care, 1 = strong requirement,
8601 2 = weak requirement. */
8603 /* For use with Tag_VFP_arch. */
8609 {
8610 /* This is the first object. Copy the attributes. */
8613 /* Use the Tag_null value to indicate the attributes have been
8614 initialized. */
8618 }
8622 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
8624 {
8625 /* Ignore mismatches if the object doesn't use floating point. */
8629 {
8630 _bfd_error_handler
8634 }
8635 }
8638 {
8639 /* Merge this attribute with existing attributes. */
8641 {
8644 /* These are merged after Tag_CPU_arch. */
8649 /* Use the first value seen. */
8653 {
8657 /* These aren't real CPU names, but we can't guess
8658 that from the architecture version alone. */
8671 "ARM v6S-M"
8672 };
8674 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
8680 secondary_compat);
8683 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
8687 {
8688 /* The output architecture has been changed to match the
8689 input architecture. Use the input names. */
8696 }
8697 else
8698 {
8701 }
8703 /* If we still don't have a value for Tag_CPU_name,
8704 make one up now. Tag_CPU_raw_name remains blank. */
8709 }
8716 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
8726 /* Use the largest value specified. */
8733 /* Use the smallest value specified. */
8742 {
8743 /* This error message should be enabled once all non-conformant
8744 binaries in the toolchain have had the attributes set
8745 properly.
8746 _bfd_error_handler
8747 (_("error: %B: 8-byte data alignment conflicts with %B"),
8748 obfd, ibfd);
8749 result = FALSE; */
8750 }
8751 /* Fall through. */
8754 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
8755 value if greater than 2 (for future-proofing). */
8765 {
8766 /* 0 will merge with anything.
8767 'A' and 'S' merge to 'A'.
8768 'R' and 'S' merge to 'R'.
8769 'M' and 'A|R|S' is an error. */
8778 else
8779 {
8780 _bfd_error_handler
8782 ibfd,
8786 }
8787 }
8790 /* Use the "greatest" from the sequence 0, 1, 2, 4, 3, or the
8791 largest value if greater than 4 (for future-proofing). */
8801 {
8802 /* It's sometimes ok to mix different configs, so this is only
8803 a warning. */
8804 _bfd_error_handler
8806 }
8812 {
8813 _bfd_error_handler
8816 }
8824 {
8825 _bfd_error_handler
8827 ibfd);
8829 }
8830 /* Use the smallest value specified. */
8837 {
8838 _bfd_error_handler
8839 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
8841 }
8847 {
8850 {
8851 /* The existing object is compatible with anything.
8852 Use whatever requirements the new object has. */
8854 }
8858 {
8869 _bfd_error_handler
8870 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
8872 }
8873 }
8876 /* Aready done. */
8880 {
8881 _bfd_error_handler
8885 }
8888 /* Merged in target-independent code. */
8891 /* 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). */
8900 {
8902 {
8903 _bfd_error_handler
8907 }
8908 }
8914 /* This tag is set if it exists, but the value is unused (and is
8915 typically zero). We don't actually need to do anything here -
8916 the merge happens automatically when the type flags are merged
8917 below. */
8920 /* Already done in Tag_CPU_arch. */
8923 /* Keep the attribute if it matches. Throw it away otherwise.
8924 No attribute means no claim to conform. */
8931 {
8934 /* The "known_obj_attributes" table does contain some undefined
8935 attributes. Ensure that there are unused. */
8942 {
8943 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
8945 {
8946 _bfd_error_handler
8951 }
8952 else
8953 {
8954 _bfd_error_handler
8957 }
8958 }
8960 /* Only pass on attributes that match in both inputs. */
8965 {
8968 }
8969 }
8970 }
8972 /* If out_attr was copied from in_attr then it won't have a type yet. */
8975 }
8977 /* Merge Tag_compatibility attributes and any common GNU ones. */
8980 /* Check for any attributes not known on ARM. */
8986 {
8990 /* The tags for each list are in numerical order. */
8991 /* If the tags are equal, then merge. */
8993 {
8994 /* This attribute only exists in obfd. We can't merge, and we don't
8995 know what the tag means, so delete it. */
9000 }
9002 {
9003 /* This attribute only exists in ibfd. We can't merge, and we don't
9004 know what the tag means, so ignore it. */
9008 }
9010 {
9011 /* As present, all attributes in the list are unknown, and
9012 therefore can't be merged meaningfully. */
9016 /* Only pass on attributes that match in both inputs. */
9021 {
9022 /* No match. Delete the attribute. */
9025 }
9026 else
9027 {
9028 /* Matched. Keep the attribute and move to the next. */
9031 }
9032 }
9035 {
9036 /* Attribute numbers >=64 (mod 128) can be safely ignored. */
9038 {
9039 _bfd_error_handler
9044 }
9045 else
9046 {
9047 _bfd_error_handler
9050 }
9051 }
9052 }
9054 }
9057 /* Return TRUE if the two EABI versions are incompatible. */
9059 static bfd_boolean
9061 {
9062 /* v4 and v5 are the same spec before and after it was released,
9063 so allow mixing them. */
9069 }
9071 /* Merge backend specific data from an object file to the output
9072 object file when linking. */
9074 static bfd_boolean
9076 {
9077 flagword out_flags;
9078 flagword in_flags;
9082 /* Check if we have the same endianess. */
9092 /* The input BFD must have had its flags initialised. */
9093 /* The following seems bogus to me -- The flags are initialized in
9094 the assembler but I don't think an elf_flags_init field is
9095 written into the object. */
9096 /* BFD_ASSERT (elf_flags_init (ibfd)); */
9101 /* In theory there is no reason why we couldn't handle this. However
9102 in practice it isn't even close to working and there is no real
9103 reason to want it. */
9107 {
9109 ibfd);
9111 }
9114 {
9115 /* If the input is the default architecture and had the default
9116 flags then do not bother setting the flags for the output
9117 architecture, instead allow future merges to do this. If no
9118 future merges ever set these flags then they will retain their
9119 uninitialised values, which surprise surprise, correspond
9120 to the default values. */
9133 }
9135 /* Determine what should happen if the input ARM architecture
9136 does not match the output ARM architecture. */
9140 /* Identical flags must be compatible. */
9144 /* Check to see if the input BFD actually contains any sections. If
9145 not, its flags may not have been initialised either, but it
9146 cannot actually cause any incompatiblity. Do not short-circuit
9147 dynamic objects; their section list may be emptied by
9148 elf_link_add_object_symbols.
9150 Also check to see if there are no code sections in the input.
9151 In this case there is no need to check for code specific flags.
9152 XXX - do we need to worry about floating-point format compatability
9153 in data sections ? */
9155 {
9160 {
9161 /* Ignore synthetic glue sections. */
9164 {
9172 }
9173 }
9177 }
9179 /* Complain about various flag mismatches. */
9182 {
9183 _bfd_error_handler
9189 }
9191 /* Not sure what needs to be checked for EABI versions >= 1. */
9192 /* VxWorks libraries do not use these flags. */
9196 {
9198 {
9199 _bfd_error_handler
9205 }
9208 {
9210 _bfd_error_handler
9213 else
9214 _bfd_error_handler
9219 }
9222 {
9224 _bfd_error_handler
9227 else
9228 _bfd_error_handler
9233 }
9236 {
9238 _bfd_error_handler
9241 else
9242 _bfd_error_handler
9247 }
9249 #ifdef EF_ARM_SOFT_FLOAT
9251 {
9252 /* We can allow interworking between code that is VFP format
9253 layout, and uses either soft float or integer regs for
9254 passing floating point arguments and results. We already
9255 know that the APCS_FLOAT flags match; similarly for VFP
9256 flags. */
9259 {
9261 _bfd_error_handler
9264 else
9265 _bfd_error_handler
9270 }
9271 }
9272 #endif
9274 /* Interworking mismatch is only a warning. */
9276 {
9278 {
9279 _bfd_error_handler
9282 }
9283 else
9284 {
9285 _bfd_error_handler
9288 }
9289 }
9290 }
9293 }
9295 /* Display the flags field. */
9297 static bfd_boolean
9299 {
9305 /* Print normal ELF private data. */
9309 /* Ignore init flag - it may not be set, despite the flags field
9310 containing valid data. */
9312 /* xgettext:c-format */
9316 {
9318 /* The following flag bits are GNU extensions and not part of the
9319 official ARM ELF extended ABI. Hence they are only decoded if
9320 the EABI version is not set. */
9326 else
9333 else
9362 else
9373 else
9396 eabi:
9409 }
9427 }
9429 static int
9431 {
9433 {
9438 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
9439 This allows us to distinguish between data used by Thumb instructions
9440 and non-data (which is probably code) inside Thumb regions of an
9441 executable. */
9448 }
9451 }
9459 {
9462 {
9466 }
9469 }
9471 /* Update the got entry reference counts for the section being removed. */
9473 static bfd_boolean
9478 {
9500 {
9507 {
9512 }
9517 {
9523 {
9526 }
9528 {
9531 }
9558 /* Should the interworking branches be here also? */
9561 {
9569 {
9577 }
9583 {
9587 {
9595 }
9596 }
9597 }
9602 }
9603 }
9606 }
9608 /* Look through the relocs for a section during the first phase. */
9610 static bfd_boolean
9613 {
9622 bfd_boolean needs_plt;
9633 /* Create dynamic sections for relocatable executables so that we can
9634 copy relocations. */
9637 {
9640 }
9651 {
9662 /* PR 9934: It is possible to have relocations that do not
9663 refer to symbols, thus it is also possible to have an
9664 object file containing relocations but no symbol table. */
9666 {
9668 r_symndx);
9670 }
9674 else
9675 {
9680 }
9685 {
9690 /* This symbol requires a global offset table entry. */
9691 {
9695 {
9699 }
9702 {
9705 }
9706 else
9707 {
9710 /* This is a global offset table entry for a local symbol. */
9713 {
9714 bfd_size_type size;
9724 }
9727 }
9729 /* We will already have issued an error message if there is a
9730 TLS / non-TLS mismatch, based on the symbol type. We don't
9731 support any linker relaxations. So just combine any TLS
9732 types needed. */
9738 {
9741 else
9743 }
9744 }
9745 /* Fall through. */
9750 /* Fall through. */
9755 {
9760 }
9764 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
9765 ldr __GOTT_INDEX__ offsets. */
9768 /* Fall through. */
9794 normal_reloc:
9796 /* Should the interworking branches be listed here? */
9798 {
9799 /* If this reloc is in a read-only section, we might
9800 need a copy reloc. We can't check reliably at this
9801 stage whether the section is read-only, as input
9802 sections have not yet been mapped to output sections.
9803 Tentatively set the flag for now, and correct in
9804 adjust_dynamic_symbol. */
9808 /* We may need a .plt entry if the function this reloc
9809 refers to is in a different object. We can't tell for
9810 sure yet, because something later might force the
9811 symbol local. */
9815 /* If we create a PLT entry, this relocation will reference
9816 it, even if it's an ABS32 relocation. */
9819 /* It's too early to use htab->use_blx here, so we have to
9820 record possible blx references separately from
9821 relocs that definitely need a thumb stub. */
9829 }
9831 /* If we are creating a shared library or relocatable executable,
9832 and this is a reloc against a global symbol, or a non PC
9833 relative reloc against a local symbol, then we need to copy
9834 the reloc into the shared library. However, if we are linking
9835 with -Bsymbolic, we do not need to copy a reloc against a
9836 global symbol which is defined in an object we are
9837 including in the link (i.e., DEF_REGULAR is set). At
9838 this point we have not seen all the input files, so it is
9839 possible that DEF_REGULAR is not set now but will be set
9840 later (it is never cleared). We account for that
9841 possibility below by storing information in the
9842 relocs_copied field of the hash table entry. */
9848 {
9851 /* When creating a shared object, we must copy these
9852 reloc types into the output file. We create a reloc
9853 section in dynobj and make room for this reloc. */
9855 {
9856 sreloc = _bfd_elf_make_dynamic_reloc_section
9862 /* BPABI objects never have dynamic relocations mapped. */
9864 {
9865 flagword flags;
9870 }
9871 }
9873 /* If this is a global symbol, we count the number of
9874 relocations we need for this symbol. */
9876 {
9878 }
9879 else
9880 {
9881 /* Track dynamic relocs needed for local syms too.
9882 We really need local syms available to do this
9883 easily. Oh well. */
9895 }
9899 {
9910 }
9915 }
9918 /* This relocation describes the C++ object vtable hierarchy.
9919 Reconstruct it for later use during GC. */
9925 /* This relocation describes which C++ vtable entries are actually
9926 used. Record for later use during GC. */
9933 }
9934 }
9937 }
9939 /* Unwinding tables are not referenced directly. This pass marks them as
9940 required if the corresponding code section is marked. */
9942 static bfd_boolean
9944 elf_gc_mark_hook_fn gc_mark_hook)
9945 {
9948 bfd_boolean again;
9950 /* Marking EH data may cause additional code sections to be marked,
9951 requiring multiple passes. */
9954 {
9957 {
9965 {
9974 {
9978 }
9979 }
9980 }
9981 }
9984 }
9986 /* Treat mapping symbols as special target symbols. */
9988 static bfd_boolean
9990 {
9992 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
9993 }
9995 /* This is a copy of elf_find_function() from elf.c except that
9996 ARM mapping symbols are ignored when looking for function names
9997 and STT_ARM_TFUNC is considered to a function type. */
9999 static bfd_boolean
10003 bfd_vma offset,
10006 {
10013 {
10019 {
10028 /* Skip mapping symbols. */
10031 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
10033 /* Fall through. */
10037 {
10040 }
10042 }
10043 }
10054 }
10057 /* Find the nearest line to a particular section and offset, for error
10058 reporting. This code is a duplicate of the code in elf.c, except
10059 that it uses arm_elf_find_function. */
10061 static bfd_boolean
10065 bfd_vma offset,
10069 {
10072 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
10078 {
10082 functionname_ptr);
10085 }
10105 }
10107 static bfd_boolean
10112 {
10113 bfd_boolean found;
10118 }
10120 /* Adjust a symbol defined by a dynamic object and referenced by a
10121 regular object. The current definition is in some section of the
10122 dynamic object, but we're not including those sections. We have to
10123 change the definition to something the rest of the link can
10124 understand. */
10126 static bfd_boolean
10129 {
10138 /* Make sure we know what is going on here. */
10148 /* If this is a function, put it in the procedure linkage table. We
10149 will fill in the contents of the procedure linkage table later,
10150 when we know the address of the .got section. */
10153 {
10158 {
10159 /* This case can occur if we saw a PLT32 reloc in an input
10160 file, but the symbol was never referred to by a dynamic
10161 object, or if all references were garbage collected. In
10162 such a case, we don't actually need to build a procedure
10163 linkage table, and we can just do a PC24 reloc instead. */
10168 }
10171 }
10172 else
10173 {
10174 /* It's possible that we incorrectly decided a .plt reloc was
10175 needed for an R_ARM_PC24 or similar reloc to a non-function sym
10176 in check_relocs. We can't decide accurately between function
10177 and non-function syms in check-relocs; Objects loaded later in
10178 the link may change h->type. So fix it now. */
10182 }
10184 /* If this is a weak symbol, and there is a real definition, the
10185 processor independent code will have arranged for us to see the
10186 real definition first, and we can just use the same value. */
10188 {
10194 }
10196 /* If there are no non-GOT references, we do not need a copy
10197 relocation. */
10201 /* This is a reference to a symbol defined by a dynamic object which
10202 is not a function. */
10204 /* If we are creating a shared library, we must presume that the
10205 only references to the symbol are via the global offset table.
10206 For such cases we need not do anything here; the relocations will
10207 be handled correctly by relocate_section. Relocatable executables
10208 can reference data in shared objects directly, so we don't need to
10209 do anything here. */
10214 {
10218 }
10220 /* We must allocate the symbol in our .dynbss section, which will
10221 become part of the .bss section of the executable. There will be
10222 an entry for this symbol in the .dynsym section. The dynamic
10223 object will contain position independent code, so all references
10224 from the dynamic object to this symbol will go through the global
10225 offset table. The dynamic linker will use the .dynsym entry to
10226 determine the address it must put in the global offset table, so
10227 both the dynamic object and the regular object will refer to the
10228 same memory location for the variable. */
10232 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
10233 copy the initial value out of the dynamic object and into the
10234 runtime process image. We need to remember the offset into the
10235 .rel(a).bss section we are going to use. */
10237 {
10244 }
10247 }
10249 /* Allocate space in .plt, .got and associated reloc sections for
10250 dynamic relocs. */
10252 static bfd_boolean
10254 {
10259 bfd_signed_vma thumb_refs;
10267 /* When warning symbols are created, they **replace** the "real"
10268 entry in the hash table, thus we never get to see the real
10269 symbol in a hash traversal. So look at it now. */
10277 {
10278 /* Make sure this symbol is output as a dynamic symbol.
10279 Undefined weak syms won't yet be marked as dynamic. */
10282 {
10285 }
10289 {
10292 /* If this is the first .plt entry, make room for the special
10293 first entry. */
10299 /* If we will insert a Thumb trampoline before this PLT, leave room
10300 for it. */
10306 {
10309 }
10311 /* If this symbol is not defined in a regular file, and we are
10312 not generating a shared library, then set the symbol to this
10313 location in the .plt. This is required to make function
10314 pointers compare as equal between the normal executable and
10315 the shared library. */
10318 {
10322 /* Make sure the function is not marked as Thumb, in case
10323 it is the target of an ABS32 relocation, which will
10324 point to the PLT entry. */
10327 }
10329 /* Make room for this entry. */
10333 {
10334 /* We also need to make an entry in the .got.plt section, which
10335 will be placed in the .got section by the linker script. */
10338 }
10340 /* We also need to make an entry in the .rel(a).plt section. */
10343 /* VxWorks executables have a second set of relocations for
10344 each PLT entry. They go in a separate relocation section,
10345 which is processed by the kernel loader. */
10347 {
10348 /* There is a relocation for the initial PLT entry:
10349 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
10353 /* There are two extra relocations for each subsequent
10354 PLT entry: an R_ARM_32 relocation for the GOT entry,
10355 and an R_ARM_32 relocation for the PLT entry. */
10357 }
10358 }
10359 else
10360 {
10363 }
10364 }
10365 else
10366 {
10369 }
10372 {
10374 bfd_boolean dyn;
10378 /* Make sure this symbol is output as a dynamic symbol.
10379 Undefined weak syms won't yet be marked as dynamic. */
10382 {
10385 }
10388 {
10396 /* Non-TLS symbols need one GOT slot. */
10398 else
10399 {
10401 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
10404 /* R_ARM_TLS_IE32 needs one GOT slot. */
10406 }
10420 {
10429 }
10435 }
10436 }
10437 else
10440 /* Allocate stubs for exported Thumb functions on v4t. */
10445 {
10452 /* Create a new symbol to regist the real location of the function. */
10465 /* Point the symbol at the stub. */
10469 }
10474 /* In the shared -Bsymbolic case, discard space allocated for
10475 dynamic pc-relative relocs against symbols which turn out to be
10476 defined in regular objects. For the normal shared case, discard
10477 space for pc-relative relocs that have become local due to symbol
10478 visibility changes. */
10481 {
10482 /* The only relocs that use pc_count are R_ARM_REL32 and
10483 R_ARM_REL32_NOI, which will appear on something like
10484 ".long foo - .". We want calls to protected symbols to resolve
10485 directly to the function rather than going via the plt. If people
10486 want function pointer comparisons to work as expected then they
10487 should avoid writing assembly like ".long foo - .". */
10489 {
10493 {
10498 else
10500 }
10501 }
10504 {
10508 {
10511 else
10513 }
10514 }
10516 /* Also discard relocs on undefined weak syms with non-default
10517 visibility. */
10520 {
10524 /* Make sure undefined weak symbols are output as a dynamic
10525 symbol in PIEs. */
10528 {
10531 }
10532 }
10536 {
10537 /* Output absolute symbols so that we can create relocations
10538 against them. For normal symbols we output a relocation
10539 against the section that contains them. */
10542 }
10544 }
10545 else
10546 {
10547 /* For the non-shared case, discard space for relocs against
10548 symbols which turn out to need copy relocs or are not
10549 dynamic. */
10557 {
10558 /* Make sure this symbol is output as a dynamic symbol.
10559 Undefined weak syms won't yet be marked as dynamic. */
10562 {
10565 }
10567 /* If that succeeded, we know we'll be keeping all the
10568 relocs. */
10571 }
10575 keep: ;
10576 }
10578 /* Finally, allocate space. */
10580 {
10583 }
10586 }
10588 /* Find any dynamic relocs that apply to read-only sections. */
10590 static bfd_boolean
10592 {
10601 {
10605 {
10610 /* Not an error, just cut short the traversal. */
10612 }
10613 }
10615 }
10617 void
10620 {
10625 }
10627 /* Set the sizes of the dynamic sections. */
10629 static bfd_boolean
10632 {
10635 bfd_boolean plt;
10636 bfd_boolean relocs;
10646 {
10647 /* Set the contents of the .interp section to the interpreter. */
10649 {
10654 }
10655 }
10657 /* Set up .got offsets for local syms, and space for local dynamic
10658 relocs. */
10660 {
10664 bfd_size_type locsymcount;
10673 {
10677 {
10680 {
10681 /* Input section has been discarded, either because
10682 it is a copy of a linkonce section or due to
10683 linker script /DISCARD/, so we'll be discarding
10684 the relocs too. */
10685 }
10689 {
10690 /* Relocations in vxworks .tls_vars sections are
10691 handled specially by the loader. */
10692 }
10694 {
10699 }
10700 }
10701 }
10714 {
10716 {
10719 /* TLS_GD relocs need an 8-byte structure in the GOT. */
10728 }
10729 else
10731 }
10732 }
10735 {
10736 /* Allocate two GOT entries and one dynamic relocation (if necessary)
10737 for R_ARM_TLS_LDM32 relocations. */
10742 }
10743 else
10746 /* Allocate global sym .plt and .got entries, and space for global
10747 sym dynamic relocs. */
10750 /* Here we rummage through the found bfds to collect glue information. */
10752 {
10756 /* Initialise mapping tables for code/data. */
10761 /* xgettext:c-format */
10764 }
10766 /* The check_relocs and adjust_dynamic_symbol entry points have
10767 determined the sizes of the various dynamic sections. Allocate
10768 memory for them. */
10772 {
10778 /* It's OK to base decisions on the section name, because none
10779 of the dynobj section names depend upon the input files. */
10783 {
10784 /* Remember whether there is a PLT. */
10786 }
10788 {
10790 {
10791 /* Remember whether there are any reloc sections other
10792 than .rel(a).plt and .rela.plt.unloaded. */
10796 /* We use the reloc_count field as a counter if we need
10797 to copy relocs into the output file. */
10799 }
10800 }
10803 {
10804 /* It's not one of our sections, so don't allocate space. */
10806 }
10809 {
10810 /* If we don't need this section, strip it from the
10811 output file. This is mostly to handle .rel(a).bss and
10812 .rel(a).plt. We must create both sections in
10813 create_dynamic_sections, because they must be created
10814 before the linker maps input sections to output
10815 sections. The linker does that before
10816 adjust_dynamic_symbol is called, and it is that
10817 function which decides whether anything needs to go
10818 into these sections. */
10821 }
10826 /* Allocate memory for the section contents. */
10830 }
10833 {
10834 /* Add some entries to the .dynamic section. We fill in the
10835 values later, in elf32_arm_finish_dynamic_sections, but we
10836 must add the entries now so that we get the correct size for
10837 the .dynamic section. The DT_DEBUG entry is filled in by the
10838 dynamic linker and used by the debugger. */
10839 #define add_dynamic_entry(TAG, VAL) \
10840 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
10843 {
10846 }
10849 {
10856 }
10859 {
10861 {
10866 }
10867 else
10868 {
10873 }
10874 }
10876 /* If any dynamic relocs apply to a read-only section,
10877 then we need a DT_TEXTREL entry. */
10880 info);
10883 {
10886 }
10890 }
10891 #undef add_dynamic_entry
10894 }
10896 /* Finish up dynamic symbol handling. We set the contents of various
10897 dynamic sections here. */
10899 static bfd_boolean
10904 {
10914 {
10918 bfd_vma plt_index;
10919 Elf_Internal_Rela rel;
10921 /* This symbol has an entry in the procedure linkage table. Set
10922 it up. */
10930 /* Fill in the entry in the procedure linkage table. */
10932 {
10940 /* Fill in the entry in the .rel.plt section. */
10946 /* Get the index in the procedure linkage table which
10947 corresponds to this symbol. This is the index of this symbol
10948 in all the symbols for which we are making plt entries. The
10949 first entry in the procedure linkage table is reserved. */
10952 }
10953 else
10954 {
10956 bfd_vma got_displacement;
10963 /* Get the offset into the .got.plt table of the entry that
10964 corresponds to this function. */
10967 /* Get the index in the procedure linkage table which
10968 corresponds to this symbol. This is the index of this symbol
10969 in all the symbols for which we are making plt entries. The
10970 first three entries in .got.plt are reserved; after that
10971 symbols appear in the same order as in .plt. */
10974 /* Calculate the address of the GOT entry. */
10979 /* ...and the address of the PLT entry. */
10986 {
10988 bfd_vma val;
10991 {
10999 else
11001 }
11002 }
11004 {
11006 bfd_vma val;
11009 {
11019 else
11021 }
11026 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
11027 referencing the GOT for this PLT entry. */
11034 /* Create the R_ARM_ABS32 relocation referencing the
11035 beginning of the PLT for this GOT entry. */
11040 }
11041 else
11042 {
11043 bfd_signed_vma thumb_refs;
11044 /* Calculate the displacement between the PLT slot and the
11045 entry in the GOT. The eight-byte offset accounts for the
11046 value produced by adding to pc in the first instruction
11047 of the PLT stub. */
11057 {
11062 }
11076 #ifdef FOUR_WORD_PLT
11078 #endif
11079 }
11081 /* Fill in the entry in the global offset table. */
11087 /* Fill in the entry in the .rel(a).plt section. */
11091 }
11097 {
11098 /* Mark the symbol as undefined, rather than as defined in
11099 the .plt section. Leave the value alone. */
11101 /* If the symbol is weak, we do need to clear the value.
11102 Otherwise, the PLT entry would provide a definition for
11103 the symbol even if the symbol wasn't defined anywhere,
11104 and so the symbol would never be NULL. */
11107 }
11108 }
11113 {
11116 Elf_Internal_Rela rel;
11118 bfd_vma offset;
11120 /* This symbol has an entry in the global offset table. Set it
11121 up. */
11132 /* If this is a static link, or it is a -Bsymbolic link and the
11133 symbol is defined locally or was forced to be local because
11134 of a version file, we just want to emit a RELATIVE reloc.
11135 The entry in the global offset table will already have been
11136 initialized in the relocate_section function. */
11139 {
11143 {
11146 }
11147 }
11148 else
11149 {
11153 }
11157 }
11160 {
11162 Elf_Internal_Rela rel;
11165 /* This symbol needs a copy reloc. Set it up. */
11181 }
11183 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
11184 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
11185 to the ".got" section. */
11191 }
11193 /* Finish up the dynamic sections. */
11195 static bfd_boolean
11197 {
11209 {
11222 {
11223 Elf_Internal_Dyn dyn;
11230 {
11263 get_vma:
11268 else
11269 /* In the BPABI, tags in the PT_DYNAMIC section point
11270 at the file offset, not the memory address, for the
11271 convenience of the post linker. */
11276 get_vma_if_bpabi:
11292 {
11293 /* My reading of the SVR4 ABI indicates that the
11294 procedure linkage table relocs (DT_JMPREL) should be
11295 included in the overall relocs (DT_REL). This is
11296 what Solaris does. However, UnixWare can not handle
11297 that case. Therefore, we override the DT_RELSZ entry
11298 here to make it not include the JMPREL relocs. Since
11299 the linker script arranges for .rel(a).plt to follow all
11300 other relocation sections, we don't have to worry
11301 about changing the DT_REL entry. */
11308 }
11309 /* Fall through. */
11313 /* In the BPABI, the DT_REL tag must point at the file
11314 offset, not the VMA, of the first relocation
11315 section. So, we use code similar to that in
11316 elflink.c, but do not check for SHF_ALLOC on the
11317 relcoation section, since relocations sections are
11318 never allocated under the BPABI. The comments above
11319 about Unixware notwithstanding, we include all of the
11320 relocations here. */
11322 {
11328 {
11329 Elf_Internal_Shdr *hdr
11332 {
11339 }
11340 }
11342 }
11345 /* Set the bottom bit of DT_INIT/FINI if the
11346 corresponding function is Thumb. */
11352 get_sym:
11353 /* If it wasn't set by elf_bfd_final_link
11354 then there is nothing to adjust. */
11356 {
11363 {
11366 }
11367 }
11369 }
11370 }
11372 /* Fill in the first entry in the procedure linkage table. */
11374 {
11378 /* Calculate the addresses of the GOT and PLT. */
11383 {
11384 /* The VxWorks GOT is relocated by the dynamic linker.
11385 Therefore, we must emit relocations rather than simply
11386 computing the values now. */
11387 Elf_Internal_Rela rel;
11398 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
11404 }
11405 else
11406 {
11419 #ifdef FOUR_WORD_PLT
11420 /* The displacement value goes in the otherwise-unused
11421 last word of the second entry. */
11423 #else
11425 #endif
11426 }
11427 }
11429 /* UnixWare sets the entsize of .plt to 4, although that doesn't
11430 really seem like the right value. */
11435 {
11436 /* Correct the .rel(a).plt.unloaded relocations. They will have
11437 incorrect symbol indexes. */
11446 {
11447 Elf_Internal_Rela rel;
11458 }
11459 }
11460 }
11462 /* Fill in the first three entries in the global offset table. */
11464 {
11466 {
11469 else
11475 }
11478 }
11481 }
11483 static void
11484 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
11485 {
11493 else
11498 {
11502 }
11503 }
11505 static enum elf_reloc_type_class
11507 {
11509 {
11518 }
11519 }
11521 /* Set the right machine number for an Arm ELF file. */
11523 static bfd_boolean
11525 {
11530 }
11532 static void
11534 {
11536 }
11538 /* Return TRUE if this is an unwinding table entry. */
11540 static bfd_boolean
11542 {
11545 }
11548 /* Set the type and flags for an ARM section. We do this by
11549 the section name, which is a hack, but ought to work. */
11551 static bfd_boolean
11553 {
11559 {
11562 }
11564 }
11566 /* Handle an ARM specific section when reading an object file. This is
11567 called when bfd_section_from_shdr finds a section with an unknown
11568 type. */
11570 static bfd_boolean
11575 {
11576 /* There ought to be a place to keep ELF backend specific flags, but
11577 at the moment there isn't one. We just keep track of the
11578 sections by their name, instead. Fortunately, the ABI gives
11579 names for all the ARM specific sections, so we will probably get
11580 away with this. */
11582 {
11590 }
11596 }
11598 /* A structure used to record a list of sections, independently
11599 of the next and prev fields in the asection structure. */
11601 {
11605 }
11606 section_list;
11608 /* Unfortunately we need to keep a list of sections for which
11609 an _arm_elf_section_data structure has been allocated. This
11610 is because it is possible for functions like elf32_arm_write_section
11611 to be called on a section which has had an elf_data_structure
11612 allocated for it (and so the used_by_bfd field is valid) but
11613 for which the ARM extended version of this structure - the
11614 _arm_elf_section_data structure - has not been allocated. */
11617 static void
11619 {
11631 }
11635 {
11639 /* This is a short cut for the typical case where the sections are added
11640 to the sections_with_arm_elf_section_data list in forward order and
11641 then looked up here in backwards order. This makes a real difference
11642 to the ld-srec/sec64k.exp linker test. */
11645 {
11651 }
11658 /* Record the entry prior to this one - it is the entry we are most
11659 likely to want to locate next time. Also this way if we have been
11660 called from unrecord_section_with_arm_elf_section_data() we will not
11661 be caching a pointer that is about to be freed. */
11665 }
11669 {
11676 else
11678 }
11680 static void
11682 {
11688 {
11696 }
11697 }
11701 {
11710 enum map_symbol_type
11711 {
11712 ARM_MAP_ARM,
11713 ARM_MAP_THUMB,
11714 ARM_MAP_DATA
11715 };
11718 /* Output a single mapping symbol. */
11720 static bfd_boolean
11723 bfd_vma offset)
11724 {
11727 Elf_Internal_Sym sym;
11740 }
11743 /* Output mapping symbols for PLT entries associated with H. */
11745 static bfd_boolean
11747 {
11751 bfd_vma addr;
11759 /* When warning symbols are created, they **replace** the "real"
11760 entry in the hash table, thus we never get to see the real
11761 symbol in a hash traversal. So look at it now. */
11770 {
11775 }
11777 {
11786 }
11787 else
11788 {
11789 bfd_signed_vma thumb_refs;
11796 {
11799 }
11800 #ifdef FOUR_WORD_PLT
11805 #else
11806 /* A three-word PLT with no Thumb thunk contains only Arm code,
11807 so only need to output a mapping symbol for the first PLT entry and
11808 entries with thumb thunks. */
11810 {
11813 }
11814 #endif
11815 }
11818 }
11820 /* Output a single local symbol for a generated stub. */
11822 static bfd_boolean
11825 {
11827 Elf_Internal_Sym sym;
11840 }
11842 static bfd_boolean
11845 {
11850 bfd_vma addr;
11859 /* Massage our args to the form they really have. */
11868 /* Ensure this stub is attached to the current section being
11869 processed. */
11878 {
11891 }
11896 {
11898 {
11914 }
11917 {
11921 }
11924 {
11940 }
11941 }
11944 }
11946 /* Output mapping symbols for linker generated sections. */
11948 static bfd_boolean
11953 Elf_Internal_Sym *,
11954 asection *,
11956 {
11957 output_arch_syminfo osi;
11959 bfd_vma offset;
11960 bfd_size_type size;
11969 /* ARM->Thumb glue. */
11971 {
11973 ARM2THUMB_GLUE_SECTION_NAME);
11982 else
11986 {
11989 }
11990 }
11992 /* Thumb->ARM glue. */
11994 {
11996 THUMB2ARM_GLUE_SECTION_NAME);
12003 {
12006 }
12007 }
12009 /* ARMv4 BX veneers. */
12011 {
12013 ARM_BX_GLUE_SECTION_NAME);
12019 }
12021 /* Long calls stubs. */
12023 {
12029 {
12030 /* Ignore non-stub sections. */
12040 }
12041 }
12043 /* Finally, output mapping symbols for the PLT. */
12050 /* Output mapping symbols for the plt header. SymbianOS does not have a
12051 plt header. */
12053 {
12054 /* VxWorks shared libraries have no PLT header. */
12056 {
12061 }
12062 }
12064 {
12067 #ifndef FOUR_WORD_PLT
12070 #endif
12071 }
12075 }
12077 /* Allocate target specific section data. */
12079 static bfd_boolean
12081 {
12083 {
12091 }
12096 }
12099 /* Used to order a list of mapping symbols by address. */
12101 static int
12103 {
12112 /* Ensure results do not depend on the host qsort for objects with
12113 multiple mapping symbols at the same address by sorting on type
12114 after vma. */
12118 else
12120 }
12123 /* Do code byteswapping. Return FALSE afterwards so that the section is
12124 written out as normal. */
12126 static bfd_boolean
12131 {
12137 bfd_vma ptr;
12138 bfd_vma end;
12140 bfd_byte tmp;
12143 /* If this section has not been allocated an _arm_elf_section_data
12144 structure then we cannot record anything. */
12154 {
12159 {
12163 {
12165 {
12166 bfd_vma branch_to_veneer;
12167 /* Original condition code of instruction, plus bit mask for
12168 ARM B instruction. */
12172 /* The instruction is before the label. */
12175 /* Above offset included in -4 below. */
12189 }
12193 {
12194 bfd_vma branch_from_veneer;
12197 /* Take size of veneer into account. */
12206 /* Original instruction. */
12213 /* Branch back to insn after original insn. */
12219 }
12224 }
12225 }
12226 }
12232 {
12237 {
12240 else
12244 {
12246 /* Byte swap code words. */
12248 {
12256 }
12260 /* Byte swap code halfwords. */
12262 {
12267 }
12271 /* Leave data alone. */
12273 }
12275 }
12276 }
12285 }
12287 static void
12291 {
12293 }
12295 static bfd_boolean
12297 {
12300 unrecord_section_via_map_over_sections,
12301 NULL);
12304 }
12306 static bfd_boolean
12308 {
12311 unrecord_section_via_map_over_sections,
12312 NULL);
12315 }
12317 /* Display STT_ARM_TFUNC symbols as functions. */
12319 static void
12322 {
12327 }
12330 /* Mangle thumb function symbols as we read them in. */
12332 static bfd_boolean
12337 {
12341 /* New EABI objects mark thumb function symbols by setting the low bit of
12342 the address. Turn these into STT_ARM_TFUNC. */
12345 {
12348 }
12350 }
12353 /* Mangle thumb function symbols as we write them out. */
12355 static void
12360 {
12361 Elf_Internal_Sym newsym;
12363 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
12364 of the address set, as per the new EABI. We do this unconditionally
12365 because objcopy does not set the elf header flags until after
12366 it writes out the symbol table. */
12368 {
12372 {
12373 /* Do this only for defined symbols. At link type, the static
12374 linker will simulate the work of dynamic linker of resolving
12375 symbols and will carry over the thumbness of found symbols to
12376 the output symbol table. It's not clear how it happens, but
12377 the thumbness of undefined symbols can well be different at
12378 runtime, and writing '1' for them will be confusing for users
12379 and possibly for dynamic linker itself.
12380 */
12382 }
12385 }
12387 }
12389 /* Add the PT_ARM_EXIDX program header. */
12391 static bfd_boolean
12394 {
12400 {
12401 /* If there is already a PT_ARM_EXIDX header, then we do not
12402 want to add another one. This situation arises when running
12403 "strip"; the input binary already has the header. */
12408 {
12418 }
12419 }
12422 }
12424 /* We may add a PT_ARM_EXIDX program header. */
12426 static int
12429 {
12435 else
12437 }
12439 /* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
12441 static bfd_boolean
12443 {
12445 }
12447 /* We use this to override swap_symbol_in and swap_symbol_out. */
12449 {
12462 bfd_elf32_write_out_phdrs,
12463 bfd_elf32_write_shdrs_and_ehdr,
12464 bfd_elf32_checksum_contents,
12465 bfd_elf32_write_relocs,
12466 elf32_arm_swap_symbol_in,
12467 elf32_arm_swap_symbol_out,
12468 bfd_elf32_slurp_reloc_table,
12469 bfd_elf32_slurp_symbol_table,
12470 bfd_elf32_swap_dyn_in,
12471 bfd_elf32_swap_dyn_out,
12472 bfd_elf32_swap_reloc_in,
12473 bfd_elf32_swap_reloc_out,
12474 bfd_elf32_swap_reloca_in,
12475 bfd_elf32_swap_reloca_out
12476 };
12478 #define ELF_ARCH bfd_arch_arm
12479 #define ELF_MACHINE_CODE EM_ARM
12480 #ifdef __QNXTARGET__
12481 #define ELF_MAXPAGESIZE 0x1000
12482 #else
12483 #define ELF_MAXPAGESIZE 0x8000
12484 #endif
12485 #define ELF_MINPAGESIZE 0x1000
12486 #define ELF_COMMONPAGESIZE 0x1000
12488 #define bfd_elf32_mkobject elf32_arm_mkobject
12490 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
12491 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
12492 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
12493 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
12494 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
12495 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free
12496 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
12497 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
12498 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
12499 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
12500 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook
12501 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
12502 #define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
12503 #define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
12505 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type
12506 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
12507 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
12508 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
12509 #define elf_backend_check_relocs elf32_arm_check_relocs
12510 #define elf_backend_relocate_section elf32_arm_relocate_section
12511 #define elf_backend_write_section elf32_arm_write_section
12512 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
12513 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
12514 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
12515 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
12516 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
12517 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections
12518 #define elf_backend_post_process_headers elf32_arm_post_process_headers
12519 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class
12520 #define elf_backend_object_p elf32_arm_object_p
12521 #define elf_backend_section_flags elf32_arm_section_flags
12522 #define elf_backend_fake_sections elf32_arm_fake_sections
12523 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr
12524 #define elf_backend_final_write_processing elf32_arm_final_write_processing
12525 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
12526 #define elf_backend_symbol_processing elf32_arm_symbol_processing
12527 #define elf_backend_size_info elf32_arm_size_info
12528 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map
12529 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers
12530 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
12531 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing
12532 #define elf_backend_is_function_type elf32_arm_is_function_type
12534 #define elf_backend_can_refcount 1
12535 #define elf_backend_can_gc_sections 1
12536 #define elf_backend_plt_readonly 1
12537 #define elf_backend_want_got_plt 1
12538 #define elf_backend_want_plt_sym 0
12539 #define elf_backend_may_use_rel_p 1
12540 #define elf_backend_may_use_rela_p 0
12541 #define elf_backend_default_use_rela_p 0
12543 #define elf_backend_got_header_size 12
12545 #undef elf_backend_obj_attrs_vendor
12547 #undef elf_backend_obj_attrs_section
12549 #undef elf_backend_obj_attrs_arg_type
12550 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
12551 #undef elf_backend_obj_attrs_section_type
12552 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
12553 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
12557 /* VxWorks Targets. */
12559 #undef TARGET_LITTLE_SYM
12560 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
12561 #undef TARGET_LITTLE_NAME
12563 #undef TARGET_BIG_SYM
12564 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
12565 #undef TARGET_BIG_NAME
12568 /* Like elf32_arm_link_hash_table_create -- but overrides
12569 appropriately for VxWorks. */
12573 {
12578 {
12583 }
12585 }
12587 static void
12589 {
12592 }
12594 #undef elf32_bed
12595 #define elf32_bed elf32_arm_vxworks_bed
12597 #undef bfd_elf32_bfd_link_hash_table_create
12598 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
12599 #undef elf_backend_add_symbol_hook
12600 #define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook
12601 #undef elf_backend_final_write_processing
12602 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
12603 #undef elf_backend_emit_relocs
12604 #define elf_backend_emit_relocs elf_vxworks_emit_relocs
12606 #undef elf_backend_may_use_rel_p
12607 #define elf_backend_may_use_rel_p 0
12608 #undef elf_backend_may_use_rela_p
12609 #define elf_backend_may_use_rela_p 1
12610 #undef elf_backend_default_use_rela_p
12611 #define elf_backend_default_use_rela_p 1
12612 #undef elf_backend_want_plt_sym
12613 #define elf_backend_want_plt_sym 1
12614 #undef ELF_MAXPAGESIZE
12615 #define ELF_MAXPAGESIZE 0x1000
12620 /* Symbian OS Targets. */
12622 #undef TARGET_LITTLE_SYM
12623 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
12624 #undef TARGET_LITTLE_NAME
12626 #undef TARGET_BIG_SYM
12627 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
12628 #undef TARGET_BIG_NAME
12631 /* Like elf32_arm_link_hash_table_create -- but overrides
12632 appropriately for Symbian OS. */
12636 {
12641 {
12644 /* There is no PLT header for Symbian OS. */
12646 /* The PLT entries are each one instruction and one word. */
12649 /* Symbian uses armv5t or above, so use_blx is always true. */
12652 }
12654 }
12656 static const struct bfd_elf_special_section
12657 elf32_arm_symbian_special_sections[] =
12658 {
12659 /* In a BPABI executable, the dynamic linking sections do not go in
12660 the loadable read-only segment. The post-linker may wish to
12661 refer to these sections, but they are not part of the final
12662 program image. */
12668 /* These sections do not need to be writable as the SymbianOS
12669 postlinker will arrange things so that no dynamic relocation is
12670 required. */
12675 };
12677 static void
12680 {
12681 /* BPABI objects are never loaded directly by an OS kernel; they are
12682 processed by a postlinker first, into an OS-specific format. If
12683 the D_PAGED bit is set on the file, BFD will align segments on
12684 page boundaries, so that an OS can directly map the file. With
12685 BPABI objects, that just results in wasted space. In addition,
12686 because we clear the D_PAGED bit, map_sections_to_segments will
12687 recognize that the program headers should not be mapped into any
12688 loadable segment. */
12691 }
12693 static bfd_boolean
12696 {
12700 /* BPABI shared libraries and executables should have a PT_DYNAMIC
12701 segment. However, because the .dynamic section is not marked
12702 with SEC_LOAD, the generic ELF code will not create such a
12703 segment. */
12706 {
12712 {
12716 }
12717 }
12719 /* Also call the generic arm routine. */
12721 }
12723 /* Return address for Ith PLT stub in section PLT, for relocation REL
12724 or (bfd_vma) -1 if it should not be included. */
12726 static bfd_vma
12729 {
12731 }
12734 #undef elf32_bed
12735 #define elf32_bed elf32_arm_symbian_bed
12737 /* The dynamic sections are not allocated on SymbianOS; the postlinker
12738 will process them and then discard them. */
12739 #undef ELF_DYNAMIC_SEC_FLAGS
12740 #define ELF_DYNAMIC_SEC_FLAGS \
12741 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
12743 #undef elf_backend_add_symbol_hook
12744 #undef elf_backend_emit_relocs
12746 #undef bfd_elf32_bfd_link_hash_table_create
12747 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
12748 #undef elf_backend_special_sections
12749 #define elf_backend_special_sections elf32_arm_symbian_special_sections
12750 #undef elf_backend_begin_write_processing
12751 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
12752 #undef elf_backend_final_write_processing
12753 #define elf_backend_final_write_processing elf32_arm_final_write_processing
12755 #undef elf_backend_modify_segment_map
12756 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
12758 /* There is no .got section for BPABI objects, and hence no header. */
12759 #undef elf_backend_got_header_size
12760 #define elf_backend_got_header_size 0
12762 /* Similarly, there is no .got.plt section. */
12763 #undef elf_backend_want_got_plt
12764 #define elf_backend_want_got_plt 0
12766 #undef elf_backend_plt_sym_val
12767 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
12769 #undef elf_backend_may_use_rel_p
12770 #define elf_backend_may_use_rel_p 1
12771 #undef elf_backend_may_use_rela_p
12772 #define elf_backend_may_use_rela_p 0
12773 #undef elf_backend_default_use_rela_p
12774 #define elf_backend_default_use_rela_p 0
12775 #undef elf_backend_want_plt_sym
12776 #define elf_backend_want_plt_sym 0
12777 #undef ELF_MAXPAGESIZE
12778 #define ELF_MAXPAGESIZE 0x8000