Core calls analyzers
[avr-sim.git] / Core.h
blob64faa89e605d66d28e5d895fbd1b060e94ea0c26
1 #ifndef AVR_CORE_H
2 #define AVR_CORE_H
4 #include "Types.h"
5 #include "SRam.h"
6 #include "Registers.h"
7 #include "Flash.h"
8 #include "Eeprom.h"
9 #include "MMU.h"
10 #include "Stack.h"
11 #include "Decoder.h"
13 #include <list>
16 * TODO move all the memory related parts to MMU to reduce the interface size
19 namespace avr {
21 class ERam;
22 class Bus;
23 class Analyzer;
24 class DebugInterface;
26 class Core {
27 public:
28 Core(Bus & bus, unsigned int ioSpaceSize,
29 unsigned int ramSize, unsigned int flashSize,
30 word stackMask, int pcBytes = 2, ERam *eram = 0);
31 ~Core();
33 public:
34 void init();
35 void loadFlash(unsigned char *data, unsigned int offset, unsigned int size);
37 /**
38 * Resets the core
40 void reset(unsigned int type);
42 /**
43 * Executes a single cpu cycle.
45 bool step();
47 void setDebugInterface(DebugInterface *dbgi);
49 public:
50 void addIOReg(unsigned int address,
51 const std::string & name, byte initial = 0);
52 const Register & getR(int r) const { return R[r]; }
53 IORegister & getIoreg(unsigned int offset);
54 IORegister *getIoreg(const std::string & name);
56 public:
57 byte readRegister(int r) const;
58 void writeRegister(int r, byte val);
59 byte readStatus() const;
60 void writeStatus(byte val);
61 byte readIORegister(int r) const;
62 void writeIORegister(int r, byte val);
63 byte readByte(unsigned int addr) const;
64 void writeByte(unsigned int addr, byte val);
65 byte readFlash(unsigned int addr) const;
66 int writeFlash(unsigned int addr, word data);
67 word fetchOperand();
69 public:
70 int pcBytes() const { return pc_bytes; }
71 void push(byte val);
72 byte pop();
73 void jump(sbyte offset, bool push = false);
74 int skip();
75 void call(dword address, bool push = true);
76 void ret(bool interrupt = false);
78 public:
79 void sleep();
80 bool interrupt(unsigned int vector, unsigned int addr);
82 private:
83 IORegisters regs;
84 SRam sram;
85 Flash flash;
86 ERam *eram;
88 private:
89 MMU mmu;
90 Stack stack;
91 Decoder decoder;
92 Bus & bus;
94 private:
95 static const unsigned int registerSpaceSize = 32;
96 Register R[registerSpaceSize];
97 unsigned char SReg;
98 dword PC;
99 int pc_bytes;
101 enum SleepMode {
102 SLEEP_MODE_IDLE = 0,
103 SLEEP_MODE_ADC_REDUX = 1,
104 SLEEP_MODE_PWR_DOWN = 2,
105 SLEEP_MODE_PWR_SAVE = 3,
106 SLEEP_MODE_reserved1 = 4,
107 SLEEP_MODE_reserved2 = 5,
108 SLEEP_MODE_STANDBY = 6,
109 SLEEP_MODE_EXT_STANDBY = 7
110 } sleepMode;
112 private:
113 std::list<Analyzer*> analyzers;
115 private:
116 DebugInterface *dbgi;
117 int cpuCycles;
119 friend class DebugInterface;
122 inline void Core::loadFlash(unsigned char *data, unsigned int offset, unsigned int size) {
123 flash.write(offset, data, size);
126 inline void Core::setDebugInterface(DebugInterface *dbgi) {
127 this->dbgi = dbgi;
130 inline IORegister & Core::getIoreg(unsigned int offset) {
131 return regs.getIoreg(offset);
134 inline IORegister *Core::getIoreg(const std::string & name) {
135 return regs.getIoreg(name);
140 #endif /*AVR_CORE_H*/